ee tee ene { PAGES Jesesssneee |sesessem JELECTRONIC] i : { CFi~ Line Output Stage Design and Measurements | DEVELOP. | reece 1 [es ILABORATORY} NAME: Paulo R.Fernandes/Akira Kawakami! DATE I Vanseeenses Introduction ia 2dessecenees List Of Applied Simbols Baisccccsce Line Output Stage 1 1 1 1 i t I 1 t Ads seseeeees Line, Coil Inductance Calculation i 7 a ¥ Dreseeeeesee Determining Fly-Back Tuning Capacitor i O)eaceacecee Determining S+Correction Capacitor D seeeees The Diode Modulator Circuit Baceeeseses The Driver Circuit 8.5.. Operating conditions of the Line output, transistor 8.2.. Driver transistor * 8.3.. Interface between TDA2577A and driver transistor Measurements on driver transistor «+ Measurements veeeees Final Circuit Diagram Development Laboratory CTV Paulo R. Fernandes €.c. messrs : Vohringer, | Catia | Paes ] Sicoti Arnone Zamor ano Barros Vielra | Kawakami |“419. INTRODUCTION : 1.4. The following problems were observed ot CFI-R chassis (44CT4045/98), second analy. dels Insuficient picture width 21esveq 30 Queso “Tasumerenré too high horizontal Linearity distortion €urtain effect (ringing “bars on screen) line output transitor. ‘rather loaded mat Cause of these problens'was basically. the tine deflexion coil connected to a booster tape of the L.0. transformer. To overcome above problems the inductance of the horizontal deflexion coil was lowered from 1: 76uH Sprevious value)to twH, connected then to the collector of the Line output transitor, * 7 Then the following probiems' were observed: too high picture width : high collector current of L.0.Transi tor diode modulator circuit heavely loaded line output transitor rather loaded brag This report presents step by step the calculation of the optimal Line Inductance for the application. Also measurenents of both proposed circuits (e.g. with f aH and 4.22mH)are given.1 NRTOTE7BATVE 2). LIST OF APPLYED SIMBOLS Ch seeeeas Diode modulator tunning capacitor CS seaeaee S ~ correction capacitor cy. Flyback tuning capacitor Em ssssaee Electromagnetical energy Ic ...se4. End of scan collector current of L.d.trans, Ip’ seseeee Gurrent thought Le on Ty seeeeae Deftexion current Iypp «2.22. Peak to peak deflexion current Lin ssseses Diode wadulator coil Inductance Lp saseeee Flyback trafo primary inductance Equivalent collettor inductance tLy = saeeeee Line coil inductance Rb .s44... Base resistor of L.0. Transistor +. Primary Internal resistance of driver trafo RS ssesees Serles resist.pos.3502 see attached diagram i i tS ceeecee Scan time Vbe s.ssea. Base ewitter voltage of L.0. transistor Veesat...... ‘Saturation voltage of L.0. transistor +++ Deflexion voltage, Vil baeee “Diode modulator average voltage Vo ssssaee Stabilized supply voltage Flyback trafo primayy voltage Primary voltage of driver trafo Secundary voltage of driver trafo Secundary Internal resist. of driver trafo