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2. Syllabus
SPICE internals and algorithms SPICE semiconductor models o Diode o BJT o MOSFET
3. Problem Sheet
An exercise done in SPICE in the labs which gets you used to the SPICE model parameters, and shows you some of the dynamic effects of devices that you have seen the theory for in the first part of the course.
4. Recommended Reading
This part of the devices course is relatively self contained. If, however, you want to know more about SPICE, the following are good books: Semiconductor Device Modelling with SPICE, Giuseppe Massobrio and Paolo Antognetti, McGraw-Hill Inc. Inside SPICE, overcoming the obstacles of circuit simulation, Ron Kielkowski, McGraw-Hill Inc. SPICE for circuits and electronics using PSpice, Muhammad H. Rashid, Prentice Hall
5. Introduction
You received an introduction to SPICE in the first year design project. Briefly, to remind you of the history and development of the software: SPICE (Simulation Program with Integrated Circuit Emphasis) is a well-known circuit simulator computer program which began with a mainframe program written at UC Berkeley by Lawrence Nagel (and others) during his PhD. The SPICE solver or engine (the core part of the program i.e. the part that solves the circuit equations) is free software but it is command line driven and is thus regarded as difficult to use. Commercial versions (mostly based on the 2G7 release of the Berkeley program [PSpice is based on 2G7]) are available which provide a graphical interface and up to date component libraries In this part of the course we will look briefly at the internal workings of SPICE, the semiconductor models that are used and how they relate to the device theory you have already studied. EE2.3 Semiconductor Modelling in SPICE / PDM v1.0 5
We will look in detail at how SPICE solves DC bias point simulations and then look briefly at some other types of simulation. DC type calculations are fundamental to the operation of the other types of simulation and (with the exception of transient simulations) - easy to extend the DC analysis that SPICE does to the other types of analysis.
R1 R2 R3 R4 I1
n1 n0 n2 n0 n0
n2 n2 n3 n3 n1
5 10 5 10 3
Figure 1 Simple circuit with current source excitation
V1 V2 3+ =0 5
V2 V1 V2 V2 V3 + + =0 5 10 5
V3 V2 V3 + =0 5 10
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SPICE always tries to solve for nodal voltages which satisfy KCL by forming an equation of the form:
[G] [V ] = [I ]
The current matrix is known. This is important. Mostly the entry in the current matrix will be zero as KCL requires currents into a node sum to zero), It will be non-zero if an active device, such as a current source, is present. In other words, the I matrix lists the current being actively injected into each node. Changing the current source for a voltage source makes it harder to solve(!) Lets try doing the same thing with voltage sources:
[R] [I ] = [V ]
EE2.3 Semiconductor Modelling in SPICE / PDM v1.0 9
V1 V2 =0 5 V2 V1 V2 V2 V3 + + =0 5 10 5 I1 +
V3 V2 V3 =0 5 10
We cannot form the matrix equations the voltages at the nodes (other than n1) are not known we do not know the [V] matrix in its entirety and thus cannot perform Gaussian elimination!
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Therefore, we would like to analyse circuits with current sources instead of voltage sources because the [I] matrix is always known, and we can therefore solve the circuit using Gaussian elimination. This is a special property about current excited circuits. Remarkable but true! So how do we cope with a voltage source in the circuit? After all, power supplies and batteries are voltage sources, not current sources! Use a Norton Equivalent circuit argument. Although it is not always clear how to do this as we will now see.
It is clear that in the case of Figure 2 on the last slide, the voltage source and current source could easily be converted into a Norton equivalent source. But.
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How can you convert this circuit with branches into a Norton source?
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V1 V1 5 + + Is exp = 0 vt 2
This single nodal KCL equation is a transcendental (meaning it is an equation involving terms other than simple polynomials which generally cannot be rearranged so that the variable becomes the subject of the equation) and thus the equation can only be solved numerically.
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If we tried to form this into our G*V=I form and solve the normal way we would get:
V1 [0.5][V1 ] = 5 I s exp V t
We do not need to make any Gaussian elimination operations to solve this because there is only 1 node But it is still not clear how to solve it because it is transcendental.
But we can solve it using the Newton-Raphson algorithm, with which you should be familiar..
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Lets remind ourselves how this works. The Newton-Raphson algorithm is as follows:
Vn+1
Where Vn+1 is the voltage at the next iteration and Vn is the voltage at the current iteration. This does not mean the voltage at node n or node n+1. For the simple circuit above:
V1 F (V1 ) = 5 I s exp V 0.5V1 t
Therefore we have:
V1n 5 I s exp V 0.5V1n t = V1n V1n I sV1n exp V 0.5 t
V1n +1
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V2 V1 3+ =0 5
V2 V2 V1 V2 + + I s exp =0 5 10 Vt
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3 V 0 . 2 0 . 2 1 0 0.1 V 2 = I s exp V2 3 V t
Then, Newton-Raphson will be used to solve the transcendental equation for V2, before back substitution is used to find V1. We now have an idea how SPICE can solve with resistors, but what about L and C? EE2.3 Semiconductor Modelling in SPICE / PDM v1.0 17
How are inductors and capacitors solved in a DC bias point simulation? Simple - Capacitors are set open circuit and inductors to short circuit.
You now know the basics of how SPICE solves operating point (static DC analysis) problems!
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There are limits that must be set by the SPICE user for the accuracy of the simulations (or, as you have done up to now, you can simply accept the default values). The important parameters are:
RELTOL Fractional tolerance of voltages and currents VNTOL Node voltage tolerance ABSTOL Current branch tolerance ITL1 The number of iterations allowed for a bias point calculation
If we only have tolerances on voltages, non-linear elements may cause problems with branch currents The ABSTOL parameter was introduced in SPICE version 2 to overcome this problem
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1. If number of iterations > ITL1, break 2. Do Newton-Raphson iteration to solve for nodal voltages 3. Check the solutions against VNTOL and RELTOL 4. If solution not converged within parameters, goto 2, else goto 5 5. Check branch currents (known from the nodal voltages) against ABSTOL and RELTOL 6. If not converged, goto 1 else finish
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22
V1 1
V1 2
V1 1
V1 2 V1 3
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Imagine that the first guess had been at a lower voltage. Then the tangent at the first iteration would be almost vertical and the algorithm can get stuck. There are convergence problems associated with very high conductance There are convergence problems associated with very high resistance
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This means that the slope of the exponential of the diode in reverse bias is at least equal to GMIN. EE2.3 Semiconductor Modelling in SPICE / PDM v1.0 25
In addition, GMIN is the minimum conductance allowed between any two neighbouring nodes in SPICE. If you set a resistance between two nodes with a conductance of less than GMIN, the simulator will not run. Be careful when you set GMIN Think before you simulate! Will it alter the outcome of the simulation?
Why alter the defaults? Think about the simulation you are running
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7.6. AC Simulations
So far, we have seen SPICE effectively solve linear and non-linear elements in DC simulations. Performing an AC simulation is not so different from a DC simulation! This is because SPICE does not simulate non-linear elements in the AC simulation no Newton-Raphson When you do an AC simulation in SPICE to get a bode plot of a circuits frequency response, the simulator makes linearised small-signal models of any non-linear devices. These are essentially the same models as you have seen in your analogue electronics course. SPICE solves the nodal equations in almost exactly the same way as it would for a DC simulation only now the program cannot set inductances to short circuits and capacitors to open circuit. They simply become complex impedances. Consequently, at each given frequency, SPICE solves the matrix equations of the form [G][V]=[I], where the matrices now become complex. 28 EE2.3 Semiconductor Modelling in SPICE / PDM v1.0
Example of an AC solution
V1 V2 3+ =0 5 V2 V1 V2 V2 V3 + + =0 5 10 5
V3 V2 j 50V3 = 0 5
0 V1 3 0.2 0.2 0.2 0.5 0.2 V2 = 0 0.2 0.2 50 j 0 V3 0
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What happens if you simulate an opamp in AC mode with a gain of 100 and an input voltage of 10 V?
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9. Next time.
We will look at the SPICE diode model EE2.3 Semiconductor Modelling in SPICE / PDM v1.0 32