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Code No: RR210202
JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, HYDERABAD
B.Tech II Year I Semester Examinations, May/June-2013
Pulse and Digital Circuits
(Common to EEE, ECE)
Time: 3 hours Max. Marks: 80
Answer any five questions
All questions carry equal marks
- - -

1.a) Prove that an RC low pass circuit behaves as a good integrator if RC >15T where
T is the Period of the input sinusoid E
m
sint.
b) Write about Attenuators. [8+8]

2.a) With a neat diagram explain about Emitter- coupled Clipper.
b) Write about Diode comparator and its applications in pulse time modulation.
[8+8]

3.a) With appropriate diagrams explain about Transistor switching times.
b) Write about Saturation parameters of Transistor and their variation with
temperature. [8+8]

4. Design a bistable multivibrator with following specifications
I
CC
= I
BB
= 12I, I
C
(sot) = 6mA, b
PL
(minimum) = 25, Maximum trigger
frequency = 25KHz. [16]

5.a) Discuss about Transistor Bootstrap time base generators.
b) A Transistor Bootstrap Ramp generator is to produce 15V, 5ms output to a 2K
load resistor the ramp is to be linear with in 2%. Design a suitable circuit using
I
CC
= 22V, -I
LL
= -22V and Transistor with b
PL
(min) = 25. The input pulse has
an amplitude of -5V, pulse width=5ms and space width = 2.5ms. [8+8]

6.a) Write about frequency division by a RC controlled astable blocking oscillator.
b) Explain about (a) Phase delay (b) Phase Jitter. [8+8]

7.a) Derive expression for control voltages and their maximum and minimum values
for a four diode sampling gate.
b) Explain about a six diode sampling gate and mention its values specification.
[8+8]

8.a) With a neat circuit diagram and truth table explain the working of a NOT gate.
b) Draw the logic diagram of the following gates using AOI logic. (i) XOR
(ii) XNOR gates. [8+8]


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RR
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