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MODEL : 32LS3400
CAUTION
32LS3400-SA
BEFORE SERVICING THE CHASSIS, READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in Korea
CONTENTS
CONTENTS . ............................................................................................. 2 PRODUCT SAFETY ................................................................................. 3 SPECIFICATION........................................................................................ 4 ADJUSTMENT INSTRUCTION................................................................. 8 TROUBLE SHOOTING............................................................................. 17 BLOCK DIAGRAM. .................................................................................. 22 EXPLODED VIEW .................................................................................. 23 SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-2-
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and Exploded View. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the servicing of a receiver whose chassis is not isolated from the AC power line. Use a transformer of adequate power rating as this protects the technician from accidents resulting in personal injury from electrical shocks. It will also protect the receiver and it's components from being damaged by accidental shorts of the circuitry that may be inadvertently introduced during the service operation. If any fuse (or Fusible Resistor) in this TV receiver is blown, replace it with the specified. When replacing a high wattage resistor (Oxide Metal Film Resistor, over 1 W), keep the resistor 10 mm away from PCB. Keep wires away from high voltage or high temperature parts.
With the instrument AC plug removed from AC source, connect an electrical jumper across the two AC plug prongs. Place the AC switch in the on position, connect one lead of ohm-meter to the AC plug prongs tied together and touch other ohm-meter lead in turn to each exposed metallic parts such as antenna terminals, phone jacks, etc. If the exposed metallic part has a return path to the chassis, the measured resistance should be between 1 M and 5.2 M. When the exposed metal has no return path to the chassis the reading must be infinite. An other abnormality exists that must be corrected before the receiver is returned to the customer.
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-3-
NOTE : Specifications and others are subject to change without notice for improvement.
SPECIFICATION
1. Application range
This spec sheet is applied all of the 22, 32, 37, 42, 47, 50, 55 LCD TV with LJ21A/B/C chassis
3. Test method
2. Test condition
1) Performance: LGE TV test method followed 2) Demanded other specification - Safety : CE, IEC specification - EMC: CE, IEC
Each part is tested as below without special notice. 1) Temperature : 25 C 5 C, CST : 40 C5 C 2) Relative Humidity: 65 % 10 % 3) Power Voltage Standard input voltage (100~240V@ 50/60Hz) * Standard Voltage of each products is marked by models. 4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with BOM. 5) The receiver must be operated for about 20 minutes prior to the adjustment.
4. General Specification
No 1. 2. Item Receiving System Available Channel Specification 1) SBTVD / NTSC / PAL-M / PAL-N 1) VHF : 02~13 2) UHF : 14~69 3) CATV : 01~135 1) AC 100 ~ 240V 50/60Hz Central and South AMERICA 22 inch Wide (1366 768) 32 inch Wide (1366 768) 22LS3500-SA 32CS460-SA/SZ 32LS3400-SA 32LM3400-SB 32LS3500-SA 32CS560-SA 32LS4600-SA 37LS3400-SA 37LM3400-SB 42CS460-SA 42CS560-SA 42LS3400-SA 42LS4600-SA 42LM3400-SB 42LS4600-SA 42LM5800-SB 47LS4600-SA 47LM4600-SB 47LM5800-SB 50LS4000-SA 55LM4600-SB Measurement Result Remark
3. 4. 5.
32 inch Wide (1920 1080) 37 inch Wide (1366 768) 42 inch Wide (1920 1080)
50 inch Wide (1920 1080) 55 inch Wide (1920 1080) 6. 7. Aspect Ratio Tuning System 16:9 FS
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-4-
No 8. Module
Item
Specification V216BG1-LE1 LC320WXN-SCA2 LC320WXE-SCA1 LC320WUN-SCA2 T320HVN01.4 LC320DXN-SER2 LC320DXN-SEU2 LC320EXN-SEA2 T320XVN01.1 LC320EUN-SEM2 LC370DXN-SER2 LC370DXN-SEU2 LC420WUE-SCA2 T420HVN02.1 LC420DUN-SER2 LC420DUN-SEU2 LC420EUE-SEM1 LC420EUE-SEF1 LC470EUE-SEM1 LC470EUE-SEF1 LC550EUE-SEF1
Measurement HD, 60Hz HD, 60Hz HD, 60Hz FHD, 60Hz FHD, 60Hz HD, 60Hz HD, 60Hz HD, 60Hz HD, 60Hz FHD, 60Hz FHD, 60Hz FHD, 60Hz FHD, 60Hz HD, 60Hz FHD, 60Hz FHD, 60Hz FHD, 120Hz FHD, 60Hz FHD, 120Hz FHD, 120Hz CMI
Result LGD LGD LGD AUO LGD LGD LGD AUO LGD LGD LGD AUO LGD LGD LGD LGD LGD LGD LGD
Remark 22LS3500-SA 32CS460-SA 32CS460-SZ 32CS560-SA 32CS560-SA 32LS3400-SA 32LM3400-SB 32LS3500-SA 32LS3500-SA 32LS4600-SA 37LS3400-SA 37LM3400-SB 42CS460-SA 42CS560-SA 42CS460-SA 42CS560-SA 42LS3400-SA 42LM3400-SB 42LS4600-SA 42LM5800-SB 47LS4600-SA 47LM5800-SB 47LM4600-SB 55LM4600-SB
9. 10.
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-5-
RGB PC Monitor Range Limits Min Vertical Freq - 58 Hz Max Vertical Freq - 62 Hz Min Horiz. Freq - 30 kHz Max Horiz. Freq - 83 kHz Pixel Clock - 160 MHz
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-6-
HDMI Monitor Range Limits Min Vertical Freq - 58 Hz Max Vertical Freq - 62 Hz Min Horiz. Freq - 30 kHz Max Horiz. Freq - 83 kHz Pixel Clock - 160 MHz
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-7-
ADJUSTMENT INSTRUCTION
1. Application
This spec sheet is applied all of the LCD TV with LJ21A/B/C chassis
2. Designation
(1) T he adjustment is according to the order which is designated and which must be followed, according to the plan whic al Unit: Product Specification Standard. (2) Power adjustment : Free Voltage. (3) Magnetic Field Condition: Nil. (4) Input signal Unit: Product Specification Standard. (5) Reserve after operation: Above 5 Minutes (Heat Run). Temperature : at 25 C5 C Relative humidity : 65 10% Input voltage : 100~220V, 50/60Hz (6) A djustment equipments : Color Analyzer (CA-210 or CA-110), SVC remote controller (7) Push The IN STOP KEY For memory initialization.
Case1 : Software version up 1) A fter downloading S/W by USB , TV set will reboot automatically 2) Push In-stop key 3) Push Power on key 4) Function inspection 5) After function inspection, Push In-stop key. Case2 : Function check at the assembly line 1) When TV set is entering on the assembly line, Push In-stop key at first. 2) Push Power on key for turning it on. => If you push Power on key, TV set will recover channel information by itself. 3).After function inspection, Push In-stop key.
(4) C lick Connect tab. If Cant is displayed, Check connection between computer, jig, and set.
(2) (3)
Please Check the Speed To use speed between from 200KHz to 400KHz
(5) Click Auto tab and set as below. (6) Click Run. (7) After downloading, check OK message.
(4) filexxx.bin (5)
(7)...........OK
(6)
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-8-
(1) Put the USB Stick to the USB socket. (2) Automatically detecting update file in USB Stick. - If your downloaded program version in USB Stick is Low, it didn't work. But your downloaded version is High, USB data is automatically detecting (3) Show the message "Copying files from memory"
(5) After updating is complete, The TV will restart automatically. (6) If TV turns on, check your updated version and Tool option. (refer to the next page about tool option) * If downloading version is higher than your TV have, TV can lost all channel data. In this case, you have to channel recover. If all channel data is cleared, you didn't have a DTV/ATV test on production line.
* RS-232C Connection Method Connection : P CBA (USB Port) -> USB to Serial Adapter (UC-232A) -> RS-232C cable -> PC(RS-232C port) Product name of USB to Serial Adapter is UC-232A. Caution: LJ21* chassis support only UC-232A driver. ( only use this one. )
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
-9-
Color Temperature
Medium
9,300k
=> Caution : Using power on button of the Adjustment R/C, power on TV. ADC Calibration Protocol (RS232C/USB)
NO Enter Adjust MODE ADC adjust Item Adjust Mode In ADC Adjust CMD 1 A CMD 2 A Data 0 0 0 When transfer the Mode In, Carry the command. Automatically adjustment (The use of a internal pattern) Color Temperature
Warm
6,500k
Cool
13,000k
Medium
9,300k
Adjust Sequence aa 00 00 [Enter Adjust Mode] xb 00 40 [Component1 Input (480i)] ad 00 10 [Adjust 480i Comp1] xb 00 60 [RGB Input (1024*768)] ad 00 10 [Adjust 1024*768 RGB] aa 00 90 End Adjust mode * Required equipment : Adjustment R/C.
Warm
6,500k
Cool
13,000k
Color Temperature
Medium
9,300k
Check Input and Signal items. (cf. work instructions) (1) TV (2) AV (CVBS) (3) COMPONENT (480i) (4) RGB (PC : 1024 x 768 @ 60hz) (5) HDMI (6) PC Audio In * Display and Sound check is executed by Remote controller. Caution : Not to push the INSTOP KEY after completion if the function inspection
Warm
6,500k
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- 10 -
Edge LED W/B Table in process of time (Only LGD except AUO/ CMI) LS35/46, LM58 Tool ( LED LCD TV Model ) CA210 : CH 14, Test signal : Inner pattern (80IRE) Standard color coordinate and temperature using CA-1000 (by H/R time)
Cool H/R Time(Min) 1 2 3 4 5 6 7 8 9 0-2 3-5 6-9 10-19 20-35 36-49 50-79 80-119 Over 120 x 269 280 279 277 276 274 272 271 270 269 y 273 287 285 284 283 280 277 275 274 273 Medium x 285 296 295 293 292 290 288 287 286 285 x 293 307 305 304 303 300 297 295 294 293 y 313 320 319 317 316 314 312 311 310 309 Warm x 329 337 335 334 333 330 327 325 324 323
Auto adjustment Map(RS-232C) RS-232C COMMAND [ CMD ID DATA ] Wb 00 00 White Balance Start Wb 00 ff White Balance End
RS-232C COMMAND [CMD ID DATA] Cool R Gain G Gain B Gain R Cut G Cut B Cut jg jh ji Mid Ja Jb Jc Warm jd je jf 00 00 00 MIN Cool 172 172 192 64 64 64 CENTER (DEFAULT) Mid 192 192 192 64 64 64 Warm 192 192 172 64 64 64 192 192 192 128 128 128 MAX
Connecting picture of the measuring instrument (On Automatic control) Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C POWER-ON -> Enter the mode of White-Balance, the pattern will come out.
** Caution ** Color Temperature : COOL, Medium, Warm. One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0. (when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module) *Manual W/B process using adjusts Remote control. After enter Service Mode by pushing ADJ key, Enter White Balance by pushing key at 7. White Balance.
Auto-control interface and directions (1) Adjust in the place where the influx of light like floodlight around is blocked. (Illumination is less than 10ux). (2) Adhere closely the Color Analyzer ( CA210 ) to the module less than 10cm distance, keep it with the surface of the Module and Color Analyzers Prove vertically.(80~100). (3) Aging time - After aging start, keep the power on (no suspension of power supply) and heat-run over 5 minutes. - Using no signal or full white pattern or the others, check the back light on.
After You finish all adjustments, Press In-start button and compare Tool option and Area option value with its BOM, if it is correctly same then unplug the AC cable. I f it is not same, then correct it same with BOM and unplug AC cable. For correct it to the models module from factory JIG model. P ush The IN STOP KEY after completing the function inspection. And Mechanical Power Switch must be set ON.
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 11 -
Connect D-sub Signal Cable to D-Sub Jack. Write EDID DATA to EEPROM (24C02) by using DDC2B protocol. Check whether written EDID data is correct or not. * For SVC main Assy, EDID have to be downloaded to Insert Process in advance.
Caution * Use the proper signal cable for EDID Download - Analog EDID : Pin3 exists - Digital EDID : Pin3 exists => Caution -N ever connect HDMI & D-sub Cable at the same time. - Use the proper cables below for EDID Writing. - Download HDMI1, HDMI2 separately because HDMI1 is different from HDMI2.
For Analog EDID D-sub to D-sub For HDMI EDID DVI-D to HDMI or HDMI to HDMI
Connect HDMI Signal Cable to HDMI Jack. Write EDID DATA to EEPROM(24C02) by using DDC2B protocol. Check whether written EDID data is correct or not. * For SVC main Assy, EDID have to be downloaded to Insert Process in advance.
1) All Data : HEXA Value 2) Changeable Data : *: Serial No : Controlled / Data:01 **: Month : Controlled / Data:00 ***:Year : Controlled ****:Check sum - Auto Download After enter Service Mode by pushing ADJ key, Enter EDID D/L mode. Enter START by pushing OK key.
No. 1 2 3
EDID DATA (1) HD EDID Data CheckSum HDMI 1 HDMI 2 A4/5B A4/4B Physical Address (0x9E) 10 20
Download
00
10
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- 12 -
(2) FHD EDID Data(Deep Color support) CheckSum HDMI 1 HDMI 2 HDMI 3 - HDMI 43/DE 43/CE 43/BE Physical Address (0x9E) 10 20 30
(3) FHD EDID Data(Deep Color not support) CheckSum HDMI 1 HDMI 2 HDMI 3 - HDMI 43/25 43/15 43/05 Physical Address (0x9E) 10 20 30
-RGB
-RGB
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
- 13 -
(4) 3D EDID Data(Deep Color not support) CheckSum HDMI 1 HDMI 2 HDMI 3 - HDMI 43/23 43/13 43/03 Physical Address (0x9E) 10 20 30
Connect: USB port Communication Prot connection Com 1,2,3,4 and 115200(Baudrate) Mode check: Online Only Check the test process: DETECT -> MAC -> CI -> Widevine . Play: START . Result: Ready, Test, OK or NG . Printer Out (MAC Address Label)
LAN Port connection with PCB Network setting at MENU Mode of TV setting automatic IP Setting state confirmation If automatic setting is finished, you confirm IP and MAC Address.
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- 14 -
1) Play the LAN Port Test PROGRAM. 2) Input IP set up for an inspection to Test Program. *IP Number : 12.12.2.2 1) Play the LAN Port Test Program. 2) connect each other LAN Port Jack. 3) Play Test (F9) button and confirm OK Message. 4) Remove LAN CABLE
Step1) Turn on TV. Step2) P ress P-only key, enter to power only mode and escape the P-only Mode by pressing Exit key Step3) Press Tilt key, entrance to Local Dimming mode. Step4) At the Local Dimming mode, module Edge Backlight moving Top to bottom Back light of module moving Step5) confirm the Local Dimming mode Step6) Press Exit key
6. 3D Function Test
(Pattern Generator MSHG-600, MSPG-6100 [SUPPORT HDMI1.4]) * HDMI mode NO. 872 , pattern No.83 1) Please input 3D test pattern like below (HDMI mode NO. 872 , pattern No.83)
When pressing IN-STOP key by SVC remocon, Red LED are blinked alternatively. And then automatically turn off. (Must not AC power OFF during blinking)
Confirm whether is normal or not when between power board's ac block and GND is impacted on 1.5kV(dc) or 2.2kV(dc) for one second. GND TEST = P OWER CORD GND and SIGNAL CABLE GND Hi-pot TEST = POWER CORD GND and LIVE&NUETRAL Test Process (1) Check the POWER CABLE and SIGNAL CABLE insertion condition. (2) Connect the AV JACK Tester (3) Controller(GWS103-4) on (4) GND TEST(Auto) - If Test is failed, Buzzer operate - If Test is passed, execute next process(HI-pot test) - Remove A/V CORD from A/V JACK BOX (5) HI-POT test(Auto) - If Test is failed, Buzzer operate -I f Test is passed, GOOD Lamp on and move to next process automatically.
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- 15 -
Step 1) Turn on TV Step 2) Press EYE key of Adj. R/C Step 3) Cover the Eye Q II sensor on the front of the using your hand and wait for 6 seconds Step 4) Confirm that R/G/B value is lower than 10 of the Raw Data (Sensor data, Back light ). If after 6 seconds, R/G/B value is not lower than 10, replace Eye Q II sensor Step 5) Remove your hand from the Eye Q II sensor and wait for 6 seconds Step 6) Confirm that ok pop up. If change is not seen, replace Eye Q II sensor
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- 16 -
TROUBLE SHOOTING
No power
: [A] PROCESS
Fail
Fail
Fail
Pass
Fail
Fail
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- 17 -
: [B] Process
Fail
Repeat A PROCESS
Fail
Fail
Fail
Change IC1401
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- 18 -
No Raster on HDMI Signal Pass Check Input source Cable And Jack Pass Check the Input/Output Of JK801, JK802, JK803 Pass Re-soldering or Change the defect part Check the Instart Menu EDID D/L Status Pass Check the Input/Output Of IC103 Pass Check the Input/Output Of IC101 Pass Repeat [A], & [B] Process Fail Re-soldering or Change the defect part Fail Re-soldering or Change the defect part. Re-download HDCP Fail Re-download EDID Data] (Adjust Menu EDID D/L) Fail Re-soldering or Change the defect part
Pass
Fail
Pass
Fail
Pass
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- 19 -
Pass
Pass
Pass
Pass
Fail
Fail
Pass
Pass
Fail
Fail
Pass
Pass
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- 20 -
No Sound
Fail
Pass
Fail
Pass
Fail
Change Speaker
Pass
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- 21 -
X-tal
24M IF +/-
LVDS (FHD/50Hz)
FPC(51P)
TDSNTDSNB001F
TU_CVBS SIF TU_SW DDR3 Add. DDR3 Data DDC/ D[0:2]/ CK/ HPD Y/Pb/Pr, L/R CVBS, Y/Pb/Pr, L/R I2C SPI SERIAL FLASH IC1401 (8M bit) MX25L8005M2I
Copyright LG Electronics. Inc. All rights reserved. Only for training and service purposes
DDR3 1Gb IC1201 H5TQ1G63DFR DDR3 1Gb IC1202 H5TQ1G63DFR AT24C256C-SSHL-T IC104 256Kbit
NAND FLASH IC102 (1Gbit)
Rear
HDMI1/2(DVI)
EEPROM
Component2 Component1&AV
BLOCK DIAGRAM
RGB PC
LGE2112-T8 IC101
SENSOR_SCL/SDA
PC/DVI Audi In
SPDIF
Ethernet
CONTROL IR & LED / SOFT TOUCH (TACT SWITCH) SOFT TOUCH _SCL/SDA
Side
HDMI3
TMDS
USB1
DP/DM
I2S
SPK L/R
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the Schematic Diagram and EXPLODED VIEW. It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. Do not modify the original design without permission of manufacturer.
521
400
540
800
LV1
820
530
200
550
810
910
900
120
310
A5
A7
300
510
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- 23 -
A2
A21
LGE Internal Use Only
A10
IC102 NAND01GW3B2CN6E +3.3V_Normal NC_1 NC_2 NC_3 NC_4 OS R107 1K OS R109 3.9K NC_5 NC_6 RB NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VDD_2 OS C102 10uF +3.3V_Normal 1 48 NAND_FLASH_1G_NUMONYX EAN60762401 47 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
OS 22 AR101
PCM_A[7] PCM_A[6] PCM_A[5] PCM_A[4]
PCM_D[0-7] PCM_D[0] PCM_D[1] PCM_D[2] PCM_D[3] PCM_D[4] PCM_D[5] PCM_D[6] PCM_D[7] PCM_A[0-14] PCM_A[0]
S7LR2_DIVX_MS10
W21 AA18 AB22 AE20 AA15 AE21 AB21 Y15 W20 V20 W22 AB18 AA20 AA21 Y19 AB17 Y16 AB19 AB20 AA16 AA19 AC21 AA17 Y20 PCMADR[0]/GPIO125 PCMADR[1]/GPIO124 PCMADR[2]/GPIO122 PCMADR[3]/GPIO121 PCMADR[4]/GPIO99 PCMADR[5]/GPIO101 PCMADR[6]/GPIO102 PCMADR[7]/GPIO103 PCMADR[8]/GPIO108 PCMADR[9]/GPIO110 PCMADR[10]/GPIO114 PCMADR[11]/GPIO112 PCMADR[12]/GPIO104 PCMADR[13]/GPIO107 PCMADR[14]/GPIO106 GPIO_PM[0]/GPIO6 PM_UART_TX/GPIO_PM[1]/GPIO7 GPIO_PM[2]/GPIO8 GPIO_PM[3]/GPIO9 GPIO_PM[4]/GPIO10 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12 PCMREG_N/GPIO123 AB15 PCMOE_N/GPIO113 PCMWE_N/GPIO197 PCMIORD_N/GPIO111 PCMIOWR_N/GPIO109 AD21 PM_SPI_SCK/GPIO1 PCMCE_N/GPIO115 PCMIRQA_N/GPIO105 PCMCD_N/GPIO130 PCMWAIT_N/GPIO100 PCM_RESET/GPIO129 Y14 U21 TS0CLK/GPIO87 PCM2_CE_N/GPIO131 PCM2_IRQA_N/GPIO132 PCM2_CD_N/GPIO135 PCM2_WAIT_N/GPIO133 PCM2_RESET/GPIO134 D4 UART1_TX/GPIO43 UART1_RX/GPIO44 UART2_TX/GPIO65 UART2_RX/GPIO64 UART3_TX/GPIO47 UART3_RX/GPIO48 TS0DATA_[0]/GPIO77 TS0DATA_[1]/GPIO78 TS0DATA_[2]/GPIO79 TS0DATA_[3]/GPIO80 TS0DATA_[4]/GPIO81 TS0DATA_[5]/GPIO82 TS0DATA_[6]/GPIO83 TS0DATA_[7]/GPIO84 AC15 TS1CLK/GPIO98 I2C_SCKM2/DDCR_CK/GPIO72 I2C_SDAM2/DDCR_DA/GPIO71 D2 D1 DDCA_DA/UART0_TX DDCA_CK/UART0_RX TS1DATA_[0]/GPIO88 TS1DATA_[1]/GPIO89 TS1DATA_[2]/GPIO90 P21 TS1DATA_[3]/GPIO91 PWM0/GPIO66 PWM1/GPIO67 PWM2/GPIO68 PWM3/GPIO69 PWM4/GPIO70 PWM_PM/GPIO199 TS1DATA_[4]/GPIO92 TS1DATA_[5]/GPIO93 TS1DATA_[6]/GPIO94 TS1DATA_[7]/GPIO95 TS1VALID/GPI96 TS1SYNC/GPIO97 AD16 AE15 AE14 AC13 AC14 AD12 AD13 AD14 FE_TS_DATA[0] FE_TS_DATA[1] FE_TS_DATA[2] FE_TS_DATA[3] FE_TS_DATA[4] FE_TS_DATA[5] FE_TS_DATA[6] FE_TS_DATA[7] AD15 AC16 TS0VALID/GPIO85 TS0SYNC/GPIO86 Y13 Y11 AA12 AB12 AA14 AB14 AA13 AB11 CI_TS_DATA[0] CI_TS_DATA[1] CI_TS_DATA[2] CI_TS_DATA[3] CI_TS_DATA[4] CI_TS_DATA[5] CI_TS_DATA[6] CI_TS_DATA[7] FE_TS_CLK FE_TS_VAL_ERR FE_TS_SYNC FE_TS_DATA[0-7] AA10 Y12 V21 R20 T20 U22 CI_TS_CLK CI_TS_VAL CI_TS_SYNC CI_TS_DATA[0-7] PM_SPI_CZ0/GPIO_PM[12]/GPIO0 PM_SPI_SDI/GPIO2 PM_SPI_SDO/GPIO3 GPIO_PM[7]/GPIO13 GPIO_PM[8]/GPIO14 GPIO_PM[9]/GPIO15 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 GPIO_PM[11]/GPIO17 A2 D3 R154 B2 B1 OPT R151 33 R147 22 33 R146 33 H5 K6 K5 J6 K4 L6 C2 L5 M6 M5 C1 M4 /FLASH_WP SIDE_HP_MUTE PANEL_CTL PM_MODEL_OPT_0 AMP_MUTE SPI_SCK /SPI_CS SPI_SDI SPI_SDO POWER_DET PM_TXD INV_CTL RL_ON POWER_ON/OFF_1 PM_RXD PCMDATA[0]/GPIO126 PCMDATA[1]/GPIO127 PCMDATA[2]/GPIO128 PCMDATA[3]/GPIO120 PCMDATA[4]/GPIO119 PCMDATA[5]/GPIO118 PCMDATA[6]/GPIO117 PCMDATA[7]/GPIO116 NF_CE1Z/GPIO138 NF_WPZ/GPIO198 NF_CEZ/GPIO137 NF_CLE/GPIO136 NF_REZ/GPIO139 NF_WEZ/GPIO140 NF_ALE/GPIO141 NF_RBZ/GPIO142 AR104 22 OS AE18 AC17 AD18 AC18 AC19 AD17 AE17 AD19 /PF_WP /PF_CE0 /PF_CE1 /PF_OE /PF_WE PF_ALE /F_RB OS AR103 22
/F_RB R /PF_OE E /PF_CE0 NC_7 OPT R108 1K +3.3V_Normal OPT R105 1K OS C101 0.1uF NC_8 VDD_1 VSS_1 NC_9 NC_10 CL OPT R104 10K /PF_CE1 AL PF_ALE W /PF_WE WP C /PF_WP OS R102 3.3K B OS R106 1K OPT Q101 MMBT3904(NXP) NC_11 NC_12 NC_13 NC_14 NC_15
1K
1K
1K
1K
1K
PCM_A[1] PCM_A[2] OPT PCM_A[3] PCM_A[4] PCM_A[5] LED_R/BUZZ PCM_A[6] PCM_A[7] PCM_A[8] PCM_A[9] PCM_A[10] PWM1 PWM0 PCM_A[11] PCM_A[12] PCM_A[13] PCM_A[14]
OPT
OPT
R115
R117
R165
R123
NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16
R152
VSS_2
C103 0.1uF OS
OPT
OS
OS AR102
PCM_A[3] PCM_A[2] PCM_A[1] PCM_A[0]
1K
1K
1K
1K
R116
R118
R124
R121
R153
22
NON_OS
1K
/PCM_REG /PCM_OE /PCM_WE +5V_Normal R132 10K R133 10K /PCM_IORD /PCM_IOWR /PCM_CE /PCM_IRQA /PCM_CD /PCM_WAIT PCM_RST C108 0.1uF OPT OPT /CI_CD1 /CI_CD2 R120 R122 OPT 22 22 USB1_OCD USB1_CTL PCM_5V_CTL ERROR_OUT C109 0.1uF
NAND_FLASH_1G_SS NAND_FLASH_1G_HYNIX EAN35669102 IC102-*1 H27U1G8F2BTR-BC NC_1 NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 R/B RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE WE WP NC_11 NC_12 NC_13 NC_14 NC_15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC_29 NC_2 NC_28 NC_3 NC_27 NC_4 NC_26 NC_5 I/O7 NC_6 I/O6 R/B I/O5 RE I/O4 CE NC_25 NC_7 NC_24 NC_8 NC_23 VCC_1 VCC_2 VSS_1 VSS_2 NC_9 NC_22 NC_10 NC_21 CLE NC_20 ALE I/O3 WE I/O2 WP I/O1 NC_11 I/O0 NC_12 NC_19 NC_13 NC_18 NC_14 NC_17 NC_15 NC_16 EAN61857001 IC102-*2 K9F1G08U0D-SCB0
from CI SLOT
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
NC_29 NC_28 NC_27 NC_26 I/O7 I/O6 I/O5 I/O4 NC_25 NC_24 NC_23 VCC_2 VSS_2 NC_22 NC_21 NC_20 I/O3 I/O2 I/O1 I/O0 NC_19 NC_18 NC_17 NC_16
NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 RY/BY RE CE NC_7 NC_8 VCC_1 VSS_1 NC_9 NC_10 CLE ALE WE WP NC_11 NC_12 NC_13 NC_14 NC_15
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
NC_29
USB2_OCD
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23
C7 E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 AD24 Y23 W24
C7 E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 LVACKP LVACKN LVBCKP LVBCKN T25 U23 T24 T23 AD24 Y23 W24
C7 E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 LVACKP LVACKN LVBCKP LVBCKN T25 GPIO196 GPIO193 GPIO194 GPIO195 U23 T24 T23 AD24 Y23 W24
PWM0 PWM1 +3.5V_ST PWM2 LED_B/LG_LOGO LED_R/BUZZ R149 4.7K 11_SUB S/T_SDA S/T_SCL SCART1_MUTE R143 4.7K 11_SUB
GPIO194 GPIO195
H6 KEY1 KEY2 R101 R163 11_SUB R164 11_SUB EU_OPT R23 L/DIM_VS VSYNC_LIKE/GPIO145 R24 L/DIM_SCLK L/DIM_MOSI SENSOR_SCL SENSOR_SDA R25 T21 T22 SPI1_CK/GPIO201 SPI1_DI/GPIO202 SPI2_CK/GPIO203 SPI2_DI/GPIO204 22 22 22 G5 G4 J5 J4 SAR0/GPIO31 SAR1/GPIO32 SAR2/GPIO33 SAR3/GPIO34 SAR4/GPIO35
LOCAL DIMMING
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23
AB25 LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N V23 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 LVACKP LVACKN LVBCKP LVBCKN T25 GPIO196 GPIO193 GPIO194 AD24 Y23 W24 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23
C7 E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 LVACKP LVACKN LVBCKP LVBCKN T25 GPIO196 GPIO193 GPIO194 GPIO195 U23 T24 T23 AD24 Y23 W24
C7 E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
AB25 AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23 V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 LVACKP LVACKN LVBCKP LVBCKN T25 GPIO196 GPIO193 GPIO194 GPIO195 U23 T24 T23 AD24 Y23 W24
C7 E6 F5 B6 E5 D5 B7 E7 F7 AB5 AB3 A9 F4 AB1 N6 AB2 AC2 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N
U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24
DIMMING
I2C
LVB4N
+3.3V_Normal
A_DIM
PWM0 R140 R141 1K 1K PWM2 R160 1K R161 1K R144 2.2K R145 2.2K
GPIO195
100
AB25 GPIO36 GPIO37 GPIO38 GPIO39 GPIO40 GPIO41 GPIO42 GPIO45 GPIO46 GPIO49 GPIO50 GPIO51 GPIO52 I2C_SCKM0/GPIO53 I2C_SDAM0/GPIO54 GPIO73 GPIO74 LVB0P LVB0N LVB1P LVB1N LVB2P LVB2N LVB3P LVB3N LVB4P LVB4N LVA0P LVA0N LVA1P LVA1N LVA2P LVA2N LVA3P LVA3N LVA4P LVA4N V23 U24 V25 V24 W25 W23 AA23 Y24 AA25 AA24 AE24 LVACKP AD24 Y23 W24 T25 GPIO196 LVACKN LVBCKP LVBCKN AB23 AC25 AB24 AD25 AC24 AE23 AC23 AC22 AD23
E6 F5 B6 E5 D5 B7 E7 F7 applied on only SMALL PCB AB5 AB3 R171 100 URSA5_RESET R172 R173 OPT OPT 0 0 A9 F4 AB1 N6 AB2 AC2
RXA0+ RXA0RXA1+ RXA1RXA2+ RXA2RXA3+ RXA3RXA4+ RXA4RXB0+ RXB0RXB1+ RXB1RXB2+ RXB2RXB3+ RXB3RXB4+ RXB4RXACK+ RXACKRXBCK+ RXBCKMODEL_OPT_3 MODEL_OPT_4 MODEL_OPT_5 S2_RESET
5V_DET_HDMI_1
NON_OS_512k_ST
IC104-*3 M24512-RMN6TP
NON_OS_512k_ATMEL
IC104-*4 AT24C512C-SSHD-T
+3.3V_Normal 4.7K R182 URSA5_RESET
5V_DET_HDMI_2 5V_DET_HDMI_4 AV_CVBS_DET DSUB_DET SC1/COMP1_DET HP_DET OLP TUNER_RESET MODEL_OPT_0 MODEL_OPT_1
E2
SCL
A2
SCL
HDCP EEPROM
+3.3V_Normal
Addr:10101--
EEPROM
URSA5_RESET +3.3V_Normal
VSS 4 5 SDA GND 4 5 SDA
PM MODEL OPTION
HDCP_EEPROM
IC103 HDCP_EEPROM CAT24WC08W-T
EAN43349003
HDCP_EEPROM C107 0.1uF R127 4.7K HDCP_EEPROM
EAN43349004
R113 4.7K
A0 A1 A2
1 2 3
8 7 6 5
C105 0.1uF
NVRAM_RENESAS
IC104-*2 R1EX24256BSAS0A
A0 VCC
A0
HDCP_EEPROM 22 R128
I2C_SCL
A1
VCC
VSS 4
WP
OPT PM_MODEL_OPT_1
R129 22 HDCP_EEPROM
I2C_SDA
A0h
A2 3 6 SCL
22 22
E1
I2C_SCL
E2
WC
A1
WP
GND
SDA
I2C_SDA
VSS
SCL
A2
SCL
SDA
VSS
SDA
EAN61133501
EAN61548301
EAN62389501
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2
FLASH/EEPROM/GPIO
2011.12.01 1
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
MODEL OPTION
+3.3V_Normal +2.5V_Normal +3.3V_Normal
HIGH HD PHM_ON
0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 10uF 10uF +1.10V_VDDC
MODEL OPTION
1K 1K 1K 1K 1K 1K 1K
MODEL_OPT_1
HD
VDDC 1.05V
VDDC : 2026mA 0.1uF 0.1uF 1uF OPT 1uF OPT
+1.10V_VDDC
OLED
DVB_T2
PHM_ON
120HZ
DVB_S
R4028
R4027
3D
R206
R208
R211
R226
C275
C228
C276
C4006
C4011
C4013
C4019
C277
C280
C283
C292
R203 RF_SW_OPT 100 OPT 100 R204 R4031 OPT R4032 OPT R4040 OPT 100 100 100 100 OPT 1K 1K 1K 1K 1K 1K NON_DVB_T2 1K NON_120HZ NON_DVB_S NON_OLED PHM_OFF
C299
OPT
OPT
OPT
OPT
C4024
OPT
OPT
OPC&SCANNING_CTRL
R4039
C4068-*1 68pF
IC101 LGE2111A-T8
+1.10V_VDDC
NON_3D
DTV_IF
IF_P_MSTAR HALF_NIM/EU_NON_T2 C4068 100pF IF_N_MSTAR 0.1uF 0.1uF HALF_NIM/EU_NON_T2 C4069 100pF +3.3V_Normal VDD33
S7LR2_DIVX_MS10
FHD
K12 AVDDLV_USB G9 H9 K10 K11 L10 M12 M13 N12 P14 P15 R10 FB_CORE R14 R15 T10 VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8 VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 GND_32 GND_33 GND_34 GND_35 GND_36 GND_37 GND_38 GND_39 GND_40 GND_41 GND_42 GND_43 GND_44 GND_45 GND_46 GND_47 GND_48 GND_49 AVDD1P0 FB_CORE AVDDL_MOD AVDD10_LAN DVDD_DDR GND_50 GND_51 GND_52 GND_53 GND_54 GND_55 AVDD2P5 W9 W10 W11 W12 AVDD2P5_ADC_1 AVDD2P5_ADC_2 AVDD2P5_ADC_3 AVDD25_REF GND_56 GND_57 GND_58 GND_59 GND_60 GND_61 AVDD25_LAN AVDD2P5_MOD V18 U19 AVDD_MOD_1 AVDD_MOD_2 GND_62 GND_63 GND_64 GND_65 GND_66 GND_67 AVDD25_PGA AVSS_PGA AVDD_NODIE U7 AVDD_NODIE L7 M7 P7 R7 AVDD_DVI_USB_1 AVDD_DVI_USB_2 AVDD3P3_MPLL AVDD_DMPLL GND_68 GND_69 GND_70 GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 DVDD_NODIE AVDD_AU33 V7 W7 AVDD_AU33 AVDD_EAR33 GND_78 GND_79 GND_80 GND_81 GND_82 VDDP_1 VDDP_2 GND_83 GND_84 GND_85 AVDD_LPLL_1 AVDD_LPLL_2 VDD33 V19 VDDP_NAND GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 AVDD_DDR0_D_1 AVDD_DDR0_D_2 AVDD_DDR0_D_3 AVDD_DDR0_C GND_92 GND_93 GND_94 GND_95 GND_96 AVDD_DDR1_D_1 AVDD_DDR1_D_2 AVDD_DDR1_D_3 AVDD_DDR1_C GND_97 GND_98 GND_99 GND_100 GND_101 E9 GND_102 GND_EFUSE GND_103 GND_104 A23 B17 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 GND_25 GND_26 GND_27 GND_28 GND_29 GND_30 GND_31 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136
G10 G11 G12 G13 G14 G17 G18 G19 G24 H11 H12 H13 H14 H15 H16 H17 H18 H19 J9 J10 J11 J12 J13 J14 J15 J16 J18 J19 J25 K9 K13 K14 H10 K18 K19 K22 L8 L9 J8 L12 L13 L18 L19 M8 K8 M10 M11 L14 M15 M16 M18 M25 N10 N11 N13 N14 N15 N16 N17 N19 K7 P8 P9 M9 P11 P13 P16 P17 P18 P12 R8 R9 R11 R12 R13 R17 T8 T9 N7 T11 T12 T13 T14 T15 T16 T17 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 R18 V9 V10 V11 V12 V14 V17 T7 E8
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2
R4030
R4029
R207
R209
R212
R227
OPT
IC101 LGE2111A-T8
C250 0.1uF R4002 0.1uF R4003 47 47 C264 1000pF OPT
OPT
C4007
C4012
C4014
C4020
C4025
C4043
C4044
C4031
C284
C293
C265
TU_SIF
S7LR2_DIVX_MS10
J2 CK+_HDMI1 CK-_HDMI1 D0+_HDMI1 D0-_HDMI1 D1+_HDMI1 D1-_HDMI1 D2+_HDMI1 D2-_HDMI1 DDC_SDA_1 DDC_SCL_1 HPD1 J3 K3 J1 K2 K1 L2 L3 T5 T4 V5 RXACKP RXACKN RXA0P RXA0N RXA1P RXA1N RXA2P RXA2N DDCDA_DA/GPIO24 DDCDA_CK/GPIO23 HOTPLUGA/GPIO19 AD2 IF_AGC RF_AGC AE2 SIFP SIFM IP IM AD4 AC5 VIFP VIFM AC3 AE3 AC4 AD3
C251
OPT
OPT
OPT
AVDD_AU33 L208 BLM18PG121SN1D C240 0.1uF HALF_NIM/EU_NON_T2 R4019 10K HALF_NIM/EU_NON_T2 R4004 0 IF_AGC_MAIN OPT R4001 0 C4065 0.047uF 25V HALF_NIM/EU_NON_T2 C241 0.1uF
C267
TUNER_I2C
AE6 I2C_SCKM1/GPIO75 I2C_SDAM1/GPIO76 AD6 TU_SCL TU_SDA
Close to MSTAR
Y17 AD1 XIN R5 XOUT HOTPLUGB/GPIO20 AE9 CK+_HDMI4 CK-_HDMI4 D0+_HDMI4 D0-_HDMI4 D1+_HDMI4 D1-_HDMI4 D2+_HDMI4 D2-_HDMI4 DDC_SDA_4 DDC_SCL_4 HPD4 CK+_HDMI2 CK-_HDMI2 D0+_HDMI2 D0-_HDMI2 D1+_HDMI2 D1-_HDMI2 D2+_HDMI2 D2-_HDMI2 DDC_SDA_2 DDC_SCL_2 HPD2 CEC_REMOTE_S7 AC9 AC10 AD9 AC11 AD10 AE11 AD11 AE8 AD8 AC8 F2 F3 G3 F1 G2 G1 H2 H3 R6 U6 P5 R4 RXDCKP RXDCKN RXD0P RXD0N RXD1P RXD1N RXD2P RXD2N DDCDD_DA/GPIO30 DDCDD_CK/GPIO29 HOTPLUGD/GPIO22 CEC/GPIO5 AUL0 DSUB_HSYNC DSUB_VSYNC DSUB_R+ DSUB_G+ DSUB_B+ 2.4K 10K RGB_PC R4023 R4026 RGB_PC R4024 RGB_PC R4025 RGB_PC R228 RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC R229 R230 R231 R232 R233 510 RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC RGB_PC 510 33 68 33 68 33 68 C204 C205 C206 C207 C208 C209 C210 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF P2 R3 N2 P3 N3 N1 M3 M2 M1 HSYNC0 VSYNC0 RIN0P RIN0M GIN0P GIN0M BIN0P BIN0M SOGIN0 AUR0 AUL1 AUR1 AUL2 AUR2 AUL3 AUR3 AUL4 AUR4 AB9 AA11 Y9 AA9 AA7 AB8 Y8 Y10 AC7 AD7 C242 C243 C244 C245 2.2uF 2.2uF 2.2uF 2.2uF PC_AUDIO PC_AUDIO COMP2_L_IN COMP2_R_IN PC_L_IN PC_R_IN Close to IC with width trace L223 AVSS_PGA BLM18SG121TN1D C4027 0.1uF C236 C237 2.2uF COMP2 2.2uF COMP2 SC1/COMP1_L_IN SC1/COMP1_R_IN L219 BLM18PG121SN1D AVDD25_PGA AVDD_MIU J17 K15 K16 L15 K17 L17 M17 L16 I2S_OUT_WS/GPIO155 C10 I2S_OUT_BCK/GPIO156 I2S_OUT_MCK/GPIO154 I2S_OUT_SD/GPIO157 RXCCKP RXCCKN RXC0P RXC0N RXC1P RXC1N RXC2P RXC2N DDCDC_DA/GPIO28 DDCDC_CK/GPIO27 HOTPLUGC/GPIO21 I2S_IN_BCK/GPIO150 I2S_IN_SD/GPIO151 I2S_IN_WS/GPIO149 B10 C9 B9 C8 D8 D9 R213 R214 22 22 DVB_S DVB_S USB1_DM USB1_DP AMP_SCL AMP_SDA DEMOD_SCL DEMOD_SDA COMP2_DET AVDD2P5_MOD AUD_SCK AUD_MASTER_CLK_0 AUD_LRCH L229 BLM18PG121SN1D AVDD25_PGA:13mA VDD33 R19 T19 W18 W19 C269 10uF USB0_DM USB0_DP AC12 AE12 SIDE_USB1_DM SIDE_USB1_DP OPT OPT C271 C270 0.1uF 0.1uF C273 0.1uF C274 0.1uF E3 E2 SIDE_USB2_DM SIDE_USB2_DP +2.5V_Normal AVDD2P5 VDD33 L211 BLM18PG121SN1D AVDD2P5:172mA SPDIF_IN/GPIO152 SPDIF_OUT/GPIO153 D7 D6 R296 SPDIF_OPTIC 100 PM_MODEL_OPT_1 R287 AC1 1M X201 24MHz 0 C261 22pF
C262
22pF
HDMI
OPT R297
W14 W15
SIDE USB
Normal 2.5V
AVSS_PGA
C4045
1uF
M19
I2S_I/F
AUD_LRCK
DSUB
SCART1_RGB/COMP1
SC1_ID SC1_FB SC1_R+/COMP1_Pr+ SC1_G+/COMP1_Y+ SC1_B+/COMP1_Pb+ SC1_SOG_IN
AUDIO IN
V2 V3 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 COMP2 R253 R254 R255 R256 R257 R258 R236 NON_EU 33 68 33 68 33 68 0 C211 C212 C213 C214 C215 C216 C217 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF U3 U2 T1 T2 R2 R1 T3 HSYNC1 VSYNC1 RIN1P RIN1M GIN1P GIN1M BIN1P BIN1M SOGIN1 AVDD_DDR0:55mA +1.5V_DDR AA2 HSYNC2 RIN2P RIN2M GIN2P GIN2M BIN2P BIN2M SOGIN2 AUVAG AUVRP AA6 EARPHONE_OUTL R244 R245 R246 33 33 33 C225 C226 C227 0.047uF AA8 0.047uF 0.047uF Y4 W4 AA5 Y5 R249 OPT 33 C230 OPT 0.047uF AA4 Y6 AA1 CVBS0 CVBS1 CVBS2 CVBS3 CVBS4 CVBS5 CVBSOUT0 CVBSOUT1 ET_RXD[1]/RN/GPIO63 ET_TXD[1]/LED1/GPIO56 B5 ET_TX_CLK/TN/GPIO59 VCOM ET_TX_EN/GPIO58 ET_MDC/GPIO61 ET_MDIO/GPIO62 ET_COL/LED0/GPIO55 C3 A3 B3 B4 C294 0.1uF C295 0.1uF C200 4.7uF 10V D200 BAW56 GEANDE R200 62K C201 0.1uF R264 49.9 R265 49.9 R262 49.9 R263 49.9 EPHY_TN +3.5V_ST ET_RXD[0]/RP/GPIO60 ET_TXD[0]/TP/GPIO57 A6 C4 EPHY_RN C6 C5 EPHY_RP EPHY_TP EARPHONE_OUTR AB6 L203 L205 5.6uH 5.6uH HEAD_PHONE HEAD_PHONE C268 4.7uF 10V HEAD_PHONE C272 4.7uF 10V HEAD_PHONE AUVRM AE5 AC6 AD5 C278 10uF C281 C4046 0.1uF C249 4.7uF C253 1uF C256 0.1uF C263 10uF L202 BLM18SG121TN1D AVDD_MIU L209 BLM18PG121SN1D 10uF OPT 0.1uF OPT AUOUTL0 AUOUTL2 AUOUTL3 AUOUTR0 AUOUTR2 AUOUTR3 W6 V6 V4 Y7 W5 U5 TP209 TP207 TP208 SCART1_Rout
AUDIO OUT
SCART1_Lout
DDR3 1.5V
C23 A5 C11 C19 C22 D14 D18 D19 E17 E18 E19
COMP2
COMP2_Pr+ COMP2_Y+/AV_CVBS_IN COMP2_Pb+ R237 R238 R239 R240 R241 R242 33 68 33 68 33 68 C218 C219 C220 C221 C222 C223 C224 0.047uF 0.047uF 0.047uF 0.047uF 0.047uF 1000pF
Y2 W2 Y3 V1 W3 W1
0.047uF AA3
C4036
0.1uF
C4038
0.1uF
C4009
0.1uF
C4042
C290
1uF
E22 F8 F17 F18 F19 G8 H8 N22 N21 N20 M22 M21 M20
OPT
H/P OUT
HP_LOUT HP_ROUT AVDD_DDR1:55mA
CVBS In/OUT
TU_CVBS SC1_CVBS_IN COMP2_Y+/AV_CVBS_IN
SOC_RESET
SWICH SW200 JTP-1127WEM 2 4
R252
68
C233
0.047uF
AB4
Close to MSTAR
STby 3.5V
AVDD_NODIE:7.362mA +3.5V_ST AVDD_NODIE L206 BLM18PG121SN1D C286 0.1uF C252 0.1uF
AV_CVBS_IN2 N4 IRIN/GPIO4 ARC0 HWRESET T6 N5 R210 33 C231 0.047uF IR HDMI_ARC SOC_RESET HDMI1_ARC HDMI1_ARC
C4071 10uF
C4062 0.1uF
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2
POWER,IN/OUT,H/W OPT
2011.07.12 2
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
TP for SCART
SCART1_MUTE SC1_ID
TP for Headphone
HP_LOUT HP_ROUT
/PCM_WE
PCM_D[2]
PCM_A[10]
CI_TS_SYNC
SC1_FB
SIDE_HP_MUTE
/PCM_IORD
PCM_D[3]
PCM_A[11]
CI_TS_DATA[0]
SC1_SOG_IN
HP_DET
/PCM_IOWR
PCM_D[4]
PCM_A[12]
CI_TS_DATA[1]
DTV/MNT_VOUT
/PCM_CE
PCM_D[5]
PCM_A[13]
CI_TS_DATA[2]
SCART1_Lout
/PCM_IRQA
PCM_D[6]
PCM_A[14]
CI_TS_DATA[3]
SCART1_Rout
/PCM_CD
PCM_D[7]
CI_TS_DATA[4]
SC1_CVBS_IN
/PCM_WAIT
CI_TS_DATA[5]
PCM_RST
CI_TS_DATA[6]
/CI_CD1
CI_TS_DATA[7]
/CI_CD2
PCM_5V_CTL
CI_DET
TP for S2
S2_RESET
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4_S7LR2 TP_NON_EN
2011.07.07 3
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
+12V/+15V
PANEL_POWER
L412 120 CIS21J121 0.015uF C409 0.015uF 50V OPT C442 10uF 25V Q409 AO3407A S D
+20V --> 3.51V --> 3.76V (3.59V) +24V --> 3.78V --> 3.92V (3.79V) +12V --> 3.58V --> 3.82V (3.68V) +18.5V --> 3.5V --> 3.75V (3.59V)
+12V/+15V
+3.5V_ST
PD_+3.5V R450 0 5%
OPT R463 10K PWR_DET_ON_SEMI IC408 NCP803SN293 VCC 3 1 GND C474 0.1uF RESET PD_+24V R404 100K 2 RESET R402 100 POWER_DET IC408-*1 APX803D29 VCC
R405-*2 4.7K
C B
R439 33K +24V L407-*1 MLB-201209-0120P-N2 L407 CIS21J121 R430 10K OPT R429 47K B R489 10K C OPT Q406 MMBT3904(NXP) E OPT R431 22K
PANEL_DISCHARGE_RES_4.7K PANEL_DISCHARGE_RES_4.7K G OPT C451 0.1uF 25V R405-*1 R407-*1 3K 3K PANEL_DISCHARGE_RES_3K PANEL_DISCHARGE_RES_3K PD_+24V R482 8.2K 1% PD_+24V R403 1.5K 1% PANEL_VCC
2 1
+24V
PWR ON 1 24V 3 GND GND 3.5V 3.5V GND GND 12V 12V 12V GND/P.DIM2 5 7 9 11 13 15 17 19 21 23
2 4 6 8 10 12 14 16 18 20 22 24
24V 24V GND GND 3.5V 3.5V GND GND/V-sync INV ON A.DIM P.DIM1 Err OUT
R405 2.2K
2 1 GND
PD_+24V_PWR_DET_DIODES
PANEL_DISCHARGE_RES_2.2K PANEL_DISCHARGE_RES_2.2K
Power_DET +3.3V_Normal
+3.5V_ST FET_AOS Q403 AO3407A S D
780 mA
+1.5V_DDR
INV_CTL +3.5V_ST
Max 1000mA
PWM1
+1.5V_DDR NON_CI_CAP C435 0.1uF 16V FET_AOS G C423 4.7uF FET_2.5V 16V C423-*1 2.2uF 10V C425 0.1uF 16V OPT R446 10K OPT C445 0.1uF 16V C437 22uF 16V
L420 BLM18PG121SN1D
R434 10K
R438 22K
NON_PSU_T120_LGD R611 0
A_DIM
IN
1 THERMAL
OUT
PG
FB
R1 R457
4.3K 1/16W 1% FET_2.5V R445-*1 2.2K C472 22uF 10V C476 0.1uF 16V POWER_ON/OFF_1 OPT R490 10K R443 10K FET_AOS R445 100 C
R606 3.9K PWM_PULL-DOWN_3.9K +3.3V_Normal R606-*1 1K PWM_PULL-DOWN_1K R433 10K NON_CI_CAP C475 0.1uF 16V
VCC
EN
GND
ERROR_OUT is used for lamp(CCFL/EEFL) models. In other words, LED models need not use.
Vout=0.8*(1+R1/R2)=1.5319
+2.5V/+1.8V
+3.3V_Normal IC402 TJ3940S-2.5V-3L VIN VOUT R473 1 +2.5V_Normal FOR LPB MODEL P407 12507WR-08L 3 Vd=550mV 1 GND 2
+3.3V_Normal
300 mA
LOCAL DIMMING
L/DIM_SCLK
4 FOR LPB MODEL_L/DIM R613 33 L/DIM_MOSI FOR LPB MODEL R183 33 I2C_SCL
7 FOR LPB MODEL_L/DIM R614 33 L/DIM_VS FOR LPB MODEL_L/DIM R617 4.7K FOR LPB MODEL R184 33
Q400 MMBT3904(NXP)
1.5A
SS
R2
I2C_SDA
8 9
+5V_USB
L401
R410 10K C405 10uF 25V OPT C4075 10uF 25V
2000 mA
+3.5V_ST EP[GND]
+1.10V_VDDC
EN
+5V_USB
+5V_Normal
L413
IC401 AOZ1051PI
PGND
[EP]LX
L406 3.6uH OPT C4074 0.1uF 16V OPT C492 22uF 16V
1 2 3 4 THERMAL 17
12 11
L415 3.6uH +3.3V_Normal NR8040T3R6N C453 22uF 10V C456 22uF 10V C444 0.1uF 16V OLP C439 50V 100pF OPT R180 10K
16
15
14
1 THERMAL
NC
10 IC403 TPS54319TRE 9 5 6 7 8
13
OPT R181 1K
VSENSE
COMP
RT/CLK
AGND
R1
R416 56K 1% R609 11K 1%
VIN
AGND
EN
R1
FB
3A
R423 12K 1%
R2
R2
3A
$ 0.165
Vout=0.8*(1+R1/R2) THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Vout=0.827*(1+R1/R2)=1.225V
GP4L_S7LR2 POWER_LARGE
2011/11/26 4
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
+3.5V_ST
R2404 10K 1%
R2411 100 OPT C2408 18pF 50V OPT C2401 D2402 0.1uF 5.6V AMOTECH CO., LTD. SENSOR_SDA OPT C2402 D2401 0.1uF 5.6V AMOTECH CO., LTD. OPT C2409 18pF 50V OPT D2404 5.48VTO5.76V 3 OPT D2403 5.48VTO5.76V
1 R2412 100
L2402 BLM18PG121SN1D
JP2407
+3.5V_ST IR_OUT_EU IR_OUT R2410 22 IR_OUT IR_OUT_EU Q2406 MMBT3904(NXP) C B E C IR_OUT Q2405 MMBT3904(NXP) B E R2425 1K IR_OUT_EU R2430 10K IR_OUT R2431 47K R2426 3.3K +3.5V_ST IR_OUT R2429 3.3K +3.5V_ST
+3.5V_ST L2403 BLM18PG121SN1D OPT R2413 1.5K LED_B/LG_LOGO 12_SUB R2432 1.5K OPT C2410 0.1uF 16V
JP2408
JP2409
LED_R/BUZZ
JP2410
10 11
10
10
JP2411
11
11
IR_OUT_US R2409 0
12
12 13
IR
13
14
15 16
S/T_SCL OPT C906 18pF 50V OPT D902 ADUC 5S 02 0R5L 5.5V
S/T_SDA OPT C907 18pF 50V OPT D903 ADUC 5S 02 0R5L 5.5V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 IR/CONTROL
2011/11/16 6
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
USB (SIDE)
USB1_DIODES
EAN61849601 L1451-*1 MLB-201209-0120P-N2 120-ohm NC L1451 CIS21J121 OPT R1458 2K 1/8W 5% 8 $0.077 7 2 1 GND +5V_USB
USB2_DIODES
IC1450 AP2191DSG
L1450-*1 MLB-201209-0120P-N2 120-ohm USB_2_BEAD_MAG L1450 CIS21J121 USB_2_BEAD_SS C1452 10uF 10V C1453 0.1uF +3.3V_Normal OPT R1450 2K 1/8W 5% OPT R1452 2K 1/8W 5%
USB_2 EAN61849601
IC1451 AP2191DSG
NC GND +5V_USB
8 $0.077 7
OUT_2
IN_1
OUT_2
IN_2
IN_2
EN
EN
R1455 4.7K OPT USB1_CTL USB_2 R1456 10K R1453 USB1_OCD JK1451-*1 USB_2_32LS3500 3AU04S-345-ZC-H-LG 1 JK1451 USB_2_NORMAL 3AU04S-305-ZC-(LG) 1 USB_2 47 USB2_OCD
RCLAMP0502BA OPT
D1451
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
SIDE_USB1_DM
SIDE_USB2_DM
SIDE_USB1_DP
SIDE_USB2_DP
GP4_S7LR2 USB_OCP_DIODE
10/08/13 7
HDMI
R806 A1 A2 A1 A2 10K SHIELD R896 20 1K 19 18 17 16 DDC_SCL_1 15 DDC_SCL_1 14 HDMI_CEC EAG59023302 HDMI_1_Normal 13 CK-_HDMI1 12 11 10 9 8 7 6 5 4 3 2 1 CK+ D0D0_GND D0+ D1D1_GND D1+ D2D2_GND D2+ D2+_HDMI1 OPT D802 JK802 D1+_HDMI1 D2-_HDMI1 D0+_HDMI1 D1-_HDMI1 DDC_SCL_2 DDC_SCL_4 R804 1.8K R802 3.3K NON_CI_CAP C802 0.1uF 16V Q802 MMBT3904(NXP) E C B R830 HPD1 HDMI_SIDE HDMI_2 R884 2.7K DDC_SDA_1 R888 2.7K DDC_SDA_1 HDMI_2 10K R885 2.7K R889 2.7K R887 2.7K R891 2.7K HDMI_SIDE HDMI_2 MMBD6100 D821 C MMBD6100 D822 C HDMI_SIDE
HDMI_1
5V_HDMI_1
5V_HDMI_1 5V_DET_HDMI_1
+5V_Normal
5V_HDMI_2
+5V_Normal
5V_HDMI_4
+5V_Normal
A1
A2 MMBD6100 D824
DDC_SDA_2
DDC_SDA_4
CK+_HDMI1 D0-_HDMI1
For CEC
R855 100 HDMI_CEC CEC_REMOTE_S7
HDMI_2
SHIELD 20
5V_HDMI_2
5V_DET_HDMI_2
SIDE_HDMI5V_HDMI_4
BODY_SHIELD HDMI_2 20 19 18 17 DDC_SDA_2 DDC_SCL_2 16 15 14 EAG62611201 13 12 11 10 9 8 D0+_HDMI2 D1-_HDMI2 7 6 5 D1+_HDMI2 D2-_HDMI2 4 3 2 D2+_HDMI2 1 CK+
5V_DET_HDMI_4
HDMI_SIDE R808 10K BODY_SHIELD 20 SHIELD 20 19 HPD4 10K E 18 17 16 DDC_SDA_4 15 DDC_SCL_4 14 13 HDMI_CEC 12 CK-_HDMI4 11 10 CK+_HDMI4 9 D0-_HDMI4 8 7 D0+_HDMI4 6 D1-_HDMI4 5 4 D1+_HDMI4 3 D2-_HDMI4 2 1 D2+_HDMI4 19 HOT_PLUG_DETECT 18 VDD[+5V] 17 DDC/CEC_GND 16 SDA 15 SCL 14 RESERVED 13 CEC 12 TMDS_CLK11 TMDS_CLK_SHIELD 10 TMDS_CLK+ 9 TMDS_DATA08 TMDS_DATA0_SHIELD 7 TMDS_DATA0+ 6 TMDS_DATA15 TMDS_DATA1_SHIELD 4 TMDS_DATA1+ 3 TMDS_DATA22 TMDS_DATA2_SHIELD 1 TMDS_DATA2+ SHIELD 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
HDMI_2 R895 1K NON_CI_CAP_HDMI_2 C801 0.1uF 16V 3.3K HDMI_2 Q801 MMBT3904(NXP) C B
HDMI_SIDE R897 1K HDMI_SIDE NON_CI_CAP_HDMI_SIDE Q803 C803 MMBT3904(NXP) 0.1uF HDMI_SIDE R835 16V 3.3K
C B
HDMI_SIDE R862
HPD +5V_POWER DDC/CEC_GND SDA SCL NC CEC CLKCLK_SHIELD CLK+ DATA0DATA0_SHIELD DATA0+ DATA1DATA1_SHIELD DATA1+ DATA2DATA2_SHIELD DATA2+
HPD +5V_POWER DDC/CEC_GND SDA SCL NC CEC CLKCLK_SHIELD CLK+ DATA0DATA0_SHIELD DATA0+ DATA1DATA1_SHIELD DATA1+ DATA2DATA2_SHIELD DATA2+
19 18 17 16 15
HDMI1_ARC
CK+_HDMI2 D0-_HDMI2
OPT D811
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 HDMI
2011.10.04 8
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
RGB-PC / SPDIF
PC AUDIO
+3.3V_Normal
PC_AUDIO
JK1102 PEJ027-04 SPDIF_OPTIC JK1103 2F01TC1-CLM97-4F GND 1 Fiber Optic 3 6A 7A 4 5 7B 6B E_SPRING T_TERMINAL1 B_TERMINAL1 R_SPRING T_SPRING B_TERMINAL2 T_TERMINAL2 PC_AUDIO R1107 15K PC_R_IN PC_AUDIO R1110 10K
VCC
VIN SPDIF_OUT OPT R1104 10K OPT C1109 22uF 16V OPT C1110 10uF 16V SPDIF_OPTIC C1131 0.1uF 16V SPDIF_OPTIC C1121 100pF 50V
NON_CI_CAP_PC_AUDIO OPT PC_AUDIO D1101 C1107 R1102 100pF 470K 5.6V 50V PC_AUDIO R1108 15K
NON_CI_CAP_PC_AUDIO OPT PC_AUDIO D1102 C1108 R1103 100pF 470K 5.6V 50V
RGB PC
RGB_PC D1115 MMBD6100 A2 C A1 +5V_Normal
RGB_DDC_SDA
DSUB_VSYNC
DSUB_HSYNC OPT C1122 68pF 50V OPT OPT C1126 D1109 68pF 20V 50V ADUC 20S 02 010L OPT D1113 20V ADUC 20S 02 010L
DSUB_B+ ADUC 20S 02 010L RGB_PC R1133 75 OPT D1110 20V OPT R1149 0
PM_RXD
PM_TXD
R1150 0
R1151 0
DSUB_G+ ADUC 20S 02 010L RGB_PC R1135 75 OPT D1111 20V +3.3V_Normal
GREEN_GND
DDC_CLOCK
DDC_DATA
BLUE_GND
SYNC_GND
RED_GND
DDC_GND
H_SYNC
V_SYNC
GND_2
GREEN
GND_1
BLUE
RED
NC
10
JK1104 SPG09-DB-010
RGB_PC
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 RGB-PC/SPDIF
16
SHILED
11
12
13
14
15
2011/09/27 9
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
RS-232C
COMMERCIAL_RS232C_PHONEJACK
32LS3500_RS232C_PHONEJACK
6 1 3 4 5 KJA-PH-1-0177 JK1001
M6 M1 M3_DETECT M4 M5_GND
6 1 3 4 5 PEJ030-01 JK1001-*1
JP1004
M4 M5_GND
C1000 0.33uF OPT D1000 ADUC 20S 02 010L 20V OPT D1001 ADUC 20S 02 010L 20V
(H:7mm)
C1+
16
V+
15
GND
C1-
14
DOUT1
VCC
C2+
13
RIN1
PM_RXD
C2-
12
ROUT1
V-
11
DIN1
4 5 GND
DOUT2
10
DIN2
RIN2
8 EAN41348201
ROUT2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 RS232C_PHONE
2011/08/13 10
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
Pol-change
RXA0+ RXA0RXA1+ RXA1RXA2+ RXA2RXACK+ RXACKRXA3+ RXA3RXA4+ RXA4RXA0RXA0+ RXA1RXA1+ RXA2RXA2+ RXACKRXACK+ RXA3RXA3+ RXA4RXA4+ 1 2 3 4 5 6 7 8 9 10 RXACK+ RXACKRXA3+ RXA3OPT R713 0
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RXB4+ RXB4RXB3+ RXB3RXBCK+ RXBCKAUO_GND R709 10K RXA1+ RXA1RXA0+ RXA0AUO_GND/LGD_NC RXA2+ RXA2RXA4+ RXA4RXA3+ RXA3RXACK+ RXACKPSU_T120_LGD R706 0 PWM_DIM
RXA3RXACK+
SCANNING_EN +3.3V_Normal
RXACKRXA2+ RXA2-
11 12 13 14 15 16 17 LVDS_SEL 18 19 20 21 22 23 24 25 26 27 HD L701 70-ohm BLM18SG700TN1D HD C703 0.1uF 16V OPT R711 10K PANEL_VCC OPT R712 3.3K RXA0+ RXA0+3.3V_Normal RXA1+ RXA1RXA2+ RXA2-
MIRROR
RXB2+ RXA4+ RXB2RXA4RXA3+
Pol-change
RXA4+ RXA4RXA0+ RXA0RXA1+ RXA1RXA2+ RXA2RXACK+ RXACKRXA3+ RXA3RXA4RXA4+ RXA0RXA0+ RXA1RXA1+ RXA2RXA2+ RXACKRXACK+ RXA3RXA3+
Shift
RXA0RXA0+ RXA1RXA1+ RXA2RXA2+ RXACKRXACK+ RXA3RXA3+ RXA4RXA4+
38 39 40 41 42
43 RXA1+ 44 45 46 47 48 49 50 51 52 RXBCK+ RXBCKRXB2+ RXB2RXB1+ RXB1RXB0+ RXB0RXB1+ RXB1RXB2+ RXB2RXBCK+ RXBCKRXB3+ RXB3RXB1RXB1+ RXB2RXB2+ RXBCKRXBCK+ RXB3RXB3+ RXB2RXB2+ RXBCKRXBCK+ RXB3RXB3+ RXB4RXB4+ OPT C700 10uF 16V OPT C709 1000pF 50V FHD C710 0.1uF 16V RXB4+ RXB4RXB3+ RXB3RXB4+ RXB4RXB0+ RXB0RXB4RXB4+ RXB0RXB0+ RXB0RXB0+ RXB1RXB1+ FHD L702 70-ohm RXA0+ RXA0PANEL_VCC RXA1-
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 LVDS_LARGE
2011/11/14 11
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
AVDD_DDR0
AVDD_DDR0
AVDD_DDR0
AVDD_DDR0 R1227 +1.5V_DDR L1202 CIC21J501NE OPT R1228 C1217 C1218 C1219 C1238 0.1uF 0.1uF C1241 C1206 C1239 C1251 C1220 0.1uF 10uF 1uF 1uF 1uF 1uF 1uF AVDD_DDR0
R1201
R1204
R1224
1K 1%
1K 1%
OS 1K 1%
OS 1000pF
0.1uF
1000pF
OS 1000pF
0.1uF
1000pF
0.1uF
C1248 OS 1K 1%
R1202
R1205
C1247
R1225
C1201
C1202
C1204
C1249
C1203
1K
OS
1K
CLose to DDR3
CLose to Saturn7M IC
CLose to Saturn7M IC
CLose to DDR3
OS
1K
C1250 OS 1%
A-MVREFCA
0.1uF
A-MVREFDQ 1%
B-MVREFCA
B-MVREFDQ
1%
OS 1K 1%
IC1201-*1 K4B1G1646G-BCH9
DDR_1333_SS_NEW N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 NC_5 M2 N8 M3 J7 BA0 BA1 BA2 VDDQ_1 CK CK CKE L2 CS ODT RAS CAS WE T2 RESET NC_1 NC_2 NC_3 F3 NC_4 DQSL DQSL C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 C8 C2 A7 A2 B8 A3 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 B1 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B9 D1 D8 E2 E8 F9 G1 G9 D7 C3 C8 C2 A7 A2 B8 A3 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 E3 F7 F2 F8 H3 H8 G2 H7 E7 D3 C7 B7 NC_6 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 F3 G3 T2 A1 A8 C1 C9 D2 E9 F1 H2 H9 L2 K1 J3 K3 L3 J7 K7 K9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 M2 N8 M3 M7 ZQ L8 VREFDQ H1 VREFCA M8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
IC1202-*1 K4B1G1646G-BCH9
DDR_1333_SS_NEW M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 NC_5 BA0 BA1 BA2 VDDQ_1 CK CK CKE CS ODT RAS CAS WE NC_1 RESET NC_2 NC_3 NC_4 DQSL DQSL A9 DQSU DQSU DML DMU DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_6 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA
EAN61828901 EAN61828901
IC1201 H5TQ1G63DFR-H9C
DDR_1333_HYNIX A-MVREFCA M8 VREFCA A0 A1 A-MVREFDQ R1203 240 1% B2 C1205 C1207 C1208 C1210 C1211 C1212 C1213 C1214 C1215 C1216 OS 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF A1 A8 C1 C9 D2 E9 F1 H2 H9 J1 J9 L1 L9 A-MA14 T7 NC_1 NC_2 NC_3 NC_4 NC_6 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 B1 B9 D1 D8 E2 E8 F9 G1 G9 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL7 D7 C3 C8 C2 A7 A2 B8 A3 DML DMU E3 F7 F2 F8 H3 H8 G2 H7 DQSU DQSU E7 D3 C7 B7 F3 G3 A-MDQSL A-MDQSLB A-MDQSU A-MDQSUB A-MDML A-MDMU A-MDQL0 A-MDQL1 A-MDQL2 A-MDQL3 A-MDQL4 A-MDQL5 A-MDQL6 A-MDQL7 A-MDQU0 A-MDQU1 A-MDQU2 A-MDQU3 A-MDQU4 A-MDQU5 A-MDQU6 A-MDQU7 A-MDQU0 A-MDQU1 A-MDQU2 A-MDQU3 A-MDQU4 A-MDQU5 A-MDQU6 A-MDQU7 A-MDQL0 A-MDQL1 A-MDQL2 A-MDQL3 A-MDQL4 A-MDQL5 A-MDQL6 A-MDQL7 A-MDML A-MDMU A-MDQSU A-MDQSUB A-MDQSL A-MDQSLB RESET VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 CS ODT RAS CAS WE T2 CK CK CKE L2 K1 J3 K3 L3 A-MODT A-MRASB AVDD_DDR0 A-MODT A-MRASB A-MCASB A-MWEB A-MRESETB A-MRESETB A-MCASB R1231 A-MWEB 10K D9 G7 K2 K8 N1 N9 R1 R9 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 BA0 BA1 BA2 J7 K7 K9 A-MCKE A-MCKB NC_5 M2 N8 M3 A-MBA0 A-MBA1 A-MBA2 A-MCK 1% A-MBA0 C1209 0.01uF 50V 1% A-MBA1 A-MBA2 A-MCK A-MCKB A-MCKE H1 VREFDQ A2 A3 A4 L8 ZQ AVDD_DDR0 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 M7 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 A-MA0 A-MA1 A-MA2 A-MA3 A-MA4 A-MA5 A-MA6 A-MA7 A-MA8 A-MA9 A-MA10 A-MA11 A-MA12 A-MA13 A-MA0 A-MA1 A-MA2 A-MA3 A-MA4 A-MA5 A-MA6 A-MA7 A-MA8 A-MA9 A-MA10 A-MA11 A-MA12 A-MA13 A-MA14
IC101 LGE2111A-T8
IC1202 H5TQ1G63DFR-H9C
DDR_1333_HYNIX B-MA0 B23 D25 F22 G22 E24 F21 E23 D22 D24 D21 C24 C25 F23 E21 D23 B-MA1 B-MA0 B-MA1 B-MA2 B-MA3 B-MA4 B-MA5 B-MA6 B-MA7 B-MA8 B-MA9 B-MA10 B-MA11 B-MA12 B-MA13 B-MA14 B-MCK OS B-MBA0 B-MBA1 56 R1237 1% B-MBA2 B-MA2 B-MA3 B-MA4 B-MA5 B-MA6 B-MA7 B-MA8 B-MA9 B-MA10 B-MA11 B-MA12 B-MA13 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 B-MODT K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 B-MRESETB B-MDQSL B-MDQSLB B-MDQSL B-MDQSLB B-MDQSU B-MDQSUB B-MDML B-MDMU B-MDQL0 B-MDQL1 B-MDQL2 B-MDQL3 B-MDQL4 B-MDQL5 B-MDQL6 B-MDQL7 B-MDQU0 B-MDQU1 B-MDQU2 B-MDQU3 B-MDQU4 B-MDQU5 B-MDQU6 B-MDQU7 B-MDQU0 B-MDQU1 B-MDQU2 B-MDQU3 B-MDQU4 B-MDQU5 B-MDQU6 B-MDQU7 B-MDQL0 B-MDQL1 B-MDQL2 B-MDQL3 B-MDQL4 B-MDQL5 B-MDQL6 B-MDQL7 B-MDML B-MDMU B-MDQSU B-MDQSUB F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 B-MA14 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 C1227 OS C1228 OS C1229 OS C1230 OS C1231 OS C1232 OS C1233 OS C1234 OS C1235 OS C1236 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF ZQ 240 1% AVDD_DDR0 L8 VREFDQ OS R1226 H1 VREFCA M8 B-MVREFCA
K7 K9
A11 C14 B11 F12 C15 E12 A14 D11 B14 D12 C16 C13 A15 E11 B13
S7LR2_DIVX_MS10
A_DDR3_A[0] A_DDR3_A[1] A_DDR3_A[2] A_DDR3_A[3] A_DDR3_A[4] A_DDR3_A[5] A_DDR3_A[6] A_DDR3_A[7] A_DDR3_A[8] A_DDR3_A[9] A_DDR3_A[10] A_DDR3_A[11] A_DDR3_A[12] A_DDR3_A[13] A_DDR3_A[14] B_DDR3_A[0] B_DDR3_A[1] B_DDR3_A[2] B_DDR3_A[3] B_DDR3_A[4] B_DDR3_A[5] B_DDR3_A[6] B_DDR3_A[7] B_DDR3_A[8] B_DDR3_A[9] B_DDR3_A[10] B_DDR3_A[11] B_DDR3_A[12] B_DDR3_A[13] B_DDR3_A[14]
K1
B-MVREFDQ
J3 K3 L3
G3
R1235 56
F13 B15 E13 C17 A17 B16 A_DDR3_MCLK A_DDR3_MCLKZ A_DDR3_MCLKE B_DDR3_MCLK B_DDR3_MCLKZ B_DDR3_MCLKE A_DDR3_BA[0] A_DDR3_BA[1] A_DDR3_BA[2] B_DDR3_BA[0] B_DDR3_BA[1] B_DDR3_BA[2]
R1236 56
E14 B12 A12 C12 F11 A_DDR3_RESET B_DDR3_RESET A_DDR3_ODT A_DDR3_RASZ A_DDR3_CASZ A_DDR3_WEZ B_DDR3_ODT B_DDR3_RASZ B_DDR3_CASZ B_DDR3_WEZ
56 R1238
OS 1%
B-MCKE
IC1201-*2 NT5CB64M16DP-CF
DDR_1333_NANYA_NEW N3 M8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 NC_6 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 DML DMU E3 F7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 D7 C3 C8
A1 VDDQ_1 CK CK CKE L2 K1 J3 K3 L3 J1 NC_1 J9 L1 L9 T7 F3 G3 A9 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 B1 VSSQ_1 B9 D1 D8 E2 E8 F9 G1 G9 D7 C3 C8 C2 A7 A2 B8 A3 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 T2 RESET NC_2 NC_3 NC_4 CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 NC_5 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A8 C1 C9 D2 E9 F1 H2 H9
IC1202-*2 NT5CB64M16DP-CF
DDR_1333_NANYA_NEW N3 P7 P3 H1 N2 P8 P2 L8 R8 R2 T8 B2 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 A1 BA0 BA1 BA2 J7 K7 K9 L2 K1 J3 K3 L3 J1 J9 L1 L9 T7 F3 G3 A9 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 B1 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 NC_4 NC_7 CK CK CKE VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 EAN61857201 VREFCA M8
B19 C18 B18 A18 E15 A21 D17 G15 B21 F15 B22 F14 A22 D15 G16 B20 F16 C21 E16 A20 D16 C20 A_DDR3_DQU[0] A_DDR3_DQU[1] A_DDR3_DQU[2] A_DDR3_DQU[3] A_DDR3_DQU[4] A_DDR3_DQU[5] A_DDR3_DQU[6] A_DDR3_DQU[7] B_DDR3_DQU[0] B_DDR3_DQU[1] B_DDR3_DQU[2] B_DDR3_DQU[3] B_DDR3_DQU[4] B_DDR3_DQU[5] B_DDR3_DQU[6] B_DDR3_DQU[7] A_DDR3_DQL[0] A_DDR3_DQL[1] A_DDR3_DQL[2] A_DDR3_DQL[3] A_DDR3_DQL[4] A_DDR3_DQL[5] A_DDR3_DQL[6] A_DDR3_DQL[7] B_DDR3_DQL[0] B_DDR3_DQL[1] B_DDR3_DQL[2] B_DDR3_DQL[3] B_DDR3_DQL[4] B_DDR3_DQL[5] B_DDR3_DQL[6] B_DDR3_DQL[7] A_DDR3_DQML A_DDR3_DQMU B_DDR3_DQML B_DDR3_DQMU A_DDR3_DQSU A_DDR3_DQSUB B_DDR3_DQSU B_DDR3_DQSUB A_DDR3_DQSL A_DDR3_DQSLB B_DDR3_DQSL B_DDR3_DQSLB
K24 K25 J21 J20 H24 L20 L23 J24 L24 J23 M24 H23 M23 K23 G21 L22 H22 K20 H20 L21 H21 K21
A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3
EAN61857201 VREFCA
VREFDQ
ZQ
D9 G7 K2 K8 N1 N9 R1 R9
VDDQ_1 CK CK CKE VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9
A8 C1 C9 D2 E9 F1 H2 H9
NC_4 DQSL DQSL DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 NC_7
B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
DDR_1600_SS
IC1201-*5 K4B1G1646G-BCK0
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_1600_SS
IC1202-*5 K4B1G1646G-BCK0
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_1600_HYNIX
IC1201-*4 H5TQ1G63DFR-PBC
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_1600_HYNIX
IC1202-*4 H5TQ1G63DFR-PBC
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_DVB_T2_2G
IC1201-*3 K4B2G1646C
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_DVB_T2_2G
IC1202-*3 K4B2G1646C
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 NC_5 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE NC_1 NC_2 NC_3 F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7 VSSQ_1 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9 B1 B9 D1 D8 E2 E8 F9 G1 G9 DML DMU DQSU DQSU VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 DQSL DQSL A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9 NC_4 NC_6 CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 J1 J9 L1 L9 T7 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC A13 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_1600_MICRON
IC1201-*6 MT41J64M16JT-125:G
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 K7 K9 L2 K1 J3 K3 L3 T2 RESET CS ODT RAS CAS WE CK CK CKE BA0 BA1 BA2 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 A1 A8 C1 C9 D2 E9 F1 H2 H9 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
DDR_1600_MICRON
IC1202-*6 MT41J64M16JT-125:G
N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 M7 A15 M2 N8 M3 J7 K7 K9 BA0 BA1 BA2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC NC_6 VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8 VDD_9 B2 D9 G7 K2 K8 N1 N9 R1 R9 ZQ L8 VREFDQ H1 VREFCA M8
F2 F8 H3 H8 G2 H7
VSSQ_1 DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7 VSSQ_2 VSSQ_3 VSSQ_4 VSSQ_5 VSSQ_6 VSSQ_7 VSSQ_8 VSSQ_9
B9 D1 D8 E2 E8 F9 G1 G9
C2 A7 A2 B8 A3
F3 G3 C7 B7 E7 D3 E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DML DMU DQSU DQSU DQSL DQSL
NC_5
B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 DDR_256
2011/06/03 12
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
FE_AGC_SPEED_CTL IF_AGC_SEL
DEMOD_SCL
DEMOD_SDA
TU3703 TDSN_B001F
SI2176_BR_2INPUT_H
+3.3V_TU
R3733 100K
+3.3V_TU
close to TUNER
1 2 3 4 5 6 7 8 9 10 11 12
RF_S/W_CTL RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS IF_AGC DIF[P] DIF[N]
1 2 3 4 5 6 7 8 9 10 11 12 13
RF_S/W_CTL RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS NC_1 NC_2 NC_3 +B3[3.3V] +B4[1.23V] NC_4 GND ERROR SYNC
R3705
1 2 3 4 5 6 7 8 9 10 11
NC_1 RESET SCL SDA +B1[3.3V] NC_2 +B2[1.8V] NC_3 IF_AGC DIF[P]
R3732 100
TU_I2C_NON_FILTER TU_I2C_NON_FILTER C3713 C3711 18pF 18pF 50V 50V TU_I2C_NON_FILTER R3783 0
close to TUNER
+3.3V_TU
NON_ASIA
R3784
NON_ASIA TU_CVBS Q3703 MMBT3906(NXP) TU_BUFFER C TU_NON_BUFFER R3780 3.3 ASIA R3782 2K OPT R3781 3.3 ASIA R3749 0 B R3750 1K OPT
R3761
TU_BUFFER
DIF[N]
R3786 0 ASIA
12 SHIELD
IF_P_MSTAR IF_N_MSTAR
1. should be guarded by ground 2. No via on both of them 3. Signal Width >= 12mils Signal to Signal Width = 12mils Ground Width >= 24mils
SHIELD 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
+1.23V_TU
+3.3V_TU
VALID MCLK
+1.8V_TU
D0 D1 D2 D3 D4 D5 D6
FE_TS_SYNC R3704 100 C3737 100pF 50V C3738 0.1uF 16V C3705 100uF 16V OPT
IF_AGC_MAIN
should be guarded by ground
+3.3V_TU
IC3703 AP1117E18G-13 R1 3 IN ADJ/GND OUT 1 OPT R3710 200 1%
+1.8V_TU
D7
FE_TS_VAL_ERR FE_TS_DATA[0-7]
FE_TS_CLK Vo=VREF*(1+R2/R1) FE_TS_DATA[0] R3711 0 R2 FE_TS_DATA[1] C3740 0.1uF 16V VREF = 1.25V
R3766 1
SHIELD
FE_TS_DATA[2]
TUNER MULTI-OPTION
TU3700-*1 TDSS-H101F
SI2176_ATSC_1INPUT_H
FE_TS_DATA[3]
FULL_NIM_OPT FE_TS_DATA[5]
FE_TS_DATA[6]
1 2 3 4 5 6 7 8 9 10 11 12 SHIELD
VOUT
NC RESET SCL SDA +B1[3.3V] SIF +B2[1.8V] CVBS IF_AGC DIF[P] DIF[N]
FE_TS_DATA[7]
VCTRL
+5V_Normal
L3704 R3769
NC
FULL_NIM_BCD
R3747 20K
1005 R3713 0 R2
+3.3V_TU
+3.3V_Normal
FULL_NIM
FULL_NIM_BCD
FULL_NIM_TJ
THERMAL
60mA
IC3701-*1 TJ4220GDP-ADJ[EP]GND
NC_1 GND
EN2
ADJ/SENSE
VIN3
VOUT
NC4
NC_2
Add,0929
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 TUNER_NON_EU
2011.10.11 14
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
Headphone
*Option : HEAD_PHONE
HEAD_PHONE HP_LOUT C1500 10uF 16V +3.5V_ST OPT C1502 1000pF 50V C HEAD_PHONE R1501 Q1502 1K MMBT3904(NXP) HEAD_PHONE_POP E E B B Q1504 MMBT3904(NXP) HEAD_PHONE_POP C +3.3V_Normal HEAD_PHONE GND L DETECT R HEAD_PHONE JK1500 KJA-PH-0-0177 5 4 3 1
C SIDE_HP_MUTE B
Q1500 MMBT3904(NXP) E HEAD_PHONE_POP HEAD_PHONE HP_ROUT C1501 10uF 16V OPT C1503 1000pF 50V C HEAD_PHONE R1502 Q1503 1K MMBT3904(NXP) HEAD_PHONE_POP E
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 HEADPHONE
2011/10/04 15
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
Audio amp(NTP-7500)
+3.3V_Normal
AMP_RESET R521 10K C516 1000pF 50V 50V +24V_AMP OPT R507 3.3
22000pF
L502 BLM18PG121SN1D
C517
OUT1A_2
OUT1A_1
PVDD1_3
PVDD1_2
PVDD1_1
VDD_IO
GND_IO
/RESET
CLK_I
[EP]
L501 CIS21J121
0.1uF 16V
BST1A
C514
PGND1A
OPT C525 0.01uF 50V SPK_L+ D501 1N4148W 100V OPT R508 12 C530 390pF 50V R515 12 L505 10.0uH L506 10.0uH C535 0.47uF 50V C538 0.1uF 50V R513 12 R517 4.7K SPK_L-
AD
C502 0.1uF 50V C503 100pF 50V C504 1000pF 50V R505 3.3K
48
47
46
45
44
43
42
41
40
39
38
37
R516 4.7K
SPEAKER_L
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 THERMAL 49
36 35 34 33 32 31 30 29 28 27 26 25
OUT1B_2 OUT1B_1 PGND1B BST1B VDR1 VCC_5 AGND VDR2 BST2A PGND2A OUT2A_2 OUT2A_1
C527 22000pF 50V C526 22000pF 50V
WAFER-ANGLE
GND_1
C513 0.1uF 16V
IC501 NTP-7500L
SPK_L+
SPK_L-
SPK_R+ C528 1uF 25V C529 1uF 25V C534 1uF 25V
AUD_LRCH
SPK_R-
1 P501
WCK
AUD_LRCK
BCK
AUD_SCK AMP_SDA AMP_SCL +3.5V_ST R503 R504 100 100 C507 33pF 50V C509 33pF 50V
SDA
SPK_R+
MONITOR0
MONITOR1
MONITOR2
OUT2B_1
OUT2B_2
PVDD2_1
PVDD2_2
PVDD2_3
SCL
/FAULT
PGND2B
BST2B
+24V_AMP
R514 12
R518 4.7K
C524 10uF 35V D504 1N4148W 100V OPT C533 390pF 50V R511 12 R512 12
SPEAKER_R
C540 0.1uF 50V R519 4.7K
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 NTP-7500
2011.10.04 16
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
R1634 12K
R1633 10K
R1636 12K
R1615 1K
COMP2_DET
4D 5D COMP1_NON_ADC_FILTER 6D 6N COMP2_Pr+ 5N 4N 5M
[YL1]CONTACT [YL1]O-SPRING [YL1]E-LUG [RD2]E-LUG [RD2]O-SPRING_2 [RD2]CONTACT [WH2]O-SPRING [RD2]O-SPRING_1 [RD2]E-LUG-S [BL2]O-SPRING
L1601-*1 0 L1601 CM2012FR10KT COMP1_ADC_FILTER_L D1615 20V OPT C1620 47pF COMP1_ADC_FILTER 50V C1621 47pF COMP1_ADC_FILTER 50V
COMPONENT1 & AV
7F 5E 7E 4D 5D 6D 6N 5N 4N 5M 5L
R1621 75
COMP1_NON_ADC_FILTER L1602 CM2012FR10KT COMP1_ADC_FILTER_L D1614 20V OPT C1622 47pF COMP1_ADC_FILTER 50V L1602-*1 0 5L 7L COMP2_Pb+ C1623 47pF COMP1_ADC_FILTER 50V 5K
R1620 75 +3.3V_Normal
4J 5J
[GN2]CONTACT [GN2]O-SPRING
COMP2_Y+/AV_CVBS_IN
R1619 75
R1618 10K SC1/COMP1_R_IN COMP2 C1612 1000pF 50V OPT R1631 12K COMP2
R1617 10K SC1/COMP1_L_IN COMP2 C1611 1000pF 50V OPT R1630 12K COMP2 COMP2_NON_ADC_FILTER L1604-*1 0 L1604 CM2012FR10KT COMP2_ADC_FILTER_L C1626 47pF COMP2_ADC_FILTER 50V C1627 47pF COMP2_ADC_FILTER 50V
COMPONENT2
7L 5K 7K 4J 5J 6J
SC1_R+/COMP1_Pr+
COMP2_NON_ADC_FILTER L1605-*1 0 L1605 CM2012FR10KT COMP2_ADC_FILTER_L C1628 47pF COMP2_ADC_FILTER 50V C1629 47pF COMP2_ADC_FILTER 50V
SC1_B+/COMP1_Pb+
COMP2_NON_ADC_FILTER L1606-*1 0 L1606 CM2012FR10KT COMP2_ADC_FILTER_L C1630 47pF COMP2_ADC_FILTER 50V C1631 47pF COMP2_ADC_FILTER 50V
SC1_G+/COMP1_Y+
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
GP4L_S7LR2 REAR_NON_EU_L
2011.11.28 17
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
ETHERNET
* H/W option : ETHERNET
+2.5V_Normal
1 ETHERNET_UDE
ETHERNET_XMULTIPLE
EPHY_TP
EPHY_TN
4 OPT D2103 5.5V ADLC 5S 02 015 OPT D2104 5.5V ADLC 5S 02 015
EPHY_RP
EPHY_RN
8 9 9
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
GP4L_S7LR2 ETHERNET
2011/06/14 21
+3.5V_ST
16
15
14
S_FLASH_OS_MACRONIX
+3.5V_ST
NC_2
13
NC_7
IC1401 MX25L8006EM2I-12G
CS# VCC S_FLASH_OS C1401 0.1uF
NC_3
12
NC_6 /SPI_CS NC_5 OPT R1403 10K SPI_SDO GND /FLASH_WP WP# OPT R1401 0 C B OPT Q1401 MMBT3904(NXP) E
NC_4
11
SO/SIO1
HOLD#
10
WP#
GND
16
VCC
15
DIO[IO0]
DO[IO1]
HOLD[IO3]
NC_1
14
NC_8
%WP[IO2]
CLK
NC_2
13
NC_7
GND
DI[IO0]
NC_3
12
NC_6
NC_4
11
NC_5
CS
10
GND
DO[IO1]
WP[IO2]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2011.08.29 56
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes
MSTART DEBUG_4PIN
P1 12505WS-04A00
1 MSTAR_DEBUG_4P
RGB_DDC_SCL
4 5
RGB_DDC_SDA
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2011/09/05 58
Copyright 2012 LG Electronics. Inc. All right reserved. Only for training and service purposes