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Internal Use Only

North/Latin America
Europe/Africa
Asia/Oceania

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PLASMA TV
SERVICE MANUAL
CHASSIS : PD01A

MODEL : 42PJ150

42PJ150-ZE

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.

P/NO : MFL62881216(1006-REV00)

Printed in Korea

CONTENTS

CONTENTS ............................................................................................................................... 2
SAFETY PRECAUTIONS ...........................................................................................................3
SPECIFICATION.........................................................................................................................4
ADJUSTMENT INSTRUCTION ..................................................................................................7
TROUBLESHOOTING GUIDE .................................................................................................12
BLOCK DIAGRAM ...................................................................................................................23
EXPLODED VIEW ...................................................................................................................24
SVC. SHEET ................................................................................................................................

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-2-

LGE Internal Use Only

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this monitor is blown, replace it
with the specified.

Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
Do not use a line Isolation Transformer during this check.
Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
between a known good earth ground (Water Pipe, Conduit, etc.)
and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
with 1000 ohms/volt or more sensitivity.
Reverse plug the AC cord into the AC outlet and repeat AC voltage
measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
0.5mA.
In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
repaired before it is returned to the customer.

When replacing a high wattage resistor (Oxide Metal Film Resistor,


over 1W), keep the resistor 10mm away from PCB.

Leakage Current Hot Check circuit

Keep wires away from high voltage or high temperature parts.

AC Volt-meter

Due to high vacuum and large surface area of picture tube,


extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.

Leakage Current Cold Check(Antenna Cold Check)


With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1M and 5.2M.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-3-

To Instrument's
exposed
METALLIC PARTS

0.15uF

Good Earth Ground


such as WATER PIPE,
CONDUIT etc.

1.5 Kohm/10W

LGE Internal Use Only

SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
V

Application Range
This spec is applied to the PLASMA TV used PD01A Chassis.

Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 C 5 C (77 F 9 F), CST : 40 5
(2) Relative Humidity: 65 % 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
BOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.

Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification
EMC : CE, IEC

Module Specification
(1) 42 HD
No

Item

Specification

Display Screen Device

106 cm (42 inch) Wide Color Display Module

Aspect Ratio

16:9

PDP Module

Remark

PDP42 T1####,

PDP

RGB Closed(Well) Type, Glass Filter(38 %)


Pixel Format: 1365 horiz. By 768 ver.
4

Operating Environment

1) Temp. : 0 deg ~ 40 deg


2) Humidity : 20 % ~ 80 %

Storage Environment

LGE SPEC.

3) Temp. : -20 deg ~ 60 deg


4) Humidity : 10 % ~ 90 %

Input Voltage

AC 100 V - 240 V ~, 50 / 60 Hz

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-4-

Maker LG

LGE Internal Use Only

Model General Specification

No
1

Item
Market

Specification
Albania, Austria, Belgium, Bosnia, Bulgaria,

Remarks
36 Country

Coratia, Czech, Denmark, Estonia, Finland,


France, Germany, Greece, Hungary, Ireland,
Italy, Kazakhstan, Latvia, Lithuania,
Luxembourg, Morocco, Netherlands, Norway,
Poland, Portugal, Romania, Russia, Serbia,
Slovenia, Spain, Sweden, Slovakia,
Switzerland, Turkey, Ukraine, UK
2

Broadcasting system

1) PAL/SECAM BG

EU (PAL Market)

2) PAL/SECAM DK
3) PAL /
4) SECAM L/L
5) DVB T
6) DVB C
3

Receiving system

Analog : Upper Heterodyne


Digital : COFDM, QAM

Scart Jack (2EA)

PAL, SECAM

Scart 1 Jack is Full scart and support


RF-OUT(Analoge)
Scart 2 jack is Half scart and support
MNT-OUT.

Video Input (1EA)

PAL, SECAM, NTSC

Side AV except PJ20, PK20

Component Input (1EA)

Y/Cb/Cr, Y/ Pb/Pr

rear

RGB Input

RGB-PC

Analog (D-Sub 15Pin) except PJ20, PK20

HDMI Input (4EA)

HDMI-PC

HDMI1/DVI, HDMI2, HDMI3

HDMI-DTV

1ea : PJ20
2ea : PK30, PK20, PJ60, PJ50, PJ30
3ea : PK50, PK70

Audio Input (3 EA)

RGB/DVI Audio, Component, AV

L/R Input

10

SPDIF Out(1 EA)

SPDIF Out

11

USB

For SVC, S/W Download, X-Studio, DivX

PJ30 doesnt support Divx

12

Bluetooth

Bluetooth Phone(JPEG, MP3),

Only 50/60PK550

Bluetooth Headset(mono, stereo)

Profile : A2DP, BIP, FTP, GAVDP, HSP, OPP

PK20, PJ20 only for SVC

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-5-

LGE Internal Use Only

Chroma & Brightness (Optical)


(1) (With 38 % Glass Filter) 42T1 module

No

Item

Min

1.

White peak brightness

315

Typ

Max

Unit

cd/m2

Remark
(*) Peak Brightness Mode
-1/100 white Window pattern
(Typically 1% Window size)
-100IRE (255Gray)
-Picture: Vivid (Medium)
-Input: HDMI-PC(1920*1080 60Hz)
*Peak Brightness Condition may Slightly
different between sets.

148
2.

161

46

White average brightness

50

-25/100 white Window pattern


cd/m2

- 100% Window White Pattern


- 100IRE(255Gray)
- Picture: Vivid(Medium )

3.

Brightness uniformity

-10

+10

- 85IRE(216Gray) 100% Window White Pattern


- Picture: Vivid(Medium)

4.

Color

White

0.270

0.285

0.300

0.283

0.293

0.303

0.635

0.640

0.318

0.330

0.345

Green

0.242

0.300

0.305

0.595

0.600

Blue

0.150

0.158

Coordinate
Red

0.065

Color coordinate uniformity

-0.01

Average

+0.01

6.

Contrast ratio at dark room

100k: 1

1,000k: 1

White Pattern
- R/G/B : 100IRE(255Gray) 100% Window
White Pattern
- Picture: Vivid(Medium )
- 100% Window

0.075

5.

- White : 85IRE(216Gray) 100% Window

- 85IRE 100% Window White Pattern


- Picture: Vivid(Medium)
-1/100 white window pattern(Peak mode)
-100IRE(255Gray)
-Picture: Vivid(Medium)
-Input: HDMI-PC (1920*1080 60Hz)

7.

Color

Cool

Warm

0.276

0.291

- 85IRE 100% Window White Pattern

0.268

0.283

0.298

Warm : ColorGamut => WIDE

0.270

0.285

0.300

Cool : Color temperature C30

Medium

0.261

Temperature

0.278

0.293

0.308

Meduum : Color temperature 0


Warm : Color temperature W30

0.298

0.313

0.328

0.314

0.329

0.344

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-6-

LGE Internal Use Only

ADJUSTMENT INSTRUCTION
[Caution]
- Use power on button of a service R/C to power on TV set.
- Do not connect any external input cable if there is no any
specifics.

1. Application
This spec. sheet is applied to all of the PD01A chassis.

2. Specification
[Caution: The module keeping condition]
- The module keeping condition: The normal temperature
condition(more than 15 C)
--> Immediately the line supply.
- The module keeping condition: 0 C
--> The module must be kept for more than 2 hours at the
normal temperature.
- The module keeping condition: -20 C
--> The module must be kept for more than 3 hours at the
normal temperature.
- The case of Gu-mi factory at the winter season.
--> The module must be kept for more than 5 minutes at
the heating zone(40 C ~ 45 C).
(1) The adjustment is according to the order which is
designated and which must be followed, according to the
plan which can be changed only on agreeing.
(2) If there is no specific designation, the adjustment must be
performed in the circumstance of 25 C 5 C of
temperature and 65 % 10 % of relative humidity.
(3) The input voltage of the set must keep 100 V ~ 240 V,
50 / 60 Hz.
(4) Input signal Unit: Product Specification Standard.
(5) The set must be operated for about 5 minutes prior to the
adjustment.

3. Update S/W using Auto Download


through the USB
Caution: S/W version of USB file (xxx.epk) must be bigger than
one which is downloaded previously.
(1) Insert the USB stick to the USB socket
(2) A downloaded file in USB stick will be detected
automatically.
(3) If S/W version of USB file (xxx.epk) is bigger than one
which is downloaded previously, the message, Copying
files from memory, will appear.
(4) If an update procedure was completed, TV set will be
turned off and on automatically.
(5) If TV set is turned on, check an updated version.
* If a downloaded version is more bigger than one of which
TV set had, TV set can lost channel data. In this case,
you have to scan channels again.

4. After Downloading S/W, Adjust


TOOL OPTION

After turning on RGB Full Window pattern in HEAT-RUN


Mode, the receiver must be operated.
O Enter into HEAT-RUN MODE
1) Press the POWER ON button on R/C for adjustment.
2) Press the ADJ button on R/C and enter EZ ADJUST
Select 7. Test Pattern by using D/E(CH +/-) and press
ENTER(V)
Select White by using F / G (VOL +/-) and press
ENTER(V)
O

(1) Push IN-START button on a service R/C.


(2) Select Tool Option 1 and Push OK button.
(3) Put the number of a below table in order of a suffix of the
Tool Option(X).
(Each model has a different number.)

- Set heat run should be activated without a signal generator.


- Single color patterns (RED / BLUE / GREEN) of HEAT RUN
MODE are used to check a plasma panel.
- Caution: If you turn on a still screen more than 20 minutes
(Especially digital pattern, cross hatch pattern), an after
image may be made in the black level part of the screen.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-7-

LGE Internal Use Only

5. ADC Calibration Procedure

6. EDID Download Procedure

(1) Input the component (480i/Horizontal Color Bar) signal to a


TV set.
1) Input Signal Timing : Component 480i
(Other external connection is unnecessary except the
component before executing ADC calibration.)
2) Input Signal Pattern

(1) Push ADJ button on a service R/C.


(2) Enter EDID auto download mode by selecting 8. EDID
D/L.

<Horizontal Color Bar pattern>


@ MODEL: 209 in Pattern Generator(480i Mode)
@ PATTERN : 65 in Pattern Generator(MSPG-925
SERISE)
(2) Push ADJ button on a service R/C.
(3) Enter internal ADC mode by selecting 5. ADC Calibration.
(4) If you select Start on a dialog box of the screen, ADC
calibration will be begun.

(3) If you select Start on a dialog box of the screen, EDID


download will be begun automatically.
(4) Press EXIT button on a service R/C.
(5) EDID Data
1) HDMI (HD Models, 256 bytes)

Caution: Dont connect any external input cable except the


component input(480i/Horizontal_Color_Bar) to adjust
ADC calibration
2) RGB (HD Models, 128 bytes)
O

Auto ADC Calibration Map(RS-232C)


NO

Item

Enter
Adjust
Adjust MODE Mode In

ADC Adjust

ADC
Adjust

CMD1 CMD2 Data0


A

When transfer the Made


In, Carry the command.

Automatically adjustment
(The use of a internal
pattern)
O

# Adjust Sequence
- aa 00 00 [Enter Adjust Mode]
- xb 00 40 [Component1 Input (480i)]
- ad 00 10 [Adjust 480i Comp1]
- xb 00 60 [RGB Input (1024*768)]
- ad 00 10 [Adjust 1024*768 RGB]
- aa 00 90 End Adjust mode

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-8-

EDID Data detailing (, , , , , )

LGE Internal Use Only

8. POWER Supply Unit PCB Assy


Va/Vs Voltage Adjustment

Product ID
MODEL

EDID MODEL

PRODUCT_ID

FUNCTION

ALL Model

LG DTV

0001(0x01, 0x00)

Analog

ALL Model

LG DTV

0001(0x01, 0x00)

Digital

Caution: Both Vs and Va voltage adjustment are necessary.

8-1. Va/Vs Adjustment Procedure

Serial No
=> Controlled on production line

(1) Connect positive(+) terminal of DMM to Vs/Va pin, connect


negative(-) terminal to GND.
(2) Turning Vs/Va Adjust and adjust Vs/Va voltages to a
value which is written on a right/top label of a module.
(deviation ; 0.5V)

Month, Year
=> Controlled on production line:

Model Name
Checksum
=> Changeable by total EDID data
FHD

HD

HDMI1

0xE2

0xB4

HDMI2

0xE2

HDMI3

0xE2

HDMI4

RGB

0xAF

0xB4

0xA4

0xAF

0xA4

0x94

0xAF

0x94

0x62

0x2F
[Caution]
- Each Power Supply Unit PCB assembly must be checked by
check JIG set. (Because power PCB Assy damages to PDP
Module, especially be careful)
- Set up RF mode(noise) before a voltage adjustment.
- Test equipment: DMM 1EA

HDMI Port No.


O

Auto EDID Download Map(RS-232C)


NO

Item

Enter
download
MODE

Download
Mode In

EDID data and


Model option Download
download

CMD1 CMD2 Data0


A

When transfer the Made


In, Carry the command.

Automatically download
00 10 (The use of a internal
Data)

9. White Balance Adjustment


Caution: Press the POWER ON KEY on R/C before W/B
adjustment.
O

7. PCMCIA CARD Check


You must adjust DTV 29 Channel and insert PCMCIA CARD
to socket.
- If PCMCIA CARD works normally, video signals will appear
on screen.
But it works abnormally, No CA module will appear on
screen.

Test Equipment
Color Analyzer (CS-1000, CA-100+(CH.10), CA-210(CH.10))
Please adjust CA-100+ / CA-210 by CS-1000 before
measuring
You should use Channel 10 which is Matrix compensated
(White, Red, Green, Blue revised) by CS-1000 and adjust
in accordance with White balance adjustment coordinate.

[ Caution: Set up RF mode before launching products.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

-9-

LGE Internal Use Only

(2) Start White-Balance adjustment, then the full white window


pattern will appear on the screen.
(3) Adjust in the place where the influx of light like floodlight
around is blocked.
(illumination is less than 10ux).
(4) Measure and adjust after sticking the Color Analyzer (CA100+, CA210 ) to the side of the module.

9-1. Color Temperature Standards According


to CSM and Module(TBD)
CSM

PLASMA

Cool

11000K

Medium

9300K

Warm

6500K
O

9-2. Change Target Luminance and Range


of the Auto Adjustment W/B Equipment
Target luminance

RS-232C COMMAND
[CMD ID DATA]

50

Range

Auto W/B Adjustment Map(RS-232C)


RS-232C COMMAND
[ CMD ID DATA ]
Wb 00
00
White Balance Start
Wb 00
FF
White Balance End

20

Cool

Med

CENTER
(DEFAULT)

Min

Warm

Cool

Med

MA X
Warm

R Gain

Ja

jd

00

192

192

192

jh

Jb

je

00

192

192

192

255

B Gain

9-3. White Balance Adjustment Coordinate


and Color Temperature

jg

G Gain

255

ji

Jc

jf

00

192

192

192

255

R Cut

64

64

64

128

G Cut

64

64

64

128

B C ut

50H3
60H3

64

64

64

128

9-5. Manual W/B Adjustment


(1) Execute the zero calibration of CA-100+ / CA-210.
(2) Press the ADJ button on a service R/C and enter EZ
ASJUST by selecting 6. White Balance.
(3) Then, 216 gray pattern will appear on the screen.
(4) Change the R/G/B-Gain as passing in 3 color coordinates
and temperatures, COOL, MEDIUM and WARM.
< Temperature: COOL >
- R-Cut / G-Cut / B-Cut is set to 64
- Control R-Gain and G-Gain.
- Each gain is limited to 192

[ PC (for communication through RS-232C) ? UART Baud


rate : 115200 bps

9-4. Automatic W/B Adjustment


(1) Internal PATTERN should be used when W/B is adjusted.
Connect to auto controller like below.

< Temperature: MEDIUM >


- R-Cut / G-Cut / B-Cut is set to 64
- Control R-Gain and G-Gain.
- Each gain is limited to 192
< Temperature: WARM >
- R-Cut / G-Cut / B-Cut is set to 64
- Control G-Gain and B-Gain.
- Each gain is limited to 192
(5) Press EXIT button on a service R/C

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 10 -

LGE Internal Use Only

<Notice> Module Heat-Run Condition for W/B


(1) The adjustment must be performed in the circumstance of
25 C 5 C of temperature and 65 % 10 % of relative
humidity if there is no any specifics.
(2) Before an W/B adjustment, the module which will be used
should be placed in the circumstance of 15 C ~ 25 C for
above 2 hours.
(3) If a module was placed in the circumstance of below 15
C, it should be placed in the circumstance of 15 C ~ 25
C for above 2 hours or be run for above 5 minutes in an
aging environment of 60 C.
(4) Before an W/B adjustment, TV set should be run for 5
minutes at least.

10-3. Command Set

[Description]
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart,
0, Phase
Data write : Model Name and Serial Number write in
EEPROM,.

11. CI+ Key Download


10. Serial Number Download

11-1. Download Procedure

10-1. Download Procedure

(1) Press "Power on" button of a service R/C.(Baud rate :


115200 bps)
(2) Connect RS232-C Signal Cable.
(3) Write CI+ Key through RS-232-C.
(4) Check whether the key was downloaded or not at In Start
menu. (Refer to below)

(1) Press Power on button of a service R/C.(Baud rate :


115200 bps)
(2) Connect RS232-C Signal Cable.
(3) Write Serial number through RS-232C.
(4) Check the serial number at the Diagnostics of SETUP
menu. (Refer to below).

12. Check Information (Serial No. & Model name)


Caution : Dont download HDMI/RGB EEPROM to write a
model name. Model name dois unnecessary
because this model use Tool Option to call a model
name.

(1) Push the menu button in DTV mode.


(2) Select the SETUP -> Diagnostics -> To set
(3) Check the Serial Number

10-2. Signal TABLE

CMD
LENGTH
ADH
ADL
Data
CS
Delay

: A0h
: 85~94h (1~16 bytes)
: EEPROM Sub Address high (00~1F)
: EEPROM Sub Address low (00~FF)
: Write data
: CMD + LENGTH + ADH + ADL + Data_1 + ... +
Data_n
: 20ms

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 11 -

LGE Internal Use Only

TROUBLESHOOTING GUIDE

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 12 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 13 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 14 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 15 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 16 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 17 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 18 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 19 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 20 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 21 -

LGE Internal Use Only

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 22 -

LGE Internal Use Only

BLOCK DIAGRAM

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 23 -

LGE Internal Use Only

EXPLODED VIEW
IMPORTANT SAFETY NOTICE

A12

120

A2

A21

570

300

LV1

303

A10

301

305

304

202

A9

205

302

203

201

240

580

501

590

200

204

207

206

520

910

602

604

900

601

400

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

- 24 -

LGE Internal Use Only

+3.3V_ST

0.1uF

C103

1K

READY

R112

NC_7
NC_8

VSS_1

READY

NC_10

AL

WP
R1239
1K

PF_WP

NC_12

4
3

PCM_A[8]

AB5

PCM_A[9]

AA4
V4

PCM_A[11]

Y4

PCM_A[12]

AB9
AA7

PCM_A[14]

AD6

AR103
I/O3

PCM_A[2]

I/O1

PCM_A[1]

I/O0

AB18
Y5

/PCM_OE
/PCM_REG

PCM_A[0]

AB15
AA10

/PCM_WAIT

AC8

/PCM_IRQA

AC7

/PCM_WE
/PCM_IOWR

NC_17

AR171

AA5
W4

/PCM_IORD

T4

/PCM_CE

NC_16

25

AE6

/PF_CE0
/PF_CE1

AF6

/PF_OE

AA12
22

AR101

/PF_WE

AA11
AC9

PF_ALE

Y14

PF_WP

AB11

+3.3V

/F_RB

SCLK

E1

GND

C100
0.1uF

WP

SPI_CK
E2

Flash_WP_1

SI

SPI_DI

VSS

33

R1224

AF12

33

R1230

SPI_DO

AE12

33

R1225

SPI_CS

AD11

33

R1226

SPI_CK

SPI_CK

SPI_DI

PCM_A0/CI_A0
PCM_A1/CI_A1
PCM_A2/CI_A2
PCM_A3/CI_A3

B5

PCM_A4/CI_A4

USB_DP_1

PCM_A5/CI_A5

USB_DM_1

PCM_A6/CI_A6

USB_DM_2

PCM_A7/CI_A7

BT_DP

USB_DP_2

A5

BT_DM

AC10

USB_DM

AB10

PCM_A9/CI_A9
PCM_A10/CI_A10
PCM_A11/CI_A11
PCM_A12/CI_A12

R131

100

PCM_A13/CI_A13

R130

100

SCL

1K

GPIO_PM0/GPIO134

PCM_CD/CI_CD

GPIO_PM1/GPIO135

/PCM_OE

GPIO_PM2/GPIO136

PCM_REG/CI_CLK

GPIO_PM3/GPIO137

PCM_WAIT/CI_WACK

GPIO_PM4/GPIO138

/PCM_IRQA

GPIO_PM5/INT1/GPIO139

/PCM_WE

GPIO_PM6/INT2/GPIO140

PCM_IOWR/CI_WR

GPIO131/LDE/SPI_WPn1

PCM_IOR/CI_RD

GPIO130/LCK

/PCM_CE

GPIO132/LHSYNC/SPI_WPn

/PF_CE0

GPIO60/PCM2_RESET/RX1

/PF_CE1

AB21

22

AC21

22

DBG_TX
+5V_ST

AC_DET

J2
W5
V5

100

10K

R185
100

H5

LED_R

100 READY R195


10K
READY
R160

R182

G5

AC_DET

100

MODULE_ON
DISP_EN
R186

F6
G6

R134
27K

READY
100

H6

ISP_TXD
BT_ON/OFF
SC1_VIDEO_MUTE

AC17
AB17
AF11

100

R159

AA18

R1235

AA17

PF_ALE
PF_AD15

E7
LHSYNC2/I2S_OUT_MUTE/RX1
LVSYNC/GPIO133

UART2_TX/SCKM

GPIO79/LVSYNC2/TX1

UART2_RX/SDAM

UART2_RX/GPIO84

DDCR_DA

UART2_TX/GPIO85
UART1_RX/GPIO86
UART1_TX/GPIO87

DDCA_CLK
DDCA_DA

Flash_WP_1

22

TS0_D0
TS0_D2

EEPROM_SCL

TS0_D3
TS0_D4

SDA

EEPROM_SDA

TS0_D5

SCL1

+3.3V

22
0

SUB_SCL
5V_HDMI_2

22

SUB_SDA

F9
F10
A6
B6

USB_OCD

100
100

AF5

R1277

MOD_ROM_RX

R1276

CI_TS_DATA[1]

Y9

CI_TS_DATA[2]

AB7

CI_TS_DATA[3]

AA6

CI_TS_DATA[4]

AB6

CI_TS_DATA[5]

U4

CI_TS_DATA[6]

AC5

MOD_ROM_TX
PCM_5V_CTL

C108 C107
10pF 10pF
50V
50V
READY READY
CI_TS_DATA[0]

Y8

H/W Version Opiton(F9)

CI_TS_DATA[7]

AF10

SIDE_CVBS_DET
CI_TS_DATA[0-7]

AC4

CI_TS_SYN

AD5

CI_TS_VAL

AB4

CI_TS_CLK

AB19

TS0_VLD

BUF_TS_DATA[0]

AA20

BUF_TS_SYN

TS0_CLK
TS1_D0
PWM0
G
EEPROM_SCL

R199

EEPROM_SDA
R1258

22

C114
0.1uF

PWM0

1K
READY

R1200

R1201

1K

R1263

47K

R1298
10K
+3.3V

1K

2SC3052
Q103

R1265
B 4.7K

PWM1

R1242
R106

F4
E4
C4

PWM2
ET_TXD0
ET_TX_CLK

SAR1

ET_RXD0

SAR2

ET_RXD1

ET_TXD1

SAR3

BT_ON/OFF

R156
AMP_RST

+3.3V
100

XC5000_RESET
/CI_CD1

R132

0
R1268
4.7K
FHD

READY

4.7K

4.7K

READY

ST_AMP_MUTE
COMP_DET

SC_RE1

C9

R1267
R1283

100+3.3V
0

B10

R190

A10

R191

22 R1270
4.7K
0

C11

CI_EN
5V_HDMI_3
5V_HDMI_1

B9

5V Tolerance
/FE_RESET

A11
SC1_DET

R1269
4.7K
READY

D9
D10
D7
E11
E8
E10

SC_RE2

A9

ET_COL

AC11

R1271
4.7K
HD

+3.3V

12507WS-08L

ET_MDC

SC2_DET

B11

GPIO44

SC2_MUTE

P101

ET_TX_EN
ET_MDIO

/CI_CD2

BUF_TS_VAL_ERR
BUF_TS_CLK

AA19
C10

SAR0

IRIN
R136
0

AC19

TS1_CLK

+3.3V

BT_DM

100
0

IR

R1266
47K

PWM1

R1292
10K

22

TS1_VLD

PWM3

B4

KEY2
LED_B

R1241
10K

R1257

SDA

R1300

SCL

4.7K

AA13

PWM0

A4
KEY1

SB_MUTE

READY

A2 3

READY

R137

WP

1K

4.7K

R198

R110
4.7K

READY

A1 2

VSS

VCC

100 READY

+3.3V

RTR030P02
Q104

1uF
C115

+3.3V

10 : BOOT 51
11 : BOOT RISC

A0 1

AD12

KEY_BUZZER
R1287

IC107
CAT24WC08W-T

R1256
4.7K

AB12

TS1_SYNC

AB13

PWM1

+5V

+3.3V

SDA1

AA8

GPIO42/PCM2_CE_N

UART_RX2
UART_TX2

R1237
AC18 R1286
C6
R1238

GPIO43/PCM2_IRQA_N

TS0_D1

BLUETOOTH

RL_ON/PWR_ONOFF

R1236
22
+3.3V

/PF_WE

TS0_SYNC

MCU BOOT STRAP

100

DBG_RX

R187

/PF_OE

J1

22

R1294

F5

GPIO62/PCM2_CD_N/TX1

DDCR_CK

D11

22

1K

R101

R102

E5
PCM_RST/CI_RST

TS0_D7

+5V

R197
15K
READY

R196
15K
READY

TS0_D6

HDCP EEPROM

USB

USB_DP

PCM_A8/CI_A8

F8

22

R164
R165

C117
100pFR140
50V
R141
R1297
100
R1296

DBG_TX
3.3K

HOLD#

/SPI_CS

3.3K

R124

C116
100pF
50V

ISP_RXD
ISP_TXD
DBG_RX

VCC

R125

WP#

0.1uF
C104

R104
10K

SO

SPI_DO

IC105
M24M01-HRMN6TP
NC

22

R162
R163

PDP_SCL
R133
4.7K

L101

VCC

+3.3V

EEPROM_SDA
PDP_SDA

READY

+3.3V

R135
0

EEPROM_SCL

+3.3V +3.3V_ST
READY

CS#

SPI_CS

EEPROM

IC103
MX25L4005AM2C-12G

L102

R1233
4.7K

+3.3V

SPI_DO

PCMD6/CI_D6

F_RBZ

22

Serial FLASH MEMORY


for BOOT

SPI_DI

PCMD5/CI_D5

AA14

PCM_RST
/PCM_CD

NC_18

26

AE11

PCMD4/CI_D4

PM GPIO Assignment Recommended by MStar

22

NC_19

PCMD3/CI_D3

PCM_A14/CI_A14

PCM_A[3]

I/O2

27

24

AA9

NC_20

28

23

NC_15

AC13

PCM_A[13]

29

22

NC_14

PCM_A[6]

NC_21

30

21

NC_13

AB8

PCM_A[10]

31

20

NC_11

PCM_A[5]

NC_22

32

19

AC12

VSS_2

33

18

W
/PF_WE

AB14

VDD_2

34

17

PF_ALE

AC14

PCM_A[3]

0.1uF

TESTPIN/GND

PCMD2/CI_D2

PCMD7/CI_D7

AC15

PCM_A[7]

C106

E6

PCMD1/CI_D1

AB16

PCM_A[2]

C105
10uF 6.3V

NC_23

35

16

/PF_CE1

10K

R103

CL

Y13

PCM_A[0]

PCM_A[4]

NC_24

36

15

PCM_D[7]

22

NC_25

37

14

Y12

PCM_A[4]

I/O4

38

13

NC_9

R105
1K

Y11

PCM_A[1]

39

12

VDD_1

Y10

PCM_D[6]

PCM_A[5]

AC6

PCM_D[5]
PCM_A[0-14]

AA16

PCM_D[4]

C101
0.1uF

R115
62K

PCM_A[6]

I/O5

40

11

PCM_A[7]

I/O6

41

10

AR102
I/O7

42

/PF_OE

NC_26

43

RB

/PF_CE0

+3.3V

44

AA15

PCM_D[2]

C112

A3
18pF

PCMD0/CI_D0

R1203
4.7K

R111

NC_6

45

PCM_D[1]
S6_Reset

PCM_A[0-7]

NC_27

XIN
XOUT

R1202
4.7K

NC_5

46

R116
10

B3

HWRESET

AC16

PCM_D[3]

NC_28

47

PCM_D[0]

R1279
4.7K

2
3

NC_4

3.9K

1K
R1240

/F_RB

48

D4

R114
100

READY

NC_2
NC_3

C102
4.7uF
10V

R1278
4.7K

C111
18pF

R193
1M

PCM_D[0-7]

R1205
4.7K

/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :
8 bit

+3.3V

NC_29

X100
12MHz

R1204
4.7K

NC_1

KDS181
D100

+3.3V

NAND FLASH MEMORY

IC100
LGE3369A (Saturn6 Non RM)

DEBUG

IC102
NAND512W3A2CN6E

SW100
TMUE312GAB

S6_Reset

D6
D5
C5

GPIO96
GPIO88
GPIO90/I2S_OUT_MUTE
GPIO91
GPIO97
GPIO98
GPIO99
GPIO103/I2S_OUT_SD3
GPIO102

DSUB_DET

B/T_HP_LOUT_AMP

R1299

BT_DP

R1275

P_17V

470
R1290

L103

C113
0.1uF
50V

E
ISA1530AC1
Q102

B
C

E
R1291
15K
R1285
220

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

A7
Q107
2SC3052

R1289
750

GPIO67
C109
10uF
25V

16V
10uF
C110

B/T_HP_LOUT

GPIO68

B8

R192
R155

100
100

R1293
10K

+3.3V

R1284
47K

USB_CTL

SC1_MUTE

B/T_HP_LOUT_AMP

MSD3368EV Platform
FLASH/NVRAM/GPIO

09/09/24
1

10

LGE Internal Use Only

+1.26V_VDDC

Audio Mute

C246
0.1uF

C240
470uF
16V

D202
ENKMC2838-T112
A1
A2

A2

C281
0.1uF

C2000
0.1uF

C2003
0.1uF

C2005
0.1uF

C2033
0.1uF

C2034
0.1uF

C2035
0.1uF

C2036
0.1uF

C2037
0.1uF

C2038
0.1uF

C2039
0.1uF

C2040
0.1uF

C2041
0.1uF

C266
0.1uF

C277
0.1uF

C283
0.1uF

C291
0.1uF

C296
0.1uF

SC1_MUTE

D201
ENKMC2838-T112
A1

+3.3V

+3.3V_VDDP

L210
MLB-201209-0120P-N2

SB_MUTE

AMP_MUTE

C275
0.1uF

SB_MUTE

SCART1_MUTE

C2032
0.1uF

SC2_MUTE

D203
ENKMC2838-T112
A1

C264
0.1uF

+1.26V_VDDC

SB_MUTE

SCART2_MUTE

C257
0.1uF

A2

ST_AMP_MUTE
C250
0.1uF

C253
0.1uF

C258
0.1uF

C2026
0.1uF

C245
0.1uF

C2004
0.1uF

C248
0.1uF

+1.8V_DDR

C2010
220uF
6.3V

IC100
LGE3369A (Saturn6 Non RM)

AE16

F1 RXACKP
F2 RXACKN

H3 RXA1P
G1 RXA1N
H1 RXA2P
H2 RXA2N

D2+_HDMI1
D2-_HDMI1
DDC_SDA_1

A1 DDCD_A_DA
B2 DDCD_A_CK

DDC_SCL_1

A2 HOTPLUG_A

1K

LVA2M
LVA3P
LVA3M
LVA4P

RXE1+

AF16

RXE2+

AE15

RXE2-

AD13

RXE3+

AE13

C1 RXB0P
C2 RXB0N
D2 RXB1P
D3 RXB1N
E3 RXB2P
D1 RXB2N

D2+_HDMI2

E1 DDCD_B_DA
F3 DDCD_B_CK

DDC_SCL_2
R203

HPD2

E2 HOTPLUG_B

1K

AE8
CK+_HDMI3

AD8

LVB2P
LVB2M
LVB3P
LVB3M
LVB4P

D0-_HDMI3
D1+_HDMI3

D2-_HDMI3
DDC_SDA_3

RXC0P

HDMI_CEC

100

SC1_ID

HOTPLUG_C
J3 CEC

N2 HSYNC0/SC1_ID
N1 VSYNC0/SC1_FB

R210

47
47

C201

0.047uF
0.047uF

470
47

C203
C204

1000pF

R215
R216

SC1_CVBS_IN

0.047uF

R213

SC1_B

C200

R214

SC1_G

47

R212

SC1_R

47

R211

SC1_FB

47
47

C205

0.047uF
0.047uF

R217
R243
10K

R244
10K

C202

C206

R246
R245

R218

DSUB_G

47

R219

DSUB_R

47
47
470

R220

DSUB_B

R221

0.047uF

P2 RIN0P/SC1_R
R3 GIN0P/SC1_G

R2 GINM

C212
C207

22
22
0.047uF

C213

0.047uF
0.047uF

C208

1000pF

K3 HSYNC1/DSUB_HSYNC
K2 VSYNC1/DSUB_VSYNC

COMP

47
47

C214
C215

47
470

C216

0.047uF
0.047uF

C209

1000pF

R238

100

R223

COMP_Y

R224

COMP_Pb
SC2_ID

V1 RIN2P/COMP_PR+
V2 GIN2P/COMP_Y+

AE1

C2006

U1 BIN2P/COMP_PB+
V3 SOGIN2

C2007

AE3
AUR2
AUL2 AE2
AA1
AUR3
AB1
AUL3
AB2
AUR4
AC2
AUL4
AB3
AUR5
AC3
AUL5

C2008

AUL1

C2009
C2011
C2012

C2015

2.2uF

C2016

C210

0.047uF

47

C211

0.047uF

R226

47

C217

0.047uF

R227

47

C218

0.047uF

R207

SIDE_CVBS_IN

S-VID

CVBS

47

R206

47

C219

0.047uF

47

C220

R208

0.047uF

TUNER_CVBS

47

C2024

0.047uF

R236

TV/MNT

R235

47

C2019

0.047uF

R228
R209

100
100

C221

0.047uF

C222

0.047uF

DTV/MNT_VOUT
TP203

M17

SC2_RIN

2.2uF
2.2uF

N4

SC2_LIN
SIDE_LIN
COMP_RIN
COMP_LIN

N9
N10
N11
N12
N13

PC_RIN

N14

PC_LIN

W3

C231

0.1uF

R241

W2

C232

0.1uF

R242

N17
47
47

TUNER_SIF

N18
P4

SIF0M

P9
R282

E9

P10

R230

SPDIF_OUT

U3 CVBS1/SC1_CVBS
U2 CVBS2/SC2_CVBS
T1 CVBS3/SIDE_CVBS
T2 VCOM1

M1 CVBS4/S-VIDEO_Y
M2 CVBS6/S-VIDEO_C
N3 CVBS5
M3 CVBS7
W1 CVBS0/RF_CVBS
Y3 VCOM0
Y2 CVBSOUT0/SC2_MNTOUT
AA2 CVBSOUT1

GND_18

VDDC_20

GND_19

VDDC_21

GND_20

VDDC_22

GND_21

VDDC_23

GND_22

VDDC_24

GND_23

VDDC_25
VDDC_26

VDDP_1

GND_28

VDDP_2

GND_29

VDDP_3

GND_30

VDDP_4

GND_31

VDDP_5
VDDP_6
VDDP_7

GND_33

R288

AD3

R239

100 BLUETOOTH
100

AD1

R240

100

AC1

R250

100

AD2

R251

100

I2S_OUT_WS
I2S_OUT_BCK
I2S_OUT_SD

B7

R232

22

C7

R233

22

D8

R234

22

C8

K4

REFM

C223

G4

C235

390

AE5

AUVRP
AUVAG

R9
R11

C237
22pF
READY

R12
R13
R14
R15

GND_35
GND_36

C239
22pF
READY

C224

0.1uF

AF4

C225

10uF

AD4

C226

0.1uF

C227

1uF
4.7uF

C228

R17
R18
T5
T9
T11
T12

W22
Y22

H10
H11
H12
N20
P20
W9
W10
+3.3V_AVDD
L209
MLB-201209-0120P-N2

W7
+1.8V_DDR

C284

GND_38

AVDD_DDR_3
AVDD_DDR_4

GND_41

AVDD_DDR_5

GND_42

AVDD_DDR_6

GND_43

AVDD_DDR_7

GND_44

AVDD_DDR_8

GND_45

AVDD_DDR_9

GND_46

AVDD_DDR_10

AVDD_MEMPLL_1

GND_49

AVDD_MEMPLL_2

GND_50

T14
T15
T16
T17
T18

Y21
AA23

0.1uF

H13
H14

AVDD_DDR_11

GND_48

G13

C293

0.1uF

G12
AVDD_DDR_1

GND_40

AVDD_MEMPLL_3

H15
H16
W14
W15
W16
W17

+3.3V

W18

L205
MLB-201209-0120P-N2

H17
T20

C262

V20

C273

C285

0.1uF

C269

0.1uF 0.1uF

GND_51

0.1uF
+3.3V

GND_52
GND_53
GND_54

L207
MLB-201209-0120P-N2

R20
AVDD_LPLL

GND_56
GND_57

+3.3V_AVDD_MPLL
C2030
H7
C255

GND_59
0.1uF

GND_60

C279

C2025
10uF
6.3V

C288

0.1uF

0.1uF

AVDD_MPLL

GND_58

0.1uF

C263
0.1uF

GND_61

+3.3V_AVDD

GND_62

L206
MLB-201209-0120P-N2

J7
AVDD_33_1

T13

U5

GND_64

AVDD_33_2

GND_65

AVDD_33_3

GND_66

AVDD_33_4

GND_67

K7

AVDD_33_5

L7

C241

M7

C286

0.1uF 0.1uF

C242

0.1uF

N7

+3.3V

GND_68
GND_69
GND_70

L208

W8
AVDD_DM

GND_71
GND_72
GND_73

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

W20

R16

W13

Close to IC
as close as possible

W19

AVDD_AU

GND_63

AE4

W12

GND_37

GND_55
C238
22pF
READY

W11

VDDP_8

R4
R10

T10
C234
0.1uF

1%
Check

AUVRM

0.1uF

0.1uF
R229

P18

MS_SCK
MS_LRCH

0.1uF

J4

P17

MS_LRCK

C236
22pF
READY

C233

P16

AUDIO_MASTER_CLK

100

R279

H4

REXT

AUCOM

SC2_Lout

22

+3.3V

REFP

B/T_HP_LOUT
SC1_Rout
SC1_Lout
SC2_Rout

R231

I2S_IN_SD

VCLAMP

P15

V22

GND_34

GND_47

P14

V7

H9

GND_27

AVDD_DDR_2

AF1

U22

+3.3V_VDDP

GND_26

P11
P13

U20

GND_25

SPDIF_OUT
P12

U7

VDDC_27

GND_39

PSU_ERR_DET

100

AF2

T22

GND_32

SIDE_RIN

N16

J5 VSYNC2

R205

T7

VDDC_19

M18

2.2uF

C2014

M16

SC1_LIN

2.2uF

C2013

SC1_RIN

2.2uF
2.2uF

A8

SC2_CVBS_IN

R7

VDDC_18

N15

AUOUTL2/SC2_LOUT

P7

VDDC_15

GND_24

M15

2.2uF
2.2uF

AUOUTR2/SC2_ROUT

M20

VDDC_14

GND_17

M12

2.2uF

AF3

I2S_OUT_MCK
SC1_CVBS_IN

M11

RXOCK-

AD18

2.2uF

AUOUTL1/SC1_LOUT

L20

VDDC_13

VDDC_17

RXOCK+

C230

AUOUTR1/SC1_ROUT

K20

VDDC_12

GND_16

M9
M10

Y1

AUOUTR0/HP_ROUT

J20

VDDC_11

VDDC_16

RXO4-

2.2uF

SPDIF_IN

H20

VDDC_10

GND_15

AUDIO OUT

0.047uF

R225

COMP_Pr

AE17

C229

SIF0P

H19

L18

RXO4+

AA3

AUOUTL0/HP_LOUT
R222

AF17

L1 RIN1P/DSUB_R
L3 GIN1P/DSUB_G
K1 BIN1P/DSUB_B
L2 SOGIN1

GND_12

H18

GND_13
GND_14

R1 BIN0P/SC1_B
P3 SOGIN0/SC1_CVBS
P1 RINM
T3 BINM

GND_11

D20

VDDC_7

L17

M14

AUR1

GND_10

D19

VDDC_6

RXO3-

AF18

F11

DSUB_HSYNC
DSUB_VSYNC

DDCD_C_CK

AD7

1K

R204

DDCD_C_DA

GND_9

D18

VDDC_5

RXO3+

RXC1P

AUL0

GND_7

D17

VDDC_4

L16

AUDIO IN

R285

L15

M13

AUR0

GND_6

D16

VDDC_3

RXO2-

AD17

LVBCKM

AF7

HPD3

L14

RXC0N

AE7

DDC_SCL_3

L13

RXO2+

AE19

GND_5

L12

RXO1-

AF19

GND_4

GND_8

RXO1+

AF20

AE18
LVBCKP

AE9 RXC1N
AE10 RXC2P
AD10 RXC2N

D2+_HDMI3

L11

GND_3

VDDC_2

VDDC_9

L10

GND_2

VDDC_1

VDDC_8

L9

RXCCKP
RXCCKN

AF9

D1-_HDMI3

RXO0-

AD19

LVB4M

AF8

D0+_HDMI3

SCART_RGB

LVB1M

AD9

CK-_HDMI3

DSUB

LVB1P

AD20

C2042
0.01uF

HDMI

D2-_HDMI2
DDC_SDA_2

LVB0M

RXO0+

R255
22K

D1-_HDMI2

LVB0P

R254
22K

D0-_HDMI2
D1+_HDMI2

AE20

C2021
0.01uF

D0+_HDMI2

RXECK-

LVACKM

R287
22K

CK-_HDMI2

F7

RXECK+

AD14

C2020
0.01uF

CK+_HDMI2

E18

RXE4-

LVA4M
LVACKP

E17

RXE4+

AF13

E16

RXE3-

AF14

AE14
C3 RXBCKP
B1 RXBCKN

IC100
+1.26V_VDDC
LGE3369A (Saturn6 Non RM)

RXE1-

AF15

LVDS OUT

R258

HPD1

LVA2P

RXE0-

AD15

R257
22K

D1-_HDMI1

LVA1M

C259
0.1uF

RXE0+

AD16

R256
22K

D0-_HDMI1
D1+_HDMI1

LVA1P

LVA0M

C2023
0.01uF

D0+_HDMI1

C2022
0.01uF

CK-_HDMI1

LVA0P

G2 RXA0P
G3 RXA0N

CK+_HDMI1

C243
220uF
6.3V

H8
AVDD_USB

+3.3V
MLB-201209-0120P-N2
C287
C292
L202
MLB-201209-0120P-N2
0.1uF
0.1uF
C2044 C2043
10uF 2.2uF
6.3V 10V

C256

C272

0.1uF

0.1uF

MSD3368EV Platform
AV IN_OUT/LVDS/POWER

10

AV IN_OUT/LVDS/POWER

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

DDR2 1.8V By CAP - Place these Caps near Memory


+1.8V_S_DDR

+1.8V_DDR

C342

0.1uF

0.1uF

0.1uF
C341

0.1uF
C340

0.1uF
C339

C337

0.1uF

0.1uF
C338

0.1uF
C334

0.1uF
C336

0.1uF
C332

10uF
C330

0.1uF
C331

0.1uF
C328

0.1uF
C329

0.1uF
C327

0.1uF
C326

C324

10uF
C325

0.1uF

0.1uF

C320

0.1uF

C319

0.1uF

C318

0.1uF

C317

0.1uF

C316

10uF
C315

0.1uF
C314

0.1uF

C313

0.1uF

C312

0.1uF

C310

C308

0.1uF

0.1uF

C307

0.1uF

C306

0.1uF

C305

10uF

C304

C302
0.1uF

C323
0.1uF

C303

L300
MLB-201209-0120P-N2

+1.8V_S_DDR

H9

H3

SDDR_D[6]

DQ6
DQ7
DQ8
DQ10

SDDR_D[11]

DQ11

SDDR_D[12]

DQ12
DQ13
DQ14

B1

SDDR_D[15]

DQ15

SDDR_A[6]

A7

SDDR_A[7]

A8

SDDR_A[8]

P3

D9

SDDR_D[14]

SDDR_A[5]

A6

P8

D1

SDDR_D[13]

A5

P2

D3

A4

N7

D7

SDDR_A[3]

N3

C2

SDDR_A[2]

A9

SDDR_A[9]

SDDR_A[4]

M2

SDDR_A[6]

56

SDDR_A[8]

BA1

SDDR_BA[1]

56

BA2

SDDR_BA[2]
R351
0
READY
SDDR_CK

56
22

M9

J8

CK

VDD1

R1

K8

CK

K2

CKE

/SDDR_CK

150
R300

VDD2

READY

J9

ADDR2_A[6]
R319 56

56

22

R320

ADDR2_A[8]

C22

ADDR2_A[4]

A13

ADDR2_A[5]

A23

ADDR2_A[6]

C12

ADDR2_A[7]

B23

ADDR2_A[8]

B12
C23

ADDR2_A[12] A24

ADDR2_BA[0]

R304

ADDR2_BA[1]

B24

R305

ADDR2_BA[2]

D24

R306

ADDR2_MCLK

B14

/ADDR2_MCLK

56
R308
SDDR_CKE
READY
+1.8V_S_DDR
R346
4.7K

D23

K9

ODT

L8

CS

K7

RAS

/SDDR_RAS

56

R310

/ADDR2_RAS

/SDDR_CAS

56

R311

/ADDR2_CAS

D12

/SDDR_WE

56

R312

/ADDR2_WE

D22

QIMONDA 1G

C7

L7

CAS

C9

K3

WE

VDDQ5

G1

VDDQ3

G3

VDDQ2

G7

VDDQ1

R347

READY
4.7K

SDDR_ODT 56

R309

LDQS

B7

UDQS

SDDR_DQS0_P

56

ADDR2_DQS0_P

C17

SDDR_DQS1_P

56

R314

56

R315

ADDR2_DQM0_P

UDM

SDDR_DQM1_P

56

R316

ADDR2_DQM1_P

A19

SDDR_DQS0_N

56

R317

ADDR2_DQS0_N

SDDR_DQS1_N

56

R318

ADDR2_DQS1_N

B17

E8

LDQS

J3

A8

UDQS

N1

DQ5

F1

DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

P9

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD5

E1

VDD4

J9

VSSQ10

B2

VSSQ9

B8

VDD3

J8

M9

VDD2

CK

K8

R1

VDD1

CKE

K2

A9

VDDQ10

C1

VDDQ9

CK

ODT

K9

CS

L8

RAS

C3

L7

C7

VDDQ7

WE

K3

C9

VDDQ5

G1

VDDQ4

G3

VDDQ3

G7

VDDQ2

G9

VDDQ1

A7

VDDQ6

E9
F7

VSSQ8

VDDQ8

CAS

LDQS

K7

UDQS

HYNIX 1G

B7

LDM

F3

UDM

VSSQ7

B3
A3

VSS5

LDQS

E8

E3

A8

J3

R3

NC5

ADDR2_D[11]

ADDR2_D[0]

VSS2

P9

VSS1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

D2

VSSQ7

D8

ADDR2_D[12]

ADDR2_D[1]

A21

ADDR2_D[9]

ADDR2_D[2]

A15

ADDR2_D[14]

ADDR2_D[3]

B21

ADDR2_D[4]

ADDR2_D[4]

C21

SDDR_D[9]

VSSQ4

F8

VSSQ3

NC1

56
AR307

E2

NC2

R8

NC3

SDDR_D[4]

ADDR2_D[3]

SDDR_D[3]

ADDR2_D[1]

SDDR_D[1]

VSSQ5

F2

D2

A2

VSSQ6

E7

NC5

R3

NC6

R7

NC1

A2

NC2

E2

NC3

R8

VSSDL

J7

VDDL

J1

H2

VSSQ2

H8

VSSQ1

VSSQ6
VSSQ5
VSSQ4

IC300-*2
EDE1116AEBG-8E-F

A2
A3
A4

DQ7
DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

VDD_5

E1

VDD_4

J9

VDD_3

J8

M9

VDD_2

K8

R1

VDD_1

K2

UDQS

VSSQ2

H2

VSSQ1

H8

VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3

G7

B7

ADDR2_D[10]

SDDR_D[10]

F8

VDDQ_2
VDDQ_1

SDDR_D[13]
J1

VDDL

56
AR309

ADDR2_D[13]
ADDR2_D[7]

SDDR_D[7]

LDM

A3

VSS_5

E3

VSS_4

A8

J3

VSS_3

N1

VSS_2

P9

VSS_1

B2

VSSQ_10

B8

ADDR2_D[0]

B3

E8

SDDR_D[0]

F3

UDM

LDQS

VSSQ_9

UDQS

NC_5

R3

NC_6

R7

NC_1

A2

NC_2

E2

NC_3

R8

VSSDL

J7

A7
D2
D8

VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4

F8

VSSQ_3

H2

VSSQ_2

H8

J1

ADDR2_D[2]

SDDR_D[2]

VSSQ_8

E7
F2

VDDL

C14

ADDR2_D[6]

C20

ADDR2_D[7]
ADDR2_D[8]
ADDR2_D[9]

C15
C16
C19

ADDR2_D[10] B16
ADDR2_D[11] B20
ADDR2_D[12] A20
ADDR2_D[13] A16

VDDQ_7

G3

F7

ADDR2_D[8]

SDDR_D[8]

ADDR2_D[5]

VDDQ_8

G1

K3

+1.8V_S_DDR

ADDR2_D[15]

VDDQ_9

C9

ELPIDA 1G

L7

WE

C3
C7

K9
L8
K7

CAS

F2

AR308

VDDQ_10

C1

G9

CS

A9

E9

ODT
RAS

LDQS

VSSDL

DQ15

A1

L3
L1

J7

SDDR_D[15]

ADDR2_D[6]

DQ6

C8

L2

CK
CKE

CK

E7

56

SDDR_D[6]

D8

DQ5

F9

P7
R2

DQ4

F1

P2
P8
P3
M2

BA1
BA2

DQ3

H9

N2
N8
N3
N7

A7
A8
A9
A11
A12

BA0

VSSQ3

DQ2

H1

M3
M7

A5
A6

A10

DQ1

H3

M8

A1

DQ0

H7

J2

A0

G8
G2

VREF

VSSQ_1

C335 1000pF

C333 0.1uF

TDDR_A[1]

TDDR_A[1]

A1

T25

BDDR2_A[2]

AF23
T24

BDDR2_A[4]

AE23

BDDR2_A[5]

R26

BDDR2_A[6]

AD22

BDDR2_A[7]

R25

BDDR2_A[8]

AC22

BDDR2_A[9]

AD23 BDDR2_A[10]
R24

BDDR2_A[10]

TDDR_A[2]

BDDR2_A[5]

TDDR_A[5]
56

BDDR2_A[7]

TDDR_A[4]

BDDR2_A[4]
56

TDDR_A[7]

A7
A8

TDDR_A[9]

A9

56

R326

56

TDDR_A[8]

BDDR2_A[8]

B_DDR2_BA0

A_DDR2_BA1

B_DDR2_BA1

A_DDR2_BA2

B_DDR2_BA2

BDDR2_BA[0]

R327

56

TDDR_BA[0]

BA0

AC24

BDDR2_BA[1]

R328

56

TDDR_BA[1]

BA1

L3

BDDR2_MCLK

R330

22

CK

J8

CK
CKE

/BDDR2_MCLK
BDDR2_CKE

AB23

R331
R332

B_DDR2_CKE

22
56
READY
R348

R333

56

U25
/A_DDR2_CAS

/B_DDR2_CAS

/BDDR2_RAS

R334

56

U24

/BDDR2_CAS

R335

56

/BDDR2_WE

R336

56

AB24

/B_DDR2_WE
AB26

A_DDR2_DQS0

B_DDR2_DQS0

BDDR2_DQS0_P

AA26

BDDR2_DQS1_P

R337

B_DDR2_DQS1

R338

56

BDDR2_DQM0_P

R339

4.7K
READY
R349

TDDR_ODT
4.7K

/TDDR_RAS
/TDDR_CAS

A_DDR2_DQSB0

AC26

BDDR2_DQM1_P

R340

56

BDDR2_DQS0_N

R341

BDDR2_DQS1_N

R342

56

B_DDR2_DQSB1

ADDR2_D[5]

SDDR_D[5]

ADDR2_D[14] B19
ADDR2_D[15] A17

B_DDR2_DQ0

A_DDR2_DQ1

B_DDR2_DQ1

A_DDR2_DQ2

B_DDR2_DQ2

A_DDR2_DQ3

B_DDR2_DQ3

A_DDR2_DQ4

B_DDR2_DQ4

A_DDR2_DQ5
A_DDR2_DQ6
A_DDR2_DQ7
A_DDR2_DQ8
A_DDR2_DQ9
A_DDR2_DQ10

B_DDR2_DQ5
B_DDR2_DQ6
B_DDR2_DQ7
B_DDR2_DQ8
B_DDR2_DQ9
B_DDR2_DQ10

A_DDR2_DQ11

B_DDR2_DQ11

A_DDR2_DQ12

B_DDR2_DQ12

A_DDR2_DQ13
A_DDR2_DQ14
A_DDR2_DQ15

B_DDR2_DQ13
B_DDR2_DQ14
B_DDR2_DQ15

M9

VDD2

K2

R1

VDD1

A9

VDDQ10

C1

VDDQ9

C3

VDDQ8

C7

VDDQ7
VDDQ6

E9

VDDQ5

G1

VDDQ4

G3

VDDQ3
VDDQ2

G9

VDDQ1

K9

BDDR2_D[11]

AE26

BDDR2_D[1]

BDDR2_D[12]

W24

BDDR2_D[2]

BDDR2_D[9]

AF24

BDDR2_D[3]

BDDR2_D[14]

AF25

BDDR2_D[4]

BDDR2_D[4]

Y26
AD25
Y25

WE

K3

LDQS

F7
B7

QIMONDA 512M

LDM

F3
B3

LDQS

E8

A3

VSS5

UDQS

A8

E3

VSS4

J3

VSS3

N1

VSS2

P9

VSS1

B2

VSSQ10

B8

VSSQ9

A7

VSSQ8

D2

VSSQ7

TDDR_DQS1_N
L1

NC5

R3

NC6

R7

NC1

A2

TDDR_D[9]

IC301-*1
H5PS5162FFR-S6C

BDDR2_D[5]
BDDR2_D[6]
BDDR2_D[7]
BDDR2_D[8]
BDDR2_D[9]
BDDR2_D[10]

AE24 BDDR2_D[11]
AD26 BDDR2_D[12]

TDDR_D[14]
AR311

56

BDDR2_D[3]

NC2

BDDR2_D[1]

NC3

TDDR_D[1]

E2
R8

DQ5
DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD5

E1

VDD4

J9

VDD3

M9

VDD2

R1

VDD1

A9

VDDQ10

C1

P7
R2

DQ4

F1

P2
P8
P3
M2

CK

VDDQ9

L2
L3

J8

CK

K8

CKE

K2

ODT

DQ3

H9

N2
N8
N3
N7

A7
A8
A9

BA1

DQ2

H1

M3
M7

A3
A4
A5
A6

A11
A12

BA0

DQ1

H3

M8

A1
A2

A10/AP

DQ0

H7

J2

A0

G8
G2

VREF

TDDR_D[4]
TDDR_D[3]

K9

CS

L8

RAS

K7

CAS

L7

WE

K3

HYNIX 512M

C3
C7
C9

LDQS

E9

F7

UDQS

B7

G1
G3
G7

LDM

F3

UDM

56
AR312

BDDR2_D[6]
BDDR2_D[15]
BDDR2_D[8]

TDDR_D[6]

G9

A3
E3

VSSQ6

NC4

+1.8V_S_DDR

J7

E7

VSSQ5

BDDR2_D[0]

A7
D2

TDDR_D[7]

J1

VSSQ3

VDDQ3
VDDQ2
VDDQ1

VSS5
VSS4
VSS3
VSS2
VSS1

VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5

VSSQ1

VSSQ2

H8

VSSQ1

G8

A4
A5
A6

DQ5
DQ6

F9

DQ7

C8

DQ8

C2

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

P7
R2

DQ4

F1

P2
P3
M2

DQ3

H9

N2
N3
N7
P8

A9
A11

DQ2

H1

M3
M7
N8

A7
A8
A10

BA0

DQ1

H3

M8

A1

DQ0

H7

J2

A0

VDD_5

L2

BA1

L3

E1

VDD_4

CK

J8

J9

VDD_3

K8

M9

VDD_2

K2

R1

VDD_1

CK
CKE

ODT

K9

CS

L8
K7

WE

L7

A9
C1
ELPIDA 512M

C3
C7

K3

C9

TDDR_D[0]

LDQS

E9

F7

UDQS

B7

G1
G3
G7

LDM

F3

UDM

G9

E8

A3

A8

E3

NC_4

TDDR_D[2]

L1

J3

NC_5

P9

VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2

A2

VDDQ_1

VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

R7

NC_1

N1

R3

NC_6

NC_2

B2
B8

E2

NC_3

R8

VSSDL

J7

A7
D2
D8

TDDR_D[5]

VDDQ_10

B3

LDQS
UDQS

56

VDDQ4

VSSQ2

G2

VREF

CAS

BDDR2_D[5]

VDDQ5

VSSQ3

H8

IC301-*2
EDE5116AJBG-8E-E

RAS

BDDR2_D[2]

VDDQ6

VSSQ4

H2
J1

VSSQ4

H2
VDDL

VDDQ7

E7
F8

J7

VDDL

A3

AD24 BDDR2_D[14]
AA24 BDDR2_D[15]

B8

F2

VSSDL

A2

BDDR2_D[13]

B2

A2
E2
R8

A12

56

P9

R3
R7

NC1
NC2

F8

TDDR_D[13]
AR313

L1

NC5
NC6

NC3

F2

VSSDL

TDDR_D[10]

BDDR2_D[13]

N1

D8

TDDR_D[15]
TDDR_D[8]

BDDR2_D[10]

E8
A8

J3

D8

VDDQ8

B3

LDQS
UDQS

BDDR2_D[7]

Y24

L7

TDDR_DQM1_P

TDDR_D[12]

W26

CAS

UDM

TDDR_D[11]

AE25

L8
K7

NC4

BDDR2_D[0]

V26

CS

TDDR_DQS1_P

AR310

W25
A_DDR2_DQ0

VDD3

K8

UDQS

56

AA25

B_DDR2_DQM1

B_DDR2_DQSB0

VDD4

J9

C9

ODT

/TDDR_WE

56

AB25

B_DDR2_DQM0

TDDR_D[15]

TDDR_CKE

56

AC25
A_DDR2_DQM0

TDDR_D[14]

VDD5

E1

RAS

BDDR2_ODT

B_DDR2_ODT
/B_DDR2_RAS

DQ15

G7

V25

U26

/A_DDR2_RAS

TDDR_D[13]

DQ14

A1

AB22

B_DDR2_MCLK

/B_DDR2_MCLK

TDDR_D[12]

DQ13

TDDR_D[9]

L2

V24
/A_DDR2_MCLK

DQ12

TDDR_D[8]

+1.8V_S_DDR

AC23
A_DDR2_BA0

TDDR_D[11]

B9

R2

DQ11

B1

P7

A12

TDDR_D[10]

D9

M2

A11

DQ10

D1

P3

A10/AP

TDDR_A[11]

DQ9

D3

P8

TDDR_D[7]

DQ8

D7

P2

TDDR_A[8]

TDDR_D[6]

DQ7

C2

N7

TDDR_D[5]

DQ6

C8

N3

A6

TDDR_A[6]

BDDR2_A[11] R325

AE22 BDDR2_A[12]

A5

TDDR_A[6]

TDDR_A[12]

TDDR_A[2]

TDDR_A[5]

TDDR_D[4]

DQ5

F9

N8

TDDR_A[11]

TDDR_A[0]

BDDR2_A[2]
BDDR2_A[6]

BDDR2_A[11]

TDDR_A[7]

AR305

BDDR2_A[0]

A4

TDDR_D[3]

DQ4

F1

N2

TDDR_D[2]

DQ3

H9

M7

A3

TDDR_A[10]

TDDR_A[12]

BDDR2_A[12]

A2

TDDR_A[4]

TDDR_A[10]

AR304

TDDR_D[1]

DQ2

H1

M3

TDDR_D[0]

DQ1

H3

M8

TDDR_A[3]

56

BDDR2_A[3]

B_DDR2_A12

B15

SDDR_D[12]

VSS3

N1

A_DDR2_A12

A_DDR2_DQSB1

SDDR_D[11]

NC4

VSS4

UDQS

B_DDR2_A11

A_DDR2_DQM1

AR306

SDDR_D[14]

DQ10

D3

L1

DQ4

H9

L2
L3

DQ3

H1

P8

P7
R2

DQ2

H3

N8

P2
P3
M2

B_DDR2_A10

A_DDR2_A11

BDDR2_A[1]

TDDR_DQS0_N

DQ1

H7

N2
N3
N7

B_DDR2_A9

A_DDR2_A10

A18

E3

DQ0

G2

M3
M7

A_DDR2_A9

B_DDR2_A8

C18

ADDR2_D[0-15]

G8

J2

M8

A4

A8

A_DDR2_A8

A_DDR2_DQS1

SDDR_DQM0_P

R7

A7

B_DDR2_A7

B18

ADDR2_DQS1_P

R313

IC300-*1
HY5PS1G1631CFP-S6

A3

A_DDR2_A7

BDDR2_A[1]

A3

VSS1

A9

B_DDR2_A6

/A_DDR2_WE

LDM

VSS2

A5

A_DDR2_A6

AF26

TDDR_DQM0_P

VSS3

A6

B_DDR2_A5

A0

G9

VSS4

A1

A_DDR2_A5

TDDR_A[0]

TDDR_DQS0_P
F7

VSS5

A2

B_DDR2_A4

A_DDR2_ODT

B3

A0

A_DDR2_A4

D14

ADDR2_ODT

F3

BA2

B_DDR2_A3

TDDR_A[3]

E9

VDDQ4

BA0

A_DDR2_A3

D13

C3

VDDQ6

BA1

B_DDR2_A2

BDDR2_A[3]

+1.8V_S_DDR

C1

VDDQ7

A11

A_DDR2_A2

A_DDR2_CKE

A9

VDDQ8

A12

B_DDR2_A1

A14

ADDR2_CKE

R307

VDDQ9

VREF

B_DDR2_A0

A_DDR2_A1

A_DDR2_MCLK

VDDQ10

A10/AP

A_DDR2_A0

C24

R303

1%

R345
1K
B13

ADDR2_A[3]

ADDR2_A[10] B22
ADDR2_A[11] A12

ADDR2_A[11]

56

ADDR2_A[2]

ADDR2_A[9]

ADDR2_A[4]

SDDR_A[11]

SDDR_BA[0]

R343
1K
1%

1000pF

C311

C309

R321

1K 1%
1%
0.1uF

R322

1K

1K 1%

ADDR2_A[2]

SDDR_A[4]

BA0

VDD3

ADDR2_A[0]

SDDR_A[2]

L1

E1

AR302

SDDR_A[0]

L3

A1

ADDR2_A[7]

SDDR_A[7]

L2

VDD4

ADDR2_A[12]

SDDR_A[12]

+1.8V_S_DDR
VDD5

ADDR2_A[9]

SDDR_A[12]

SDDR_A[11]

A12

AR301
SDDR_A[9]

SDDR_A[10]

A11

R2

B9

A10/AP

P7

56

56

BDDR2_A[0]

BDDR2_D[0-15]

SDDR_D[10]

DQ9

A2
A3

N8

C8

SDDR_D[9]

A22

SDDR_A[10]

M7

F9

SDDR_D[8]

ADDR2_A[1]

SDDR_A[1]

N2

F1

SDDR_D[7]

ADDR2_A[10]

A1

T26

DQ0

H7

TDDR_A[9]

TDDR_D[0-15]

DQ5

C13

SDDR_A[1]

M3

H1

SDDR_D[5]

ADDR2_A[0]

SDDR_A[0]

J2

AR303
BDDR2_A[9]

TDDR_A[0-12]

DQ4

ADDR2_A[1]

A0

G8
G2

VREF
A_MVREF

ADDR2_A[3]

M8

IC301
HYB18TC512160B2F-2.5

D15

ADDR2_A[5]

R344
150

SDDR_D[4]

AR300

SDDR_A[5]
SDDR_A[3]

ADDR2_A[0-12]

DQ3

VREF

IC100
LGE3369A (Saturn6 Non RM)

READY

J2

H7

SDDR_D[3]

SDDR_D[0-15]

R302 1K 1%

G2

DQ2

+1.8V_S_DDR

BDDR2_A[0-12]

G8

DQ1

SDDR_D[2]

SDDR_A[0-12]

DQ0

SDDR_D[1]

C301

C300 1000pF

IC300
HYB18TC1G160C2F-2.5
SDDR_D[0]

0.1uF

R301

+1.8V_S_DDR

E7
F2

VSSQ_10
VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_4

F8
VDDL

VSSQ_2

H8

J1

VSSQ_3

H2

VSSQ_1

56
IC300-*3
K4T1G164QE-HCE7

IC301-*3
K4T51163QG-HCE7

A0
A1
A2
A3
A4

G8

A7
A8

DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

VDD_5

E1

P7

DQ8

C2

P2

R2

DQ7

C8

P3

BA1
BA2

DQ6

F9

M2

A11
A12

BA0

DQ5

F1

P8

A9
A10/AP

DQ4

H9

N2
N8
N3

DQ3

H1

M3
M7

N7

DQ2

H3

M8

A5
A6

DQ1

H7

J2

DQ0

G2

VREF

VDD_4

A0
A1
A2
A3
A4

A7
A8

DQ7
DQ8
DQ9

D7

DQ10

D3

DQ11

D1

DQ12

D9

DQ13

B1

DQ14

B9

DQ15

A1

P7

DQ6

C2

P2

R2

DQ5

C8

P3

BA1

DQ4

F9

M2

A11
A12

DQ3

F1

P8

A9
A10/AP

DQ2

H9

N2
N8
N3

DQ1

H1

M3
M7

N7

DQ0

H3

M8

A5

BA0

L3
L1

H7

J2

A6

L2

G8
G2

VREF

VDD_5

L2
L3

E1

VDD_4

J9

VDD_3

J8

J9

VDD_3

CK

J8

M9

VDD_2

CK

K8

M9

VDD_2

CK

K8

R1

VDD_1

CKE

K2

R1

VDD_1

A9

VDDQ_10

C1

CKE

CK

K2
ODT

ODT

K9

CS

K9

RAS

VDDQ_8

CAS

L7

L7

C7

VDDQ_7

WE

K3

WE

K3

C9

VDDQ_6

E9

VDDQ_5

G1

VDDQ_4

G3

VDDQ_3

G7

VDDQ_2

G9

VDDQ_1

CS

LDQS
UDQS

L8
K7

F7
B7

LDM

C1

K7
SS 512M

C3
C7
C9

LDQS
UDQS

F7
B7

E9
G1
G3
G7

LDM

F3

UDM

F3

UDM

SS 1G

A9

L8

VDDQ_9

C3

CAS

RAS

VDDQ_10
VDDQ_9
VDDQ_8
VDDQ_7
VDDQ_6
VDDQ_5
VDDQ_4
VDDQ_3
VDDQ_2
VDDQ_1

B3

G9

B3
A3

VSS_5

E8

E3

VSS_4

A8

J3

VSS_3

N1

LDQS
UDQS

VSS_2

P9

VSS_1

NC_5

R3

NC_6

LDQS
UDQS

NC_1

A2

NC_2

E2

NC_3

R8

VSSDL

J7

B2
B8
A7
D2
D8

VSSQ_10

E3

R3

A2

NC_2

VSSQ_7

E2

NC_3

R8

VSSDL

VSSQ_8

J7

VSSQ_6

VSSQ_3
VSSQ_2

H8

VSSQ_1

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

P9

B2
B8
A7
D2
D8

VSSQ_5
VSSQ_4

H2

N1

VSS_5
VSS_4
VSS_3
VSS_2
VSS_1

R7

NC_1

VSSQ_9

E7
F8

J1

A3

L1

NC_5
NC_6

F2

VDDL

E8
A8

J3
NC_4

R7

VSSQ_10
VSSQ_9
VSSQ_8
VSSQ_7
VSSQ_6
VSSQ_5
VSSQ_3

H2
J1

VSSQ_4

F8
VDDL

E7
F2

VSSQ_2

H8

VSSQ_1

MSD3368EV Platform
DDR2

10

DDR2

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

DVB-CI SLOT
+5V_CI_ON
CI_DATA[0-7]

EAG41860102

CI_MDI[7]

33

AR506

FE_TS_DATA[7]
FE_TS_DATA[6]

CI_MDI[6]

/CI_CD1
10067972-000LF

C501
0.1uF
16V

FE_TS_DATA[5]

CI_MDI[5]

P500

FE_TS_DATA[4]

CI_MDI[4]

35
R511

100

CI_DATA[3]

36

CI_DATA[4]

3
4

CI_DATA[5]

CI_TS_DATA[5]

39

CI_DATA[6]

CI_TS_DATA[6]
CI_TS_DATA[7]

40

41

42

33

CI_TS_DATA[4]

R508

10K

R517
10K

37
38

AR500

FE_TS_DATA[0-7]

C505
10uF
6.3V
R505
10K

DVB-CI TS INPUT

CI_DATA[0-7]

+5V

CI_DATA[7]
R515

CI_MDI[3]

47

9
10

CI_ADDR[11]

CI_IOWR

45

11

CI_ADDR[9]

46

12

47

13

FE_TS_DATA[2]

CI_ADDR[13]

FE_TS_DATA[1]
FE_TS_DATA[0]

CI_ADDR[8]

CI_MDI[0]

FE_TS_DATA[3]

CI_MDI[1]

48

CI_MDI[2]

49
50
51

CI_ADDR[14]

16

CI_MDI[0]
FE_TS_DATA[0-7]

+5V

15

CI_MDI[3]

CI_OE

10K

44

R518

43

AR507

CI_MDI[1]

CI_ADDR[10]

CI_IORD

33

CI_MDI[2]

/PCM_CE

17

0.1uF

C503

100

R513
GND

52

READY

CI_MDI[4]

14

18

53

19

CI_WE

R516
R514

100

/PCM_IRQA

READY

C509
0.1uF
16V

C508
0.1uF
GND

CI_MDI[5]

54

20

CI_MDI[6]

55

21

CI_ADDR[12]

CI_MDI[7]

56

22

CI_ADDR[7]

57

23

CI_ADDR[6]

58

24

CI_ADDR[5]

59

25

CI_ADDR[4]

60

26

CI_ADDR[3]

61

27

CI_ADDR[2]

62

28

CI_ADDR[1]

63

29

CI_ADDR[0]

64

30

CI_DATA[0]

65

31

CI_DATA[1]

66

32

CI_DATA[2]

67

33

68

34

R509
R503

PCM_RST
R500

/PCM_WAIT

10K

47

47
AR503

REG

33

CI_TS_CLK
CI_TS_VAL
CI_TS_SYN

CI_TS_DATA[0]

100

AR504
33
R510
+5V

100

G2
2

69

DVB-CI HOST I/F

/PCM_CD
R530
0

CI_EN
CI_ADDR[0-14]

IC501

1OE

TOSHIBA

G1
1

20

VCC

+3.3V_CI
C511
0.1uF
16V

0ITO742440D
1A1

19

PCM_A[0]

2OE

AR514

GND

10K

R507

/CI_CD2

R512

R529

CI_TS_DATA[3]

READY

33

CI_TS_DATA[1]
CI_TS_DATA[2]

GND

2Y4

18

17

CI_ADDR[7]

16

1Y1
CI_ADDR[0]

GND
1A2
PCM_A[1]
R506
10K

2A4
PCM_A[7]

GND
2Y3

C502
0.1uF
16V

CI_ADDR[6]

TC74LCX244FT
READY

1A3

PCM_A[2]

15

BUF_TS_SYN

1Y2
CI_ADDR[1]
2A3
PCM_A[6]

AR515
2Y2

BUF_TS_VAL_ERR

14

13

12

10

CI_ADDR[5]

11

1Y3
CI_ADDR[2]

BUF_TS_CLK
1A4
PCM_A[3]
2Y1
CI_ADDR[4]
GND

2A2
PCM_A[5]
1Y4
CI_ADDR[3]
2A1
PCM_A[4]

DVB-CI SERIAL BUFFER TS


+3.3V_CI

AR508

CI_DATA[0]

+3.3V_CI

10K

OUT_Y

16V
0.1uF

R520

C510

/CI_CD1

CI_EN

A0

FE_TS_CLK
GND

R521 READY

R519

/PCM_CD
47

47

A1

FE_TS_VAL_ERR

A2

FE_TS_SYN

A3

FE_TS_SERIAL

CI POWER ENABLE CONTROL

R522
10K

A4

R523
10K

A5

+5V_CI_ON
+5V_CI

Q501
RSR025P03
S

L500
MLB-201209-0120P-N2

C504
0.1uF
16V
READY

C506
10uF
16V

C507
0.1uF
16V

33K
R524

22K

10K

R504

0.1uF
16V
R501

C500

A6
G

20

19

18
17

4
5
6

16

VCC

AR509

CI_DATA[4]

PCM_D[5]
PCM_D[6]

CI_DATA[7]

PCM_D[7]

OE2

Y1

PCM_D[0-7]

CI_DATA[0-7]

Y0
AR513

33

BUF_TS_CLK
BUF_TS_VAL_ERR
BUF_TS_SYN

CI_ADDR[8]

BUF_TS_DATA[0]

Y2

AR510

CI_ADDR[9]

33

PCM_A[8]
PCM_A[9]

CI_ADDR[10]

15

14

13

Y3

PCM_A[10]

CI_ADDR[11]

PCM_A[11]

Y4
Y5

CI_ADDR[12]

33

AR511
PCM_A[12]

CI_ADDR[13]

PCM_A[13]

A7

12

PCM_A[14]

Y6

10

11

Y7

33

REG
AR512

Q500
2SC3052

PCM_D[4]

CI_DATA[5]

R528
C

PCM_D[3]

33

CI_ADDR[14]

GND
R502
10K

PCM_D[2]

33

R527

CI_DATA[6]

0.1uF

OE1

/CI_CD2

READY

GND

VCC

R525
0

IN_A

BUFFER

C512

74LVC541A(PW)

CI_DATA[3]

PCM_D[0]
PCM_D[1]

CI_DATA[2]

PCM_D[0-7]

+3.3V_CI

IN_B

CI_DATA[0-7]

IC502

READY
IC500
KIC7SZ32FU

PCM_5V_CTL

33

CI_DATA[1]

DVB-CI DETECT

CI_OE
CI_WE

33

/PCM_REG

/PCM_OE
/PCM_WE

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

CI_IORD

/PCM_IORD

CI_IOWR

/PCM_IOWR

MSD3368EV Platform
CI

10

DVB-CI SLOT

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

5V_HDMI1

R612
0

20

+5V_ST
5V_HDMI1

IC600

EAG59023302

A0

A1

8
7
6
5
4
3
2
1

CK+

CK+_HDMI1
D0-

A2
D0-_HDMI1

REAR_H
3

R629

R626
18K

18K

SCL
R623

GND

R662
10K

C603
0.1uF

WP

D0_GND
D0+

5V_HDMI_3

VCC

CK-_HDMI1

12
11
10
REAR_H
9

R665
33K

C
CEC_REMOTE

13

5V_HDMI_2

5V_HDMI_1

ENKMC2838-T112
D600

AT24C02BN-10SU-1.8

14

R663
33K

DDC_SCL_1

R660
10K

DDC_SDA_1

15

A2

16

5V_HDMI3

5V_HDMI2

R661
33K

READY

5V_HDMI1

R664
10K

17

C600
0.1uF
16V

A1

R600

18

1K
READY

19

1K R615

HPD1

20

22

DDC_SCL_1

SDA

D0+_HDMI1

R621

22

DDC_SDA_1

D1D1-_HDMI1
D1_GND
D1+
D1+_HDMI1
D2D2-_HDMI1
D2_GND
D2+
D2+_HDMI1

UI_HW_PORT1

GND
JK600

5V_HDMI2

R613
0

20

HPD2

R601

17

C601
0.1uF
16V

1K R616

18

1K
READY

19

READY

20

5V_HDMI2 +5V_ST

16

DDC_SDA_2

15

DDC_SCL_2

7
6
5
4
3
2
1

CK+_HDMI2

A1
C

VCC
C607
0.1uF

WP

D0-

R649

R646
18K

R632

18K

R637

330K
D0-_HDMI2

A2

D0_GND

SCL
DDC_SCL_2
R645

D0+

GND

D0+_HDMI2
D1-

22
R624
0
READY

SDA
DDC_SDA_2
R642

D1-_HDMI2

22

D1_GND

D605
30V

READY

A1

CK+

MMBD301LT1G

EAG59023301

A0

CK-_HDMI2

12

+3.3V_HDMI_ST
ENKMC2838-T112
D602

CEC_REMOTE

13

11
10

A2

IC602
AT24C02BN-10SU-1.8

14

R659
0

CEC_REMOTE

D1+

GND

D1+_HDMI2
D604
READY

D2D2-_HDMI2
D2_GND
D2+
D2+_HDMI2

27K

HDMI_CEC

BSS83
Q600
READY

UI_HW_PORT2
JK601
GND

SIDE HDMI
5V_HDMI3

R636
0

17

ENKMC2838-T112
D603

16

IC603

DDC_SDA_3

15

DDC_SCL_3

AT24C02BN-10SU-1.8

A0

14

VCC

CEC_REMOTE

13

A1

CK-_HDMI3

SIDE_H 12
EAG42463001

A1

A2

C605
0.1uF
16V

5V_HDMI3 +5V_ST
HPD3

R631

18

1K
READY

19

READY

20

1K R638

JACK_GND

C608
0.1uF

WP

R648
18K

R650
18K

11
10
9
8
7
6
5
4
3
2
1

SIDE_H
A2

CK+
CK+_HDMI3

SCL
DDC_SCL_3
R643

D0GND

D0-_HDMI3

D0_GND

22

SDA
DDC_SDA_3
R644

22

D0+
D0+_HDMI3

D1-

D1-_HDMI3

D1_GND

GND

D1+
D1+_HDMI3

D2-

D2-_HDMI3

D2_GND
D2+

D2+_HDMI3

UI_HW_PORT3
GND
JK603

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

MSD3368EV Platform
HDMI

10

HDMI

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

Audio Amp
AVSS

22K

2200pF

1uF
C703

R715
470

470

C730

R718

R707

C736
0.047uF

Separate DGND AND AVSS

C713

AVSS

+3.3V
0.047uF

4700pF

C720

AVSS
C702

4700pF

This parts are Located


on AVSS area.

R717
0

C733

L702

0.033uF
50V

L701
+3.3V_DVDD

OSC_RES
DVSS_1
VR_DIG
PDN

SDA
SCL

OUT_A

PVDD_A_1

BST_A

PVDD_A_2
4

GVDD_OUT_1

SSTIMER
7

NC

OC_ADJ
8

AVSS
10

T-AD_9060
C732
0.01uF

50V
0.033uF

R704
3.3

C740
0.68uF

R705
3.3
C727
0.01uF

C726
0.1uF

DEV

BST_C

@netLa

PVDD_C_2
PVDD_C_1
OUT_C
PGND_CD_2

37

24

PGND_CD_1

SPK_L+
50V
0.033uF
C729

L704
2S AD-9060 2F
1S

1F

C717
0.1uF
C739
0.68uF

T-AD_9060

C710
0.1uF

SPK_L-

R709
3.3
R719
3.3
C715
0.01uF

36

35

DEV

SPK_R+

SPK_R-

1
P700

@netLa

SPK_R-

OUT_D

PVDD_D_2

PVDD_D_1

BST_D

GVDD_OUT_2

VREG

GND

AGND

DVDD

DVSS_2

STEST

RESET

SPK_R+

C734
0.01uF

SDA1
SCL1

SPK_LWAFER-ANGLE

38

23

R708
22

1F

BST_B

39

34

R703
22

PVDD_B_1

41

22

33

R706
22

PVDD_B_2

42

21

32

MS_LRCK
MS_SCK
MS_LRCH

1S

40

20

SDIN
R711
READY 33K

Q701
2SC3052

10K

LRCLK

25

R716 B

C722
4.7uF
10V

19

SCLK

C718
0.1uF

C
AMP_MUTE

C712
1000pF
50V

R710

OUT_B

43

TAS5709PHPR
IC701

31

1K
R725
10K

PGND_AB_1

SPK_L+

C725
0.01uF

C704
0.1uF

C701

18

30

R712

AC_DET

P_17V
L705
2S AD-9060 2F

44

17

29

18K
R714

PGND_AB_2

45

16

28

1%

C775
330uF
25V

46

27

R713
200

R702
22

C721
330uF
25V

47

15

26

AVSS

0.1uF

48

14

MCLK

C735

0.1uF

13

TESTOUT

C728
0.1uF

11

9
AVDD

+3.3V

PLL_FLTM

VR_ANA

PLL_FLTP
12

+3.3V_AVDD_AMP

AUDIO_MASTER_CLK

120-ohm

120-ohm
C714

C723
10uF 16V

+3.3V_AVDD_AMP

P_17V

P_17V
C719 C706
0.1uF 0.1uF

1uF

C708

C709
1000pF

+3.3V_DVDD

C738

AMP_RST

0.033uF
50V

C737
0.1uF
C707
0.1uF

C711
10uF 16V

TV_L/ROUT
Audio Out Amp

TV_LOUT

R728
2K

Q706
RT1P141C-T112

TV_LOUT

TV_ROUT
5%
1/16W

R701

1
P_17V

C762
0.1uF

2K

R780
5.6K
SC1_Lout

C774
0.1uF
50V

DTV/MNT_LOUT
Q711
2SC3052

2K

13

12

R729
2K

14
R790
33K

13

12

33pF

C772

11

10

R787
5.6K
SC2_Rout

R786
5.6K

10

SC2_Lout

R782
33K

DTV/MNT_ROUT

16V
10uF
C778

11

C771

R726
2K

33pF

TV_ROUT

SCART2_MUTE

1/16W

14

33pF

R779
33K

C769

33pF

R781
5.6K

R727
2K

DTV/MNT_ROUT

Q710
2SC3052

C770

SC1_Rout

2K
1/16W
5%

5%
R797

R798

RT1P141C-T112
Q709

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

C779
10uF
16V

SCART1_MUTE

Q704
2SC3052

1
R785
33K

R791
10K

1/16W
2K
5%

R789
10K

MUTE Ctrl

IC702
LM324D

R794

R783
10K

Q703
2SC3052

R784
10K

MNT/DTV OUT

DTV/MNT_LOUT

16V
10uF
C777

C776
10uF
16V

1
2

C773
0.1uF

MSD3368EV Platform
AUDIO

10

AUDIO

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

+5V

P800
SMAW200-H18S1

+5V
+5V_ST

+5V_ST

P_+5V
L817

C854
P_17V

L801
MLB-201209-0120P-N2

1
3

C817
100uF
25V
READY

10

11

L800
C813
MLB-201209-0120P-N2
10uF

12

13

+5V_ST

R838
10K
READY

16

17

C805
0.1uF
16V

18

R803
100

R835
Q803
2SC3052

RL_ON/PWR_ONOFF

D1_1

S2

D2_2

G2

+5V_ST

C837
10uF
16V

R828
120K
READY

C839
10uF
6.3V
READY

C835
C834
100uF
0.1uF
16V
AC_DET

C857
220uF
16V
+5V_GENERAL

D1_2

D2_1

C864
10uF
16V

C866
0.1uF
16V

C858
220uF
16V
+5V_CI

L818

560
C

C809
16V
0.1uF
READY

L821
MLB-201209-0120P-N2

14

15

R801
100

L808
S1

C890
10uF
6.3V
READY

C820
0.1uF
16V

C804
470uF
16V

PSU_ERR_DET

+5V_ST

RL_ON/PWR_ONOFF

P_+5V

C865
0.1uF
16V

C862
10uF

Q806
SI4925BDY

R834
10K

G1

C818
0.1uF
50V

R856
10K
READY

R837
2K

0.1uF

C833
10uF
16V

R829
10K
E

C867
10uF
16V

C869
0.1uF
16V

C859
47uF
16V

C812
16V
0.1uF

19

MODULE_ON
C807
0.1uF
16V

+3.3V_TU

L806
MLB-201209-0120P-N2
C826
0.1uF
16V

C885
0.1uF
16V

+5V
GND

IC804
AZ1085S-3.3TR/E1

Stand-by +3.3V

+3.3V_CI
MAX 3A
INPUT

$0.122
1

OUTPUT

40 mA

L814
MLB-201209-0120P-N2

ADJ/GND

C852
0.1uF
16V

+3.3V_ST
+5V_ST

+3.3V_AVDD_MPLL

+3.3V_ST

AP2121N-3.3TRE1
VIN

C829
10uF
16V

R858
0

R866
0

IC802

C831
0.1uF
650 mA

C815
0.1uF
16V

VOUT

GND

C803
0.1uF
16V

C806
10uF
16V

+3.3V

GND

0
R862

1
C802
10uF
16V

C828
68uF
10V

C808
0.1uF
16V

C892
10uF
6.3V
READY

+3.3V_HDMI_ST

C850
10uF
6.3V

R859
0
C816
0.1uF
16V

C844
0.1uF

C897
220uF
16V

GND

C891
10uF
6.3V
READY

GND

S6 core 1.26 volt

+3.3V_AVDD
320 mA
+3.3V_AVDD

+5V

+3.3V_AVDD

+5V_GENERAL

50 mA

IC803

R865
0

IN

IC801
AP1117E33G-13
ADJ/GND

2
C842
100uF
16V

C800
10uF
16V

C888
10uF
6.3V

OUT

C801
0.1uF
16V

10uF

READY

ADJ/GND

L805

2
C814
0.1uF
16V

C810

IN

465 mA @85% efficiency

+1.8V_TU

AP1117E18G-13

C811
0.1uF
16V

OUT

C822
10uF
6.3V
READY

C889
10uF
6.3V

C827
0.1uF
16V
READY

C824
0.1uF
16V

P_+5V

C825
100uF
16V

C841
100uF
16V

450 mA

+1.8V_DDR

+1.8V_DDR

INPUT

OUTPUT

TP1451

FB

EN/SYNC

1600 mA
L813
3.6uH

R2
GND

1%

R864
0

AZ1085S-ADJTR/E1

IC805
MP2212DN
R1

1%
R825
620K

IC800

SW_2

ADJ/GND

C883
0.1uF
16V

IN

Placed on SMD-TOP

R861
75

C893
10uF
6.3V

C880
10uF
6.3V
READY

R802
0
1/4W

NR8040T3R6N
3

C877
0.1uF
16V

BS

C838
10uF

C OUT

SW_1
C843
10uF
6.3V

1
C878
10uF
6.3V

+1.26V_VDDC
C899 READY
0.1uF
16V

10K

R824
360K

MAX 3A

10K

READY
R827

R2 = R1/(Vout/0.8-1)

READY
50V
100pF
C870
+3.3V

R831

Replaced Part

L802
MLB-201209-0120P-N2

VCC

C894
10uF
6.3V

C856
0.1uF

C830
10nF
50V

C898
10uF

C896
10uF
6.3V
READY

1%

R860
33

1%
R830
10
1%

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

C836
1uF
10V

MSD3368EV Platform
POWER

10

POWER

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

LGE Internal Use Only

+3.3V_AVDD

Full SCART 1

Half SCART 2

R918
10K

+3.3V_AVDD

D916
30V
READY

C909
0.1uF
16V

SC1_DET

R919
1K

R949
10K
C923
0.1uF
16V

SHIELD

SC1_CVBS_IN

SC2_CVBS_IN

D906
30V
READY

D903
30V
READY

R912
470K

16
RGB_IO
15
R_OUT
14
RGB_GND

19
SYNC_OUT

C907
100uF
16V

17
SYNC_GND1

SC1_FB

R914
22

16
RGB_IO

SC1_R
D902
30V
READY

R904
75

14
RGB_GND

11
G_OUT
.

10

D901
30V
READY

R903

12
D2B_OUT

SC1_G

R905
0

11
G_OUT
.

75

SC1_ID

SC_ID 8

GND

R911
10K

SC1_LIN

R901
470K

D908
5.6V

R_OUT 1

C901
OPT

JK900

C903
330pF
50V

R910
12K

R900
470K

C900
OPT

C
B

Q900
2SC3052

R966
1K

REC_8

D935
KDS184
A2
C

5
4

REC_8
SC2_ID

R946
62K

R947
11K

R941
10K
SC2_LIN

R_IN 2

D928
5.6V

C920
330pF
50V

C915
OPT

R927
470K

JK903

R943
12K

R940
10K

SC1_RIN
C902
330pF
50V

DTV/MNT_VOUT
SC_RE2

D930
30V
READY

R_OUT 1

R906
10K
D907
5.6V

Q901
2SC3052

R967
1K

A1

SC_RE1

C917
47uF
25V

L_OUT 3

TP1466

R_IN

GND

L_OUT 3

C921
47uF
25V

R929
470K

Q904
2SC3052
R984
390
E

12K

C928
10uF
16V

Q902
2SC3052

R972

SC2_ID 8

R917
11K

L_IN

R902
75

R928
75
D929
30V
READY

GND

GND

D915
30V
READY

TP1467

LIN

R916
62K

D917
30V
READY

SC1_B

READY

R987
0

10

READY

DEV

12
D2B_OUT

Q905
2SC3052

13
R_GND

E
2SA1504S
Q903
R989
330
C

15
R_OUT

R907
75

13
R_GND

DEV

C933
0.1uF
50V

18
SYNC_GND2

C
B

R965
4.7K

47K
R982

17
SYNC_GND1

R908
75

R968
10K

15K
R985

FE_VOUT

19
SYNC_OUT
18
SYNC_GND2

20
SYNC_IN

C924
220pF
50V
READY

R990
470

21
COM_GND

R945
0
C922
47pF
50V

R939
75

120
R988

GND

20
SYNC_IN

P_17V

D918
30V
READY

330
R981

21
COM_GND

23
22
AV_DET

D904
30V
READY

R969
3K

SHIELD

C908
220pF
50V
READY

READY

R913
75
22
AV_DET

R915
0

C904
47pF
50V

L900
MLB-201209-0120P-N2

23

[SCART2 PIN 8]
P_17V
SC2_DET

R948
1K

SC2_RIN

R909
12K

D927
5.6V

C914
OPT

R926
470K

C919
330pF
50V

R942
12K

R996
1K
TV_LOUT
C932
6800pF
50V

D905
5.6V
READY

R994
1K

DTV/MNT_LOUT

R980
470K
READY

C931
6800pF
50V

D926
5.6V
READY

R993
1K

R978
470K
READY

TV_ROUT
R995
1K

R976
470K
READY

C929
6800pF
50V

DTV/MNT_ROUT
C930
6800pF
50V

R979
470K
READY

D920
5.6V
READY

+3.3V_CI

USB
FLG

C934
470uF
16V

JK901
PPJ234-01

5D

L901

R991
10K

IC902
NL17SZ08DFT2G

IN_1

IN_2

EN

USB_CTL

READY

AC_DET

R944

USB_OCD

R970

USB_DM

USB_DP
D932
D933
CDS3C05HDMI1
CDS3C05HDMI1
5.6V
5.6V

C905
1000pF
50V

GND

[RD]O-SPRING_2

R960
12K

5E
4E
L

D913

[RD]E-LUG

R950
470K

COMP_LIN
6E

DEV
6

KJA-UB-4-0004
JK905

12K

R961

R951
470K

R953
10K

100

USB DOWN STREAM

D914

COMP_RIN
C906
1000pF
50V

C927

OUT_1

R954
10K

R992
10K

OUT_2

R999
10K

NC

SIDE CVBS

COMPONENT

P_+5V

IC900
AP2181SG-XX

0.1uF

D900
5.6V
READY

[RD]CONTACT
[WH]O-SPRING
NON_20TOOL

Pr [RD]O-SPRING_1
5C

COMP_Pr
[YL]E-LUG

4A

[YL]O-SPRING

4C

R957
0

R963
10K

+5V_GENERAL +5V_GENERAL

SIDE_LIN

R964
1K
READY

VCC

READY
Y

JK904

R998
100

JST1223-001

READY
R997
0

GND

VCC
READY

D934
C926
0.1uF
50V

VINPUT

GND

SIDE_RIN
12K

C912
100pF

R931

470K

R922

COMP_DET

SPDIF_OUT
R932

C913
100pF

IC901
NL17SZ00DFT2G

12K

470K

JK902

R923

COMP_Y
READY
C910
4.7pF

R933
10K
D922

1%

R956
75

R952
10K

D910

SPDIF OPTIC JACK

[RD]E-LUG

R930
10K

R955
1K

SIDE_CVBS_DET

C911
0.1uF
16V

Fiber Optic

D909
30V

R973
1K

SIDE_CVBS_IN
C916
47pF
50V

PPJ235-01

GND
+3.3V_AVDD

[RD]O-SPRING

5C

6A

[GN]E-LUG

R937
75

[RD]CONTACT

COMP_Pb
1%

[GN]O-SPRING

D911

5A
Y

R958
75

[GN]CONTACT

[WH]O-SPRING

3C

[BL]E-LUG-S

4A

[YL]CONTACT

4B

7B

D931
30V

D919
30V

3A

R938
0
+3.3V_AVDD

D921

[BL]O-SPRING

1%

[RD]E-LUG-S

R959
75

5B
Pb

D912

5A
7C

FIX_POLE

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

MSD3368EV Platform
JACK

10

LGE Internal Use Only

D1008

D1007

D1004

D1003

D1002

+5V_VGA
NON_20TOOL

JK1001
SPG09-DB-010

R1018
22

C1001
0.1uF
16V

GND_2
RED
GREEN_GND

12

GREEN
BLUE_GND

R1016
10K

13

BLUE
NC

V_SYNC

14

C1014
4.7pF
R1019
1K

GND_1
SYNC_GND

10

DSUB_G

+3.3V_AVDD

H_SYNC

DDC_SDA/UART_TX

R1017
22

DDC_DATA

READY

15

D1009
30V

+5V_VGA +5V_ST

DSUB_DET

DDC_CLOCK
DDC_GND

16

SHILED

C1013
0.1uF
16V

IC1001
AT24C02BN-10SU-1.8

R1015
22

NON_20TOOL

C1017
12pF

C1016
12pF

R1013
1K

ENKMC2838-T112
D1012

DSUB_B
C1012
4.7pF

R1014
1K

A2

A1

11

DSUB_R
C1015
4.7pF

RED_GND

R1024
4.7K

DSUB_HSYNC
2

100

DSUB_VSYNC

C1022
0.1uF

R1029
4.7K

R1023
R1032
0
DDC_SCL/UART_RX
R1033
0
DDC_SDA/UART_TX
C1018
18pF
50V

C1021
18pF
50V

ISP_RXD
ISP_TXD

DDC_SCL/UART_RX
R1010
75

R1007
75

R1005
75

GND

R1011
4.7K

R1012
4.7K

LVDS FFC WAFER


PC AUDIO
JK1000
PEJ027-01
NON_20TOOL
3

ROM DOWNLOAD FOR PDP

52
51
PC_SER_CLK

T_TERMINAL1

7A

P401
SMAW200-H26S1

50

PC_SER_DATA

E_SPRING

6A

B_TERMINAL1

PC_RIN
D1010

R_SPRING

5.6V

49

PDP_SCL

48

C1020
100pF
50V

T_SPRING

R1028
10K
R1022
470K

R1027
12K

DISP_EN
47

R1003
10
C1004
220pF
50V
READY

44

PC_LIN

42

C1019
100pF
50V

D1011
5.6V

MOD_ROM_TX

R1026
10K
R1021
R1025
470K
12K

MOD_ROM_RX

10

PDP_SDA

RXO0-

11

12

RXO0+

RXO1-

13

14

RXO1+

RXO2-

15

16

RXO2+

RXOCK-

17

18

RXOCK+

RXO3-

19

20

RXO3+

RXO4-

21

22

RXO4+

PC_SER_CLK

23

24

PC_SER_DATA

25

26

D1001
41

RXO1RXO1+
RXO2RXO2+

39

PDP_SCL

38
37
36
35
34

RXOCKRXOCK+

RS232C

33
32
31

+3.3V_ST

RXO3RXO3+
RXO4RXO4+

C1009
0.1uF
50V

RXE0+

RXE1RXE1+
RXE2-

$0.179

16

GND

+3.3V_ST

READY

RXECK+

27

R408
10K

PC_SER_CLK
R1038 20TOOL
10

R1040
C1031
10pF
50V
READY
READY

R1008
100

PC_SER_DATA
R1006
100

D1005

C1030
10pF
50V
READY

RXE3SUB_SCL

RXE3+

SUB_SDA

RXE4RXE4+

C1027
10pF
READY

20
19

SUB_SDA

+3.3V

14
13

READY

50V

+3.3V

6
5
MOD_ROM_RX

JK1002
SPG09-DB-009

10

MOD_ROM_TX

10
C400
10uF
6.3V

+3.3V_ST

L400
MLB-201209-0120P-N2

11
C1025
10uF
6.3V

12
13

C1026
10pF
READY

1
BUZZER
2

C
B

Q1001
2SC3052
BUZZER

BUZZER
E

R1036
22
KEY_BUZZER

BU400
PKM13EPY-4002-B0

100V
BUZZER

50V

C408
10pF
D1013
1N4148W_DIODES

D1006

6
R1035
22

L402
MLB-201209-0120P-N2

11

220pF

C404
10pF

C1028
10pF
READY

+3.3V_ST

+5V

12

220pF

C405
10pF

R1034
C102922
10pF
READY

16

C1006

C406
10pF

SUB_SCL

17

C1005

LED_R

21

LED_B

DBG_RX

C401
L401
10pF
MLB-201209-0120P-N2

LVDS

22

10

DBG_TX

L404
MLB-201209-0120P-N2

KEY2

23

L408
NORMAL

C1011
0.1uF
50V
R1039
0

R1004
4.7K

R409
10K

C402
L403
10pF MLB-201209-0120P-N2

24

15
R1037 20TOOL
10

R1002
D1015 4.7K
20TOOL

C407
10pF

C403
680pF

18
RXECK-

VCC

14
DOUT1

RIN1

ROUT1

15

RXE2+

13

12

11
DIN1

DIN2

27 @optio

L405
MLB-201209-0120P-N2

IR
R402

KEY1

C1+

V+

C1-

C2+

C2-

DOUT2

V-

RIN2

10

9
ROUT2

R403
HD

25
RXE0-

IC1000

+3.3V_ST

28

R404
27K
READY

26
C1010
0.1uF
50V

MAX3232CDR

100
DISP_EN

29

P402
12507WS-12L

READY

C1008
0.1uF
50V

C1007
0.1uF
50V

30

SUB Board I/F

R443 4.7K

RXO0+

40

READY

RXO0-

PC_SER_CLK

D1014
20TOOL

T_TERMINAL2

45

43

D1000

B_TERMINAL2

6B

R445 4.7K

C1000 C1002
270pF 220pF
50V
50V
READY READY

46
R442
27K
READY

L406
GLASS

R1001
10

C1003
270pF
50V
READY

PDP_SDA

PC_SER_DATA

7B

TF05-51S
P403

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

MSD3368EV Platform
RGB,RS232,LVDS

10

LGE Internal Use Only

DVB-CI DETECT
+3.3V_TU

+3.3V_TU

/FE_RESET
IC1100
NL17SZ08DFT2G

C1141
0.1uF
16V

READY
R1142
10

IN_B

FE_TS_VAL

IN_A

FE_TS_ERR

(TUNER RESET GPIO OPTION)

GND

TU_RESET

XC5000_RESET

VCC

C1101
0.1uF
16V

OUT_Y

10
R1127

GND
FE_TS_VAL_ERR

16V
0.1uF
C1147
16V
0.1uF
C1164

RESET

28

ADDRSEL

VDDC_1

10

27

DDI2

11

26

VDDC_5

25

DDI1

R1174

24

R1182

R1168

R1175

R1176

R1183

R1169

R1177

R1170

R1178

R1179

R1180

R1181

XO

XI

VSSAH_OSC

49

VDDAH_OSC

VDDH_4

VSSH_4

VSSL_4

VDDL_4

TDO

TMS

TCK

TDI

I2C_SDA2

51
50

52

53

54

55

56

57

58

59

I2C_SCL2

44

SIF

43

CVBS

42

VDDAH_CVBS
VSSAH_CVBS

47

MSTRT

47

MERR

R1126

47

VSSH_1

VDDH_1

IC1103
DRX3913K-XK

FE_TS_CLK
FE_TS_VAL

41

47

MCLK

40

47

MVAL

10

39

0.1uF

INP

R1103
FE_TS_DATA[0] R1144

INN

TUNER_IF_P
TUNER_IF_N

VSSAL_AFE1

15

34

IF_AGC

16

33

RF_AGC

R1107
6.8K

IF_AGC

32

C1181
0.027uF

RSTN

SAW_SW

GPIO2

VSSL_3

VDDL_3

VDDH_3

VSSH_3

I2C_SDA1

I2C_SCL1

MD7

31

VDDAL_AFE1

35

30

VDDAH_AFE1

36

14

28

37

13

MD3

27

12

MD2

47

26

MD1

47

25

47

FE_TS_DATA[2] R1129

24

VSSAH_AFE1

23

38

22

11

21

MD0

17

47

FE_TS_DATA[1] R1148

C1176
0.1uF
16V

C_+3.3V

IF_AGC
FE_TS_DATA[4] R1109

47

FE_TS_DATA[5] R1111
FE_TS_DATA[6] R1143

+5V

47
47

R1116
4.7K
READY

47

R1108

/FE_RESET
C1106
R1122 0.1uF
390
16V

R1185

60

I2S_DA

VSSAL_AFE2

VDDL_2
C1119
0.1uF

R1173

C1140

VDDAL_AFE2

45

VSSL_2

C1133
0.1uF
16V

R1172

PDP

46

100

Place the Buffer close to Tuner

R1171

R1184

47

GPIO1

R1121

FE_TS_DATA[7] R1140

R1167

VSSL_1

FE_TS_DATA[3] R1132

0.1uF

VDDL_1

VSSH_2

23

22
GND_6

VDDD_1

0.1uF

R1130
1K

C1139 0.1uF

TUNER_SIF

R1136
100
50V
18pF
C1113
READY

FE_TS_DATA[0-7]
Q1103
ISA1530AC1

50V
18pF
C1175
READY

R1139
4.7K
READY

B
C1161
6.8pF
50V

+5V
SCL1

L1105
MLF1608A2R7J
2.7uH 5%

R1114
100

READY
R1128
4.7K

R1135
680

C1102
0.1uF
16V

C_+3.3V

C1183
0.1uF
16V

R1159
390

SDA1

PDN

R1115

FE_TS_SYN
FE_TS_ERR
FE_TS_SERIAL

L1101
MLB-201209-0120P-N2

To separate chassis ground


R1166

48

R1102

C1118

0.1uF

0.1uF
C1182

C1124

0.1uF
C1169

0.1uF
C1129

C1116

0.1uF

+1.8V_TU

C1173
18pF

+1.8V_TU

TESTMODE

20

21
VDDA_6

VDDC_4

19

18
SIF

GND_5

VDDC_3

+3.3V_TU

17

12

VDDA_5

VDDC_2

X1102
31.875MHz

C1151

C_+3.3V

C1172
1000pF
50V

VDDA_3

A_1.2V A_3.3V

C1160
1000pF
50V

X2

16

0.1uF

GND_7

29

13

C1171

0.1uF
0.1uF

30

VIF

C1158

X1

15

C1167

31

GND_3

20.25MHz

I2S_WS

20

C1131 C1152
18pF 18pF
50V 50V

0.1uF

VDDA_2

64

XC5000

EXTCHOKE

C1121

SDA1
SCL1
R1123
4.7K

L1114

14

0.1uF

820nH
2%
1008CS-821XGLC

VAGC

C1109

1K
R1153

R1138
1K
EXTREF

100

MD6

C1148

32

100

R1150

61

37
33

VDDD_2

IC1104

IN2
GND_2

R1155
C1108
18pF

I2S_CL

VI2C
38

SCL

MD5

VDDC_6
39

SDA

34

62

VREF_N
40

35

63

VREF_P
41

19

VDDC_7
42

IN1

C1123
15pF
50V

X1101

GND_8

GND_4

C1146
120pF

C1162
15pF
50V

18

VDDC_8
43

36

+1.2V

MD4

R1152
REXT
44

C_+3.3V

VDDH_2

4.99K

C1163
VDDA_7
45

1%

0.1uF

0.1uF

C1117

+3.3V_TU

GND_1
390nH
2%

6.8pF

270nH
2%

+3.3V_TU

VDDA_4

C2

L1108
0603CS-R27XGLW

READY

RCLAMP1521P D1102

RCLAMP0502B D1101
C1

6.8nH

L1116
0603CS-R39XGLW

56pF C1126

READY
C1103
50V

C1120

1
2

+1.8V_TU

VDDA_1

C1134 1000pF

L1111
0603CS-6N8XGLW2%
39pF

GND_9

TUNER_SHIELD
KCN-ET-5-0094
JK1101

VDDC_9

0.1uF

46

C1165

47

+3.3V_TU
+1.8V_TU

C1156

1000pF
C1115
VDDA_8
48

0.1uF

0.1uF

TU_RESET

D_3.3V

29

: ACTIVE LOW (SOFT RESET)

R1110
47
C1159
0.1uF

VSYNC

TUNER RESET

TUNER_IF_N

A_1.2V

+1.2V
E

L1112
MLB-201209-0120P-N2

Q1108
ISA1530AC1
B

+3.3V_TU

+5V

[SCART1 TV VOUT]

C1105
10uF
6.3V

C1143
0.1uF
16V

C1142
0.1uF
16V

L1118

P_17V
L1103
MLB-201209-0120P-N2

R1101
390

TUNER_CVBS

Q1101

+5V
C

R1164
330 B
C

B
C1104
6.8pF
50V

16V
16V
0.1uF
0.1uF
C1149
C1130

+3.3V_TU

C
R1118
390

FE_VOUT

C1145
0.1uF
16V

IC1102
AZ1117H-1.2TRE1

IN

CVBS_SCART_OUT

READY

R1145
390
R1137
390

Q1102
ISA1530AC1

L1110
MLF1608A2R7J
2.7uH 5%

R1163
330

R1141
180

READY

16V
16V
16V
16V
0.1uF
0.1uF 0.1uF 0.1uF
C1112
C1114 C1132 C1144

+1.2V

R1112
680

Q1110
2SC3052
READY

Q1105
2SC3052
E

R1151
15K

A_3.3V
L1113
MLB-201209-0120P-N2

ISA1530AC1

CVBS_SCART_OUT

C1187
0.1uF
16V

+3.3V_TU

C1186
0.1uF
16V

R1133
47K
C1170
47uF
16V

C1185
0.1uF
16V

C1180
68uF
10V
READY

C1168
0.1uF
16V

R1165
0

C1178
10uF
25V

L1117

C1138
0.1uF
50V

470
R1154

C1157
0.1uF
50V

C1136
C1174
0.1uF
0.1uF
16V
16V

ADJ/GND
E
Q1106
ISA1530AC1
B

C1188
100uF
16V

C1150
0.1uF
50V

C1111
10uF
16V
READY

+3.3V_TU
C1122
100uF
16V

C_+3.3V

+3.3V_TU

L1107
MLB-201209-0120P-N2

OUT
C1107
0.1uF
50V

C1177
0.1uF
16V

C1110
0.1uF
16V

D_3.3V

L1115
MLB-201209-0120P-N2
C1125
0.1uF
16V

C1179
0.1uF
16V

C1137
0.1uF
16V

C1153
0.1uF
16V

C
Q1104

SC1_VIDEO_MUTE

C1166
0.1uF
16V

R1131
2K

+5V
Q1107
2SC3052

2
R1157
390

C1184
0.1uF
16V

(SC1_TV_VOUT_MUTE GPIO OPTION)

TUNER_IF_P

E
Q1109
ISA1530AC1
B
C

THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.

Copyright 2010 LG Electronics Inc. All rights reserved.


Only for training and service purposes

MSD3368EV Platform
TUNER

10

10

LGE Internal Use Only

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