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A

BATTERY CHARGER

Hawke Intel Discrete Block Diagram


CLK GEN

ICS9LPRS365

Project code
PCB P/N
PCB No.
Revision

Intel Mobile CPU


4

Merom 4M
FSB:667 or 800 MHz
5, 6, 7

VRAM
16Mbx32x2

CRT

17

RGB CRT

LCD

18

LVDS

51

GDDRIII
700MHz

DDRII 667 Channel A

DDRII
Slot 1
533/667
14

DDR II 667 Channel B

DDRII
Slot 2
533/667
15

AGTL+ CPU I/F

PCIe x 16

Power SW

DDR Memory I/F


EXTERNAL GRAHPICS
8, 9, 10, 11,

12, 13

27

TI TPS2231

DMI I/F
100MHz

1394

INTEL

PCI

10/100 NIC

USB 2.0 x 1

ATA 66/100

AZALIA

OUTPUTS

1D8V_S3

0D9V_S3

27

RJ45 CONN

27

1D5V_S0
1D25V_S0

TPS5117

Mini-Card x 1
28
802.11a/b/g
Mini-Card x 2 29
WWAN&BT&Robson

53

INPUTS

OUTPUTS

DCBATOUT

VCC_GFX_CORE_S0

CPU DC/DC

Camera

18

INPUTS

OUTPUTS

DCBATOUT

VCC_CORE

40

Biometic reader30

PCB LAYER

Bluetooth 2.1

30

Lift Side: USB x 2

37

Right Side:USB x 1

34

L1:TOP

LPC Bus

19, 20, 21, 22

L2:GND

USB 2.0 x 3

Azalia
CODEC

KBC
Winbond WPC8763L

PATA

SATA

Sigmatel
STAC 922831

44

OUTPUTS

1D8V_S3
1D8V_S3

New Card

44

USB 2.0 x 1

PCI/PCI BRIDGE

Digital Mic Array

INPUTS

SATA
ACPI 1.1

32

LPC I/F

MIC IN

1D05V_S0
1D8V_S3

SYSTEM DC/DC

High Definition Audio

MAX4411

DCBATOUT

ISL6262A
USB 2.0 x 1

USB 2.0

6 PCI Express ports

HP2

OUTPUTS

VGA DC/DC
26

PCIE x 2 & USB 2.0 x 2

10 USB 2.0/1.1 ports

42, 43

INPUTS

RT9018

PCIE x 1

PCIE

ICH8-M

CardReader
24, 25

HEADPHONE
AMP

5V_AUX_S5
3D3V_AUX_S5
5V_S5
3D3V_S5

INPUTS

Marvell 88E8040

SD/SDIO/MMC
MS/MS Pro/XD
25

DCBATOUT

TPS51100

PCIE x 1 & USB 2.0 x 1

Ricoh
R5C833

OUTPUTS

SYSTEM DC/DC
Crestline-PM

PCIE x 1
25

39

INPUTS

SYSTEM DC/DC

47, 48, 49, 50

1394

DCBATOUT

TPS5117

SVIDEO

S-Video

AD+
BAT+

TPS51120

Host BUS
667/800MHz

GDDRIII
700MHz

38

OUTPUTS

SYSTEM DC/DC

91.4W101.001
48.4W101.011
07212
-1

52

nVidia NB8P
(256MB)
OR
nVidia NB8M
(128MB)

HDMI

HDMI 16

VRAM
16Mbx32x2

:
:
:
:

MAX8731A
INPUTS

SPI

L3:Signal
L4:Signal

33

L5:VCC
L6:Singal

HP1

L7:GND
4

HDD

OP AMP

2CH
SPEAKER

MAX9789A

23

ODD
23

Capacity
Button30

Touch
Pad 36

Int.
KB36

S/W
CIR 30

Thermal
& Fan
G792 35

Flash ROM
2MB 30

L8:BOT
<Core Design>

32

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

System Block Diagram


Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
1

of

57

Input Signal

Output Signal

AD_IN#

(O)

(I)

Input Power

PM_SLP_S4#

5V_S5

Output Power

Output Signal

Input Signal

(O)

EN_PSV(I / 5V)

VCC

TPS51117 1D05V

Input Power

5V_AUX_S5

AD+

VCC(O)

VCC(I)

DCBATOUT

CPUCORE_ON

Output Power

AD_JK

TPS51117 1D8V

Adapter
AD_OFF

(O)

VIN

PM_SLP_S3#

5V_S5
1D8V_S3(19A)

DCBATOUT

Input Signal

Output Signal

EN_PSV(I / 5V)

(O)

Input Power

VCC

CPUCORE_ON

Output Power
(O)

VIN

1D05V_S0(5A)

VCC(I)

TI TPS51100 0.9V/DDR_VREF_S3
Charger MAX8731A
CHARGE_OFF

Input Signal
CLS (I / 3.3V)

Output Signal
LDO (O / 5.4V)

BAT_SCL
BAT_SDA
2

FBSA/B (I/3.3V)

AD_IA

(O)

SDA (IO / 3.3V)

AD+

PM_SLP_S4#

5V_S5

SCL (IO / 3.3V)

1D8V_S3
Output Power

Input Signal
S5
S3
Input Power

Output Power

VCC(I)

VCC(O)

VIN(I)

VCC(O)

DDR_VREF_S3
DDR_VERF_S0

ISL6262A
CPU_CORE

DCBATOUT

VCC (O)

MAX8731_ACIN

MAX8731_LDO
ACAV_IN

(O)
BAT+SENSE

PM_SLP_S4#

RT9018A 1D5V

BT+

VCC (O)
ACIN

PM_SLP_S3#

Input Signal

CPU_VID0

Output Signal

EN(I / 5V)

(O)

CPUCORE_ON

CPU_VID2

Input Power
DCIN (I)

5V_S5
1D8V_S3

VCC

Input Power

CPU_VID3

Output Power
(O)

VIN

CPU_VID1

1D5V_S0(2.2A)

CPU_VID4
CPU_VID5
CPU_VID6

TI TPS51120 3D3V/5V
Input Signal
3

3V/5V_EN
3V/5V_EN

51120_EN2
51120_EN1

FOR
3.3V

5V_AUX_S5

Output Signal
PGOUT(OD / 5V)

CPUCORE_ON

5V_S5
Output Power
(O)

VIN
REG5V_IN(I / 5V)

PM_SLP_S3#

Input Signal

Output Signal

EN(I / 5V)

(O)

CPUCORE_ON
CPUCORE_ON

Output Signal

VID Setting
VID0(I / 3.3V)

VGATE_PWRGD

VROK(O)

VID1(I / 3.3V)
VID2(I / 3.3V)
VID3(I / 3.3V)

Output Power

VID4(I / 3.3V)
VID5(I / 3.3V)
VID6(I / 3.3V)

VCC_CORE_PWR(O)

VCC_CORE_S0
(Imax=47A)

Input Signal
EN (I / 3.3V)

Voltage Sense

FOR
5.0V

Input Power
DCBATOUT

RT9018A 1D25V

(O)
5V (O)
3.3V (O)

5V_AUX_S5

1D8V_S3

VCC

Input Power

VCC_SENSE

Output Power
(O)

VIN

1D25V_S0(2.7A)

VSS_SENSE

3D3V_AUX_S5

RGND(I / Vcore)
Input Power

5V_S5 (6A)

DCBATOUT

TPS51117 VGA_CORE
3D3V_S5 (5A)
PM_SLP_S3#

5V_S5
4

VSEN(I / Vcore)

DCBATOUT

Input Signal

Output Signal

EN_PSV(I / 5V)

VCC

(O)

Input Power

Output Power

5V_S0
CPUCORE_ON
3D3V_S0
VCC_GFX_CORE_S0
(18.4A)

VCC(I)
VCC(I)

<Core Design>

(O)

VIN

VIN(I)

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Power Block Diagram


Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
2

of

57

20,22 +RTCVCC
1D05V_S0

1D05V_S0

8,11,22,44,47,48,49

1D25V_S0

1D25V_S0

INTEL ICH8-M STRAP PIN


Signal

Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


PCIE Port Config 1 bit1,
Rising Edge of PWROK

HDA_SYNC
GNT2#

PCIE Port Config 1 bit0,


Rising Edge of PWROK.
PCIE Port Config 2 bit0,
Rising Edge of PWROK.

XOR Chain Entrance Strap

Comment
Allows entrance to XOR Chain testing when TP3
pulled low at rising edge of PWROK.When TP3 not
pulled low at rising edge of PWROK,sets bit1 of
RPC.PC(Config Registers:offset 224h)
Sets bit0 of RPC.PC(Config Registers:Offset 224h)

ICH_RSVDtp3

AZ_DOUT_ICH

0
0
1
1

0
1
0
1

26 1D2V_LAN_S5

1D2V_LAN_S5

27 1D5V_NEW_S0

1D5V_NEW_S0

6,11,20,21,22,27,28,29,44
Description
RSVD
Enter XOR Chain
Normal Operation(default)
Set PCIE port cofig bit1

Sets bit2 of RPC.PC(Config Registers:Offset 224h)

1D5V_S0

8,11,12,14,15,43,44,45,46

GNT3#

GNT0#
SPI_CS1#

INTVRMEN
2

Reserved

Boot BIOS Destination


Selection.
Rising Edge of PWROK.
Integrated VccSus1_05
VccSus1_5 and VccCL1_5
VRM Enable/Disable.Always
sampled.

20,30,33,35,38,39,46

3D3V_AUX_S5

3D3V_AUX_S5
3D3V_LAN_S5

3D3V_S0

PCIE LAN REVERSAL.Rising


Edge of PWROK.

This signal has weak internal pull-up.


set bit27 of MPC.LR(Device28:Function0:Offset D8)

SPKR

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode(ICH8M will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.(Offset:3410h:bit5)

TP3

XOR Chain Entrance.


Rising Edge of PWROK.

This signal should not be pull low unless using


XOR Chain testing.

LAN100_SLP

SATALED#

GPIO33/
HDA_DOCK_EN#

VccLAN1_05,VccCL1_05 VRM

5V_S0

22,23,29,30,34,36,37,39,42,43,44,45,53

5V_S5

5V_S5

37,38,46 AD+
18,38,39,40,41,42,43,45,46,53

High=Enable

Low Power PCI Express

CFG 9

PCI Express Graphics


Lane Reversal

CFG 16

Normal

Low Power mode

Lane Reversal

Normal Mode(Lanes
number in order)
Enabled

CFG 20

SDVO_CTRL_DATA

NO SDVO Card
Present

SDVO Card Present

Concurrent SDVO/PCIE

LL(00)
LH(01)
HL(10)
HH(11)

PCI ROUTING

Low=Disable

SIGNAL

Resistor Type/Value

HDA_BIT_CLK

PULL-DOWN 20K

HDA_RST#

NONE

HDA_SDIN[3:0]

PULL-DOWN 20K

HDA_SDOUT

PULL-DOWN 20K

HDA_SYNC

PULL-DOWN 20K

GNT[3:0]

PULL-UP 20K

GPIO[20]

PULL-DOWN 20K

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 20K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PME#

PULL-UP 20K

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 20K

SPI_CS1#

PULL-UP 20K

SPI_CLK

PULL-UP 20K

SPI_MOSI

PULL-UP 20K

XOR/ALL-Z

SPI_MISO

PULL-UP 20K

Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation

TACH_[3:0]

PULL-UP 20K

SPKR

PULL-DOWN 20K

TP[3]

PULL-UP 20K

USB[9:0][P,N]

PULL-DOWN 15K

CL_RST#

TBD

A
D

REQ GNT
0

USB TABLE
USB0

Ext Lift Side (Bottom)

USB1

Ext Lift Side (Top)

USB2

Ext Right Side

USB3

N/A

USB4

WWAN

USB5

Bluetooth

USB6

Camera

USB7

Biometric

USB8

Express Card

USB9

3rd mini card

PCIE Routing
LANE1

10/100M Bit LOM

LANE2

MiniCard WLAN

LANE3

MiniCard WWAN

LANE4

BT/UWB/Robson

LANE5

Express Card

LANE6

N/A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

Document Number

Table of Content

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007


A

VCC_CORE_S0
2

INTEL ICH8-M INTEGRATED


PULL-UPS and PULL-DOWNS

SDVO Present

CFG 12
CFG 13

+LCDVDD

6,7,41 VCC_CORE_S0

Low=Disable

No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot

HIGH 1
DMI X 4

Reserved Lane
PCIE and SDVO are
operation simultaneous

DMI Lane Reserved

LOW 0
DMI X 2

Disabled

CFG 19

DDR_VREF_S3

IDSEL INT

Normal Operation
Only PCIE or SDVO
is operation

FSB Dynamic ODT

DDR_VREF_S0

8,14,15,44 DDR_VREF_S3

1394/
MediaCard AD25

INTEL CRESTLINE STRAP PIN


CFG 8

DCBATOUT

18 +LCDVDD

DEFAULE HIGH

CFG 5

AD+

DCBATOUT

14,15,44,46 DDR_VREF_S0

integrated VccSus1_05,VccSus1_5,VccCL1_5

LAN100_SLP

5V_AUX_S5

5V_S0

LPC(Default)

SM_INTVRMEN High=Enable

Internal Pull-Up.If sampled low,the Flash Descriptor


Flash Descriptor Security Security will be overidden.if high,the Security
Override Strap
measures defined in the Flash Descriptor will be in
8.2K PULL HIGH
Rising Edge of PWROK.
effect.
This should only be used in manufacturing
environments

CFG Strap

3D3V_S5

16,17,18,22,23,30,32,34,35,36,40,44,45,46

integrated VccLan1_05VccCL1_05
Enables integrated
when sampled high

3D3V_S0

3D3V_S5

18,38,39,46 5V_AUX_S5

Integrated VccLAN1_05
VccCL1_05 VRM enable
/Disable. Always sampled.

2D5V_LAN_S5

26,27 3D3V_LAN_S5
4,8,11,14,15,16,18,19,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,40,42,45,46,47,49,50,53

Sampled low:Top-Block Swap mode(inverts A16 for all A16 swap override strap
cycles targeting FWH BIOS space).
PCI_GNT#3 low = A16 swap override enable
Note: Software will not be able to clear the
high = default
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
BOOT BIOS Strap
PCI_GNT#0 SPI_CS#1
BOOT BIOS Location
Controllable via Boot BIOS Destination bit
0
1
SPI
(Config Registers:Offset 3410h:bit 11:10).
PCI
1
0
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Enables integrated VccSus1_05,VccSus1_5 and
VccCL1_5 VRM when sampled high

1D8V_S3

26,27 2D5V_LAN_S5

Weak Internal PULL-DOWN.NOTE:This signal should


not be pull HIGH.

Top-Block Swap Override.


Rising Edge of PWROK.

1D5V_S0

1D8V_S3

19,21,22,26,27,30,37,39,45,46

GPIO20

+RTCVCC

5,6,7,8,10,11,12,20,22,33,42,46

Sheet
E

of

57

3D3V_S0_CK505
3D3V_S0

3D3V_S0_CK505

3D3V_S0_CK505_IO

X4 CL=10pF0.2pF
Freq. Tolerance:30ppm

L15

C396

X4

19
27
43
52
33
56

X1
X2

R448

45
44

PCI_STOP#
CPU_STOP#

7
6

14,15,21,28,29 ICH_SMBCLK
14,15,21,28,29 ICH_SMBDATA

SCLK
SDATA

63

21 CK_PWRGD

CK_PWRGD/PD#

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

55

NC#55
GND48
GNDPCI
GNDREF

C822

CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_PCIE_MINI3_1
CLK_PCIE_MINI3_1#

1
2

RN27
4
3 SRN22-3-GP

CLK_PCIE_MINI3 29
CLK_PCIE_MINI3# 29

SRCT7/CR#_F
SRCC7/CR#_E

51
50

CLK_PCIE_LAN1
CLK_PCIE_LAN1#

1
2

RN28
4
3 SRN22-3-GP

SRCT6
SRCC6

48
47

CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#

1
2

RN29
4
3 SRN22-3-GP

SRCT10
SRCC10

41
42

CLK_PCIE_NEW1
CLK_PCIE_NEW1#

2
1

SRCT11/CR#_H
SRCC11/CR#_G

40
39

RN30
3
4 SRN0J-6-GP
1
R434
R183 1

SRCT9
SRCC9

37
38

CLK_PCIE_MINI2_1
CLK_PCIE_MINI2_1#

SRCT4
SRCC4

18
15
1

SC4D7P50V2CN-1GP

:
:
:
:

71.00875.A03
71.28541.A03
71.08513.003
71.09365.A03

SB

CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26
CLK_PCIE_MINI1 28
CLK_PCIE_MINI1# 28

34
35

2
1

CLK_MCH_3GPLL 8
CLK_MCH_3GPLL# 8

SRCT3/CR#_C
SRCC3/CR#_D

31
32

CLK_PCIE_ICH1
CLK_PCIE_ICH1#

2
1

RN34
3
4 SRN0J-6-GP

CLK_PCIE_ICH 21
CLK_PCIE_ICH# 21

SRCT2/SATAT
SRCC2/SATAC

28
29

CLK_PCIE_SATA1
CLK_PCIE_SATA1#

2
1

RN33
3
4 SRN0J-6-GP

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2

24
25

CLK_VGA_27M_NSS1
CLK_VGA_27M_SS1

2
1

RN35
3
4 SRN0J-6-GP

CLK_VGA_27M_NSS 49
CLK_VGA_27M_SS 49

SRCT0/DOTT_96
SRCC0/DOTC_96

20
21

CLK_PCIE_VGA1
CLK_PCIE_VGA1#

2
1

RN36
3
4 SRN0J-6-GP

CLK_PCIE_VGA 47
CLK_PCIE_VGA# 47

ICS9LPRS365BKLFT-GP

CLK_PCIE_MINI2 29
CLK_PCIE_MINI2# 29

SB

CLK_PCIE_SATA 20
CLK_PCIE_SATA# 20

For Discrete:
Rename for GPU clock.

CLK_VGA_27M_NSS
CLK_VGA_27M_SS
R440
10KR2J-3-GP

ITP_EN

Output

ITP_EN

0
1

Overclocking of CPU and SRC allowed

Overclocking of CPU and SRC not allowed

6,8 CPU_BSEL2

R431

6,8 CPU_BSEL1

R426

6,8 CPU_BSEL0

R449

0
0
1
1

FS_A

1
1
0
1

CPU
100M
133M
200M
166M

27_SEL

SB

For Discrete

FSC

27_SEL strap 0:For 965GM, 1:For 965PM

2K2R2J-2-GP
FSB

27_SEL

PIN 20

PIN 21

0
1

DOT96T
SRCT0

DOT96C
SRCC0

PIN 24

PIN 25

0R0402-PAD
FSA
2K2R2J-2-GP

SRCT1/LCDT_100
27M_NSS

SRCT1/LCDT_100
27M_SS

965GM
965PM

R444
10KR2J-3-GP

SRC8
CPU_ITP

FS_B

Output
1
0
0
0

3D3V_S0_CK505

RTM875M-606-LF
SL28541AQCT
SLG8SP513VTR
ICS9LPRS365BKLFT
FS_C

PCI2_TME

CLK_PCIE_NEW 27
CLK_PCIE_NEW# 27
3D3V_S0
10KR2J-3-GP
NEWCARD_CLKREQ# 27
2
10KR2J-3-GP

DY

DY

RN26
4
3 SRN0J-6-GP

SC
-1
Main source
2nd source
3rd source
4th source

R435
10KR2J-3-GP

1
2

33R2J-2-GP

64
5

C419

C416

2
SC4D7P50V2CN-1GP

PCI2_TME

R436
10KR2J-3-GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

3D3V_S0_CK505

1
2

C413

21 CLK_14M_ICH

CLK_MCH_BCLK1
CLK_MCH_BCLK1#

RN32
3
4 SRN0J-6-GP

GND

58
57

CLK_MCH_3GPLL1
CLK_MCH_3GPLL1#

65

FSB
FSC

R432

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

R184 1
R186 1
R187 1

24 PCLK_PCM
33 PCLK_KBC
19 CLK_PCI_ICH

CPUT1_F
CPUC1_F

RN31
3
4 SRN22-3-GP

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

22
30
36
49
59
26

2 33R2J-2-GP
2 33R2J-2-GP
2 33R2J-2-GP

8
10
PCI2_TME
11
PCLK_PCM_R 12
27_SEL
13
ITP_EN
14

CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5

2
1

21 CLKSATAREQ#
8 CLKREQ#_B

RN25
4
3 SRN0J-6-GP

USB_48MHZ/FSLA

33R2J-2-GP
21 H_STP_PCI#
21 H_STP_CPU#

1
2

17

CLK_CPU_BCLK1
CLK_CPU_BCLK1#

FSA

61
60

C840
SC4D7P50V2CN-1GP

CPUT0
CPUC0

U22

C839
SC4D7P50V2CN-1GP

1
2

1
2

1
2

1
2

1
2

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

4
16
9
46
62
23
2

3
2

C438
SCD1U16V2ZY-2GP

C384
SCD1U16V2ZY-2GP

C821
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SC1U10V3KX-3GP

DY

C811

1
1
21 CLK_48M_ICH

C426

C392
SC12P50V2JN-3GP

CLK_XTAL_IN
CLK_XTAL_OUT

C837 SC4D7P50V2CN-1GP

L16
1
2
0R0603-PAD
C435

CLK_XTAL_OUT

SB

3D3V_S0_CK505_IO

C445

X-14D31818M-37GP
C399
SC12P50V2JN-3GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3D3V_S0

VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

C383

C437

C429

CLK_XTAL_IN
SCD1U16V2ZY-2GP

C824

C436
SC10U10V5ZY-1GP

C439
SC1U10V3KX-3GP

1
2
0R0603-PAD

<Core Design>

Design Note:

1. All of Input pin didn't have internal pull up resistor.


2. Clock Request (CR) function are enable by registers.
3. ICS9LPRS365 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Clock generator ICS9LPRS365


Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
4

of

57

8 H_A#[3..35]
U47A 1 OF 4

H_STPCLK#
H_INTR
H_NMI
H_SMI#
TP14
TP17
TP8
TP12
TP6
TP7
TP3
TP20
TP10
TP18

TPAD28 TP2

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

H_A20M#
H_FERR#
H_IGNNE#

A6
A5
C4

A20M#
FERR#
IGNNE#

H_SMI#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

CPU_RSVD01
CPU_RSVD02
CPU_RSVD03
CPU_RSVD04
CPU_RSVD05
CPU_RSVD06
CPU_RSVD07
CPU_RSVD08
CPU_RSVD09
CPU_RSVD10

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

CPU_RSVD11

B1

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

F1

H_BR0#

IERR#
INIT#

D20
B3

H_IERR#
H_INIT#

LOCK#

H4

H_LOCK#

RESET#
RS0#
RS1#
RS2#
TRDY#

C1
F3
F4
G3
G2

H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#

HIT#
HITM#

G6
E4

CONTROL

DEFER#
DRDY#
DBSY#
BR0#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

H_DEFER# 8
H_DRDY# 8
H_DBSY# 8

1D05V_S0

H_DEFER#
H_DRDY#
H_DBSY#

R272
56R2J-4-GP

H_BR0# 8

H5
F21
E1

H_ADS# 8
H_BNR# 8
H_BPRI# 8

H_INIT#

20

H_LOCK# 8
H_RESET# 8
H_RS#0 8
H_RS#1 8
H_RS#2 8
H_TRDY# 8

H_HIT#
H_HITM#

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

D21
A24
B25

CPU_PROCHOT
H_THERMDA
H_THERMDC

C7

H_THERMTRIP#

A22
A21

CLK_CPU_BCLK
CLK_CPU_BCLK#

H_HIT# 8
H_HITM# 8
TP16
TP11
TP4
TP15
TP9
TP1
TP13
TP19

1D05V_S0
R39 1
R36 1

2 27D4R2F-L1-GP
2 150R2J-L1-GP-U

R37 1
R38 1

2 39D2R2F-L-GP
2 680R2J-3-GP

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

R74
56R2J-4-GP

THERMAL
PROCHOT#
THRMDA
THRMDC

ICH

20 H_A20M#
20 H_FERR#
20 H_IGNNE#

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADDR GROUP 1

8 H_ADSTB#1

TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28

K3
H2
K2
J3
L1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

20
20
20
20

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADS#
H_BNR#
H_BPRI#

THERMTRIP#

HCLK

BCLK0
BCLK1

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H1
E2
G5

ADS#
BNR#
BPRI#

XDP/ITP SIGNALS

8
8
8
8
8

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

ADDR GROUP 0

8 H_ADSTB#0

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

RESERVED

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

DY

H_THERMDA 35
H_THERMDC 35
H_THERMTRIP# 8,20,33,45

1 R73
0R2J-2-GP

CPU_PROCHOT# 40

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

layout note:Zo =55


ohm , 0.5" MAX for
GTLREF

KEY_NC
BGA479-SKT6-GPU3

Main source : 62.10079.021 Tyco 2-1871873-4


2nd source : 62.10040.221 Foxconn PZ47827-274M-41

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Meron(1/3)-AGTL+/XDP
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

of

57

8 H_D#[0..63]

VCC_CORE_S0

VCC_CORE_S0

U47B 2 OF 4

4,8 CPU_BSEL0
4,8 CPU_BSEL1
4,8 CPU_BSEL2

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

B22
B23
C21

BSEL0
BSEL1
BSEL2

COMP0
COMP1
COMP2
COMP3

R26
U26
AA1
Y1

COMP0
COMP1
COMP2
COMP3

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
PSI#

H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8
R311
R310
R42
R41

1
1
1
1

2
2
2
2

27D4R2F-L1-GP
54D9R2F-L1-GP
27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP# 8,20,40
H_DPSLP# 20
H_DPWR# 8
H_PWRGOOD 20,45
H_CPUSLP# 8
PSI#
40

BGA479-SKT6-GPU3

PLACE C617 close to the TEST4 PIN,


make sure TEST3,TEST4,TEST5 trace
routing is reference to GND and
away other noisy signals

CPU_BSEL

CPU_BSEL2

CPU_BSEL1

Resistor Placed
within 0.5" of CPU
pin. Trace should
be at least 25 mils
away from any other
toggling signal .
COMP[0,2] trace
width is 18 mils.
COMP[1,3] trace
width is 4 mils .

CPU_BSEL0

166

200

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

1D05V_S0

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA
VCCA

B26
C26

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AD6
AF5
AE5
AF4
AE3
AF3
AE2

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

VCCSENSE

AF7

VCC_SENSE

VSSSENSE

AE7

VSS_SENSE

C24
SC10U6D3V5KX-1GP

layout note:
place C618 near
PIN B26

CPU_VID[0..6]

40

1D5V_S0

C618

DY

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

C620
SC10U10V5ZY-1GP

SCD1U10V2KX-4GP

MISC

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SCD01U16V2KX-3GP

C617
1

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

1
2

R308
2KR2F-3-GP

AD26
C23
D25
C24
AF26
AF1
A26

V_CPU_GTLREF
TPAD28 TP21
TEST1
TPAD28 TP23
TEST2
TPAD28 TP22
TEST3
TEST4
TPAD28 TP5
TEST5
TPAD28 TP24
TEST6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

8 H_DSTBN#1
8 H_DSTBP#1
8 H_DINV#1

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

R309
1KR2F-3-GP

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

1D05V_S0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

DATA GRP1

Close to CPU
pin AD26
Z0=55 ohm
with in
500mils .

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

DATA GRP3

8 H_DSTBN#0
8 H_DSTBP#0
8 H_DINV#0

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

DATA GRP2

U47C 3 OF 4

VCC_SENSE 40

Length match within


25 mils . The trace
width/space/other is
20/7/25 .

VSS_SENSE 40

BGA479-SKT6-GPU3
VCC_SENSE

1
R47

VSS_SENSE

1
R48

VCC_CORE_S0

100R2F-L1-GP-U
100R2F-L1-GP-U

Close to CPU pin


within 500mils

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Meron(2/3)-AGTL+/PWR
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

of

57

1
2

1
2

DY

C47

DY

SC10U6D3V5KX-1GP

C50
SC10U6D3V5KX-1GP

C62
SC10U6D3V5KX-1GP

C45
SC10U6D3V5KX-1GP

C54
SC10U6D3V5KX-1GP

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

C53
SC10U6D3V5KX-1GP

DY

SC10U6D3V5KX-1GP

DY

C58

C59

C52

C44

SC10U6D3V5KX-1GP

C65

C63

SC10U6D3V5KX-1GP

C42

SC10U6D3V5KX-1GP

C49

SC10U6D3V5KX-1GP

Place these capacitors on L1


(North side ,Secondary Layer)

VCC_CORE_S0

SC10U6D3V5KX-1GP

Mid Frequencd
Decoupling

C580
SCD1U10V2KX-4GP

C579
SCD1U10V2KX-4GP

C587
SCD1U10V2KX-4GP

C581
SCD1U10V2KX-4GP

C586
SCD1U10V2KX-4GP

C588
SCD1U10V2KX-4GP

1D05V_S0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C43

SC10U6D3V5KX-1GP

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

C64

SC10U6D3V5KX-1GP

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

Place these capacitors on L1


(North side ,Secondary Layer)

SC10U6D3V5KX-1GP

4 OF 4

SC10U6D3V5KX-1GP

U47D

VCC_CORE_S0

Place these
inside socket
cavity on L1
(North side
Secondary)

BGA479-SKT6-GPU3
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Meron(3/3)-GND&Bypass
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

of

57

U57A 1 OF 10

B9
A9

H_AVREF
H_DVREF

H_VREF
3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

L7
K2
AC2
AJ10

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

M14
E13
A11
H13
B12

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

E12
D7
D8

H_RS#0
H_RS#1
H_RS#2

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

6
6
6
6

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

6
6
6
6

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

2
1

5
5
5
5
5

TP58
TP62
TP59
TP52
TP53
TP63
TP61
TP60
TP57

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13

TP54

CFG16

TP67
TP69
TP70

CFG18
CFG19
CFG20

H_RS#0 5
H_RS#1 5
H_RS#2 5

19,23,27,28,29,33,47

R103 2

PLT_RST1#

1 100R2J-2-GP

5,20,33,45 H_THERMTRIP#
21,40 DPRSLPVR

1D05V_S0

21,40 VGATE_PWRGD

R128 1
1

2 0R2J-2-GP
2

PM_POK_R

0R2J-2-GP

H_SWNG

2
4

C634
SCD1U16V2ZY-2GP

Layout Note :
Place C643 within 100 mils of NB

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

G41
L39
L36
J36
AW49
AV20
N20
G36

BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2

BE29 DDR_CKE0_DIMMA
AY32 DDR_CKE1_DIMMA
BD39 DDR_CKE2_DIMMB
BG37 DDR_CKE3_DIMMB

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

14
14
15
15

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

BG20 DDR_CS0_DIMMA#
BK16 DDR_CS1_DIMMA#
BG16 DDR_CS2_DIMMB#
BE13 DDR_CS3_DIMMB#

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

14
14
15
15

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

BH18
BJ15
BJ14
BE16

M_ODT0
M_ODT1
M_ODT2
M_ODT3

SM_RCOMP_VOH
SM_RCOMP_VOL

BK31
BL31

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_RCOMP
SM_RCOMP#

BL15
BK14

SM_RCOMP
SM_RCOMP#

SM_VREF#AR49
SM_VREF#AW4

AR49
AW4

M_ODT0
M_ODT1
M_ODT2
M_ODT3

14
14
15
15

2
2 20R2F-GP
20R2F-GP
DDR_VREF_S3

DDR_VREF_S3

For Discrete:
Short to GND.

B42
C42
H48
H47

K44 CLK_MCH_3GPLL
K45 CLK_MCH_3GPLL#

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

AN47
AJ38
AN42
AN46

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

AM47
AJ39
AN41
AN45

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

AJ46
AJ41
AM40
AM44

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AJ47
AJ42
AM39
AM43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

E35
A39
C38
B39
E36

1D8V_S3

1
R328 1
R327

PEG_CLK
PEG_CLK#

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN

14
14
15
15

CLK_MCH_3GPLL 4
CLK_MCH_3GPLL# 4

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

21
21
21
21

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

21
21
21
21

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

21
21
21
21

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

21
21
21
21

DFGT_VID0
DFGT_VID1
DFGT_VID2
DFGT_VID3
DFGT_VR_EN

TP72
TP113
TP112
TP114
TP71

1D25V_S0

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

AM49
AK50
AT43
AN49
AM50

CL_CLK0 21
CL_DATA0 21
CLPWROK_MCH 1 R122
2
0R0402-PAD
CL_VREF

For Discrete:
Short to GND.
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLKREQ#
ICH_SYNC#
TEST1
TEST2

H35
K36
G39
G40

R366
1KR2F-3-GP

PM_POK_R
CL_RST#

21

R365
392R2F-GP

C749
SCD1U10V2KX-4GP
CLKREQ#_B 4
MCH_ICH_SYNC#

MCH_ICH_SYNC#

A37 TEST1_GMCH
R32 TEST2_GMCH1
2
R108
20KR2J-L2-GP

21

1 R338
2
0R0402-PAD

R314
24D9R2F-L-GP
R320
100R2F-L1-GP-U

H_RCOMP

C643

R324
2KR2F-3-GP

SCD1U16V2ZY-2GP

H_VREF

R321
221R2F-2-GP

3D3V_S0

R325
1KR2F-3-GP

P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35

SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

NC

R129

DY

PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_POK_R
PLT_RST_R#
H_THERMTRIP#
DPRSLPVR

RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34

PM

21 PM_BMBUSY#
6,20,40 H_DPRSTP#
14 PM_EXTTS#0
15 PM_EXTTS#1

B44
C44
A35
B37
B36
B34
C34

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

CLK

CFG[17:3] have internal pull up


CFG[19:18] have internal pull down

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

RSVD#BH39
RSVD#AW20
RSVD#BK20

AW30 M_CLK_DDR#0
BA23 M_CLK_DDR#1
AW25 M_CLK_DDR#2
AW23 M_CLK_DDR#3

DDR MUXING

1
2

C672
SCD01U16V2KX-3GP
C683
SCD01U16V2KX-3GP

4,6 CPU_BSEL0
4,6 CPU_BSEL1
4,6 CPU_BSEL2

21,35 PM_PWROK

6
6
6
6

BH39
AW20
BK20

SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4

DMI

M7
K3
AD2
AH11

1D05V_S0

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

layout note :
Route H_SCOMP and H_SCOMP# with trace width, spacing
and impedance (55 ohm) same as FSB data traces
Layout Note :
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24

14
14
15
15

H_CPURST#
H_CPUSLP#

K5
L2
AD13
AE13

H_ADS# 5
H_ADSTB#0 5
H_ADSTB#1 5
H_BNR# 5
H_BPRI# 5
H_BR0# 5
H_DEFER# 5
H_DBSY# 5
CLK_MCH_BCLK 4
CLK_MCH_BCLK# 4
H_DPWR# 6
H_DRDY# 5
H_HIT# 5
H_HITM# 5
H_LOCK# 5
H_TRDY# 5

H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

B6
E5

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DBSY#
CLK_MCH_BCLK
CLK_MCH_BCLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

R332
1KR2F-3-GP

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

H_RESET#
H_CPUSLP#

C680
SC2D2U10V3ZY-1GP

AV29
BB23
BA25
AV23

H_SCOMP
H_SCOMP#

SM_RCOMP_VOL

SM_CK0
SM_CK1
SM_CK3
SM_CK4

H_SWING
H_RCOMP

W1
W2

R330
3K01R2F-3-GP

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

R329
1KR2F-3-GP

RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20

B3
C2

H_SCOMP
H_SCOMP#

SM_RCOMP_VOH

P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20

GRAPHICS VID

5 H_RESET#
6 H_CPUSLP#

H_SWNG
H_RCOMP

G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7

C668
SC2D2U10V3ZY-1GP

U57B 2 OF 10

1D8V_S3

ME

54D9R2F-L1-GP

R312

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

CFG

54D9R2F-L1-GP
2

R313

1D05V_S0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

MISC

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13

H_A#[3..35] 5

RSVD

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

HOST

6 H_D#[0..63]

Layout Note :
Place C634 near
pin B3 of NB

RN21
PM_EXTTS#0
PM_EXTTS#1

1
2

<Core Design>

4
3
SRN10KJ-5-GP

CLKREQ#_B

1
R113

0921 P/N CHANGE TO 71.CREST.M02

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2
10KR2J-3-GP

Title

CRESTLINE(1/6)-AGTL+/DMI/DDR2

Size
Custom

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

of

57

DDR_A_D[0..63]

14

DDR_A_BS[0..2]

14

DDR_A_DM[0..7]

DDR_B_D[0..63]

15

DDR_B_BS[0..2]

15

DDR_B_DM[0..7]

15

14

DDR_A_DQS[0..7]

14
DDR_B_DQS[0..7]

DDR_A_DQS#[0..7]

DDR_B_DQS#[0..7]
DDR_A_MA[0..14]

15

U57E 5 OF 10

SA_BS0
SA_BS1
SA_BS2

BB19
BK19
BF29

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

SA_CAS#

BL17

DDR_A_CAS#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BJ29

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

SA_RAS#
SA_RCVEN#

BE18
AY20

DDR_A_RAS#
SA_RCVEN#

SA_WE#

BA19

DDR_A_WE#

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_A_CAS# 14

DDR_A_RAS# 14
TP56
DDR_A_WE# 14

AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

DDR SYSTEM MEMORY B

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR SYSTEM MEMORRY A

U57D 4 OF 10

AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11

15

14
DDR_B_MA[0..14]

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

15

14

SB_BS0
SB_BS1
SB_BS2

AY17
BG18
BG36

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

SB_CAS#

BE17

DDR_B_CAS#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
BE24

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

SB_RAS#
SB_RCVEN#

AV16
AY18

DDR_B_RAS#
SB_RCVEN#

SB_WE#

BC17

DDR_B_WE#

DDR_B_CAS# 15

DDR_B_RAS# 15
TP51
DDR_B_WE# 15

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRESTLINE(2/6)-DDR2 A/B CH

Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

of

57

1D05V_S0

L41
L43
N41
N40
D46
C45
D44
E42

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

G51
E51
F49
C48

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

G50
E50
F48
D47

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

G44
B47
B45

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2

E44
A47
A45

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2

F27
J27
L27

TVA_RTN
TVB_RTN
TVC_RTN

M35
P33

TV_DCONSEL0
TV_DCONSEL1

TV

H32
G32
K29
J29
F29
E29

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

K33
G35
E33
C32
F33

CRT_DDC_CLK
CRT_DDC_DATA
CRT_VSYNC
CRT_TVO_IREF
CRT_HSYNC

VGA

TVA_DAC
TVB_DAC
TVC_DAC

PEGCOMP

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

PCIE_MRX_GTX_N0
PCIE_MRX_GTX_N1
PCIE_MRX_GTX_N2
PCIE_MRX_GTX_N3
PCIE_MRX_GTX_N4
PCIE_MRX_GTX_N5
PCIE_MRX_GTX_N6
PCIE_MRX_GTX_N7
PCIE_MRX_GTX_N8
PCIE_MRX_GTX_N9
PCIE_MRX_GTX_N10
PCIE_MRX_GTX_N11
PCIE_MRX_GTX_N12
PCIE_MRX_GTX_N13
PCIE_MRX_GTX_N14
PCIE_MRX_GTX_N15

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

PCIE_MRX_GTX_P0
PCIE_MRX_GTX_P1
PCIE_MRX_GTX_P2
PCIE_MRX_GTX_P3
PCIE_MRX_GTX_P4
PCIE_MRX_GTX_P5
PCIE_MRX_GTX_P6
PCIE_MRX_GTX_P7
PCIE_MRX_GTX_P8
PCIE_MRX_GTX_P9
PCIE_MRX_GTX_P10
PCIE_MRX_GTX_P11
PCIE_MRX_GTX_P12
PCIE_MRX_GTX_P13
PCIE_MRX_GTX_P14
PCIE_MRX_GTX_P15

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

PCIE_MTX_GRX_C_N0
PCIE_MTX_GRX_C_N1
PCIE_MTX_GRX_C_N2
PCIE_MTX_GRX_C_N3
PCIE_MTX_GRX_C_N4
PCIE_MTX_GRX_C_N5
PCIE_MTX_GRX_C_N6
PCIE_MTX_GRX_C_N7
PCIE_MTX_GRX_C_N8
PCIE_MTX_GRX_C_N9
PCIE_MTX_GRX_C_N10
PCIE_MTX_GRX_C_N11
PCIE_MTX_GRX_C_N12
PCIE_MTX_GRX_C_N13
PCIE_MTX_GRX_C_N14
PCIE_MTX_GRX_C_N15

PEGCOMP trace
width and spacing
is 20/25 mils.
PCIE_MRX_GTX_N[0..15]

E27
G27
K27

N43
M43

PEG_COMPI
PEG_COMPO

PCI_EXPRESS GRAPHICS

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

010 = FSB 800MHz


011 = FSB 667MHz
Others = Reserved

CFG[2:0] FSB Freq select


PCIE_MRX_GTX_N[0..15] 47

CFG5 (DMI select)

0 = DMI x 2
1 = DMI x 4

*
1

CFG6

Reserved
0 = Reserved
1 = Mobile CPU

CFG7 (CPU Strap)

CFG9
(PCIE Graphics Lane Reversal)

PCIE_MRX_GTX_P[0..15] 47

00
01
10
11

CFG[15:14]
PCIE_MTX_GRX_N[0..15]

C164
C648
C651
C182
C653
C656
C661
C666
C669
C677
C681
C686
C691
C697
C706
C715

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

PCIE_MTX_GRX_N[0..15] 47

PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation (Default)*

0 = Disable
1 = Enable *

CFG16 (FSB Dynamic ODT)

Reversed

SDVO_CTRLDATA

0 = No SDVO Device Present *


1 = SDVO Device Present
0 = Normal Operation
(Lane number in Order)
1 = Reverse lane

CFG19(DMI Lane Reversal)

PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15

=
=
=
=

Reserved

CFG[18:17]

PCIE_MTX_GRX_P[0..15]

Reserved

CFG[13:12] (XOR/ALLZ)

SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP

0 = Reverse Lane
1 = Normal Operation

CFG[11:10]

C159
C649
C652
C190
C654
C659
C664
C667
C674
C679
C684
C689
C696
C701
C710
C717

0 = Normal mode
1 = Low Power mode

CFG8 (Low power PCIE)


PCIE_MRX_GTX_P[0..15]

PCIE_MTX_GRX_C_P0
PCIE_MTX_GRX_C_P1
PCIE_MTX_GRX_C_P2
PCIE_MTX_GRX_C_P3
PCIE_MTX_GRX_C_P4
PCIE_MTX_GRX_C_P5
PCIE_MTX_GRX_C_P6
PCIE_MTX_GRX_C_P7
PCIE_MTX_GRX_C_P8
PCIE_MTX_GRX_C_P9
PCIE_MTX_GRX_C_P10
PCIE_MTX_GRX_C_P11
PCIE_MTX_GRX_C_P12
PCIE_MTX_GRX_C_P13
PCIE_MTX_GRX_C_P14
PCIE_MTX_GRX_C_P15

Strap Pin Table

24D9R2F-L-GP

LVDS

J40
H39
E39
E40
C37
D35
K40

R119

1
U57C 3 OF 10

0 = Only PCIE or SDVO is operational *


1 = PCIE/SDVO are operating simu.

CFG20(PCIE/SDVO consurrent)
PCIE_MTX_GRX_P[0..15] 47

For Discrete

For Discrete

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

CRESTLINE(3/6)-VGA/LVDS/TV
Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

10

of

57

D27

1D05V_S0_D

1D05V_S0

3D3V_S0
R346

1
10R2J-2-GP

2
BAS16-1-GP

1D05V_S0

VCCA_SM_CK
VCCA_SM_CK

2
1

C254
SC2D2U6D3V3MX-1-GP

1
1D8V_S3

C662
SCD1U16V2ZY-2GP
3D3V_S0

For Discrete
VCC_TX_LVDS

A43
1
C40
B40

C714
SCD1U16V2ZY-2GP

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

AD51
W50
W51
V49
V50

VCC_RXR_DMI
VCC_RXR_DMI

AH50
AH51

C760
SC4D7U6D3V3KX-GP

C751
SC4D7U6D3V3KX-GP

TC22
ST220U2D5VBM-2GP

VTTLF1
VTTLF2
VTTLF3

1
2

C311
SCD1U16V2ZY-2GP

A7
F2
AH1

For Discrete

20mil

SB

C756
SC10U6D3V5KX-1GP

0.1A

VCCD_LVDS
VCCD_LVDS

DY

C642
SCD47U16V3ZY-3GP

VCCD_PEG_PLL

J41
H42

VTTLF
VTTLF
VTTLF

C626
SCD47U16V3ZY-3GP
2
1

U48

0.25A

C625
SCD47U16V3ZY-3GP
2
1

VCCD_HPLL

VTTLF

VCCD_QDAC

0.25A

0.06A

N28
AN2

LVDS

For Discrete

C624
SCD1U16V2ZY-2GP

TV/CRT

1D25V_S0

1D05V_S0

0.1A

HV

VCC_HV
VCC_HV

C660
SC10U6D3V5KX-1GP

VCCD_CRT
VCCD_TVDAC

C160
SC4D7U6D3V3KX-GP

BK24
BK23
BJ24
BJ23

M32
L29

C750
SCD1U16V2ZY-2GP

0.1A
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

1.2A

VCCA_TVA_DAC
VCCA_TVA_DAC
VCCA_TVB_DAC
VCCA_TVB_DAC
VCCA_TVC_DAC
VCCA_TVC_DAC

2
1
2

AJ50

0.015A

C25
B25
C27
B27
B28
A28

C261
SC4D7U6D3V3KX-GP

1
2

TC5
ST220U2D5VBM-2GP

VCC_DMI

BC29
BB29

B23
B21
A21

C650
SC10U6D3V5KX-1GP

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM_NCTF
VCCA_SM_NCTF

VCC_AXF
VCC_AXF
VCC_AXF

C647
SC1U6D3V2KX-GP

AT22
AT21
AT19
AT18
AT17
AR17
AR16

0.1A

1D25V_S0

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

AR29

1D25V_S0

VCCA_PEG_PLL

VCC_AXD_NCTF

PEG

C192
SC10U6D3V5KX-1GP
C239
SCD1U16V2ZY-2GP

U51
AW18
AV19
AU19
AU18
AU17

A CK

1
2

C644
SC10U6D3V5KX-1GP
2
1
C236
SC10U6D3V5KX-1GP
2
1

1
2
1
2

C181
SC1U6D3V2KX-GP

1
2
1

C207
SC1U6D3V2KX-GP

C244
SCD022U16V2KX-3GP

2
1

C231
SCD1U16V2ZY-2GP
2
1

C243
SC1U6D3V2KX-GP

1D5V_S0

1D25V_S0

C748
SCD1U16V2ZY-2GP

DY

TC16
ST100U6D3VBM-13GP

-1

C169
SC4D7U6D3V3KX-GP

1D25V_S0

C757
SC10U6D3V5KX-1GP

C251
SC1U6D3V2KX-GP

2
1
BLM18AG121SN-1GP

20mil

1D25V_S0

L36

AXF

0.05A

0.35A

VSSA_PEG_BG

1D25V_S0_PEGPLL

SM CK 0.2A

VCCA_PEG_BG

K49

VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD

AT23
AU28
AU24
AT29
AT25
AT30

A LVDS

K50
2

1D25V_S0

VSSA_LVDS

POWER

C202
SC10U6D3V5KX-1GP

VCCA_LVDS

B41

C619
SCD47U6D3V2KX-GP

A41

A PEG

120ohm 100MHz
200mA 0.2ohm DC

PLL

VCCA_MPLL 0.15A

0.2A

VCCA_HPLL

AXD

AL2
AM2

For Discrete

3D3V_S0

C747
SCD1U16V2ZY-2GP

0.05A

VCCA_DPLLB

H49

VCCA_DPLLA

DY

B49

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

C219
SC1U6D3V2KX-GP

VSSA_DAC_BG

A SM 0.735A

C96
SCD1U16V2ZY-2GP

L9
C86
SC10U6D3V5KX-1GP

VCCA_DAC_BG

B32

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

120ohm 100MHz
200mA 0.2ohm DC 1D25V_S0_MPLL
2
1
BLM18AG121SN-1GP

A30

TV

1D25V_S0

C119
SCD1U16V2ZY-2GP

VCCA_CRT_DAC
VCCA_CRT_DAC

C95
SC10U6D3V5KX-1GP

2
1
BLM18AG121SN-1GP

A33
B33

VTT 0.85A

1D25V_S0_HPLL

L8

VCC_SYNC

DMI

1D25V_S0

J32

CRT

For Discrete

120ohm 100MHz
200mA 0.2ohm DC

SB

U57H 8 OF 10

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

CRESTLINE(4/6)-PWR
Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

11

of

57

FOR VCC CORE AND VCC NCTF


1D05V_S0

+1.05V_VCCP

VCC_NCTF

+1.05V_VCCP

VTT

0.85A

+1.05V_VCCP

VCC_PEG

1.2A

+1.05V_VCCP

VCC_RXR_DMI

0.25A

+1.05V_VCCP

VCC_ATX

84.15mA

+1.8V_SUS

VCC_SM

2.4A

+1.8V_SUS

VCC_SM_CK

0.2A

+1.25V_RUN

VCCA_HPLL

0.05A

+1.25V_RUN

VCCA_MPLL

0.15A

+1.25V_RUN

VCCA_SM

0.735A

+1.25V_RUN

VCCA_SM_NCTF

+1.25V_RUN

VCCA_SM_CK

0.015A

+1.25V_RUN

VCCD_HPLL

0.25A

+1.25V_RUN

VCCA_AXD

0.2A

+1.25V_RUN

VCCA_AXD_NCTF

+1.25V_RUN
+1.25V_RUN

VCCA_PEG_PLL
/VCCD_PEG_PLL
VCCA_AXF

0.35A

+1.25V_RUN

VCCA_DMI

0.1A

+1.5V_RUN

VCCD_TVDAC

0.06A

+3.3V_RUN

VCCA_PEG_BG

0.005A

+3.3V_RUN

VCC_HV

0.1A

(Non-AMT)

(667MHz)
(667MHz)

C246
SCD1U16V2ZY-2GP

C229
SCD1U16V2ZY-2GP

1
2

C209
SCD1U16V2ZY-2GP

1
2

C270
SCD22U10V2KX-1GP

C172
SCD22U10V2KX-1GP

C622
SC10U6D3V5KX-1GP
2
1

2
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

VSS NCTF

VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF

A3
B2
C1
BL1
BL51
A51

VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

TP107
TP108
TP75
TP117

TPAD28
TPAD28
TPAD28
TPAD28

1D05V_S0

C292
SC1U6D3V2KX-GP

<Core Design>
C279
SC1U6D3V2KX-GP
2
1

1
2

C280
SCD47U6D3V2KX-GP
2
1

C194
SCD22U10V2KX-1GP

C129
SCD22U10V2KX-1GP
2
1

FOR VCC AXM NCTF AND VCC AXM


4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRESTLINE(5/6)-PWR/GND
Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007


B

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

Coupling CAP
Inside MCH cavity

Size
A3

POWER

0.1A
AL24
AL26
AL28
AM26
AM28
AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

VSS SCB

1.31A

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS AXM

Icc-max

VCC

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

VSS AXM NCTF

Signal Group

+1.05V_VCCP

AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37

VCC NCTF

2
1

2
1

Supply

C142
SCD1U16V2ZY-2GP
2
1

AW45
BC39
BE39
BD17
BD4
AW8
AT6

Coupling CAP

Place on the Edge


VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

DY

1D05V_S0

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14

TC21
ST220U6D3VDM-13GP

370 mils
from the
Edge

C136
SCD1U16V2ZY-2GP
2
1

VCC GFX NCTF

Place CAP where


LVDS and DDR2 taps

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

VCC SM LF

Place on the Edge

AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30

VCC GFX

C259
SCD1U10V2KX-4GP

DY

1
2

C263
SC10U6D3V5KX-1GP

1
2

C267
SC10U6D3V5KX-1GP

TC19
ST330U2D5VDM-9GP

VCC SM

POWER

1D8V_S3

1D05V_S0

SCD1U10V2KX-4GP
C274

FOR VCC SM

VCC

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

SCD22U10V2KX-1GP
C180

R30

U57G 7 OF 10

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

SCD22U10V2KX-1GP
C104

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

SC10U6D3V5KX-1GP
C266

AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32

VCC CORE

U57F 6 OF 10

Sheet
E

12

of

57

U57I

A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

VSS

U57J10 OF 10
U57J10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

VSS

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

CRESTLINE(6/6)-PWR/GND

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

13

of

57

DM2

9 DDR_A_MA[0..14]
9 DDR_A_BS[0..2]

1
2

1
2

C77
SC10U6D3V5KX-1GP

C132
SCD1U16V2ZY-2GP

C88
SCD1U16V2ZY-2GP

C116
SCD1U16V2ZY-2GP

C94
SC2D2U16V5ZY-2GP

C78
SC2D2U16V5ZY-2GP

C155
SC2D2U16V5ZY-2GP

C91
SC2D2U16V5ZY-2GP

1D8V_S3

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

1
2

1
2

1
2

1
2

1
2

1
2

C616
SCD1U16V2ZY-2GP

C106
SCD1U16V2ZY-2GP

C83
SCD1U16V2ZY-2GP

C632
SCD1U16V2ZY-2GP

C90
SCD1U16V2ZY-2GP

C93
SCD1U16V2ZY-2GP

C121
SCD1U16V2ZY-2GP

change to 8P4R
Layout Note:
Place these resistors
closely DM1,all
trace length Max=1.5"

DDR_VREF_S0
RN41

1
2
3
4

8
7
6
5

SRN56J-5-GP

1
2
3
4

1
2
3
4

1
2
3
4

SRN56J-5-GP

1
2
3
4

8
7
6
5

DDR_CS0_DIMMA#
DDR_A_RAS#
M_ODT0
DDR_A_MA13

SRN56J-5-GP
RN18

8
7
6
5

DDR_CKE1_DIMMA
DDR_CKE0_DIMMA
DDR_A_BS2

DDR_VREF_S3

8
8

M_ODT0
M_ODT1

C312
SCD1U16V2ZY-2GP

CKE0
CKE1

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA

DDR_CKE0_DIMMA 8
DDR_CKE1_DIMMA 8

CK0
/CK0

30
32

M_CLK_DDR0
M_CLK_DDR#0

M_CLK_DDR0 8
M_CLK_DDR#0 8

CK1
/CK1

164
166

M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 8
M_CLK_DDR#1 8

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

GND

GND

201

DDR_A_BS0
DDR_A_BS1

107
106

BA0
BA1

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

11
29
49
68
129
146
167
186

/DQS0
/DQS1
/DQS2
/DQS3
/DQS4
/DQS5
/DQS6
/DQS7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT0
M_ODT1

114
119

ODT0
ODT1

1
2

DDR_VREF_S3

SRN56J-5-GP

1
2
3
4

DDR_CS0_DIMMA# 8
DDR_CS1_DIMMA# 8

79
80

DDR_A_BS2

RN6

8
7
6
5

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
DDR_A_BS1

SRN56J-5-GP

RN39

1
2
3
4

8
7
6
5

RN13

8
7
6
5

SRN56J-5-GP
M_ODT1
DDR_CS1_DIMMA#
DDR_A_CAS#
DDR_A_WE#

DDR_A_MA14
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6

SRN56J-5-GP

RN40
DDR_A_BS0
DDR_A_MA10
DDR_A_MA1
DDR_A_MA3

8
7
6
5

C313
SC2D2U16V5ZY-2GP

DDR_A_MA5
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12

RN15

C97
SCD1U16V2ZY-2GP

DY

C610
SCD1U16V2ZY-2GP

C628
SCD1U16V2ZY-2GP

DDR_VREF_S0

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

202

SB

ICH_SMBDATA 4,15,21,28,29
ICH_SMBCLK 4,15,21,28,29
3D3V_S0
C37
SCD1U16V2ZY-2GP
PM_EXTTS#0 8

C35
SC2D2U6D3V3MX-1-GP

DY

1D8V_S3

Crestline-PM
(BOT side)

(Reverse Type)
DIMM A(BOT side)
DIMM B(BOT side)

Main source : 62.10017.891 Foxconn AS0A426-N2RN-7F


2nd source : 62.10017.D61 Tyco 1473150-4
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

DDR2-200P-11-GP-U
62.10017.891
C

Layout Note:
Place near DM1

110
115

9 DDR_A_DQS[0..7]

/CS0
/CS1

DDR_A_RAS# 9
DDR_A_WE# 9
DDR_A_CAS# 9

9 DDR_A_DM[0..7]

/RAS
/WE
/CAS

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

9 DDR_A_D[0..63]

DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#

High 5.2 mm

9 DDR_A_DQS#[0..7]

108
109
113

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

REVERSE TYPE

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDRII-SODIMM SLOT1

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

14

of

57

DM1

9 DDR_B_BS[0..2]
1

1
2

1
2

C92
SC10U6D3V5KX-1GP

C85
SCD1U16V2ZY-2GP

C108
SCD1U16V2ZY-2GP

C81
SCD1U16V2ZY-2GP

C71
SC2D2U16V5ZY-2GP

C147
SC2D2U16V5ZY-2GP

C145
SC2D2U16V5ZY-2GP

C72
SC2D2U16V5ZY-2GP

1D8V_S3

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

1
2

1
2

1
2

1
2

1
2

C107
SCD1U16V2ZY-2GP

C98
SCD1U16V2ZY-2GP

C87
SCD1U16V2ZY-2GP

C105
SCD1U16V2ZY-2GP

C75
SCD1U16V2ZY-2GP

C79
SCD1U16V2ZY-2GP

C99
SCD1U16V2ZY-2GP

C80
SCD1U16V2ZY-2GP

C117
SCD1U16V2ZY-2GP

DY

C122
SCD1U16V2ZY-2GP

DDR_VREF_S0

Layout Note:
Place these resistors
closely DM2,all
trace length Max=1.5"

DDR_VREF_S0
RN11
8
7
6
5

1
2
3
4

SRN56J-5-GP

SRN56J-5-GP

RN12

RN16
8
7
6
5

1
2
3
4

RN7
8
7
6
5

SRN56J-5-GP

1
2
3
4

8
7
6
5

DDR_CS2_DIMMB#
DDR_B_BS1
M_ODT2
DDR_B_MA13

DDR_B_BS0
DDR_B_BS1

107
106

BA0
BA1

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

11
29
49
68
129
146
167
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT2
M_ODT3

114
119

OTD0
OTD1

1
2

SRN56J-5-GP
DDR_VREF_S3

RN17
1
2
3
4

8
7
6
5

DDR_CKE3_DIMMB
DDR_B_BS2
DDR_CKE2_DIMMB

8
8

M_ODT2
M_ODT3

DDR_VREF_S3
SCD1U16V2ZY-2GP
C294

SRN56J-5-GP

DDR_B_MA14
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6

SRN56J-5-GP

RN5
1
2
3
4

8
7
6
5

DDR_B_MA5
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12

1
2
3
4

SRN56J-5-GP
DDR_B_WE#
DDR_B_CAS#
DDR_CS3_DIMMB#
M_ODT3

8
7
6
5

DDR_B_RAS#
DDR_B_MA0
DDR_B_MA2
DDR_B_MA4

1
2
3
4

DDR_B_MA3
DDR_B_MA1
DDR_B_MA10
DDR_B_BS0

RN14

DDR_B_BS2

C293
SC2D2U16V5ZY-2GP

CS0#
CS1#

110
115

DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

DDR_CS2_DIMMB# 8
DDR_CS3_DIMMB# 8

CKE0
CKE1

79
80

DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CKE2_DIMMB 8
DDR_CKE3_DIMMB 8

CK0
CK0#

30
32

M_CLK_DDR2
M_CLK_DDR#2

M_CLK_DDR2 8
M_CLK_DDR#2 8

CK1
CK1#

164
166

M_CLK_DDR3
M_CLK_DDR#3

M_CLK_DDR3 8
M_CLK_DDR#3 8

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

SB

ICH_SMBDATA 4,14,21,28,29
ICH_SMBCLK 4,14,21,28,29
3D3V_S0

1
R46

2
10KR2J-3-GP

3D3V_S0
PM_EXTTS#1 8

C46
SCD1U16V2ZY-2GP

C38
SC2D2U6D3V3MX-1-GP

DY

1D8V_S3
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

202

GND

GND

201

MH1

MH1

MH2

MH2

DDR2-200P-25-GP-U1
62.10017.B51
A

DDR_B_RAS# 9
DDR_B_WE# 9
DDR_B_CAS# 9

9 DDR_B_MA[0..14]

DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#

9 DDR_B_DQS[0..7]

108
109
113

9 DDR_B_DM[0..7]

RAS#
WE#
CAS#

Layout Note:
Place near DM2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

High 9.2 mm

9 DDR_B_D[0..63]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

REVERSE TYPE

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

9 DDR_B_DQS#[0..7]

Main source : 62.10017.B51 Foxconn AS0A426-NARN-7F


2nd source : 62.10017.D61 Tyco C-1775860
4

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DDRII-SODIMM SLOT2

Size
Document Number
Custom

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

15

of

57

5V_S0

R117
10KR2J-3-GP

-1
1 R339
2
0R0603-PAD

HDMI_TXD#1

HDMI_TXD#1_C

49 HDMI_TXD#0

RN23
SRN2K2J-1-GP

DY
4
3

1 R345
2
0R0603-PAD

-1
HDMI_TXD#0

3D3V_S0

HDMI I/F & CONNECTOR


49 HDMI_TXD#1

1
2

DY

HDMI_TXD#0_C

L30
ACM2012H-900-GP

L29
ACM2012H-900-GP

DY

DY

HDMI_SDATA_C

HDMI_SCLK_C

5V_S0

HDMI_SDATA

D12

DY

2N7002SPT

5V_S0
+5V_HDMI

1 R336
2
0R0603-PAD

HDMI_TX#C_C

HDMI_TXD#0_C
HDMI_TXD0_C

9
7

TMDS_DATA0TMDS_DATA0+

HDMI_TXD#1_C
HDMI_TXD1_C

6
4

TMDS_DATA1TMDS_DATA1+

L28
ACM2012H-900-GP

HDMI_TXD#2_C
HDMI_TXD2_C

3
1

TMDS_DATA2TMDS_DATA2+

DY

DY

HDMI_TX#C_C
HDMI_TXC_C

12
10

TMDS_CLOCKTMDS_CLOCK+

8
5
2
11

TMDS_DATA0_SHIELD
TMDS_DATA1_SHIELD
TMDS_DATA2_SHIELD
TMDS_CLOCK_SHIELD

L31
ACM2012H-900-GP

2
HDMI_TXD2

HDMI1

-1

HDMI_TX#C

49 HDMI_TX#C

HDMI_TXD#2_C

HDMI_TXD#2

49 HDMI_TXD2

-1

1 R350
2
0R0603-PAD
49 HDMI_TXD#2

SC

HDMI CONN

1 R344
2
0R0603-PAD

HDMI_TXD2_C

49 HDMI_TXC

HDMI_TXC

1 R352
2
0R0603-PAD

HDMI_TXC_C

1 R337
2
0R0603-PAD

-1

+5V_POWER

18

SDA

16

SCL

15

CEC

13

2
BAS16-1-GP
RN20
SRN1KJ-7-GP

RESERVED#14

14

HOT_PLUG_DETECT

19

DDC/CEC_GROUNG
GND
GND
GND
GND

17
20
21
22
23

SB

-1

HDMI_SDATA_C

2 R111
1
0R0402-PAD
HDMI_SCLK_C
2 R112
1
0R0402-PAD
HDMI_CEC_R
2
1
R334
0R2J-2-GP
HDMI_CNC
TP68 TPAD28
R331
HDMI_DP_C2
1
2

HDMI_SDATA

DY

10KR2J-3-GP

HDMI_SDATA 50

HDMI_SCLK

HDMI_SCLK 50

HDMI_CEC 50
2

HDMI_HDP

HDMI_HDP 50

R333
100KR2J-1-GP

1 R347
2
0R0603-PAD

HDMI_TXD0_C

2
1

49 HDMI_TXD0

HDMI_TXD0

3
4

HDMI_TXD1_C

49 HDMI_TXD1

HDMI_TXD1

U8
HDMI_SCLK

SKT-USB-169-GP
62.10027.661

-1
Main source : 62.10027.661
2nd source : 62.10078.121

Molex 47408-0201
Tyco C1759548-1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

Document Number

HDMI

Rev

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

-1
16

of

57

5V_CRT_S0

CRT I/F & CONNECTOR

5V_S0
D24

CH551H-30PT-GP

C565
SCD01U16V2KX-3GP

CRT1

5V_CRT_S0

17

2 BLM18BB470SN1-GP

CRT_G

L1

2 BLM18BB470SN1-GP
1
2

11

RN4

12

DDC_DATA_CON

13

JVGA_HS

14

JVGA_VS

15

DDC_CLK_CON

SRN2K2J-1-GP

DDC_DATA_CON
DDC_CLK_CON

C20
SC22P50V2JN-4GP

1
2

DY

2
2

1
1

C48
SC22P50V2JN-4GP

VIDEO-15-47-GP-U
20.20392.015

C570
SC22P50V2JN-4GP

C572
SC22P50V2JN-4GP

DY

Layout Note:
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

50
50

16

C23
SC10P50V2JN-4GP

C30
SC10P50V2JN-4GP

SC

7
2
8
3
9
4
10
5

CRT_B

C41

DY

6
1

1
2

L2

SC10P50V2JN-4GP

SC10P50V2JN-4GP

CRT_R

C27

DY

SC10P50V2JN-4GP

DY

SC10P50V2JN-4GP

150R2F-1-GP

C33

C40

R44

R45
150R2F-1-GP

150R2F-1-GP

R50

M_BLUE

50

2 BLM18BB470SN1-GP

M_RED

50

50 M_GREEN

L4

4
3

5V_CRT_S0
D8

2
DDC_DATA_CON

3
1
BAV99-7-F-GP
D4

2
DDC_CLK_CON

3
1
BAV99-7-F-GP

5V_S0
D7

Hsync & Vsync level shift

C584
SCD1U16V2ZY-2GP

CRT_R

3
1

14

BAV99-7-F-GP
U52A
D6

50 VGA_HSYNC

HSYNC_5

CRT_G

TSAHCT125PW-GP

50 VGA_VSYNC

14

1
U52B

RN37
VSYNC_5

1
2

BAV99-7-F-GP

4
3

JVGA_HS
JVGA_VS
D5

SRN33J-5-GP-U

TSAHCT125PW-GP
CRT_B

3
1
BAV99-7-F-GP

<Core Design>

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

TP177
TP176
TP179
TP178
TP180
TP182
TP181
TP183

1
1
1
1
1
1
1
1

5V_CRT_S0
DDC_DATA_CON
DDC_CLK_CON
CRT_R
CRT_G
CRT_B
JVGA_HS
JVGA_VS

SC
4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

For AFTE, place them on the some side.

CRT Connector

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

-1
17

of

57

LCD1

48

INVERTER POWER

VBL19

50
1

VBL19

46

47

-1

1
2

C69
SC1KP50V2KX-1GP

C66
SCD1U25V3KX-GP
1

SC

3D3V_S0

BAT_SDA 33,37,38
BAT_SCL 33,37,38

C591
SCD1U10V2KX-4GP

3D3V_S0

R284

DY

LCD_TST 33
LDDC_CLK 50
LDDC_DATA 50

10KR2J-3-GP

VGA_TXBOUT0- 50
VGA_TXBOUT0+ 50
BACKLITEON

VGA_TXBOUT1+ 50
VGA_TXBOUT1- 50

2
R282
2
R283

VGA_TXBOUT2- 50
VGA_TXBOUT2+ 50

DY 1
DY 1

BACKLITEON

VGA_TXAOUT1+ 50
VGA_TXAOUT1- 50
VGA_TXAOUT2+ 50
VGA_TXAOUT2- 50

LCD_TST
EC37
SC33P50V2JN-3GP

DY

VGA_TXAOUT0+ 50
VGA_TXAOUT0- 50

Populate R282 for


DPST implementation
only.
0R2J-2-GP
0R2J-2-GP

LBKLT_CTL 50
BRIGHTNESS 33

Populate R283 for


platform without DPST
support. No Stuff for
Discrete DSPT support
due to back up plan.

VGA_TXBCLK+ 50
VGA_TXBCLK- 50

45

SB

C592
SCD1U10V2KX-4GP

44

EC38
SCD1U10V2KX-4GP

43

+LCDVDD
LCD_CBL_DET# 33
5V_AUX_S5

SB SC
1

42

DCBATOUT

F2
FUSE-3A32V-8-GP
1
2

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
51

41

EC36
SC33P50V2JN-3GP

DY
2

VGA_TXACLK+ 50
VGA_TXACLK- 50

49
IPEX-CONN40-2R-GP
20.F1093.040

SB

LCD POWER
+LCDVDD

3D3V_S0

C577
SCD1U10V2KX-4GP

SC

1
1
1
1
1
1

SC

D32
BAT54C-7-F-GP

AUD_DMIC_CLK_G_R
AUD_DMIC_IN0_R
CAMERA_USB1CAMERA_USB1+
+5V_RUN_CARMERA
V_AUD_DMIC

SCD1U16V2ZY-2GP

2
1 R57
2
0R0603-PAD

TP184
TP185
TP186
TP188
TP187
TP189

100KR2J-1-GP

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

5V_S0

C589

9
8
7
6
5

GND
IN#8
IN#7
IN#6
IN#5

G5281RC1U-GP

+5V_RUN_CARMERA

50 LCDVDD_EN

R276

CAMERA Power

IN#1
OUT
EN
GND

ENVDD

1
2
3
4

C595
SC1U10V3ZY-6GP

U53

33 LCDVDD_TST_EN

For AFTE, place them on the some side.

Mic Power
V_AUD_DMIC

3D3V_S0

CAMERA1

C39
SC4D7U6D3V3KX-GP

SC

1 R54
2
0R0603-PAD

Place near connector CAMERA1.

R49 1
R51 1

2 33R2J-2-GP
2 33R2J-2-GP

AUD_DMIC_CLK_G 31
AUD_DMIC_IN0 31

AUD_DMIC_CLK_G_R
AUD_DMIC_IN0_R

SC
USB_PN6 21

<Core Design>

Wistron Corporation

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

EC76
SC22P50V2JN-4GP

EC75
SC22P50V2JN-4GP

EC78
SC33P50V2JN-3GP

EC77
SC33P50V2JN-3GP

L5
DLW21SN900SQ2LUGP

CAMERA_USB1CAMERA_USB1+

2
3
4
5
6
7
8
9
10
11
12

13

2 L3
1
0R0603-PAD

Title

SB

14

1 R55
2
0R0603-PAD

MLX-CON12-13-GP
20.F0693.012

USB_PP6 21
Size
A3

SC

LCD/Inverter/Camera

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

18

-1
of

57

PCI Interface Routing


IDSEL INT

8
7
6
5

PCI_FRAME#
PCI_REQ1#
PCI_REQ2#

SRN8K2J-4-GP
RN59

1
2
3
4

8
7
6
5

PCI_REQ3#
PCI_SERR#
PCI_PIRQG#

SRN8K2J-4-GP
RN57

1
2
3
4

8
7
6
5

PCI_IRDY#
PCI_TRDY#
PCI_PIRQA#
PCI_PIRQD#

SRN8K2J-4-GP
RN58
1
8
2
7
3
6
4
5

PCI_PIRQH#
PCI_PIRQC#
PCI_PIRQB#
PCI_REQ#0

SRN8K2J-4-GP
RN56
1
8
2
7
3
6
4
5

PCI_PIRQE#

24 PCI_PIRQA#

PCI_PLOCK#
PCI_PERR#

24 PCI_PIRQC#

SRN8K2J-4-GP
RN60
8
7
6
5

1
2
3
4

D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

F9
B5
C5
A10

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
GNT3#/GPIO55
REQ3#/GPIO54

A4
D7
E18
C18
B19
F18
C10
A11

C/BE0#
C/BE1#
C/BE2#
C/BE3#

C17
E15
F16
E17

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
FRAME#
PLOCK#
SERR#
STOP#
TRDY#

C8
D9
G6
D16
A7
A17
B7
F10
C16
C9

PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_FRAME#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PLTRST#
PCICLK
PME#

AG24
B10
G7

PCI_PLTRST#
CLK_PCI_ICH

PCI

PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_GNT3#
PCI_REQ3#

Interrupt I/F
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

F8
G11
F12
B3

PCI_REQ#0 24
PCI_GNT#0 24
TP170
1

TP166
TP169
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

R441
1

REQ GNT

24
24
24
24

PCI_IRDY# 24
PCI_PAR 24
PCI_DEVSEL# 24
PCI_PERR# 24
PCI_FRAME# 24

Place closely pin B10


CLK_PCI_ICH

PCI_SERR# 24
PCI_STOP# 24
PCI_TRDY# 24

RN61

1
2
3
4

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

A
D

R460
10R2J-2-GP

CLK_PCI_ICH 4
ICH_PME# 24
8K2R2J-3-GP
2

C842
SC8P250V2CC-GP

3D3V_S5

1 1

3D3V_S0

1394/
MediaCard AD25

U19C 3 OF 6

24 PCI_AD[0..31]

PCI_AD[0..31]

DY
DY

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_PIRQF#
PCI_DEVSEL#
PCI_STOP#

0504 P/N CHANGE TO 71.ICH8M.C0U

SRN8K2J-4-GP

R469 2

1 33R2J-2-GP

PCIRST1# 24,26
R470
100KR2J-1-GP

PCI_PCIRST#

ICH8-Strap PIN
BOOT BIOS Strap

PCI_GNT3#

SPI(Default)

PCI

LPC

GND

PCI_GNT#3
(R168)

B
VCC

PLT_RST1#

PLT_RST1# 8,23,27,28,29,33,47

74LVC1G08GW-1-GP

A16 swap override strap


low = A16 swap override enable
high = default

PCI_GNT3#

3D3V_S5
U27
PCI_PLTRST#

Low= A16 swap override Enable


High= Default *

BOOT BIOS Location

R472
100KR2J-1-GP

DY
R471 2

PCI_GNT#0 SPI_CS#1
(R166)
(R167)

A16 swap override Strap


3

1 33R2J-2-GP

R452

1KR2J-1-GP

DY

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

ICH8(1/4)-PCI/INT

Document Number

Date: Sunday, September 09, 2007


A

Rev

-1

Hawke-Intel
Sheet
E

19

of

57

+RTCVCC

U19A 1 OF 6

AG25
AF24

RTCX1
RTCX2

ICH_RTCRST#
G78
GAP-OPEN

AF23

RTCRST#

SM_INTRUDER#

AD22

INTRUDER#

ICH_INTVRMEN
LAN100_SLP

AF25
AD21

INTVRMEN
LAN100_SLP

C358
SC4D7P50V2CN-1GP

2 33R2J-2-GP

DY

R164 1

31 ICH_AZ_CODEC_BITCLK

R467
24D9R2F-L-GP

GLAN_COMP

HDA_BITCLK

ICH_SDIN_MDC

TP82
31 ICH_SDIN_CODEC
31 ICH_SDOUT_CODEC

LAN_RSTSYNC

C21
B21
C22

LAN_RXD0
LAN_RXD1
LAN_RXD2

D21
E20
C20

LAN_TXD0
LAN_TXD1
LAN_TXD2

D25
C25

2
TP140

GAP-OPEN
36 SATA_LED#

C792 1
C791 1

2 SC3900P50V2KX-2GP
2 SC3900P50V2KX-2GP

SATA_TXN0_C
SATA_TXP0_C

X1 CL=12.5pF0.2pF
Freq. Tolerance:20ppm
4 CLK_PCIE_SATA#
4 CLK_PCIE_SATA
ICH_RTCX2

1
2
R166
24D9R2F-L-GP

C4

LPC_LFRAME#

LDRQ0#
LDRQ1#/GPIO23

G9
E6

LPC_DRQ0#

LPC_LFRAME# 33
TP162
TP167

GLAN_COMPI
GLAN_COMPO
HDA_BIT_CLK
HDA_SYNC
HDA_RST#

AJ17
AH17
AH15
AD13

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AE13

HDA_SDOUT

AE10
AG14

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6
AF5
AH5
AH6

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AG3
AG4
AJ4
AJ3

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AF2
AF1
AE4
AE3

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AB7
AC6

SATA_CLKN
SATA_CLKP

AG1
AG2

SATARBIAS#
SATARBIAS

A20GATE
A20M#

AF13
AG26

H_A20M#

DPRSTP#
DPSLP#

AF26
AE26

H_DPRSTP#
H_DPSLP#

H_DPRSTP# 6,8,40
H_DPSLP# 6

FERR#

AD24

H_FERR#

H_FERR# 5

CPUPWRGD/GPIO49

AG29

H_PWRGOOD

H_PWRGOOD 6,45

IGNNE#

AF27

H_IGNNE#

INIT#
INTR
RCIN#

AE24
AC20
AH14

H_INIT#

NMI
SMI#

AD23
AG28

H_NMI
H_SMI#

H_NMI 5
H_SMI# 5

STPCLK#

AA24

H_STPCLK#

H_STPCLK# 5

THRMTRIP#

AE27

THRMTRIP_ICH#
1
R420

TP8

AA23

Within 500 mils

KA20GATE 33
H_A20M# 5
TP147
TP138

R418

1
56R2J-4-GP

H_IGNNE# 5

within 2" from R879

H_INIT# 5
H_INTR 5
KBRCIN# 33

KBRCIN#

H_DPRSTP#
H_DPSLP#

1D05V_S0

1D05V_S0

R419
56R2J-4-GP

H_THERMTRIP# 5,8,33,45

24R2J-GP

IDE_PDD[0..15]

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

DA0
DA1
DA2

AA4
AA1
AB3

IDE_PDA0 23
IDE_PDA1 23
IDE_PDA2 23

DCS1#
DCS3#

Y6
Y5

IDE_PDCS1# 23
IDE_PDCS3# 23

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

W4
W3
Y2
Y3
Y1
W5

IDE_PDIOR# 23
IDE_PDIOW# 23
IDE_PDDACK# 23
INT_IRQ14 23
IDE_PDIORDY 23
IDE_PDDREQ 23

23

placed within 2" from ICH8M

SC
R165
10MR2J-L-GP

SC
1
2
C355
SC8P250V2CC-GP

GLAN_DOCK#/GPIO13

AE14

G79

X1
RESO-32D768KHZ-GP
3

GLAN_CLK

AJ16
AJ15

31 ICH_AZ_CODEC_RST#

1
2
C354
SC8P250V2CC-GP

B24
D22

AH21

31 ICH_AZ_CODEC_SYNC

23 SATA_RXN0_C
23 SATA_RXP0_C
23 SATA_TXN0
23 SATA_TXP0

FWH4/LFRAME#

1D5V_S0

33

SC1U10V3KX-3GP

C363

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

20KR2J-L2-GP

E5
F5
G8
F6

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

LPC

ICH_RTCX1
ICH_RTCX2
R402

LPC_LAD[0..3]

+RTCVCC

CPU

ICH_INTVRMEN
2
330KR2F-L-GP

IDE

1
R414
1

RTC

SM_INTRUDER#
2
1MR2J-1-GP

LAN/GLAN

1
R416

IHDA

LAN100_SLP
2
330KR2F-L-GP

SATA

1
R415

RTC POWER

ICH_RTCX1

3D3V_AUX_S5
+RTCVCC

U18

SB

BATT1.1

W=20mils
1
R394

+RTC_VCC
2
100R2J-2-GP

<Core Design>

W=20mils

W=20mils

C360
SC1U10V3ZY-6GP

Wistron Corporation

CH715FPT-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH8(2/4) LAN,HD,IDE,LPC
Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
20

of

57

3D3V_S5

Place closely pin G5

3D3V_S0

8
7
6
5

SRN10KJ-6-GP
RN48
1
USB_OC#2
2
USB_OC#6
3
USB_OC#8
4

8
7
6
5

SRN10KJ-6-GP
RN49
DBRESET#
1
ECSMI#
2
USB_OC#4
3
USB_OC#7
4

8
7
6
5

SRN10KJ-6-GP
RN55
1
2
3
4

AE20
AG18

STP_PCI#
STP_CPU#

AH11

CLKRUN#

1
R163

8,40 VGATE_PWRGD

DY

TP85

33
33
33

SB

2 VRMPWRGD
0R2J-2-GP
SST_CTL
GPIO1
GPIO6
ECSCI#
ECSMI#
ECSWI#
GPIO17
GPIO18
GPIO20
GPIO22

TP78
TP80
ECSCI#
ECSMI#
ECSWI#
TP143
TP76
TP142

TP84
TP149
4 CLKSATAREQ#
TP144
TP83
TP148
31

SB_SPKR

SB_SPKR

TP134

WAKE#
SERIRQ
THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10

CLKSATAREQ#
GPIO38
GPIO39
IDE_RESET#

8 MCH_ICH_SYNC#

SMLINK1
USB_OC#5
SMLINK0
USB_OC#3

AE17
AF12
AC13

AD9

SPKR

MCH_ICH_SYNC#

AJ13

MCH_SYNC#

ICH_RSVD

AJ21

TP3

AH27

GPIO26

PWROK

AE23

PM_PWROK

DPRSLPVR/GPIO16

AJ14

DPRSLPVR

BATLOW#

AE21

PM_BATLOW#_R

PWRBTN#

C2

LAN_RST#

AH20

R387

R161
EC_RMRST#
AG27

CK_PWRGD

E1

CK_PWRGD

CLPWROK

DY

SB_SPKR

1 2
2

1 2
2 R413
10KR2J-3-GP

DY

3D3V_S5

E3

CL_PWRGD_R

SLP_M#

AJ25

SLP_M#

CL_CLK0
CL_CLK1

F23
AE18

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

F22
AF19

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

D24
AH23

CL_VREF0_ICH
CL_VREF1_ICH

CL_RST#

AJ23

CLGPIO0/GPIO24
CLGPIO1/GPIO10
CLGPIO2/GPIO14
CLGPIO3/GPIO9

AJ27
AJ24
AF22
AG19

1
2
R498
10KR2J-3-GP

1
R443
R445 1

TP86

DY 2

VGATE_PWRGD 8,40

0R2J-2-GP
2 0R2J-2-GP

3D3V_S5

PM_PWROK

CL_CLK0 8
TP145

R530

DY
R455
1

CL_RST# 8
TP79
TP133
TP146
TP137

EC_RMRST#

D31
BAS16-1-GP

R532
100KR2J-1-GP

DY

R454
453R2F-1-GP

DY

DY

SB

R162

10KR2J-3-GP

DY

0R2J-2-GP

3D3V_S0

3K24R2F-GP

C357
SCD1U10V2KX-4GP

High--> No boot

R531
2K2R2J-2-GP

CL_DATA0 8
TP139

GPIO24
GPIO10
GPIO14
GPIO9

RSMRST#_KBC 33

2
EC_RMRST#_R
2
100R2J-2-GP

1
R401
CK_PWRGD

U71A
TSLVC08APW-1-GP
1

0R0402-PAD

Low--> default

R421
3D3V_S0

GPIO9
2
100KR2J-1-GP

DY

PM_PWROK 8,35
DPRSLPVR 8,40

Layout Note:
CL_VREF[1:0] ~= 0.405V
Width/Spacing = 12/12

DPRSLPVR
2
100KR2J-1-GP

DY
1

PM_PWRBTN# 33

SRN10KJ-6-GP

R388

GPIO

SATA

TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

C790
SC4D7P50V2CN-1GP

PM_SLP_S3# 33,39,42,44,45,53
PM_SLP_S4# 27,33,43,44

S4_STATE#/GPIO26

RSMRST#

DY

14

H_STP_PCI#
H_STP_CPU#

SLP_S3#
SLP_S4#
SLP_S5#

1
SMBALERT#/GPIO11

PCIE_WAKE#
INT_SERIRQ
THRM#

26,27,28,29 PCIE_WAKE#
24,33 INT_SERIRQ
35 THRM#

SMB

BMBUSY#/GPIO0

AG22

DY

C827
SC4D7P50V2CN-1GP

1
2
3
4

SRN10KJ-6-GP
RN50
USB_OC#0
8
ICH_RI#
7
USB_OC#9
6
USB_OC#1
5

AG12

OCP#

24,33 PM_CLKRUN#

GPIO26
OCP#
PM_BATLOW#_R
SMB_LINK_ALERT#

8
7
6
5

PM_BMBUSY#

ICH_SUSCLK

R403
10R2J-2-GP

DY

4 H_STP_PCI#
4 H_STP_CPU#

RSMRST#_KBC
10KR2J-3-GP

RN51

1
2
3
4

8 PM_BMBUSY#

D3
AG23
AF21
AD18

R438
10R2J-2-GP

DY

DY

CLK_14M_ICH

1
R492

ECSWI#
10KR2J-3-GP
PCIE_WAKE#
1KR2J-1-GP

SUSCLK

DY

3D3V_S5

3K24R2F-GP

SUS_STAT#/LPCPD#
SYS_RESET#

SRN10KJ-6-GP

CLK_14M_ICH 4
CLK_48M_ICH 4

R409
453R2F-1-GP

DY

F4
AD15

CLK_14M_ICH
CLK_48M_ICH

PM_SUS_STAT#
DBRESET#

AG9
G5

CLK14
CLK48

R417

1
2

R425

RI#

1
2
3
4

TP164
RN54
SRN2K2J-1-GP

AF17

8
7
6
5

3D3V_S5

ICH_RI#

SATA0_R0
SATA0_R1
SATA0_R2
SATA0_R3

AJ12
AJ10
AF11
AG11

C838
SCD1U10V2KX-4GP
2
1

SC

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
GPIO37

CLOCKS

ECSCI#
10KR2J-3-GP

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

SYSGPIO

3D3V_S0

AJ26
AD19
AG21
AC17
AE19

POWER MGT

SB

4
3

R542

RN24
SMB_CLK
SMB_DATA
SMB_LINK_ALERT#
SMLINK0
SMLINK1

GPIO

3D3V_S0

U19D 4 OF 6

SRN10KJ-6-GP
GPIO6
2
10KR2J-3-GP
GPIO22
2
10KR2J-3-GP

Controller Link

R526

RN46
SRN2K2J-1-GP

MISC

R160

INT_SERIRQ
PM_CLKRUN#
THRM#
CLKSATAREQ#

8
7
6
5

1
2

1
2
3
4

Place closely pin AG9

CLK_48M_ICH

4
3

RN53

14

U71B
TSLVC08APW-1-GP
R514

32KHZ 1

6
5

G792_CLK 35

10R2J-2-GP

Mini Card 3

ICH_SUSCLK

Mini Card 2

New Card

PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3

29 PCIE_RXN3
29 PCIE_RXP3
29 PCIE_TXN3
29 PCIE_TXP3

SCD1U10V2KX-4GP 2
SCD1U10V2KX-4GP 2

1 C415
1 C411

PCIE_C_TXN3
PCIE_C_TXP3

K27
K26
J29
J28

29 PCIE_RXN4
29 PCIE_RXP4
29 PCIE_TXN4
29 PCIE_TXP4

SCD1U10V2KX-4GP 2
SCD1U10V2KX-4GP 2

1 C417
1 C420

PCIE_C_TXN4
PCIE_C_TXP4

H27
H26
G29
G28

PERN4
PERP4
PETN4
PETP4

27 PCIE_RXN5
27 PCIE_RXP5
27 PCIE_TXN5
27 PCIE_TXP5

SCD1U10V2KX-4GP 2
SCD1U10V2KX-4GP 2

1 C427
1 C434

PCIE_C_TXN5
PCIE_C_TXP5

F27
F26
E29
E28

PERN5
PERP5
PETN5
PETP5

D27
D26
C29
C28

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

C23
B23
E22

SPI_CLK
SPI_CS0#
SPI_CS1#

D23
F21

SPI_MOSI
SPI_MISO

RUN_POWER_ON
G

DY
SB

TP168

SPI_CS1#

3D3V_S0

4
3

37 USB_OC#0
37 USB_OC#1
34 USB_OC#2

RN45
SRN2K2J-1-GP
3D3V_S0

1
2

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9

U16
4,14,15,28,29

ICH_SMBDATA

27 SMB_CLK

AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18

OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#

V27
V26
U29
U28

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

8
8
8
8

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

8
8
8
8

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

8
8
8
8

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

8
8
8
8

DMI_CLKN
DMI_CLKP

T26
T25

CLK_PCIE_ICH#
CLK_PCIE_ICH

DMI_ZCOMP
DMI_IRCOMP

Y23
Y24

DMI_IRCOMP

USB

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2

USBRBIAS#
USBRBIAS

F2
F3

2
20R2F-GP

ICH_SMBCLK 4,14,15,28,29

40

CK_PWRGD

VRMPWRGD

G
S

37
37
37
37
34
34
29
29
30
30
18
18
30
30
27
27
29
29

1D5V_S0

USB1
USB2
USB3
USB4
MINICARD2
Bluetooth
CAMERA
BIOMETRIC
New Card
MINICARD3

<Core Design>

Wistron Corporation

SB

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

ICH8(3/4) PM,USB,GPIO
Date:
C

CLK_EN#

Size
Custom

DY 2

R450 1
0R2J-2-GP

Title

2N7002SPT

R446 1
0R2J-2-GP

Q20
2N7002PT-U

2
24D9R2F-L-GP

Within 500 mils

SMB_DATA 27

Within 500 mils


1
R423

USB_PN0
USB_PP0
USB_PN1
USB_PP1
USB_PN2
USB_PP2
TP160
TP158
USB_PN4
USB_PP4
USB_PN5
USB_PP5
USB_PN6
USB_PP6
USB_PN7
USB_PP7
USB_PN8
USB_PP8
USB_PN9
USB_PP9

1
R442

R453
330R2J-3-GP

CLK_PCIE_ICH# 4
CLK_PCIE_ICH 4

USB_PN3
USB_PP3

USBRBIAS

3D3V_S0

PCIE_C_TXN2
PCIE_C_TXP2

M27
M26
L29
L28

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

PERN1
PERP1
PETN1
PETP1

1 C409
1 C403

P27
P26
N29
N28

Q47
2N7002PT-U

SCD1U10V2KX-4GP 2
SCD1U10V2KX-4GP 2

PCIE_C_TXN1
PCIE_C_TXP1

1
3

Mini Card 1

3D3V_S5

R508
10KR2J-3-GP

28 PCIE_RXN2
28 PCIE_RXP2
28 PCIE_TXN2
28 PCIE_TXP2

1 C401
1 C398

SPI

3D3V_S0

SCD1U10V2KX-4GP 2
SCD1U10V2KX-4GP 2

26 PCIE_RXN1
26 PCIE_RXP1
26 PCIE_TXN1
26 PCIE_TXP1

LAN

PCI-Express

32K suspend clock output

Direct Media Interface

U19B 2 OF 6

Document Number

Rev

Hawke-Intel

Sunday, September 09, 2007

Sheet
E

-1
21

of

57

+RTCVCC

1D5V_S0
TP165
TP161

VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2

1
C455
SC4D7U10V5ZY-3GP

J7

VCCSUS1_5_ICH_2

VCCSUS3_3

C3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

AC18
AG20
AC21
AC22
AH28

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

P6
P7
N7
C1
P1
R1
P2
P3
R3
P4
P5
R5
R6

W23

VCC1_5_A

F17
G18

VCCLAN1_05
VCCLAN1_05

F19
G20

VCCLAN3_3
VCCLAN3_3 50mA

A24

VCCGLANPLL

23mA
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

80mA
VCCGLAN3_3

64mA

1
2

C796
SCD1U16V2ZY-2GP

C797
SCD1U16V2ZY-2GP

1
2
1

TP157

3D3V_S5

1
2
3D3V_S5

SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

3D3V_S0

C841
SCD1U16V2ZY-2GP

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

TP150

VCCSUS1_5

VCC1_5_A
VCC1_5_A

TP159
TP136

3D3V_S5

VCCSUS1_5_ICH_1

C800
SCD1U16V2ZY-2GP

AC16

F1
L6
L7
M6
M7

SC10U10V5ZY-1GP

1
2

1
2
1
2

VCCSUS1_5

VCCUSBPLL 10mA

SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP
2

1
2

SCD1U16V2ZY-2GP

1
2

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1
1

VCC1_5_A
VCC1_5_A
VCC1_5_A

D1

B25

3D3V_S0

J6
AF20

AC7
AD7

VCCSUS1_05
VCCSUS1_05

C456
SCD1U16V2ZY-2GP

G12
G17
H7

AD11

VCC1_5_A
VCC1_5_A

AC12

AA5
AA6

32mA VCCHDA
32mA VCCSUSHDA

VCC1_5_A
VCC1_5_A

C831
SCD1U16V2ZY-2GP

AC10
AC9

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

C810
SCD1U16V2ZY-2GP

3D3V_S0

AC1
AC2
AC3
AC4
AC5

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

(SATA)

3D3V_S0

(DMI)

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

3D3V_S0

C805
SCD1U16V2ZY-2GP

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

3D3V_S0
3D3V_S0

C836
SCD1U16V2ZY-2GP

AE7
AF7
AG7
AH7
AJ7

47mA

A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6

C367
SC10U10V5ZY-1GP

C804
SCD1U16V2ZY-2GP

AA3
U7
V7
W1
W6
W7
Y7

C347

1D5V_S0

C809
SCD1U16V2ZY-2GP

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

C452

C397
SC10U10V5ZY-1GP

1
AC8
AD8
AE8
AF8

1130mA

VCC3_3
VCC3_3
VCC3_3
VCC3_3

C454

1D05V_S0

VCCSATAPLL

A26
A27
B26
B27
B28

1D5V_S0

1
2

C453
SC2D2U10V3ZY-1GP

1D5V_S0
2

C830
SCD1U16V2ZY-2GP

C457
SC10U10V5ZY-1GP
2
1

3D3V_S0

AD2

C346

C820

1D25V_S0

C803
SCD1U16V2ZY-2GP

1D5V_S0
C818
SCD1U16V2ZY-2GP

AF29

VCC3_3

C826

L14
1
2
IND-1UH-36-GP

C393
SCD01U16V2KX-3GP

1D5V_S0

C835
SCD1U16V2ZY-2GP

VCC3_3

C370
SC1U10V3ZY-6GP

AC23
AC24

C816

AJ6

1D5V_S0

1mA

V_CPU_IO
V_CPU_IO

C352
SC1U10V3ZY-6GP

AE28
AE29

C815

1D5V_DMIPLL_S0

C356
SC10U10V5ZY-1GP

1
2

1D5V_S0

CORE

SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

1
2

C353
SC1U10V3ZY-6GP

1D5V_S0

VCC_DMI
VCC_DMI

VCCP CORE

3
2

ICH_V5REF_SUS
C829
SCD1U16V2ZY-2GP

50mA

IDE

1
2

SB

20 mils

R29

VCCPSUS

D17
BAS16-1-GP

R439
100R2J-2-GP

23mA VCCDMIPLL

1mA

177mA

SC1U10V3ZY-6GP

SC2D2U10V3ZY-1GP

3
1
2

3D3V_S5
2

5V_S5

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

VCCPUSB

2
1

C374

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

ATX

SC1U10V3ZY-6GP
C376

ICH_V5REF_RUN
C813
SCD1U16V2ZY-2GP

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

1560mA

C379

SB

20 mils

V5REF_SUS

USB CORE

SC10U10V5ZY-1GP
SC2D2U10V3ZY-1GP

C440

D15
BAS16-1-GP

R427
100R2J-2-GP

C447

SC10U10V5ZY-1GP
C388

C385

C449

3D3V_S0
2

5V_S0

G4
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25

6uA

1mA

ARX

ICH_V5REF_SUS
1D5V_S0

V5REF
V5REF

PCI

T7
A16

GLAN POWER

1
2

C799
SCD1U16V2ZY-2GP

C798
SCD1U16V2ZY-2GP

ICH_V5REF_RUN

6 OF 6

U19F

5 OF 6

VCCRTC

657mA

AD25

VCCA3GP

U19E

20 mils

1D05V_S0

VCCCL1_05

G22

VCCCL1_05_ICH

VCCCL1_5

A22

VCCCL1_5_ICH

VCCCL3_3
VCCCL3_3

F20
G21

3D3V_S0

C391
SC4D7U6D3V3KX-GP

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

ICHGND1
A1
A2
A28
A29 ICHGND2
AJ28
AH1
AH29
AJ1 ICHGND3
AJ2
AJ29 ICHGND4
B1
B29

TP89 TPAD28
TP90 TPAD28

TP77 TPAD28
TP81 TPAD28

TP163
TP91

<Core Design>

Wistron Corporation

1mA

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH8(4/4) POWER&GND
Size
Document Number
Custom

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
22

of

57

SATA HDD Connector

ODD Connector

IDE_PDD[0..15]

20

HDD1

C823 1
C825 1

20 SATA_RXN0_C
20 SATA_RXP0_C

2 SC3900P50V2KX-2GP
2 SC3900P50V2KX-2GP

SATA_RXN0
SATA_RXP0

1
2

1
2

DY

C443
SCD1U16V2ZY-2GP

DY
C469
SCD1U16V2ZY-2GP

C459
SC10U10V5ZY-1GP

5V_HDD

-1

C448
SC10U10V5ZY-1GP

20 IDE_PDCS1#
20 IDE_PDA0
20 IDE_PDA1
20 INT_IRQ14
20 IDE_PDIORDY
20 IDE_PDIOW#

3D3V_S0
INT_IRQ14
8K2R2J-3-GP

2
R150

1
R151

IDE_PDIORDY
2
4K7R2J-2-GP

22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

IDE_PDA0
IDE_PDA1

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_RST_MOD#_R

DY

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NP2

-1

NP1
1

21

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NP2
24

3D3V_S0

C339
SC10U10V5ZY-1GP

C344
SC10U10V5ZY-1GP

2
3
4
5
6
7

20 SATA_TXP0
20 SATA_TXN0

5V_MOD

CDROM1

41

23
NP1
1

DY
1

IDE_PDCS3# 20
IDE_PDA2 20

IDE_PDA2

IDE_PDD15
IDE_PDD14
IDE_PDD13
IDE_PDD12
IDE_PDD11
IDE_PDD10
IDE_PDD9
IDE_PDD8

IDE_PDDACK#

20

IDE_PDIOR#
IDE_PDDREQ

20
20

42
FOX-CONN40B-GP-U1
20.F1044.040

SKT-SATA22P-6-GP
22.10300.051

SB

5V_S0

PLT_RST1#

U52C

8,19,27,28,29,33,47

10

14

IDE_RST_MOD#1
R155

2 IDE_RST_MOD#_R
56R2J-4-GP

TSAHCT125PW-GP

5V_S5

5V_S5

R544
100KR2J-1-GP

R545
100KR2J-1-GP
5V_S0
R550
R549
100KR2J-1-GP

Q50
2N7002SPT

9 Amp

C906
SC10U6D3V5MX-3GP

5V_HDD

DY

D 6
D 5
S 4

RUN_POWER_ON

1
2

SI3456BDV-T1-GP

DY

MODC_EN#

1
4
3

C905
SC10U6D3V5MX-3GP

1
2
3

U75
D
D
G

100KR2J-1-GP

2
5

R548
100KR2J-1-GP

Q49
2N7002SPT

DY

0R5J-5-GP

R551

100KR2J-1-GP

U76

8
7
6
5

5 Amp

5V_MOD

1
2
3
4

SI4800BDY-T1

C907
SCD1U25V3KX-GP

HDDC_EN

C908
SCD1U25V3KX-GP

33

HDDC_EN

MODC_EN_5V

HDD_EN_5V
33

DY

0R5J-5-GP

D
D
D
D

RUN_POWER_ON

R547

G
S
S
S

HDDC_EN#

R546

5V_S0

-1

-1

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

Document Number

Date: Sunday, September 09, 2007


A

HDD/ODD

Rev

Hawke-Intel
Sheet
E

23

-1
of

57

3D3V_S0

2 OF 2
3D3V_S0

3D3V_S0
PCI_AD25

R464
47KR2J-2-GP

DY

C849
SC1U10V3ZY-6GP

R462

1
0R2J-2-GP

19 PCI_PAR
19 PCI_C/BE#3
19 PCI_C/BE#2
19 PCI_C/BE#1
19 PCI_C/BE#0

1
R199

2
10R2J-2-GP

PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
R5C834_IDSEL

19 PCI_REQ#0
19 PCI_GNT#0
19 PCI_FRAME#
19 PCI_IRDY#
19 PCI_TRDY#
19 PCI_DEVSEL#
19 PCI_STOP#
19 PCI_PERR#
19 PCI_SERR#
GBRST#
19,26 PCIRST1#

4 PCLK_PCM

SHIELD
GND

19 ICH_PME#

R457

DY

1
0R2J-2-GP

VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT
VCC_ROUT

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL

124
123
23
24
25
26
29
30
31

REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

71
119

GBRST#
PCIRST#

121

PCICLK

70

PME#

1
2

1
2

C508
SC10U10V5ZY-1GP

86

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

4
13
22
28
54
62
63
68
118
122

AGND
AGND
AGND
AGND
AGND

99
102
103
107
111

3D3V_S0

R516
4K7R2J-2-GP

HWSPND#

69

MSEN

58

XDEN

55

UDIO5

57

UDIO3
UDIO4

65
59

UDIO2

56

UDIO1

60

UDIO0/SRIRQ#

72

3D3V_S0

RN62

4
3
2
1
1
R461

2
100KR2J-1-GP

3D3V_S0

5
6
7
8
SRN10KJ-6-GP

DY
EC65
SCD1U16V2ZY-2GP

INT_SERIRQ 21,33

INTA#

115

PCI_PIRQA# 19

INTB#

116

PCI_PIRQC#

TEST

66

19

1394 : INTA#
8in1 : INTB#

CLKRUN#

2
1

R463
100KR2J-1-GP

R5C833-GP

DY

R209
10KR2J-3-GP

C853

125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
33
7
21
35
45
8

117

21,33 PM_CLKRUN#

VCC_RIN

VCC_MD

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

19 PCI_AD[0..31]

67

VCC_3V

16
34
64
114
120

VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V
VCC_PCI3V

1
2

C857

SCD01U16V2KX-3GP

SCD47U16V3ZY-3GP

C848

SCD47U16V3ZY-3GP

1
2

C893

SCD01U16V2KX-3GP
2
1

1
2

1
2

C479

SCD1U16V2ZY-2GP

GB_RST#

61

VCC_ROUT
C470

33

10
20
27
32
41
128

SCD01U16V2KX-3GP

C474

C871

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

C856

SCD01U16V2KX-3GP
2
1

3D3V_S0

C485

SCD01U16V2KX-3GP
2
1

C846
SC10U10V5ZY-1GP

SCD01U16V2KX-3GP
2
1

U70B
C889

C503
SC10P50V2JN-4GP

<Core Design>

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

R5C833/PCI
Size
A3

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

24

-1
of

57

3D3V_S0

XO

TPBN0

104

TPB0N

TPBP0

105

TPB0P

L35

TPA0P

2
1
DLW21HN900SQ2LGP

SB

For EMI

XD_DATA5

MDIO14

91

XD_DATA4

MDIO13

90

SD/XD/MS_DATA3

MDIO12

93

SD/XD/MS_DATA2

MDIO11

81

SD/XD/MS_DATA1

MDIO10

82

SD/XD/MS_DATA0

RSV

75

XD_WP#

88

SD/XD/MS_CMD

MDIO19

83

XD_ALE

MDIO18

85

XD_CLE

MDIO02

78

XD_CE#

MDIO03

77

SD_WP#(XDR/B#)

MDIO00

80

SD_CD#

MDIO01

79

MS_INS#

MDIO09

84

SD/XD/MS_CLK

MDIO04

76

MC_PWR_CTRL_0

33R2J-2-GP

MDIO06

74

MS_LED#

MDIO07

73

2
1

3
4

TP174

R191
10KR2J-3-GP

1
2
3

OUT
GND
SET

IN

ON#

SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1
XD_DATA4_1
XD_DATA5_1
XD_DATA6_1
XD_DATA7_1

19
15
12
11
9
7
6
5

D0
D1
D2
D3
D4
D5
D6
D7

SD/XD/MS_DATA3_1
SD/XD/MS_DATA0_1
SD/XD/MS_DATA2_1

26
20
22

RESERVED_2/DATA_3
SBIO/DATA_0
DATA_2

1
23

3D3V_S0
C451
1

CARD1

SD/XD/MS_CLK_1

R515
100KR2J-1-GP

1
3

SD_WP#(XDR/B#)_1

3D3V_CARD

XD_CE#_1
XD_CLE_1

SRN33J-5-GP-U

R522

SD_WP#(XDR/B#)

RN64
XD_CE#
XD_CLE

SRN33J-5-GP-U

MDIO08

U25

XD_SW#

Q18
2N7002PT-U

D18

CD
R/B#
RE#
CE#
CLE
ALE
WE#
WP#

40
39
38
37
36
34
31
27

XD_SW#
SD_WP#(XDR/B#)
SD/XD/MS_CLK_1
XD_CE#_1
XD_CLE_1
XD_ALE_1
SD/XD/MS_CMD_1
XD_WP#

DAT3
DAT2
DAT1
DAT0

33
35
8
10

SD/XD/MS_DATA3_1
SD/XD/MS_DATA2_1
SD/XD/MS_DATA1_1
SD/XD/MS_DATA0_1

1 SD_CD#

MS_INS#

BAT54C-7-F-GP

SKT-SD+MMC41P-1-GP
62.10051.581

SCD1U16V2ZY-2GP
<Core Design>

AAT4610AIGV-GP
R190
15KR2J-1-GP

Wistron Corporation

MC_PWR_CTRL_0

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

SC1U10V3ZY-6GP
C450
2
1

20mil

XD_ALE_1
SD/XD/MS_CMD_1

SD/XD/MS_CLK_1

3
4

28
17

2
1

R5C833-GP

3D3V_CARD

SD/XD/MS_DATA1_1

RN63
XD_ALE
SD/XD/MS_CMD

97

C430
SC2D2U10V3ZY-1GP

SRN47J-5-GP

MDIO05

C433
SCD1U16V2ZY-2GP

XD_DATA6

89

DY
C432
SCD1U16V2ZY-2GP

SCLK
CLK

92

MDIO15

1SD/XD/MS_DATA0_1
2SD/XD/MS_DATA1_1
3SD/XD/MS_DATA2_1
4SD/XD/MS_DATA3_1

8
7
6
5

30
4
18
21

MDIO16

SD/XD/MS_DATA0
SD/XD/MS_DATA1
SD/XD/MS_DATA2
SD/XD/MS_DATA3

VCC
VCC
VCC/DATA_1
VCC/CDD

C896

XD_DATA7

CD2/WP2_GND
RESERVED/GND

C895

87

C887

2 SD/XD/MS_DATA3
SC33P50V2JN-3GP
2 SD/XD/MS_DATA2
SC33P50V2JN-3GP
2 SD/XD/MS_DATA1
SC33P50V2JN-3GP
2 SD/XD/MS_DATA0
SC33P50V2JN-3GP
2 SD/XD/MS_CLK
SC33P50V2JN-3GP

MDIO17

DY
C431
SCD1U16V2ZY-2GP

RN65

C888

3D3V_CARD

XD_DATA4_1
XD_DATA5_1
XD_DATA6_1
XD_DATA7_1

1
2
3
4

8
7
6
5

SC

XD_DATA4
XD_DATA5
XD_DATA6
XD_DATA7

VREF

SRN47J-5-GP

SB

1
2 R523
5K11R2F-L1-GP
1394_TPB1_R
1
2 C897
SC270P50V2JN-2GP

RN66

GUARD GND

C894

1 R367
2
0R0603-PAD

REXT

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

GND
GND
GND

100

109

DY
TPB0-

43
42
41

RICHO_VREF
2
SCD01U16V2KX-3GP

TPAP0

1
2
R518
56R2J-4-GP
1
2
R519
56R2J-4-GP

SD/XD/MS_CMD_1
MS_INS#
SD/XD/MS_CMD_1
SD_WP#(XDR/B#)_1
SD_CD#

101

TPA0N

SCD01U16V2KX-3GP

1 R364
2
0R0603-PAD

29
24
16
3
2

2 RICHO_REXT
10KR2F-2-GP

FIL0

108

CLOSE TO CHIP

SC

CMD
INS
B6
WP1
CD1

96

TPAN0

SB
-1

SB

1 R355
2
0R0603-PAD

TPB0+

C899 R521 R520


56R2J-4-GP
56R2J-4-GP

C898

3
4
DLW21HN900SQ2LGP

1
C891

TPA0-

RICHO_FILO
2
SCD01U16V2KX-3GP

1
R517

6
5
4
3
2
1

SKT-1394-4P-30-GP
22.10218.U71

SC15P50V2JN-2-GP

1
C886

DY

GND
GND
TPA0+
TPA0TPB0+
TPB0-

XI

SCD33U10V3KX-3GP

VSS
VSS
VSS_1
GND/VSS_2

95

L32

14
32
25
13

1394_XO

TPA0+

SC

TPBIAS0

94

C882
1

1 R357
2
0R0603-PAD

SKT1394

X5
X-24D576MHZ-70GP

SB

C890
SCD01U16V2KX-3GP

113

TPBIAS0

SC15P50V2JN-2-GP
1394_XI

C892
SCD1U16V2ZY-2GP

98
106
110
112

GUARD GND

AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V
AVCC_PHY3V

X5 CL=12pF0.2pF
Freq. Tolerance:30ppm

3D3V_PHY

1 R201
2
0R0603-PAD

C491
SC10U10V5ZY-1GP

3D3V_PHY

C876
1

1 OF 2

U70A

Title

R5C832/IEEE1394/SD

SB

Size
A3

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

25

-1
of

57

R181

R176

R172

R173

R174

R175

C377

C378

1.91K

49.9

49.9

49.9

49.9

0.01u

0.01u

2K

DY

DY

DY

DY

DY

DY

X3 CL=12pF0.2pF
Freq. Tolerance:30ppm

88E8039

DY

88E8040

4.7K

2D5V_LAN_S5

3D3V_LAN_S5

R178
1D2V_LAN_S5

DY

24
25

MDI0MDI1-

27
27

MDI0+
MDI1+

2
50
49

PCIE_RXN
PCIE_RXP

53
54

LED_LINK#
NC#62
LED_SPEED#
LED_ACT#

63
62
60
59

LINK_LED#

XTALI
XTALO

15
14

LANX1
LANX2

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PCIE_TXN
PCIE_TXP

SB

PCIE_WAKE# 21,27,28,29
PCIRST1# 19,24
CLK_PCIE_LAN 4
CLK_PCIE_LAN# 4
LAN_RXN1
LAN_RXP1

C423 1
C422 1

2SCD1U10V2KX-4GP
2SCD1U10V2KX-4GP

PCIE_RXN1 21
PCIE_RXP1 21

3D3V_LAN_S5
3D3V_LAN_S5

MDI0MDI1-

R451
4K7R2J-2-GP

R447
4K7R2J-2-GP

R456
0R2J-2-GP

1
2
3
4

A0
A1
A2
GND

VCC
WP
SCL
SDA

8
7
6
5

U24
EEWP
VPD_CLK
VPD_DATA

DY
EEWP

LAN100M_LED# 27
ACT_LED# 27

2
2

LAN100M_LED#

PCIE_TXN1 21
PCIE_TXP1 21

1
1
17
20
26
30

RXN
TXN
NC#27
NC#31
18
21
27
31
27
27

VDD25
AVDD

HSDACP
HSDACN

6
5
55
56

C387
SC12P50V2JN-3GP

R459
0R2J-2-GP

AT24C08AN-1-GP

LANHP
LANHN

TSTPT
TESTMODE

LANRSET
CTRL12
CTRL25

29
46

TPAD28 TP152
TPAD28 TP151

LANPWR

LOM_DISABLE#
VAUX_AVLBL
SWITCH_VCC
VMAIN_AVLBL
SWITCH_VAUX
RSET
CTRL12
CTRL25

VPD_DATA
VPD_CLK

R437
LANSC
TPAD28 TP154
1
2
0R0402-PAD TPAD28 TP156
LANSV
1
2
R176
1K91R2F-1-GP

3D3V_S0

10
12
11
47
9
16
3
4

41
38

3D3V_LAN_S5 LOM_DISABLE#

C390
SC12P50V2JN-3GP

GND

NC#36
NC#37

WAKE#
PERST#
REFCLKP
REFCLKN

65

36
37

Marvell recommend:
2K Ohm

PU_VDDO_TTL#42
PU_VDDO_TTL#43

NC#34
NC#35

42
43

34
35

RXP
TXP
NC#26
NC#30

R429

VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL

AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
1

XTAL-25MHZ-96GP

3D3V_LAN_S5

2
4K7R2J-2-GP

64
23

U21

33
39
44
48
58
2
7
13

1
8
40
45
61

57
52
51
32
28
22
19

10MR2J-L-GP
X3
LANX2 1
2 LANX1

TP153

88E8039-A0-GP

Pull up for AT24C08 another pull low

TPAD28
3D3V_LAN_S5

VPD_CLK
VPD_DATA

MDI0+
MDI1+

MDI0+

1
R181
1
R180

DY

2
2

4K7R2J-2-GP

MDI0-

4K7R2J-2-GP

MDI1+
MDI1-

1
R175
1
R174
1
R173
1
R172

MDIS0_LAN
49D9R2F-GP

1
2
C378
SCD01U16V2KX-3GP

49D9R2F-GP
2 MDIS1_LAN
49D9R2F-GP
2
49D9R2F-GP

1
2
C377
SCD01U16V2KX-3GP

R185
LAN100M_LED#

10KR2J-3-GP

LINK_LED#

Q19
CH3904PT-GP

LAN10M_LED# 27

R189

DY

0R2J-2-GP
3D3V_LAN_S5

2
0R3-0-U-GP

2
2
2

SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1U6D3V2KX-GP

2
2
2
2
2

SC1U6D3V2KX-GP
SC1KP50V2KX-1GP
SC1U6D3V2KX-GP
SC1KP50V2KX-1GP
SC1U6D3V2KX-GP
SC1KP50V2KX-1GP

<Core Design>

Q21
2SB772PT-1-GP 1D2V_LAN_S5

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

C444
SCD1U10V2KX-4GP

8053:2.5V.
8055:1.8V.

2
C371
SCD1U10V2KX-4GP

C442
SC4D7U6D3V5KX-3GP
SCD1U10V2KX-4GP

Title
C446
SC4D7U6D3V5KX-3GP

LAN MARVELL
Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


B

CTRL12
2D5V_LAN_S5

1
C394
1
C425
1
C386
1
C410
1
C402
1
C395

SCD1U10V2KX-4GP

1
3
Q13
2SB772PT-1-GP

C441

R458
4K7R2J-2-GP

SC1U6D3V2KX-GP

CTRL25

C373
8053:CTRL25.
8055:CTRL18. SC4D7U6D3V5KX-3GP

SC1U6D3V2KX-GP

1
C424
1
C418
1
C380
1
C381

3D3V_LAN_S5

R410
4K7R2J-2-GP

C365

C361

C364
SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP
2
1

G
2
3

Q10
2N7002PT-U
33 PM_LAN_ENABLE

Q11
AO3403-GP

SC1KP50V2KX-1GP

1D2V_LAN_S5

PLACE PNP TO CHIP ACAP


CTRL12 PIN TRACE IS 25MIL

3D3V_LAN_S5

D
1

R154
10KR2J-3-GP

SCD1U10V2KX-4GP
2
1

3D3V_LAN_S5
C349

PLACE PNP TO CHIP ACAP


CTRL25 PIN TRACE IS 25MIL

3D3V_S5

DY

SC4D7U6D3V5KX-3GP

R159 1

1
C408
1
C414
1
C400

2D5V_LAN_S5

Sheet
E

-1
26

of

57

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

RJ45 Connector
2D5V_LAN_S5

10/100M Lan Transformer


RJ45-1

1 R70
2
0R0402-PAD

RJ45-1_L

RJ45-2

1 R69
2
0R0402-PAD

RJ45-2_L

RJ45-3

1 R59
2
0R0402-PAD

RJ45-3_L

RJ45-6

1 R58
2
0R0402-PAD

RJ45-6_L

XF1
26

MDI1+

16

RJ45-3

14

XFR_RXC

15

RJ45-6

10

RJ45-1

26

MDI1-

26

MDI0+

C609
SCD1U16V2ZY-2GP

11

XFR_CMT

RJ45-2

12

13

RJ1
26 LAN10M_LED#

R84
3D3V_LAN_S5

26 LAN100M_LED#

470R2J-2-GP

RJ45-1_L
RJ45-2_L
RJ45-3_L
RJ45-4

SC
RN8
SRN75J-1-GP

1
2
3
4
5
6
7
8
B1
B2

RJ45-6_L
RJ45-7

5
6
7
8

R56
3D3V_LAN_S5

Main source : 68.0H45P.301 LANKOM LF-H45P-1


2nd source : 68.HD121.301 TAIMAG HD-121-1
3rd source : 68.68165.301 NETSWAP NS681685E

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

LAN_TERMINAL 1
2
C629
SC1500P2KV8KX-3GP

SC
2

TP190
TP191
TP192
TP193
TP195
TP194
TP196
TP198
TP197
TP200
TP199

VCC_LINK_LED
VCC_ACT_LED
LAN10M_LED#
LAN100M_LED#
ACT_LED#
RJ45-1_L
RJ45-2_L
RJ45-3_L
RJ45-4
RJ45-6_L
RJ45-7

1
1
1
1
1
1
1
1
1
1
1

VCC_ACT_LED

26

470R2J-2-GP

9
A1
A2
A3

A1
A2
A3

VCC_LINK_LED

4
3
2
1

MDI0-

C593
SCD1U16V2ZY-2GP

26

RJ45-7
RJ45-4

ACT_LED#

B1
B2

10
RJ45-140-GP
22.10245.N11

SB
Yellow LED:TX/RX
Orange LED:Speed 100
Green LED:Speed 10

For AFTE, place them on the some side.

NEWCARD Connector

Place them Near to Connector


3D3V_NEW_S0

Place them Near to Chip

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

C382
DY
SCD1U16V2ZY-2GP

31
NP1
1

4 CLK_PCIE_NEW#
4 CLK_PCIE_NEW
CPUSB#
NEWCARD_CLKREQ#

4 NEWCARD_CLKREQ#
TPAD28

TP87

CPPE#

1D5V_NEW_S0
3

21,26,28,29 PCIE_WAKE#
TP88

3D3V_NEW_S0

TPAD28

+1.5VVIN
+1.5VOUT
+3VOUT
+3VIN

Test circuit
Use Card and No Card

15
17
11
12
3
2

TPAD28

SC

USB_PN8 21

4
6
8
10
12
14
16
18
20
22
24
26
28
30

USB_PP8 21
PCIE_RXN5 21
PCIE_RXP5 21
PCIE_TXN5 21
PCIE_TXP5 21
SMB_CLK
SMB_DATA
PERST#

SHDN#
PERST#
CPUSB#
CPPE#
SYSRST#

20
8
9
10
6

FOX-CONN30A-8GP
20.F1064.030

PM_SLP_S4# 21,33,43,44

PERST#
CPUSB#
CPPE#
NRST

R179 2
R177 2

2
R433
TPS2231RGP-GP

2
SC22P50V2JN-4GP

1 100KR2J-1-GP
1 100KR2J-1-GP

1
0R2J-2-GP

3D3V_S5

PLT_RST1# 8,19,23,28,29,33,47
<Core Design>

1
C819

3D3V_S0

Wistron Corporation

1D5V_NEW_S0

3D3V_NEW_S0
1D5V_S0

1D5V_NEW_S0 Max. 650mA, Average 500mA.


3D3V_NEW_S0 Max. 1300mA, Average 1000mA
3D3V_NEW_LAN_S5 Max. 275mA

C817
SCD1U16V2ZY-2GP

3D3V_S0

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

C412
SC4D7U10V5ZY-3GP
Title

3D3V_S5

LAN connector/NEW CARD


Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

3D3V_NEW_LAN_S5
3D3V_NEW_S0

DY
3D3V_NEW_LAN_S5

SMB_CLK 21
SMB_DATA 21

U20

NC#16
NC#14
NC#13
NC#5
NC#4

TP155

AUXOUT
AUXIN
1.5VOUT
1.5VIN
3.3VOUT
3.3VIN

16
14
13
5
4

1D5V_S0
1D5V_NEW_S0
3D3V_NEW_S0
3D3V_S0

THERMAL_PAD
OC#
RCLKEN
STBY#

GND

21
19
18
1

STBY#

3
5
7
9
11
13
15
17
19
21
23
25
27
29
NP2
32

EC92
SC22P50V2JN-4GP

NEWCARD_OC#

C802

C801

C404

C407
SC10U10V5ZY-1GP

NEW1
C405
SCD1U16V2ZY-2GP

1
2

DY

C389

3D3V_NEW_LAN_S5

1D5V_S0

3D3V_S5

1D5V_NEW_S0

Sheet
E

-1
27

of

57

Mini Card Connector 1(802.11a/b/g)


MINI3

1D5V_S0

3D3V_S0

53

21,26,27,29 PCIE_WAKE#

NP1
1

29,30 WLAN_ACT

29

BT_ACT

TPAD28 TP175

6
8
9
10

4 CLK_PCIE_MINI1#

11

4 CLK_PCIE_MINI1

13

12
14
15
16
17
18
19
20

WIFI_RF_EN

21

PLT_RST1#

22
2

21 PCIE_RXN2

23

21 PCIE_RXP2

25

24

33

PLT_RST1# 8,19,23,27,29,33,47
2

3D3V_S0

26
27
28
29

21 PCIE_TXN2

31

21 PCIE_TXP2

33

30

ICH_SMBCLK 4,14,15,21,29

32

ICH_SMBDATA 4,14,15,21,29

34
35
36
37
38
39

3D3V_S0

40
41
42
43

WLAN_LED#

44
45

TP171

46

WLAN_LED# 34
TPAD28

47
48
49
50
51
52

NP2
54
SKT-MINI52P-10-GP
62.10043.431

1D5V_S0

3D3V_S0

3D3V_S0

Main source : 20.F0992.052 P-Two A54452-A0G16-N


2nd source : 62.10043.551 Tyco 1759553-1

<Core Design>

DY

C851
SCD1U16V2ZY-2GP

DY

DY

C465
SC10U10V5ZY-1GP

C852
SCD1U16V2ZY-2GP

1
2

DY

C458
SC10U10V5ZY-1GP

C850
SCD1U16V2ZY-2GP

Wistron Corporation

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

MINI CARD CONN 1


Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
28

of

57

Mini Card Connector


Mini Card Connector 2(WWAN)

Mini Card Connector 3(Robson/BT)

MINI1

1D5V_S0

3D3V_S0

53
3D3V_S0
PCIE_WAKE#

NP1
1

2
BT_ACT_2

2
3

4
5

12

EC103
SC33P50V2JN-3GP

EC102
SC33P50V2JN-3GP

20

WWAN_EN 33

21

PLT_RST1#

22

21 PCIE_RXP3

25

24

17

33 E51_TXD

E51_TX_M3

19

SC

PLT_RST1# 8,19,23,27,28,33,47

DY
20

G32
GAP-OPEN-PWR

21

21 PCIE_RXN4

23

21 PCIE_RXP4

25

24

32

21 PCIE_TXN4

31

21 PCIE_TXP4

33

BT_ACT 28
R193
100KR2J-1-GP

DY
SC

DY

DY
2

PLT_RST1# 8,19,23,27,28,33,47

3D3V_S0

30

ICH_SMBCLK

32

ICH_SMBDATA

35

ICH_SMBDATA 4,14,15,21,28

36

USB_PN9 21

38

USB_PP9 21

37

35
36

USB_PN4 21

37
38

39

3D3V_S0

40
41

USB_PP4 21

39

42

40

43

42

45

41

34

34

TP92

44

TPAD28

46

44

TP173

TPAD28

47

46

TP172

TPAD28

49

45

28

ICH_SMBCLK 4,14,15,21,28

43

GND

26
29

30

3D3V_S0

3D3V_S0

27

28

33

BLUETOOTH_EN 30,33
PLT_RST1#

22

3D3V_S0

29

21 PCIE_TXP3

VCC

-1

18

27

31

74LVC1G32GW-1GP
R553
100KR2J-1-GP

R552
100KR2J-1-GP

16

G33
GAP-OPEN-PWR
E51_RX_M3
1
2

14

26

21 PCIE_TXN3

BT_ACT_2

12

33 E51_RXD

-1

18
19

23

13
15

1
2

UIM_VPP 34

UIM_RESET 34

16

14

17

21 PCIE_RXN3

4 CLK_PCIE_MINI3

UIM_CLK 34

15

11

4 CLK_PCIE_MINI2

13

UIM_DATA 34

4 CLK_PCIE_MINI3#

UIM_PWR 34

10
11

30 BT_ACT_1

10
8

0R2J-2-GP

SC

0R2J-2-GP

U73

8
6

4 CLK_PCIE_MINI2#

5
TPAD28 TP94

DY

TPAD28 TP93

1
R195
1
R194

28,30 WLAN_ACT

21,26,27,28 PCIE_WAKE#

NP1
1

1D5V_S0

MINI2

53

BT_ACT_WPAN# 34

48
G34

47
48

5V_S5

49

5V_S5_DBG_M3

52

GAP-OPEN-PWR

50

50
51
NP2

51
52

54

NP2
SKT-MINI52P-10-GP
62.10043.431

54
SKT-MINI52P-10-GP
62.10043.431

C845
SCD1U16V2ZY-2GP

3D3V_S0

DY
2

DY
2

1
2

DY

C461
SC10U10V5ZY-1GP

3D3V_S0

C468
SCD1U16V2ZY-2GP

C462
SC10U10V5ZY-1GP

DY

1D5V_S0

C464
SCD1U16V2ZY-2GP

DY

<Core Design>

C847
SCD1U16V2ZY-2GP

Wistron Corporation

1
2

C463
SCD1U16V2ZY-2GP

1D5V_S0
C466
SC10U10V5ZY-1GP

C467
SCD1U16V2ZY-2GP

C480
SC10U10V5ZY-1GP

C460
SCD01U16V2KX-3GP

-1

TC8
ST220U6D3VDM-20GP

3D3V_S0

3D3V_S0

DY

C471
SCD1U16V2ZY-2GP

5V_S5

Main source : 20.F0992.052 P-Two A54452-A0G16-N


2nd source : 62.10043.551 Tyco 1759553-1

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

MINI CARD CONN 2 & 3


Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
29

of

57

Switch Board
3D3V_AUX_S5

1
1

CS#
DO
WP#
GND

VCC
HOLD#
CLK
DIO

8
7
6
5

SPI_HOLD#
SPI_CLK0
SPI_SI0

R382

W25X16VSSIG-GP

SB

1
2
R384
150R2J-L1-GP-U

SPIDO 33

EC55
SC4D7P50V2CN-1GP

SC

2
1

33

CIRRX

100R2J-2-GP

SIO_CIRRX_VS

MLX-CON10-6-GP-U
20.D0174.110

4
3
2
1

OUT
VS
GND
GND

TSOP36136-GP

SPICLK 33

150R2J-L1-GP-U

1
2
3
4

SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP

EC51
SC4D7P50V2CN-1GP

1
R378
150R2J-L1-GP-U

5V_S5

EMI REQUEST

3D3V_AUX_S5

U61

SPICS#
SPI_SO0
SPI_WP#

EC49
SC4D7P50V2CN-1GP

16M Bits

33 SPICS#
33
SPIDI

SC

C872
SCD1U10V2KX-4GP

4
3
SPI_HOLD# 2
1

SB

33 SNIFFER_YELLOW
33 SNIFFER_BLUE

U34
R216

SCD1U10V2KX-4GP
C513
2
1

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R220
10KR2J-3-GP

SC4D7U6D3V5KX-3GP
C512
2
1

33 WLAN/BT_BTN#
33 SNIFFER_PWR_SW#

C771

DY

C772

5
6
7
8

C777
SC10U6D3V5KX-1GP

3D3V_S5

SNIFFER_BD1
11
1
2
3
4
5
6
7
8
9
10
12

SPI FLASH ROM


RN43
SRN10KJ-6-GP

CIR

3D3V_AUX_S5

3D3V_AUX_S5

1
1
1
1

DY2
DY2
DY2
DY2

C864
C867
C869
C870

WLAN/BT_BTN#
SNIFFER_PWR_SW#
SNIFFER_YELLOW
SNIFFER_BLUE

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

Place close to EC
For EMI

TP201
TP202
TP203
TP205
TP204
TP206
TP207

1
1
1
1
1
1
1

CIRRX
SIO_CIRRX_VS
5V_S5
SNIFFER_BLUE
SNIFFER_YELLOW
SNIFFER_PWR_SW#
WLAN/BT_BTN#

For AFTE, place them on the some side.

Hall Switch conn.

Capacity Button conn.


5V_S0

Bluetooth Module conn.

5V_S0

3D3V_S5

TP209
TP208
TP210
TP211
TP213
TP212

1
1
1
1
1
1

29 BT_ACT_1
29,33 BLUETOOTH_EN
28,29 WLAN_ACT

3D3V_S0

BT_LED

12

C627
SCD1U10V2KX-4GP

R316
10KR2J-3-GP

1
9
FOX-CON8-4-GP
20.K0178.008

FOX-CON10-GP
20.F0711.010

Q36

SB

34 BT_ACT_K#
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

BT_ACT_1
BLUETOOTH_EN
WLAN_ACT

FOX-CON4-12-GP
20.K0179.004

EC82
SC15P50V2JN-2-GP

EC80
SC15P50V2JN-2-GP

33 CAPA_INT#

EC81
SC15P50V2JN-2-GP

10R2J-2-GP

35 CAP_SCL
35 CAP_SDA

2
3
4
6

1
1

LID_CL#

10
8
7
6
5
4
3
2

SC

2
2

R214

2
3
4
5
6
7
8
9
10

CAP1

CN3

33 LID_CLOSE#

USB_P5+
USB_P5-

SB

DY

5
1

11
1

DY

1
R208
100KR2J-1-GP

C507
SCD047U10V2KX-2GP

1
RN1
SRN10KJ-5-GP

2
1

3D3V_S5

C500
SCD1U10V2KX-4GP

3
4

BT1
EC79
SCD1U10V2KX-4GP

3D3V_S5
LID_CL#
5V_S0
CAP_SCL
CAP_SDA
CAPA_INT#

R1

R2
PDTC124EU-1-GP

SC
1 R322
2
0R0402-PAD
USB_P5+

3D3V_S0

2
A

EC91
MLVG0402220NV05BP-GP

1
2

21 USB_PP7

EC90
MLVG0402220NV05BP-GP
2
1

For AFTE, place them on the some side.

SC

DY
21 USB_PN5

USB_P5-

1 R319
2
0R0402-PAD

SC

CN2

Biometric_USBPBiometric_USBP+

DY

2 R126
1
0R0603-PAD

TR1
L-63UH-GP

For EMI

SB

1
3D3V_S0
Biometric_USBPBiometric_USBP+

1
1
1

SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP

L13
DLW21SN900SQ2LUGP

TP217
TP216
TP215

DY2
DY2
DY2
DY2
DY2
DY2

C268
SCD1U10V2KX-4GP

21 USB_PN7

TP28-75-GP
TP28-75-GP
TP28-75-GP

1
1
1
1
1
1

Biometric Conn.

EC83
EC85
EC84
EC86
EC87
EC88

2 R127
1
0R0603-PAD

SC

USB_P5+
USB_P5BT_ACT_1
BLUETOOTH_EN
WLAN_ACT
BT_LED

For AFTE, place them on the some side.

21 USB_PP5

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

6
5
4
3
2
1

TP214
TP218
TP220
TP219
TP221
TP223
TP222

1
1
1
1
1
1
1

3D3V_S0
USB_P5+
USB_P5BT_ACT_1
BLUETOOTH_EN
WLAN_ACT
BT_LED

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

SPI/Sniffer/CIR/BT/Biometric/Capacity button

SB
SC

ACES-CON6-8GP
20.K0228.006

For AFTE, place them on the some side.

Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

30

of

57

+VDDA

R486
5K1R2F-2-GP

SENSE_A
SENSE_B

13
34

PORT_A_L
PORT_A_R
VREFOUT_A

39
41
37

PORT_B_L
PORT_B_R
VREFOUT_B

21
22
28

PORT_C_L
PORT_C_R
VREFOUT_C

23
24
29

PORT_D_L
PORT_D_R
VREFOUT_D

35
36
32

AUD_LINE_OUT_L
AUD_LINE_OUT_R

PORTE_L
PORTE_R
VREFOUT_E

14
15
31

AUD_EXT_MIC_L
AUD_EXT_MIC_R
AUD_VREFOUT_E

PORTF_L
PORTF_R
VREFOUT_F

16
17
30

PORTG_L
PORTG_R

43
44

PORTH_L
PORTH_R

45
46

CD_L
CD_GND
CD_R

18
19
20

1
SC1KP50V2KX-1GP

2
1
2

C510
SC1U6D3V2KX-GP

AVDD1
AVDD2

RESET#

VCC

1
2
3

OE#
A
GND

74LVC1G125DC-GP

R513

AUD_DMIC_CLK
0R2J-2-GP

AUD_DMIC_IN0

18 AUD_DMIC_IN0

47 AUD_SPDIF_OUT

AUD_DMIC_CLK
AUD_SPDIF_OUT

2
3

47
48

SPDIF_IN/GPIO0/DMIC_CLK
SPDIF_OUT
DVSS1
DVSS2

12

CAP2
VREFFILT

33
27

AVSS1
AVSS2

26
42

AUD_PC_BEEP

1AUD_BEEP
C883
SCD1U10V2KX-4GP
2

AUD_CAP2
AUD_VREFFLT

2
1
2

C482

VCC

U28

B
A
GND

From SB
1
2
3

C492

From EC

74AHC1G86GW-GP

XOR gate
R496

1
2
47KR2J-2-GP
3

R196
1
2
47KR2J-2-GP

C504
SC1U10V3KX-3GP
EXT_MIC_JD#

AUD_EXT_MIC_L

MIC_IN_L_2
2 C880
SC1U10V3KX-3GP

R501
1
2
BLM18BD601SN1D-GP

MIC_IN_L_C

AUD_EXT_MIC_R

MIC_IN_R_2
2 C881
SC1U10V3KX-3GP

R503
1
2
BLM18BD601SN1D-GP

MIC_IN_R_C

SC
-1

SB

600ohm 100MHz
200mA 0.5ohm DC
TP28-75-GP
TP28-75-GP
TP28-75-GP

C494
SCD1U10V2KX-4GP

TP224
TP225
TP226

1
1
1

EXT_MIC_JD#
MIC_IN_L_C
MIC_IN_R_C

6
3
<Core Design>

Wistron Corporation

5
7
8
9
10

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
AUDIO-JK90-GP-U
22.10088.D81

-1

For AFTE, place them on the some side.

DY

MIC1

AUDIO CODEC STAC9228


Size
A3

Document Number

Date: Sunday, September 09, 2007


A

SB_SPKR 21
KBC_BEEP 33

1
2

R507
4K7R2J-2-GP

1
2

R506
4K7R2J-2-GP

1
1
2
1
2

DY

R495
10KR2J-3-GP
SC10U6D3V5KX-1GP

PC_BEEP

DY

SC10U6D3V5KX-1GP

C498
SCD1U10V2KX-4GP

ICH_AZ_CODEC_BITCLK1

ICH_AZ_CODEC_SDOUT1

HP1
Ext Mic
Speaker
HP2

AUD_VREFOUT_E

R202
47R2J-2-GP

DY

A--->
E--->
D--->
F--->

PC BEEP

71.09228.00G

ICH_AZ_CODEC_BITCLK

DY

EXT_MIC_JD#

MIC IN

Azalia I/F EMI

R206
47R2J-2-GP

+VDDA

STAC9228X5TAEA2-GP

ICH_SDOUT_CODEC

R510 1
39K2R2F-L-GP

32

Port
Port
Port
Port

AUD_HP2_OUT_L 32
AUD_HP2_OUT_R 32

Azalia I/F EMI

AUD_HP2_JD#

TO Audio OP

4
7

VOLUME UP/DMIC_0/GPIO1
VOLUME DN/DMIC_1/GPIO2

AUD_LINE_OUT_L 32
AUD_LINE_OUT_R 32

EC68
SC220P50V2JN-3GP

AUD_DMIC_CLK_G

DY

EC73
SC220P50V2JN-3GP
2
1

18 AUD_DMIC_CLK_G

U72

3D3V_S0

DY

R511 1
20KR2J-L2-GP

SYNC

11

10

20 ICH_AZ_CODEC_RST#

C884
SC1KP50V2KX-1GP

20 ICH_AZ_CODEC_SYNC

SDATA_OUT

32

R497
5K1R2F-2-GP

AUD_HP1_OUT_L 32
AUD_HP1_OUT_R 32

20 ICH_SDOUT_CODEC

SDATA_IN

AUD_HP1_OUT_L
AUD_HP1_OUT_R

BIT_CLK

SB_AZ_CODEC_SDIN0_R 8
1
33R2J-2-GP
5

2
R200

20 ICH_SDIN_CODEC

AUD_HP1_JD#

C875
SC1KP50V2KX-1GP

+VDDA
AUD_SENSE_A
AUD_SENSE_B

TO Audio OP
6

20 ICH_AZ_CODEC_BITCLK

DVDD_CORE
DVDD_CORE
DVDD

R487 1
39K2R2F-L-GP

DY

C511

1+3V_RUN_DVDD_CORE3
100KR2J-1-GP

25
38

R215 2

1
2
U30

1
9
40

C478
SCD1U10V2KX-4GP

C484
SC1U6D3V2KX-GP

1
2

1
2
1

C501
SCD1U10V2KX-4GP

+VDDA

C487
SCD1U10V2KX-4GP

3D3V_S0

Rev

-1

Hawke-Intel
Sheet
E

31

of

57

C502
SC1U6D3V2KX-GP

1
2

1
2

AUD_SPK_R1

0R0402-PAD 1

2 R229

AUD_SPK_R1_R

1 100KR2J-1-GP
1 0R2J-2-GP
1 100KR2J-1-GP

DY
DY

From EC
AMP_MUTE# 33

SC

3AUD_SPK_ENABLE
NB_MUTE

AUD_HP1_EN

1
+5V_SPK_AMP

SC

6dB

U33

10dB

15.6dB

21.6dB

AUD_HP2_JD

AUD_HP2_JD#

AMP_MUTE#

AUD_HP2_JD

AUD_HP2_EN
R211
10MR2J-L-GP

2N7002SPT

SB

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

TP227
TP228
TP230
TP229

1
1
1
1

AUD_SPK_L2_R
AUD_SPK_L1_R
AUD_SPK_R2_R
AUD_SPK_R1_R

EC72
SC220P50V2JN-3GP

5
7
8
9
10

TP28-75-GP
TP28-75-GP
TP28-75-GP

TP232
TP231
TP233

1
1
1

AUD_HP1_JD#
AUD_HP1_JACK_L1
AUD_HP1_JACK_R1

TP28-75-GP
TP28-75-GP
TP28-75-GP

TP234
TP235
TP236

1
1
1

AUD_HP2_JD#
AUD_HP2_JACK_L2
AUD_HP2_JACK_R2

For AFTE, place them on the some side.

SB
-1
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AUDIO AMP/SPEAKER
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007


A

AUDIO-JK90-GP-U
22.10088.D81
R205
33KR2J-3-GP

SB

600ohm 100MHz
200mA 0.5ohm DC

AMP_MUTE#

2N7002SPT

GAIN

R212
10MR2J-L-GP

2N7002SPT

BAW56PT-U

GAIN2

AUD_HP2_JACK_R2

-1

AUD_SPK_ENABLE#

L41
1
2
BLM18BD601SN1D-GP

EC70
SC220P50V2JN-3GP

AUD_HP1_JD

AUD_HP2_JACK_R

AMP_MUTE#

2
AUD_HP2_JD#

AUD_HP1_JD

R204
100KR2J-1-GP

U74

D30
AUD_HP1_JD#

LOUT1
AUD_HP2_JACK_L2

1
2
BLM18BD601SN1D-GP

R207
100KR2J-1-GP

DY

GAIN1

L40
AUD_HP2_JACK_L

AUD_HP1_JD#

AUD_HP2_JD#

31 AUD_HP2_JD#

R203
33KR2J-3-GP

1
2

AUD_AMP_GAIN2

1
R504
100KR2J-1-GP

DY

R543
100KR2J-1-GP

5
7
8
9
10

SB
-1

LINE2 OUT

+5V_SPK_AMP

+5V_SPK_AMP

1
2
1

AUD_AMP_GAIN1

R502
100KR2J-1-GP

1
2

AUD_PVSS

U32

R210
100KR2J-1-GP

AUDIO-JK90-GP-U
22.10088.D81

This pin should be FLOAT.


Do NOT connect to GND.

+5V_SPK_AMP

R512
100KR2J-1-GP

MAX4411ETP-1-GP

EC69
SC220P50V2JN-3GP

GND

600ohm 100MHz
200mA 0.5ohm DC

Signal inverter for speaker shutdown

+VDDA +5V_SPK_AMP

AUD_HP1_JACK_R1

-1

SC2D2U6D3V3MX-1-GP

GAIN SETTING

2
6

L43
1
2
BLM18BD601SN1D-GP

AUD_HP1_JACK_R

4
6
8
12
16
20

LOUT2
AUD_HP1_JACK_L1

1
2
BLM18BD601SN1D-GP

EC71
SC220P50V2JN-3GP

OUTL
OUTR

AUD_HP1_JACK_L

SGND
PGND
17
2

5
C488
1
2

21

INL
INR
SVSS

13
15

L42

NC#4
NC#6
NC#8
NC#12
NC#16
NC#20
PVSS

C1P
C1N

SC2D2U6D3V3MX-1-GP
SC10U6D3V5KX-1GP
AUD_HP2_OUT_L2
2
AUD_HP2_OUT_R2
2
SC10U6D3V5KX-1GP

1
3

AUD_HP1_JD#

31 AUD_HP1_JD#

9
11

14
18
SHDNR#
SHDNL#

10
19
SVDD
PVDD

AMP2_C1P

LINE1 OUT

AUD_HP2_EN
AUD_HP2_JACK_L
AUD_HP2_JACK_R

U29

2
C505
1
2

AMP2_C1N

AUD_HP2_OUT_L
AUD_HP2_OUT_R

NOTE: For TPA6040A


stuff R213,C476,C477
No-stuff R197,R198,R213

C493
SC1U6D3V2KX-GP

31 AUD_HP2_OUT_L
31 AUD_HP2_OUT_R

7
MLX-CON6-10-GP
20.F0693.006

Main source : 20.F0693.006 Molex 53780-0670


2nd source : 20.F0711.006 Foxconn HS8806F

+3.3V_HP_AMP

C473
1
1
C472

SC

C496
1
2AUD_CPVSS
SC1U6D3V2KX-GP

+5V_SPK_AMP

EC24
SC1KP50V2KX-1GP

AUD_SPK_L2_R
AUD_SPK_L1_R
AUD_SPK_R2_R

EC25
SC1KP50V2KX-1GP

2 R232
2 R231
2 R230

DY

C476
SCD033U16V3KX-GP

C885
SC1U6D3V2KX-GP

1
2

C497
SC1U6D3V2KX-GP

DY

C509
SC1U6D3V2KX-GP

1
TPA6040A4-GP
R198
0R2J-2-GP

+VDDA

0R0402-PAD 1
0R0402-PAD 1
0R0402-PAD 1
EC26
SC1KP50V2KX-1GP
2
1

R213 2
R505 2
R197 2

AUD_BIAS
AUD_SET

AUD_LINE_OUT_R 31
AUD_LINE_OUT_L 31

AUD_SPK_L2
AUD_SPK_L1
AUD_SPK_R2

AUD_SPK_ENABLE#
AMP_MUTE#_R
AUD_HP1_EN
AMP_REGEN

23
25
22
4
29
24
1

2SCD033U16V3KX-GP
2SCD033U16V3KX-GP

6
5
4
3
2

C874
SC47P50V2JN-3GP

1
2

DY

GND
GND

C873
SC47P50V2JN-3GP

74.09789.013

C877 1
C878 1

SC1U6D3V2KX-GP

2nd source : MAX9789A

AUD_LIN_R
AUD_LIN_L

SPK1

C477
SCD033U16V3KX-GP

74.06040.013

2
3

Speaker

L18 2
1
0R0603-PAD

C490
1
2

Main source: TPA6040A

21
5

SB

AMP_C1P
AMP_C1N

PVSS

GAIN1
GAIN2

CPVSS

31
32

SPKR_EN#
REG_EN/ MUTE#
HP_EN
SPKR_INL-/ REGEN
VOUT
BIAS
SPKR_INR-/ SET

14

HP_INR
HP_INL

13

HPR
HPL

26
27

CPGND

15
16

10
12

C879
SCD1U10V2KX-4GP

C495
SC1U6D3V2KX-GP
2
1

2
17

30
VDD

HPVDD

SPKR_INR
SPKR_INL

28
33

C483

1
1

C1P
C1N

PGND
PGND

AUD_HP1_JACK_R
AUD_HP1_JACK_L
SC10U10V5KX-2GP
AUD_HP1_OUT_R1
2
AUD_HP1_OUT_L1
2
SC10U10V5KX-2GP
AUD_AMP_GAIN1
AUD_AMP_GAIN2

C489

OUTL+
OUTLOUTROUTR+

11

C486
SC1U6D3V2KX-GP

6
7
19
20

CPVDD

AUD_SPK_L1
AUD_SPK_L2
AUD_SPK_R2
AUD_SPK_R1

3D3V_S0

31 AUD_HP1_OUT_R
31 AUD_HP1_OUT_L

8
18

1
2

C475
SC1U6D3V2KX-GP

C506
SCD1U10V2KX-4GP

U31

PVDD
PVDD

1
2

Close to U31.9

C481
SC10U6D3V5KX-1GP

+5V_SPK_AMP
5V_S0

3D3V_S0

C499
SC10U6D3V5KX-1GP

3D3V_S0

+5V_SPK_AMP
L17 2
1
0R0603-PAD

+3.3V_HP_AMP

Close to U31.18

EC27
SC1KP50V2KX-1GP
2
1

Close to U31.8

Sheet
E

32

of

57

3D3V_S0

C359
SCD1U16V2ZY-2GP

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

PLACE CAP Close to Pin 4

3D3V_AUX_S5

WLAN/BT_BTN#
PANEL_BKEN

24 GB_RST#

SHBM PIPN83 Shared Host BIOS Memory.


HIGH:NO SHARED(internal resistor)
LOW:SHARED BIOS memory.
R389
BLUETOOTH_EN

SB
KBC_SCL1
KBC_SDA1
ECSWI#_KBC

35 KBC_SCL1
35 KBC_SDA1

VER1
0
1
0
1

7
3
29

75
83
110
111
112

LRESET#
LFRAME#
ECSCI#

106
107
GPI96
GPI97

101
105
GPI94/DA0
GPI95/DA1

97
98
99
100
GPI90/AD0
GPI91/AD1
GPI92/AD2
GPI93/AD3

GPO72
GPO76/SHBM
GPO82/HGPO00/TRIS#
GPO83/SOUT_CR/BADDR1
GPO84/HGPO01/BADDR0

3D3V_AUX_S5
RN47
KBC_XI
KBC_XO
EC53
SCD1U16V2ZY-2GP

DY

1
2
3
4

1 R393
2
0R0402-PAD

SB

R390 1

2 10KR2J-3-GP

R529
R533
R405
R391
R527

2
2
2
2
2

1
1
1
1
1

DY

POWER_SW#

10KR2J-3-GP
10KR2J-3-GP
100KR2J-1-GP
100KR2J-1-GP
100KR2J-1-GP

LCD_CBL_DET#
KB_DET#
INSTANT_BTN#
SNIFFER_PWR_SW#
WLAN/BT_BTN#
LID_CLOSE#

2 10KR2J-3-GP

10KR2J-3-GP
10KR2J-3-GP

3D3V_AUX_S5

ECRST#

1
2

35,45 PURE_HW_SHUTDOWN#

4
3

ECRST#_C

SRN10KJ-5-GP

CHARGE_LED#:for Battery charge LED 2

Q43
CH3906PT-GP

RN44

DC_BATFULL#:for Battery charge LED 1

DY

DY

KBC_PWRBTN#:from power button


BAT_IN#:from Battery Conn

5,8,20,45 H_THERMTRIP#

1
R386

C781
SC1U10V3KX-3GP

PCLK_KBC

1
R525

S5_ENABLE

ADIA:to Charger
ACDC_ID:from Adapter Conn

Q14
CH3904PT-GP

GFX_CORE_ON

2
2
1

KBC_SCL1
KBC_SDA1
BAT_SDA
BAT_SCL

8
7
6
5

SRN10KJ-6-GP

3D3V_AUX_S5

WLAN_TEST:for WKS test WLAN LED


D29

C789
SC4D7P50V2CN-1GP

21

ECSCI#

21

ECSMI#

2ECSMI#_KBC

3ECSWI#_KBC

21

DY

ECSWI#

AD_OFF:enable AC adapter power source


1ECSCI#_KBC

WLAN/BT_BTN#:from Wlan on/off button

<Core Design>

GMCH_BL_ON:Sense The Backlight On/Off Status from VGA Chip

Wistron Corporation

WIRELESS_EN:Disable/Enable Wireless Module

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

BLUETOOTH_EN:Disable/Enable Bluetooth
USB_PWR_EN#:to on/off USB power switch

Title

CH731UPT-GP

SC

KBC_Winbond WPC8763L

AC_IN#:From Charge
Size
C

X2 CL=12.5pF0.2pF
Freq. Tolerance:20ppm
A

KA20GATE
KBRCIN#

4
3

SRN10KJ-5-GP

1
CPU_THERMTRIP#

R400
0R2J-2-GP

SB

E51_RxD

2 10KR2J-3-GP

1
2

WPC8763LDG-1-GP

R168
10KR2J-3-GP
R167
10KR2J-3-GP

X2
RESO-32D768KHZ-GP
2

DY
RN52

C783
SCD1U16V2ZY-2GP
KBC_VREF

KBC CLK EMI

10MR2J-L-GP

For Battery, Charger


and Inverter

3D3V_AUX_S5

SC

TPDATA 36
TPCLK 36

R406 1

KBRCIN#

1D05V_S0

KBC_XI

C350
SC10P50V2JN-4GP

33KR2J-3-GP
1
2
1KBC_XO_R
2

PSDAT1
PSCLK1

SPIDI 30
SPIDO 30
SPICLK 30
SPICS# 30

R397 1

PCLK_KBC_RC

10MR2J-L-GP
R158

C351
SC10P50V2JN-4GP

126
127
128
1

20 KA20GATE
21,24 INT_SERIRQ
20 KBRCIN#
4 PCLK_KBC

R157
2KBC_XI_R
1

BAT_SDA 18,37,38
BAT_SCL 18,37,38

71
72

DY

KBC DEBUG POINT

VER0
0
0
1
1

SA
SB
SC
-1

KBC_XO

R156

69
70

10KR2J-3-GP

TP122 TPAD28
TP118 TPAD28

MB VERSION ID

WPC8763L XTAL

SDA1
SCL1

TPAD28
TPAD28
TPAD28
TPAD28

KA20GATE

-1

E51_RxD

2
1
2

DY

86
87
92
90

36

2
TP126
TP124
TP125
TP121

ECSMI#_KBC

1
2
1

R396
10KR2J-3-GP

R399
10KR2J-3-GP

DY

MB VERSION ID
R395
10KR2J-3-GP

F_SDI
F_SDO
F_SCK
F_CS0#

36

KCOL[0..16]

R379

KBC_BEEP 31

32 AMP_MUTE#
29 E51_RxD

3D3V_S0

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15

GPIO64

TPAD28 TP127

21,27,43,44 PM_SLP_S4#
30 SNIFFER_YELLOW
34 INST_ON_LED
28 WIFI_RF_EN

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35

KROW[0..7]

3D3V_S0

VBAT

VCORF

KCOL17
KCOL16

TPAD28 TP119
TPAD28 TP123

For Thermal and


Capacity button module

PCB_VER0
PCB_VER1

33
34
67
68
123
9
81
73
74
82
84
91
113

4K7R2J-2-GP

KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT

SC

DY

SB

RSV_GPO47

U17

AGND

-1 SC

CHARGE_LED

PLT_RST1# 8,19,23,27,28,29,47

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

103

R408
4K7R2J-2-GP

NUM_LED
CAP_LED

1
0R2J-2-GP

C788
SC470P50V2KX-3GP

54
55
56
57
58
59
60
61

GND
GND
GND
GND
GND
GND

E51_TxD

R398
10KR2J-3-GP

R392
2

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

5
18
45
78
89
116

DY PIN 111

R407
10KR2J-3-GP

32KX2
32KX1/32KCLKIN

3D3V_S0
2

79
77

-1

ACDC_ID

GPIO01
GPIO03
GPIO04
GPIO05
GPIO06/HGPIO06
GPIO07/HGPIO07
GPIO10/HGPIO00/LPCPD#
GPIO11/HGPIO02/CLKRUN#
GPIO12/PSDAT3
GPIO13/B_PWM0
GPIO14/HGPIO04/TB1
GPIO16/HGPIO04
GPIO20/TA2
GPIO21/A_PWM1
GPIO23
GPIO24/HGPIO01
GPIO26/PSCLK2
GPIO27/PSDAT2
GPIO25/PSCLK3
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO36
GPIO40
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45
GPIO46/TRST#
GPO47/JEN0#
GPIO50/TDO
GPIO51
GPIO52/RDY#
GPIO53
GPIO55/CLKOUT
GPIO56/TA1

LCLK
VREF
VCORF
A_PWM0
RESERVED

10K external pull-down


resistor on BADDR1: Core defined

18 LCD_CBL_DET#
38
AC_IN#
30 LID_CLOSE#
34 INSTANT_BTN#
21,24 PM_CLKRUN#
37
BAT_IN#
18 BRIGHTNESS
30
CIRRX
36 BATFULL_LED
37 ACDC_ID
36 PWRLED
21 PM_PWRBTN#
34 SCRLK_LED
29 WWAN_EN
23 HDDC_EN
53 GFX_CORE_ON
34 NUM_LED
34 CAP_LED
34,36 LED_MASK#
30 SNIFFER_BLUE
18 LCD_TST
45 S5_ENABLE
21 RSMRST#_KBC
37 AD_OFF
26 PM_LAN_ENABLE
36 CHARGE_LED
30 CAPA_INT#
34 WLAN_LED_TEST
TPAD28 TP301
37 PSID_DISABLE#
30 WLAN/BT_BTN#
18 LCDVDD_TST_EN
50 PANEL_BKEN

64
95
96
108
93
94
124
8
13
62
63
114
117
118
119
6
10
11
12
109
120
65
66
14
15
16
17
20
21
22
23
24
25
26
27
28
30
31

2
104
44
32
80

BADDR1-0 (PIN 111, 112) I/O Base Address.

CPU_THERMTRIP#
LCD_CBL_DET#

GA20
SERIRQ
KBRST#

21,39,42,44,45,53 PM_SLP_S3#
34 POWER_SW#

30
1

LPC_LFRAME# 20

ECSCI#_KBC

121
125
122

TRIS#(Pin 110) TRI-STATE

SNIFFER_PWR_SW#

PLT_RST1#_1

VDD

Keyboard Scan
Keyboard Scan
JTAG signals

Forces the device to float all its output and I/O pins,if an
external 10 K pull-down resistor is conected.

3D3V_S0

LAD0
LAD1
LAD2
LAD3

10K PD

KBC_VCC

102

NO PD

GPIO Port
JTAG signals
GPIO Port

2 R153
1
0R0603-PAD

46
19
115
76
88

NO PD

C348
SC10U10V5ZY-1GP

VCC
VCC
VCC
VCC
VCC

NO PD RES
10K PD

Functionality of Pins
47, 48, 50, 51, 52

SB

PWR_BTN_LED 34
BLUETOOTH_EN 29,30
USB_SIDE_EN# 34,37
E51_TxD 29
TP131 TPAD28

E51_TxD

85

Functionality of Pins
17, 20, 21, 23 25, 27

VBAT

GPIO57/HGPIO03/KBSOUT17
GPIO60/KBSOUT16
GPIO61/SCL2
GPIO62/SDA2
GPIO63/PWUREQ#
GPIO64/SMI#
GPIO66/SWD
GPIO70
GPIO71
GPIO75
GPIO77
GPIO81
GPIO87/SIN_CR

JENK
(Pin 53)

PCB_VER0
PCB_VER1

THERMTRIP_VGA# 50

JEN0
(Pin 24)

WPC8763L STRAP PIN

TP132 TPAD28
KB_DET# 36

ECRST#

2 R152
1
0R0603-PAD

AD_IA 38

MUTE_BTN#
KB_DET#

1
2

C362
SC10U10V5ZY-1GP
2
1

1
2

PLACE CAP NEAR PIN104

20 LPC_LAD[0..3]

AVCC

PLACE CAP NEAR PIN46,19,115,76,88

C793
SCD1U16V2ZY-2GP

C369
SC1U10V3ZY-6GP

C795
SCD1U16V2ZY-2GP

C787
SCD1U16V2ZY-2GP
2
1

KBC_VREF

VCC_POR#

PLACE CAP NEAR PIN80 AND PIN102

C784
SCD1U16V2ZY-2GP
2
1

1
2

1
2

C785
SCD1U16V2ZY-2GP
2
1

KBC_VCC
C786
SCD1U16V2ZY-2GP

C794
SCD1U16V2ZY-2GP

C368
SC1U10V3ZY-6GP

VBAT

Date:
B

Document Number

Rev

-1

Hawke-Intel
Sunday, September 09, 2007

Sheet
E

33

of

57

SCRLK LED
WLAN LED
Q41

R2
PDTC124EU-1-GP

3LED_WLAN_OUT_R#B

E
1

33 SCRLK_LED

R1

R1

R2

LED_WLAN_OUT_B

330R2J-3-GP

CAPS LED

BAW56PT-U
28 WLAN_LED#
33

CAP_LED

R26
CAP_LED#

R1

R1

R2
PDTC124EU-1-GP

To LED Board

1 LED_CAP#

330R2J-3-GP

CN1

PWR_BTN_LED#

POWER_SW_LED_B#

NUM LED
B

33 NUM_LED

13

R243

Q29

330R2J-3-GP

NUM_LED#

R1

R2
PDTC124EU-1-GP

LED_NUM#

330R2J-3-GP

C545
SCD1U16V2ZY-2GP

R1

R247

330R2J-3-GP

INSTANT_BTN#

C539
SC1U6D3V2KX-GP

10KR2J-3-GP

33 INSTANT_BTN#

LED_NUM#
BT_LED_B
LED_WLAN_OUT_B
M_LED_BK_B#
INSTANT_POWER_SW#

Bluetooth LED

2
3
4
5
6
7
8
9
10
11
12
14

DY

R2
PDTC124EU-1-GP

M_LED_BK_B#

INST_ON_LED#

POWER_SW_LED_B#
LED_SCRLK#
LED_CAP#

5V_S5

R224

Q28

33 POWER_SW#

Instant Power Button LED


33 INST_ON_LED

WiFi

9 A

LED_SCRLK#

330R2J-3-GP

R225

Q27
33 PWR_BTN_LED

Q2

R2
PDTC124EU-1-GP

Power Button LED

SCRLK_LED#

R1

R2
PDTC124EU-1-GP

R246
LED_WAN_OUT_R 2

DDTA144VCA-7-F-GP

33 WLAN_LED_TEST

Q31

D28
LED_WLAN#

R12

Q1

5V_S0

MLX-CON12-11GP
20.K0227.012

5V_S0

R376
10KR2J-3-GP

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

R223

DY 2
5V_S0

0R2J-2-GP
Q30

BAW56PT-U

BT_LED# B

Q26
2N7002PT-U

R1

BT_LED#1

30 BT_ACT_K#

R2

D26

29 BT_ACT_WPAN#

E
C

R245
BT_LED_R

DDTA144VCA-7-F-GP

BT_LED_B

TP237
TP238
TP239
TP240
TP242
TP241
TP243
TP244
TP245
TP246

1
1
1
1
1
1
1
1
1
1

330R2J-3-GP

5V_S5
POWER_SW#
POWER_SW_LED_B#
LED_SCRLK#
LED_CAP#
LED_NUM#
BT_LED_B
LED_WLAN_OUT_B
M_LED_BK_B#
INSTANT_BTN#

C11
C12
C542
C553
C554
C541

DY2

DY2

DY2

DY2

DY2

DY2

LED_SCRLK#
SC33P50V2JN-3GP
LED_CAP#
SC33P50V2JN-3GP

LED_NUM#
SC33P50V2JN-3GP
BT_LED_B
SC33P50V2JN-3GP
LED_WLAN_OUT_B
SC33P50V2JN-3GP
INSTANT_BTN#
SC33P50V2JN-3GP

For EMI

For AFTE, place them on the some side.

33,36 LED_MASK#

USB POWER

To Right I/O Board

F1

DY

FUSE-2A8V-3GP
5V_USB2_S5
U45
5V_S5

5V_USB2_S5

33,37 USB_SIDE_EN#

GND
IN
EN1#
EN2#

OC1#
OUT1
OUT2
OC2#

8
7
6
5

USB_OC#2 21

100 mil

BATT1.1

1
2
3
4

C571
SC1U10V3KX-3GP

DY

C574
SC10U6D3V5KX-1GP

TPS2062D-GP

-1

RIO1

TC9
ST100U6D3VBM-13GP

SIM Card

DY
SB
-1

29
29

UIM_PWR
UIM_VPP

29 UIM_RESET
29 UIM_CLK
29 UIM_DATA

S-Vedio

UIM_PWR
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA

50

M_CRMA

M_CRMA

50

M_COMP

M_COMP

50

M_LUMA

M_LUMA

3
5
7
9
11
13
15
17
19
21
23
25
27

4
6
8
10
12
14
16
18
20
22
24
26
28

USB_PP2 21
USB_PN2 21

3D3V_S0

MLX-CONN28A-3-GP
20.F0157.028

TP28-75-GP
TP28-75-GP
TP28-75-GP

TP256
TP257
TP258

1
1
1

M_CRMA
M_COMP
M_LUMA

<Core Design>

M_CRMA
M_COMP
M_LUMA

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

For AFTE, place them on the some side.

Wistron Corporation
R260
150R2F-1-GP

UIM_PWR
UIM_VPP
UIM_RESET
UIM_CLK
UIM_DATA

1
1
1
1
1

TP251
TP253
TP252
TP254
TP255

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

Place these resistors


close to connector

R261
150R2F-1-GP

5V_USB2_S5
USB_PP2
USB_PN2

BATT1.1

1
1
1

TP248
TP250
TP249

TP247

TP28-75-GP
TP28-75-GP
TP28-75-GP

R262
150R2F-1-GP

TP28-75-GP

Right I/O/ Power Dash

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

34

-1
of

57

3D3V_AUX_S5

FAN1_VCC
TP28-75-GP
TP28-75-GP

FAN1_FG1
FAN1_VCC

1
1

TP260
TP259

C68
SC10U10V5ZY-1GP

For AFTE, place them on the some side.

5V_S0

D10
BAS16-1-GP

1
2

C67
SCD1U16V2ZY-2GP
PURE_HW_SHUTDOWN#

*Layout* 15 mil

R368
100KR2J-1-GP

SB

RN42

4
3

1
2

R374
10KR2J-3-GP

G792_SCL
G792_SDA

FAN1

3D3V_S0

5
3
2

FAN1_FG1
FAN1_VCC
C766
SC1KP50V2KX-1GP

1
4

*Layout* 15 mil

SRN10KJ-5-GP

AMP-CON3-8-GP
20.D0201.103

Place near the FAN1


5V_S0

U60

*Layout* 30 mil

C769
SC4D7U10V5ZY-3GP

1
2

1
1

R140
10KR2F-2-GP

C332
SCD1U16V2ZY-2GP

7
9
11

DXP1
DXP2
DXP3

21 THRM#
33,45 PURE_HW_SHUTDOWN#

DY

2 0R2J-2-GP THRM#_R

15
13
3
2

V_DEGREE

ALERT#
THERM#
THERM_SET
RESET#

1
4
14
16
18
19

DGND
DGND

5
17

SGND1
SGND2
SGND3

8
10
12

G792_CLK 21

G792_SDA
G792_SCL

H_THERMDA 5
C755
SC2200P50V2KX-2GP

H_THERMDC 5

G792_DXN2
G792_DXP2

Place near the GMCH.


1

R145
100KR2F-L1-GP

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

FAN1
FG1
CLK
SDA
SCL
NC#19

VCC
DVCC

R141

Setting T8 as
100 Degree

6
20

*Layout* 30 mil

C327
SC1U10V3ZY-6GP

200R2F-L-GP

5V_G792_S0

B
C738
SC2200P50V2KX-2GP

Q37
CH3904PT-GP

G792SFUF-GP

R139

5V_S0

SB
Main source : 20.D0201.103 Tyco 1734260-3
2nd source : 71.00875.A03 Foxconn HS8103E

R143

2
4K7R2J-2-GP

G22
GAP-CLOSE

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

G792_RESET#

8,21 PM_PWROK

R144
10KR2J-3-GP

VGA_THERMDA 50
C740
SC2200P50V2KX-2GP
VGA_THERMDC 50

R362

CAP_SDA 30

100R2J-2-GP

U12
G792_SDA
3D3V_S0
33 KBC_SCL1

KBC_SDA1 33
3D3V_S0
G792_SCL
R363

2N7002SPT

CAP_SCL 30

100R2J-2-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Fan Controllor G792


Size
A3

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

35

-1
of

57

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

TP279
TP278
TP280
TP282
TP281
TP283
TP284
TP285
TP300

1
1
1
1
1
1
1
1
1

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KB_DET#

TouchPad Connector

5V_S0

5V_S0

KCOL10
KCOL11
KCOL9
KCOL14
KCOL13
KCOL15
KCOL16
KCOL12
KCOL0
KCOL2
KCOL1
KCOL3
KCOL8
KCOL6
KCOL7
KCOL4
KCOL5
KROW0
KROW3
KROW1
KROW5
KROW2
KROW4
KROW6
KROW7
KB_DET#

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

TP261
TP263
TP262
TP264
TP266
TP265
TP268
TP267
TP269
TP270
TP271
TP272
TP273
TP274
TP275
TP276
TP277

C278
SCD1U16V2ZY-2GP

DY

RN22
SRN10KJ-5-GP

TPAD1

5
1
2
3
4
6

33 TPCLK
33 TPDATA

TP28-75-GP
TP28-75-GP
TP28-75-GP

For AFTE, place them on the some side.

TP286
TP287
TP288

5V_S0
TPCLK
TPDATA

1
1
1

For AFTE, place them on the some side.

KB_DET# 33

C271
SC1U10V3ZY-6GP

29

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

33

KB1

1
2

33

KCOL[0..16]

Internal KeyBoard Connector

4
3

KROW[0..7]

C275
MLVG0402220NV05BP-GP

C276
MLVG0402220NV05BP-GP
2
1
2
1

FOX-CON4-12-GP
20.K0179.004

SC

28
5V_S5

Power & Suspend LED

LED2

C314

BAT2_LED_AMBER#

2
R218

AMBER

1
330R2J-3-GP

BAT2_LED_AMBER#_R

BAT1_LED_BLUE#_R

CHDTC144EUPT-GP
Q22
IN

SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2

SC
-1

5V_S5
LED1

C315

1
2

1
2

C303
SC220P50V2JN-3GP

C301

C299

C300

C316

1
C298

C297

Everylight:83.01221.P70
Lite On
:83.00110.F70

1
LED-BO-5-GP-U1

R2
GND

SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2

SB

Q24
33 BATFULL_LED
KROW7
KROW6
KROW5
KROW4

C310

C304

C319

C318

C302

C317

SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2

C323

C305

C320

SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2

C321

C322

C309

C308

SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
C307

Q25
CH3904PT-GP

R1

SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2
SC220P50V2JN-3GP
2

1BREATH_PWRLED_B# K
330R2J-3-GP
LED-B-67-GP-U2

Battery LED

BAT1_LED_BLUE#
OUT

C324

C514
SC1U6D3V2KX-GP

33 CHARGE_LED

BREATH_PWRLED_R B
1
10KR2J-3-GP

R219

GND

KCOL15
KCOL14
KCOL13
KCOL12

33 PWRLED

IN

KCOL16

R2

KCOL7
KCOL6
KCOL5
KCOL4

KROW3
KROW2
KROW1
KROW0

BREATH_PWRLED# 2
R221

R1

KCOL11
KCOL10
KCOL9
KCOL8

OUT

KCOL3
KCOL2
KCOL1
KCOL0

C306

SB
2

NC

JAE-CON27-GP
20.K0291.027

2
R217

BLUE

1
330R2J-3-GP

Everylight:83.01220.I70
Lite On
:83.00326.A70

CHDTC144EUPT-GP

for EMI
HDD LED
ACTIVE SIGNAL

3D3V_S0

BT_ACT_WPAN#

(from Mini)

BT_ACT_K#

(from BT)

NUM LED

NUM_LED

(from KBC)

SCRLK LED

SCRLK_LED

(from KBC)

CAPS LED

CAP_LED

(from KBC)

Power & Suspend LED

PWRLED

(from KBC)

HDD LED

SATA_LED#

(from ICH)

20 SATA_LED#

Q23

HDD_LED# B

E
C

HDD_LED

2
R222

HDD_LED_B
1
330R2J-3-GP

LED3

DDTA144VCA-7-F-GP

K
LED-B-67-GP-U2

R535

Everylight:83.01221.P70
Lite On
:83.00110.F71

5V_S0

NC

(from Mini)

Bluetooth LED

(from KBC)

WLAN_LED#

LED Board

WLAN_LED_TEST

Q48
2N7002PT-U

WLAN LED

LED_MASK# 33,34
R534
10KR2J-3-GP

INST_ON_LED

R1

PWR_BTN_LED

Instant Power Button LED

Power Button LED

R2

LED NAME

2
0R2J-2-GP

DY

SB
SC

<Core Design>

Wistron Corporation

Main Board

Battery LED

BATFULL_LED
CHARGE_LED

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

(from KBC)

Size
A3

KeyBoard/Touchpad

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

36

-1
of

57

USB POWER
F3

DY

FUSE-2A8V-3GP
5V_USB0_S5
U51

5V_S5

R264
100KR2J-1-GP

1
3D3V_S5

C32
SCD01U25V2KX-3GP

Place near CN5

5V_S5

DY

-1

2
1
R270
10KR2J-3-GP
Q33
CH3904PT-GP

B
2

-1

D25
BAV99-7-F-GP

PSID_DISABLE# 33

R268
2K2R2J-2-GP

Q32
2N7002PT-U

33,34 USB_SIDE_EN#

AD+_JK
D9
BAV99-7-F-GP

TPS2062D-GP

R266
15KR2J-1-GP

USB_OC#1 21

Reserved for EMI

100 mil
1

USB_OC#0 21

8
7
6
5

OC1#
OUT1
OUT2
OC2#

C585
SC1U10V3KX-3GP

GND
IN
EN1#
EN2#

TC10
ST100U6D3VBM-13GP

DY

1
2
3
4

C603
SC10U6D3V5KX-1GP

5V_S5

ACDC_ID 33

R267

33R2J-2-GP

To Left I/O Board


(Adapter In/ USB x 2)

R265

CN5

21 USB_PP1
21 USB_PN1

AD+_JK

DY

For EMI

This cap should be used


only as last resort for
EMI suppression.

TP292
TP291
TP294
TP293
TP295

1
1

AD+_JK
JACK_PSID_2

1
1
1
1
1

5V_USB0_S5
USB_PP0
USB_PN0
USB_PP1
USB_PN1

D
D
D
D

8
7
6
5

R263
240KR3-GP

P2003EVG-GP

C583
SCD01U25V2KX-3GP

MLX-CONN28A-1-GP
20.F1089.028

Id=17A
Qg=100~150nC
Rdson=5.4~6.5mohm

R269

R1

TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

TP289
TP290

C575
SC1U25V5KX-1GP

Q3
R2

TP28-75-GP
TP28-75-GP

C569
SCD1U25V3KX-GP

U46
S
S
S
G

DY

C578
SCD1U25V3KX-GP

AD+

1
2
3
4

DY

C28
SCD1U25V3KX-GP

AD+_JK

21 USB_PP0
21 USB_PN0

4
6
8
10
12
14
16
18
20
22
24
26
28

JACK_PSID_2

3
5
7
9
11
13
15
17
19
21
23
25
27

5V_USB0_S5

DY

33R2J-2-GP

47KR3J-L-GP

E
C

3D3V_S5

PDTA124EU-1-GP
Q4

DY

3 OUT

R1

1
IN

33 AD_OFF

2
PBAT_SMBCLK1

2 GND

R2

DDTC124EUA-7F-GP

For AFTE, place them on the some side.

D2
BAV99-7-F-GP

DY

2
PBAT_SMBDAT1

1
D1
BAV99-7-F-GP
BT+

Batt Connecter
R2
1
2
0R0603-PAD

CN4

3
1

BATT_SENSE 38

D21
BAV99-7-F-GP

2 100R2J-2-GP
2 100R2J-2-GP
2 100R2J-2-GP
1
R244

TP96
C6
SCD1U25V3KX-GP

PBAT_ALARM#

R6
1
R5
1
R241 1

2
100KR2J-1-GP

BAT_SCL 18,33,38
BAT_SDA 18,33,38
BAT_IN# 33
3D3V_S5

2
PBAT_ALARM#

3
1

C3
SC2200P50V2KX-2GP

D22
BAV99-7-F-GP

PBAT_SMBCLK1
PBAT_SMBDAT1
PBAT_PRES1#

1
2
3
4
5
6
7
8
9
10
11

BATT1+
BATT2+
CLK_SMB
DAT_SMB
BATT_PRS#
SYS_PRES#
BAT_ALERT
GND1
GND2
GND
GND

2
BAT_IN#

SYN-CON9-1-GP-U1
20.80590.009
4

Main source : 20.80590.009


2nd source : 20.80626.009

Suyin 200275MR009G548ZL
Foxconn BP02093-P5351-7F

<Core Design>

Wistron Corporation
TP28-75-GP
TP28-75-GP
TP28-75-GP
TP28-75-GP

TP296
TP297
TP298
TP299

BT+
PBAT_SMBCLK1
PBAT_SMBDAT1
PBAT_PRES1#

1
1
1
1

PBAT_SMBCLK1
PBAT_SMBDAT1
PBAT_PRES1#

1
C5
1
C4
1
C526

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

DY2SC33P50V2JN-3GP
DY2SC33P50V2JN-3GP
DY2SC33P50V2JN-3GP

Title

AD/BATT CONN

For EMI
Size
A3

For AFTE, place them on the some side.

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

37

-1
of

57

MAX8731_LDO

R273
10KR2F-2-GP

ACAV_IN
1

R274
15K4R2F-GP

NEAR

5V_AUX_S5

R271
100KR2J-1-GP

Adaptor In Soft-Start Circuit

AC_IN#

Trace 250mil

AD+_TO_SYS

1
2
3
4

1
2
R52
D01R2512F-4-GP

AD+

1
20

1
1

C562
SCD1U25V3KX-GP

C568
SC10U25V6KX-1GP
2
1

1
5
6
7
8

C561
SC10U25V6KX-1GP
2
1

1
1

4
3
2
1

MAX8731_DHI
R256
1R3F-GP
1
2
MAX8731_LX 1
C14
2
SCD1U25V3KX-GP
1
2
C555
SC220P50V2JN-3GP
MAX8731_DLO

MAX8731_LX1

Layout Trace 300mil

1
2
IND-5D8UH-GP
68.5R850.101

1
2
R16
D01R2512F-4-GP

18

MAX8731_CSIP

CSIN

17

MAX8731_CSIN

U42
FDS8884-GP

SC

4
3
2
1

19

CSIP

S
S
S
G

33 AD_IA

PGND

BATSEL

D
D
D
D

14
CHG_AGND

BT+

CHG_PWR
L20

INP

C7
SC10U25V6KX-1GP

DLO

2nd:SI4800BDY(84.04800.D37)

23

SC

C530
SC10U25V0KX-3GP
2
1

LX
SDA

1
2
C544
SC1U10V3KX-3GP

DY

U44
FDS8884-GP

BAT_SDA

18,33,37 BAT_SDA

24

DHI
SCL

CHG_AGND

10

R14
0R3-0-U-GP
MAX8731_BST 1
2MAX8731_BST1 1
MAX8731_LDO
D23
1SS400PT

BAT_SCL

25
21

ACOK

CHG_AGND
18,33,37 BAT_SCL

BST
LDO

MAX8731_VCC

G1
GAP-CLOSE-PWR-3-GP

13

CSSN
VCC

33R2J-2-GP

VDD

C515
SCD1U25V3KX-GP
ACAV_IN

28
27
26

R255

5
6
7
8

11

CSSP

C557
SC1U10V3KX-3GP

ACIN

CHG_AGND

DCIN

NEAR KBC POWER

1
2

C546
SCD01U50V2ZY-1GP

1
2
CHG_AGND

NEAR INPUT AD+

S
S
S
G

2nd:A04433(84.04433.A37)

C558
SCD1U25V3KX-GP

D
D
D
D

R15
49K9R2F-L-GP

22

MAX8731_ACIN

ASNS

U36
MAX8731_DCIN

CHG_AGNDCHG_AGND

3D3V_AUX_S5

BT+

8
7
6
5

2
C549
SC1U25V5KX-1GP

R17
365KR3F-GP

2
0R2J-2-GP

1
R254

MAX8731_CSSN

C559
SCD1U25V3KX-GP

1
G

AD+

MAX8731_CSSP

G
ACAV_IN

2
100KR2J-1-GP

D
D
D
D

Q6
2N7002PT-U

DCIN_GATE2 1
2
49K9R2F-L-GP
R277

U37
S
S
S
G

P2003EVG-GP

R248
470KR2J-2-GP

1
R278

DCIN_GATE1

Q7
2N7002PT-U

2
1

DC_IN_D
D

G21
GAP-CLOSE-PWR

2nd:A04433(84.04433.A37)

1
2
3
4

P2003EVG-GP

R275
10KR2J-3-GP

ACAV_IN

Layout Trace 300mil

DCBATOUT

Layout Trace 300mil

C531
SC10U25V0KX-3GP

Q5
2N7002PT-U

U50
S
S
S
G

D
D
D
D

8
7
6
5

G2
GAP-CLOSE-PWR-3-GP

AD+ Layout

C582
SC1U10V3KX-3GP

G20
GAP-CLOSE-PWR

AC_IN#

33

SB

FBSB

16

FBSA

15

BAT_SENSE 1
R233

GND

CCV
CCI
CCS
REF
DAC
GND
MAX8731AETI-GP
74.08731.A73

29

C518
SCD1U16V2ZY-2GP

C536
SC1U10V3KX-3GP

1
2

C534
SCD01U50V2ZY-1GP

MAX8731_CCV
6
MAX8731_CCI
5
MAX8731_CCS
4
MAX8731_REF
3
MAX8731_DAC 7
12

2
4K7R2F-GP

C527
SCD01U50V2ZY-1GP

1MAX8731_CCV1
2

1
R237

C524
SCD01U50V2ZY-1GP

10KR2F-2-GP

R226

C517
SCD1U16V2ZY-2GP

2nd:SI4800BDY(84.04800.D37)

2 BATT_SENSE
100R2J-2-GP

BATT_SENSE 37
<Core Design>

C525
SCD01U50V2ZY-1GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

G39

Title

GAP-CLOSE-PWR

CHARGER MAX8731

CHG_AGND
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

38

of

57

DCBATOUT_51120

1
2

2
1

2
1

CPUCORE_ON 40,42,43,44,49,53

+VCC_TPS51120

1
R484

2
DY0R2J-2-GP

51120_GND

51120_GND

SKIPSEL

AUTOSKIP

COMP
4

TONSEL
VFB1
VFB2
EN1,EN2
EN3,EN5

N/A
380k/CH1
580k/CH2
N/A

280k/CH1
430k/CH2
not use

N/A

not use

Switcher OFF
LDO OFF

not use
not use

FLOAT
PWM
CURRENT
MODE
220k/CH1
330k/CH2
ADJ.
ADJ.
Swithchr ON
LDO ON

1
2

1
1

C428
SC2200P50V2KX-2GP

1
2

C828
SCD1U10V2KX-4GP

O/P cap: 220U6.3V 6TPE220MAP 25mOhm 2.4Arms

51120_VFB2

Choke :
Cyntec 6.5mm*6.9mm*3.0mm
PCMC063T-3R3MN
Idc=6A , Isat=13.5A
DCR=28~30mohm

R474
13K3R2F-L1-GP

Vout=1V*(R1+R2)/R2
VREF2
AUTOSKIP
/FAULTS
OFF
N/A

R473
30K9R2F-GP

LS:
Rds(on)=15mohm ~ 18mohm
Qg= 12nC
Id=9.1A
Vgs(th)=1.5V,1.8V,2.4V
Rg= 2.4 ~ 3.6ohm

C421
51120_+3VOUT
SC330P50V2KX-3GP

G101
GAP-CLOSE-PWR

GND

C832
SCD1U25V3KX-GP

1
2

2
0R2J-2-GP

DY

-1

DY

51120_DRVL2

TC25
ST220U6D3VDM-20GP

Close to Output Cap


2

R493
1

21,33,42,44,45,53 PM_SLP_S3#

4
3
2
1

SC

51120_GND

Q44
2N7002PT-U

2
0R2J-2-GP

1
R485

DY

C854
SC18P50V2JN-1-GP

DY

IND-3D3UH-57GP
R188
2D2R5J-1-GP

G100
GAP-CLOSE-PWR-3-GP

+VCC_TPS51120

U68
AO4712-GP

DY

2
0R2J-2-GP

DY

1
R489

51120_VREF2
2
0R2J-2-GP

S
S
S
G

R483
200KR2F-L-GP

DY

1
R491

L39
1

D
D
D
D

DY

+3.3V_ALWP

51120_DRVH2
51120_LL2
1

DY

Q46
NDS0610-NL-GP
D
1
2
R494
0R2J-2-GP

1
2
G93
GAP-CLOSE-PWR
1
2
G90
GAP-CLOSE-PWR
1
2
G91
GAP-CLOSE-PWR
1
2
G92
GAP-CLOSE-PWR
1
2
G95
GAP-CLOSE-PWR
1
2
G94
GAP-CLOSE-PWR

DY

4
3
2
1
+VCC_TPS51120

5
6
7
8

SB

2
SC1KP50V2KX-1GP

3D3V_S5

G
S
S
S

2
DY0R2J-2-GP

5
6
7
8
51120_VREF2
2
0R2J-2-GP

Choke :
Cyntec 6.5mm*6.9mm*3.0mm
PCMC063T-3R3MN
Idc=6A , Isat=13.5A
DCR=28~30mohm

DCBATOUT_51120

U67
SI4800BDY-T1

1
R488

51120_GND

HS:
Rds(on)=23mohm ~ 30mohm
Qg= 8.7 ~ 13nC
Id=6.5A @25degree C
Vgs(th)=0.8V,1.8V
Rg= 0.5 , 1.4 , 2.2ohm

51120_TONSEL1
R490

Iout = 5A
OCP < 10A
+3.3V_ALWP

SC

O/P cap: 220U6.3V 6TPE220MAP 25mOhm 2.4Arms

Close to Output Cap

C833
SC10U25V6KX-1GP
2
1

51120_DRVH1
51120_DRVH2

-1

R478

C834
SC10U25V6KX-1GP
2
1

27
14

C375
SCD1U10V2KX-4GP

2
1

2
1
2

1
DRVH1
DRVH2

C862
SC18P50V2JN-1-GP

G31
GAP-CLOSE-PWR-3-GP

1
5
6
7
8
4
3
2
1

51120_SKIPSEL

51120_CS1
1
13K3R2F-L1-GP
51120_CS2
1
11K8R2F-GP

51120_GND

25
16

TC24
ST220U6D3VDM-20GP

7K5R2F-1-GP

1 R500
2
0R0402-PAD

32
31

23
18

24
17
5
33

51120_GND

1
C855

DRVL1
DRVL2

51120_DRVL1
51120_DRVL2

R499
100KR2J-1-GP

51120_GND

TI suggest R<=15Kohm

7
2

VREF2

DY DY

51120_PGOOD1

30
11

PGOOD1
PGOOD2

2
SC1KP50V2KX-1GP

COMP2
COMP1

V5FILT
VIN

28
13

20
22

VBST1
VBST2

LL2
LL1

VO1
VO2

C859
SC1KP50V2KX-1GP

R509
100KR2J-1-GP
51120_LL2
51120_LL1

15
26

R476
30KR2F-GP

D
D
D
D

C406
SC330P50V2KX-3GP

51120_VFB1

SKIPSEL
TONSEL

1
8

51120_VREF2

DY

DY

CS1
CS2

DY

51120_+5VOUT
51120_+3VOUT

R182
2D2R5J-1-GP

51120_DRVL1

VFB2
VFB1

DY

6
3

2 0R2J-2-GP 51120_VFB2
2 0R2J-2-GP 51120_VFB1

DY
DY

1
1

EN1
EN2
EN3
EN5

IND-3D3UH-57GP

51120_+5VOUT

U69
TPS51120RHBR-GPU1

R475
R479

C844
SCD1U10V2KX-4GP

+VCC_TPS51120

C866
SCD1U10V2KX-4GP
2
1

SC

U65
AO4712-GP

+3.3V_ALWP

PGND1
PGND2
GND
GND

1 R482
2
0R0402-PAD

45 3V/5V_EN

29
12
10
9

L38
1

G84
GAP-CLOSE-PWR
1
2
G82
GAP-CLOSE-PWR
1
2
G81
GAP-CLOSE-PWR
1
2
G80
GAP-CLOSE-PWR
1
2
G83
GAP-CLOSE-PWR
1
2
G85
GAP-CLOSE-PWR

G
S
S
S
+VCC_TPS51120

VREG3
VREG5
51120_EN

SC

19
21

3D3V_AUX_S5
C861
SC10U6D3V5KX-1GP

LS:
Rds(on)=15mohm ~ 18mohm
Qg= 12nC
Id=9.1A
Vgs(th)=1.5V,1.8V,2.4V
Rg= 2.4 ~ 3.6ohm

5V_S5
1

S
S
S
G

C858
SC10U6D3V5KX-1GP

51120_LL1 1
2 51120_VBST1_11 R480
2 51120_VBST1
0R0603-PAD
C868
SCD1U25V3KX-GP

C863
SCD1U25V3KX-GP

D
D
D
D

1
2
G99
GAP-CLOSE-PWR
1
2
G98
GAP-CLOSE-PWR
1
2
G97
GAP-CLOSE-PWR
1
2
G96
GAP-CLOSE-PWR

R468

SC2200P50V2KX-2GP

+5V_ALWP

51120_DRVH1
51120_LL1
1

51120_LL2 1
2 51120_VBST2_11 R465
2 51120_VBST2
0R0603-PAD
C843
SCD1U25V3KX-GP

DCBATOUT_51120

R477

+5V_ALWP

4
3
2
1

DCBATOUT_51120

+VCC_TPS51120
1
C865

C814
SCD1U25V3KX-GP

1
U66
SI4800BDY-T1

C807
SC10U25V6KX-1GP
2
1

2
5D1R3J-GP
C860
SC1U6D3V2KX-GP

Iout = 6A
OCP < 12A

DYC806

1
R481

HS:
Rds(on)=23mohm ~ 30mohm
Qg= 8.7 ~ 13nC
Id=6.5A @25degree C
Vgs(th)=0.8V,1.8V
Rg= 0.5 , 1.4 , 2.2ohm

+VCC_TPS51120

5
6
7
8

5V_AUX_S5

D
D
D
D

G87
GAP-CLOSE-PWR
1
2
G86
GAP-CLOSE-PWR
1
2
G89
GAP-CLOSE-PWR
1
2
G88
GAP-CLOSE-PWR

DCBATOUT

DCBATOUT_51120

C808
SC10U25V6KX-1GP
2
1

DCBATOUT

51120_GND
V5FILT
PWM
D-Cap
MODE
180k/CH1
2870k/CH2
5V
Fixed Output
3.3V
Fixed Output
Switcher ON
VREG3 on

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC to DC 3.3V & 5V
Size
Document Number
Custom

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

39

of

57

SC

ISEN1

24

37
38
39
40
41
42
43
44

VID0
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON

45
46
47

DPRSLPVR
DPRSTP#
CLK_EN#

13

VDIFF

6262_VO

C552

C551

1
C535
SCD01U25V2KX-3GP

R11
1KR2F-3-GP

1
6262_VSUM

3K65R3F-GP

1
R25

2
10KR3F-L-GP

1
R33

2
1R3F-GP

1
R24

2
10KR3F-L-GP

6262_ISENP2 41

SB

R253
2K61R2F-1-GP

R252

6262_ISEN1

6262_ISENN2 41

R279
NTC-10K-9-GP
3

Place close to phase 1 chocke


C547
SCD22U10V2KX-1GP

6262_AGND

3K65R2F-1-GP

When test without cpu,


R30 & R35 change to 0 ohms

2
10KR3F-L-GP

18

1
2

C543
SCD01U25V2KX-3GP

VO

R8

SC

6262_VSUM

C540
SCD01U25V2KX-3GP

1 R30
2
0R0603-PAD

6 VCC_SENSE

19

1 R35
2
0R0603-PAD

VSUM

R7
1
2
11K8R2F-GP

11KR2F-L-GP

6262_VW

SC1KP50V2KX-1GP

6 VSS_SENSE

6262_OCSET

SCD047U10V2KX-2GP

2
6K81R2F-1-GP
2

COMP
VW

1
R23

C13

6262_AGND

SCD22U10V2KX-1GP

1
R235
C522
1

25

NC#25

U40

FB

10

1 R227
2
1
2
97K6R2F-GP
SC470P50V2KX-3GP
C523
C519
6262_COMP
1
2
SC220P50V2JN-3GP

FB2
OCSET8

6262_VID6

SC

11

6262_ISENN1 41

6262_ISEN2

6262_ISEN2

6262_FB

2
1R3F-GP

R34

6262_PHASE2 41
6262_LGATE2 41

1 2

6262_VID5

C533
2
1
1
2
R240
SC1KP50V2KX-1GP
255R2F-L-GP
R242
1
2
1KR2F-3-GP

1
R32

ISL6262ACRZ-T-GP-U

6262_FB212

6262_ISENP1 41

6262_VID4

SC 6262_VDIFF

2
10KR3F-L-GP

C18
SCD22U25V3KX-GP

CPU_VID6

6262_VID3

R238
1
2
1KR2F-3-GP

CPU_VID5

6262_VID2

21 CLK_EN#

1
2
R27
0R3-0-U-GP

SCD22U10V3KX-2GP

CPU_VID4

6262_VID1

28
30
29
23

6262_BOOT2

3K65R3F-GP

1
R22

2
SC4D7U6D3V3KX-GP
6262_UGATE2 41

CPU_VID3

6262_VID0

PHASE2
LGATE2
PGND2
ISEN2

CPU_VID2

1 R536
2
0R0402-PAD
1 R537
2
0R0402-PAD
1 R538
2
0R0402-PAD
1 R539
2
0R0402-PAD
1 R540
2
0R0402-PAD
1 R541
2
0R0402-PAD
1 R29
2
0R0402-PAD

26

C19

CPU_VID1

BOOT2

C15
SCD22U10V3KX-2GP

CPU_VID0

27

5V_S0

6,8,20 H_DPRSTP#

UGATE2

6262_ISEN1

8,21 DPRSLPVR
6 CPU_VID[0..6]

PVCC

31

R31
6262_VSUM

CPUCORE_ON

1
33

DFB

39,42,43,44,49,53

6262_LGATE1 41

PGND1

17

6262_PHASE1 41

32

6262_BOOT1

6262_DFB

If NTC=330Kohm, R285=8.66K

1
34

LGATE1

DROOP

470K /0402 size

1
PHASE1

VSEN

6262_AGND

2 SCD01U16V2KX-3GP

48

PSI#
PMON
RBIAS
VR_TT#
NTC
SOFT

16

R285
4K02R3F-GP
C2
1

6262_NTC
6262_SOFT
1
2
C1
SCD015U25V3KX-GP
6262_VID0
6262_VID1
6262_VID2
6262_VID3
6262_VID4
6262_VID5
6262_VID6
6262_VRON
1 R239
2
0R0402-PAD
6262_DPRSLP
1
2
R9
499R2F-2-GP
1 R10
2 6262_DPRSTP#
0R0402-PAD
6262_CLKEN#
1 R234
2
0R0402-PAD

3V3

2
3
4
5
6
7

14

1 R280
2
NTC-470K-1-GP

6262_PSI#
6262_PMON
6262_RBIAS

PGOOD

36

6262_VSEN

6262_AGND

35

BOOT1

RTN

5 CPU_PROCHOT#

2
147KR2F-GP

2
0R3-0-U-GP
1
C563
SCD22U25V3KX-GP
2

UGATE1

GND_T

15

6262_AGND

1
R258

GND

49

6262_RTN

1 R3
2
0R0402-PAD
1
R236

PSI#

6262_UGATE1 41

21

SC
6

6262_AGND

VIN

VDD

DY

6262_AGND

Place close to phase 1 chocke

VGATE_PWRGD 8,21

C532
SCD01U25V2KX-3GP

20

22

C560
SC1U10V3KX-3GP

C556
SCD01U25V2KX-3GP
2
1

2
1

4K99R2F-L-GP

R1
1K91R2F-1-GP

6262_AGND

6262_PMON

6262_3V3

DY

C521
SCD1U25V3KX-GP

R4
10R3J-3-GP

6262_AGND
6262_VCC

R228
TPAD28 TP95

R13
10R3J-3-GP

6262_VIN

1
R18
10R3J-3-GP

POWER_MONITOR

DCBATOUT 3D3V_S0

5V_S0

6262_DROOP

SB

G46

6262_VO

C548 SC180P50V2JN-1GP

GAP-CLOSE-PWR
6262_AGND

6262_AGND

6262_AGND

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC-DC VCCCPUCORE 1/2


Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

40

of

57

1
2

1
2

1
2

TC14
SE100U25VM-14GP
1

SC

S
S
S
G

Iomax=47A

4
3
2
1

C36
SCD1U25V3KX-GP

AOL1426
84.01426.037

C576
SC10U25V6KX-1GP

POWERPAK-8P-GP

C573
SC10U25V6KX-1GP

U4

D
D
D
D

HS:
Rds(on)=10mohm ~ 12.5mohm
Qg= 10nC
Id=15A@25 degree C
Vgs(th)=1V,1.55V , 2.5V
Rg= 1.2 , 1.6 ohm

C34
SC10U25V6KX-1GP

5
6
7
8

DCBATOUT

VCC_CORE_S0
L22

40 6262_UGATE1

40 6262_PHASE1

DY
2

1
2

TC13

C51
SCD1U25V3KX-GP

6262_ISENN1 40

1
2

2
1
2

FDS6676AS
(84.06676.A37)

POWERPAK-8P-GP

5
6
7
8
4
3
2
1

FDS6676AS
(84.06676.A37)

POWERPAK-8P-GP

GAP-CLOSE-PWR-3-GP

SC330P50V2KX-3GP

S
S
S
G

S
S
S
G

4
3
2
1

DY

G47

GAP-CLOSE-PWR-3-GP

TC1

ST330U2D5VDM-9GP

G48
C61

TC11

ST330U2D5VDM-9GP

U49

TC12

ST330U2D5VDM-9GP

D
D
D
D

D
D
D
D

DY

ST330U2D5VDM-9GP

5
6
7
8

R53
2D2R5J-1-GP
U5

LS:
Rds(on)=5.9mohm ~ 7.25mohm
Qg= 25 ~ 35nC
Id=14.5A
Vgs(th)=1V,1.5V , 3V
Rg= 1.6 ohm

IND-D36UH-9-GP

40 6262_LGATE1

6262_ISENP1 40

1
2

C10

SC

40 6262_UGATE2

L19
1
2
IND-D36UH-9-GP

40 6262_PHASE2

G44
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

C17

2
1

DY
2

FDS6676AS
(84.06676.A37)

POWERPAK-8P-GP

5
6
7
8
4
3
2
1

FDS6676AS
(84.06676.A37)

POWERPAK-8P-GP

G45

SC330P50V2KX-3GP

S
S
S
G

S
S
S
G

4
3
2
1

U2

TC15
ST330U2D5VDM-9GP

D
D
D
D

D
D
D
D

U41

TC4
ST330U2D5VDM-9GP

5
6
7
8

R21

DY2D2R5J-1-GP

40 6262_LGATE2

LS:
Rds(on)=5.9mohm ~ 7.25mohm
Qg= 25 ~ 35nC
Id=14.5A
Vgs(th)=1V,1.5V , 3V
Rg= 1.6 ohm

SCD1U25V3KX-GP

1
C538

SC10U25V6KX-1GP

C9

SC10U25V6KX-1GP

SC10U25V6KX-1GP

DY

C8

4
3
2
1

AOL1426
84.01426.037

POWERPAK-8P-GP

POWERPAK-8P-GP

AOL1426
84.01426.037
S
S
S
G

S
S
S
G

4
3
2
1

U1

D
D
D
D

U35

D
D
D
D

5
6
7
8

5
6
7
8

C537

HS:
Rds(on)=10mohm ~ 12.5mohm
Qg= 10nC
Id=15A@25 degree C
Vgs(th)=1V,1.55V , 2.5V
Rg= 1.2 , 1.6 ohm

SC10U25V6KX-1GP

DCBATOUT

DY

O/P cap: 330u/2V 2R5TPE330M9L 9mOhm 3.9Arms

40 6262_ISENP2
40 6262_ISENN2
<Core Design>

If VCC_SENSE and VSS_SENSE pins have pulled


resistors to VCC_CORE_S0
==> Remove R44/R45/R46/R47.

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC-DC VCCCPUCORE 2/2


Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Thursday, September 20, 2007

Sheet
E

41

of

57

DCBATOUT

+1.05V_PWR_SRC
+1.05V_SUSP

1D05V_S0

G26
GAP-CLOSE-PWR

G75
GAP-CLOSE-PWR

1
2
G25
GAP-CLOSE-PWR

1
2
G69
GAP-CLOSE-PWR

1
2
G29
GAP-CLOSE-PWR

1
2
G74
GAP-CLOSE-PWR

1
2
G30
GAP-CLOSE-PWR

C780
SC2200P50V2KX-2GP

1
2

C338
SCD1U25V3KX-GP

1
2
5
6
7
8

1
2
G70
GAP-CLOSE-PWR

51117A_LL

VOUT
PGOOD

3
6

5117A_VOUT_1D05V
CPUCORE_ON

GND
PGND

7
8

2
1
10KR2J-3-GP

U13
AO4712-GP

3D3V_S0

TPS51117PWR-GP
S
S
S
G

4
3
2
1

R135
11KR2F-L-GP

DY

R377
2D2R5J-1-GP

39,40,43,44,49,53

1
CPUCORE_ON
R142

EN_PSV
TON
TRIP

L37
1
2
IND-2D5UH-9-GP

DY

G72
GAP-CLOSE-PWR-3-GP

C778
SC330P50V2KX-3GP

12

1
2
G73
GAP-CLOSE-PWR

+1.05V_SUSP

SB

1
2
G71
GAP-CLOSE-PWR
TC20
SE220U2VDM-8GP

LL

VFB
VBST

1
2
G68
GAP-CLOSE-PWR

Iout = 6A
OCP<12A

C328
SCD1U10V2KX-4GP

51117A_DRVH
51117A_DRVL

+1.05V_SUS_EN
1
51117A_TON
2
51117A_TRIP 11

13
9

1 2

51117A_VFB
5
51117A_VBST 14

DRVH
DRVL

V5FILT
V5DRV

G
S
S
S

U9

D
D
D
D

R131
1KR2J-1-GP
2
1
2
1
R130
200KR2J-L1-GP

2
1
C325 SCD1U16V2KX-3GP

SC

2
2

51117A_LL1

4
3
2
1

2 R132
1
0R0603-PAD

4
10

PM_SLP_S3#

1
2
G67
GAP-CLOSE-PWR

Choke :
TOKO 10mm*10mm*4.0mm
1164AY-2R5N=P3
Idc=8.3A , Isat=9.9A
DCR=12mohm

5
6
7
8

C326
SC1U6D3V2KX-GP

D13
CH551H-30PT-GP

21,33,39,44,45,53

DY

1
2
G76
GAP-CLOSE-PWR

C336
SC10U25V6KX-1GP

51117A_V5FILT

5V_S5

U15
SI4800BDY-T1

D
D
D
D

1
2

2
C329
SC1U10V3KX-3GP

SC

1
2
G27
GAP-CLOSE-PWR

C337
SC10U25V6KX-1GP

HS:
Rds(on)=23mohm ~ 30mohm
Qg= 8.7 ~ 13nC
Id=6.5A @25degree C
Vgs(th)=0.8V,1.8V
Rg= 0.5 , 1.4 , 2.2ohm

1
2
G28
GAP-CLOSE-PWR
R133
3D3R3J-L-GP

1
2
G77
GAP-CLOSE-PWR

+1.05V_PWR_SRC

5V_S5

-1

O/P cap: 220U 2.5V 2R5TPE220MF 15mOhm 3.1Arms

SB

R137
12K1R2F-L1-GP

DY

Vout=0.75V*(R1+R2)/R2

51117A_VFB

C330
SC18P50V2JN-1-GP

5117A_VOUT_1D05V

LS:
Rds(on)=15mohm ~ 18mohm
Qg= 12nC
Id=9.1A
Vgs(th)=1.5V,1.8V,2.4V
Rg= 2.4 ~ 3.6ohm

R138
30KR2F-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DCDC 1.05V
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

42

of

57

1
2
G38
GAP-CLOSE-PWR
1
2
G40
GAP-CLOSE-PWR
1
2
G41
GAP-CLOSE-PWR
1
2
G42
GAP-CLOSE-PWR
1
2
G43
GAP-CLOSE-PWR
1
2
G35
GAP-CLOSE-PWR
1
2
G36
GAP-CLOSE-PWR
1
2
G37
GAP-CLOSE-PWR

1
2

C516
SC10U25V6KX-1GP

C528
SCD1U25V3KX-GP

C520
SC10U25V6KX-1GP

5
6
7
8

1
2
G9
GAP-CLOSE-PWR
1
2
G10
GAP-CLOSE-PWR

DY

GAP-CLOSE-PWR-3-GP

TC2
SE220U2VDM-8GP

G5
C564
SC330P50V2KX-3GP

1
2
G11
GAP-CLOSE-PWR
2

1
2
G12
GAP-CLOSE-PWR
1
2
G13
GAP-CLOSE-PWR

-1

S
S
S
G

SC

R257

DY 2D2R5J-1-GP

TC3
SE220U2VDM-8GP
2
1

TPS51117PWR-GP
R28
12K1R2F-L1-GP

U38

39,40,42,44,49,53

7
8

CPUCORE_ON

GND
PGND

EN_PSV
TON
TRIP

1
2
G17
GAP-CLOSE-PWR

1
2
IND-D88UH-GP
C25
SCD1U10V2KX-4GP

5117B_VOUT_1D8V
CPUCORE_ON

51117B_LL

1
2
G14
GAP-CLOSE-PWR

+1.8V_SUSP

L21

12
3
6

LL

SB

51117B_DRVH
51117B_DRVL

1 2

13
9

VOUT
PGOOD

VFB
VBST

1KR2J-1-GP
+1.8V_SUS_EN
1
1
51117B_TON
1
2
150KR2J-GP
51117B_TRIP 11

2
2

DRVH
DRVL

1
2
G18
GAP-CLOSE-PWR

C529
SC2200P50V2KX-2GP

Choke:
Cyntec 1.0u 10.0mm x 11.5mm x 4.0mm
PCMC104T-R88MN
Idc=20A , Isat=38A
DCR = 2.7 ~ 3mohm

SC

D
D
D
D

R20

SC

5
6
7
8

V5FILT
V5DRV

51117B_VFB 5
51117B_VBST 14

21,27,33,44 PM_SLP_S4#

2
1
C567 SCD1U16V2KX-3GP

U43

4
10

R251
2

51117B_LL1

SC

U39

2 R259
1
0R0603-PAD

D3
CH551H-30PT-GP

1
2
G16
GAP-CLOSE-PWR

S
S
S
G

C16
SC1U6D3V2KX-GP

1
2
G19
GAP-CLOSE-PWR

+1.8V_PWR_SRC

HS:
Rds(on)=10mohm ~ 12.5mohm
Qg= 10nC
Id=15A@25 degree C
Vgs(th)=1V,1.55V , 2.5V
Rg= 1.2 , 1.6 ohm

G15
GAP-CLOSE-PWR

Design Current = 19A


OCP design < 29A

POWERPAK-8P-GP
4
3
2
1

2
1

51117B_V5FILT
5V_S5

1D8V_S3

D
D
D
D

C566
SC1U10V3KX-3GP

R19
3D3R3J-L-GP

+1.8V_SUSP

POWERPAK-8P-GP
4
3
2
1

5V_S5

AOS AOL1426
84.01426.037

SC

+1.8V_PWR_SRC

AOS AOL1412
84.01412.037

DCBATOUT

O/P cap: 220U 2.5V 2R5TPE220MF 15mOhm 3.1Arms

C550
SC18P50V2JN-1-GP

DY

51117B_VFB

R249
42K2R2F-L-GP

LS:
Rds(on)=3.8mohm ~ 4.6mohm
Qg= 44nC ~53
Id=20A@25degree C
Vgs(th)=1.4V,1.8V,2.4V
Rg= 0.9 , 1.4 ohm

5117B_VOUT_1D8V

R250
30KR2F-GP

SC
3

Vout=0.75V*(R1+R2)/R2

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC/DC 1D8V(ISL6268)
Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

43

of

57

5
6
7
8

1
1

DY

R149
1KR2F-3-GP

DY

Sanyo
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

R148
1K13R2F-1-GP

TC7
ST100U4VBM-L1-GP

SO-8-P

Vo=0.8*(1+(R1/R2))

G24

RT9018A-25PSP-GP

SC

TC6
ST100U4VBM-L1-GP

GAP-CLOSE-PWR-3-GP

NC#5
VOUT
ADJ
GND

1 R147
2
0R0402-PAD

CPUCORE_ON

1D5V_S0

VDD
VIN
EN
PGOOD

C341
SCD022U16V2KX-3GP

PM_SLP_S3#

1D5V/2.2A
GND

4
3
2
1

39,40,42,43,49,53

1
C335
SC1U10V3ZY-6GP
U14

21,33,39,42,45,53

1D5V

5V_S0

C334
SC10U6D3V5KX-1GP

DY

C331
SC10U6D3V5KX-1GP

1D8V_S3

C343
SC1U10V3ZY-6GP

1D25V/2.7A

1
1

G3
GAP-CLOSE-PWR

R381
2KR2F-3-GP

1
2
G6
GAP-CLOSE-PWR

1
2

C782
SCD022U16V2KX-3GP

DY

1
R380
1K13R2F-1-GP

TC23
ST100U4VBM-L1-GP

C26
SC10U6D3V5KX-1GP

11

U3
TPS51100DGQ-1-GP
74.51110.B79

C22
SCD1U10V2KX-4GP

+0.9V_P

1
2
3
4
5

DDR_VREF_S3

0.9 Volt +/- 5%


Design Current: 1.05A
Peak current 1.5A

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

SC

0.9V_DDR_VTT_ON_R

SO-8-P

DDR_VREF_S0

PM_SLP_S3#

10
9
8
7
6

1
2
G8
GAP-CLOSE-PWR

C21
SC10U6D3V5KX-1GP

TPS51100_LDOIN
C29
SCD1U10V2KX-4GP

C31
SC10U6D3V5KX-1GP

2
21,33,39,42,45,53

DDR_ON_0.9V

GND

1 R43
2
0R0402-PAD
1 R40
2
0R0402-PAD

RT9018A-25PSP-GP

Vo=0.8*(1+(R1/R2))

5V_S5

21,27,33,43 PM_SLP_S4#

1 R383
2
0R0402-PAD

SC

1D8V_S3

CPUCORE_ON

5
6
7
8

GAP-CLOSE-PWR-3-GP

SSID = PWR.Plane.Regulator_0.9V

PM_SLP_S3#

1D25V_S0

NC#5
VOUT
ADJ
GND

39,40,42,43,49,53

VDD
VIN
EN
PGOOD

G23

21,33,39,42,45,53

4
3
2
1

GND

U62

1
2

C345
SC10U6D3V5KX-1GP

DY

1D25V

5V_S0

C340
SC10U6D3V5KX-1GP

1D8V_S3

1
2
G4
GAP-CLOSE-PWR

Sanyo
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

1
2
G7
GAP-CLOSE-PWR

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DC to DC 1D5V / 0D9V / 1D25V


Size
A3

Document Number

Rev

-1

Hawke-Intel

Date: Sunday, September 09, 2007

Sheet
E

44

of

57

H_THERMTRIP# 5,8,20,33

R424
H_PWRGD_R

2
D16
BAS16-1-GP

DY

PURE_HW_SHUTDOWN#

33,35

3V/5V_EN

39

C812
SCD1U10V2KX-4GP

DY

Q17
CH3904PT-GP

B
1

DY

1KR2J-1-GP

6,20 H_PWRGOOD

R430
200KR2J-L1-GP

1
R428

2
1KR2J-1-GP

S5_ENABLE 33

DY

Run Power
5V_S5

5V_S0

1D8V_S3

1D8V_S0

U64

Z_12V_D4

Z_12V_D3 2

R411
100KR2J-1-GP

1
2
3
4

FDS8880-NL-GP

C342
SC10U6D3V5KX-1GP

10KR2J-3-GP
3D3V_S0

3D3V_S5
U23

1
2
3
4

D14
BZX384-C9V1-GP
83.9R103.B3F

1
2

Z_12V_G3
1
330KR2F-L-GP

R170
100KR2J-1-GP

1
C372
R169
10KR2J-3-GP
SCD1U25V3KX-GP

2
R412

R171

G
S
S
S

NDS0610-NL-GP
84.S0610.B31

SI4800BDY-T1

D
D
D
D

1
R422

2 Z_12V
10KR2J-3-GP

RUN_POWER_ON

S
S
S
G

Q16

8
7
6
5

U63
D
D
D
D

DY

SCD1U25V3KX-GP

DCBATOUT

8
7
6
5

C366
1
2

G
S
S
S

1
2
3
4

D
D
D
D

C779
SCD01U25V2KX-3GP

8
7
6
5

SI4800BDY-T1

Q15
2N7002PT-U

1
G

D
4

PM_SLP_S3#

Q12
2N7002PT-U

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

21,33,39,42,44,53

<Core Design>

Title

PWRPLANE&RESETLOGIC
Size
A3

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

45

-1
of

57

14

TSAHCT125PW-GP

11

For ODD Boss


For VGA Boss

34.45X06.001
34.47M04.001
EC93 EC94 EC95 EC97 EC98 EC99 EC100 EC101

13

3D3V_S5

SPR3
SPR4

U71C
TSLVC08APW-1-GP

SC47P50V2JN-3GP
2
SC47P50V2JN-3GP

SC47P50V2JN-3GP
2

3D3V_S5

SB
SC47P50V2JN-3GP
2

H9

SC47P50V2JN-3GP
2

H27

H26

SC47P50V2JN-3GP
2

Size
A3

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

SPR1
SPRING-24-GP

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
EC4 EC33 EC46 EC16 EC30 EC57 EC15 EC2 EC50 EC59 EC74 EC23
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

10
9
8

Date: Sunday, September 09, 2007

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

Document Number
Sheet
E

46
of

SCD1U16V2ZY-2GP

DY
EC6
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP

DY
DY
DY
DY
DY
DY
DY
DY
EC39 EC40 EC43 EC54 EC14 EC12 EC8 EC7
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP

2
SCD1U16V2ZY-2GP
2

1
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP

1
SCD1U25V3ZY-1GP
2

1D8V_S3

SCD1U16V2ZY-2GP

DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
EC19 EC42 EC66 EC35 EC1 EC47 EC20 EC21 EC67 EC18 EC52 EC22
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

34.4Q102.001
SCD1U16V2ZY-2GP
2

34.4A908.001

H32

H20

SCD1U16V2ZY-2GP
2

For mini card Boss


For New
card Boss

DY
EC5

SC47P50V2JN-3GP
2

H28

DY
DY
EC11 EC10

1
DY
DY
EC31 EC28 EC13 EC61
SCD1U25V3ZY-1GP
2

DDR_VREF_S0

H29

H30

H31

H25

H2

HOLE
DCBATOUT

H14

SCD1U25V3ZY-1GP

DY
EC9 EC3

H8
HOLE

HOLE

2
SCD1U25V3ZY-1GP
2

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

AD+

SC47P50V2JN-3GP
2

H17

H18

HOLE

H21

HOLE

H10

HOLE

HOLE

H23

H4
HOLE

HOLE

H3

HOLE

H7

DY
DY
DY
DY
EC63 EC29 EC60 EC32
SCD1U16V2ZY-2GP
2

3D3V_S5

U52D
HOLE

H15

HOLE

HOLE
H11

5V_S0
HOLE

H6

H12
HOLE

H16

14

H22
HOLE

H1

HOLE

H19

SCD1U16V2ZY-2GP

DY
EC34

H24

HOLE

H5

HOLE

HOLE

HOLE

SCD1U16V2ZY-2GP

5V_AUX_S5

12
HOLE

HOLE

3D3V_AUX_S5

HOLE

H13

13

14

SCD1U16V2ZY-2GP
2

HOLE

H33

SCD1U16V2ZY-2GP
2

DY
DY
DY
EC45 EC56 EC44 EC48

SCD1U16V2ZY-2GP
2

A
E

1D05V_S0

DY
DY
DY
DY
DY
EC41 EC17 EC62 EC64 EC58

SB

5V_S0

3D3V_S0
2

3D3V_S0

-1

U71D
TSLVC08APW-1-GP

RF suggestion

12
11

SPR2
SPRING-24-GP

34.39S07.003

SB
<Core Design>
4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

MISC

Hawke-Intel
Rev
57

-1

14

U55N

8,19,23,27,28,29,33

AH15

PEX_RST#

C197
SC10U6D3V5KX-1GP
C204
SC10U6D3V5KX-1GP

1
2
2

C256
SC1U6D3V2KX-GP

C218
SC1U6D3V2KX-GP
2
1

1
2

C238
SC4D7U6D3V3KX-GP
2
1

C228
SC1U6D3V2KX-GP

C242
SCD47U6D3V2KX-GP
2
1

PLT_RST1#

PLT_RST1#

AC16
AC17
AC21
AC22
AE18
AE21
AE22
AF12
AF18
AF21
AF22

C212
SC1U6D3V2KX-GP
2
1

PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ

C176
SCD47U6D3V2KX-GP

10

AD23
AF23
AF24
AF25
AG24
AG25

C162
C186
SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
1

PCIE_MTX_GRX_P[0..15]

PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD

10

10

PCIE_MTX_GRX_N[0..15]

10

PCIE_MRX_GTX_P[0..15]

PCIE_MTX_GRX_P[0..15]

PCIE_MRX_GTX_N[0..15]

C187
C195
SCD1U16V2KX-3GP SCD1U16V2KX-3GP
2
1
2
1

PCIE_MTX_GRX_N[0..15]

PEX_IOVDD/Q 1.5A

PCIE_MRX_GTX_P[0..15]

Place on the edge

C215
SC4D7U6D3V3KX-GP
2
1

Place near balls


1 OF 14

U55A
PCIE_MRX_GTX_N[0..15]

1D25V_S0

1D25V_S0

PCIE_MRX_GTX_P8 C216 2
PCIE_MRX_GTX_N8 C224 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PCIE_MRX_GTX_PC8
PCIE_MRX_GTX_NC8

PCIE_MRX_GTX_P9 C705 2
PCIE_MRX_GTX_N9 C709 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PCIE_MTX_GRX_P9 AK22
PCIE_MTX_GRX_N9 AK23

PEX_RX9
PEX_RX9_N

PCIE_MRX_GTX_P10C250 2
PCIE_MRX_GTX_N10C232 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PCIE_MRX_GTX_PC10 AG23
PCIE_MRX_GTX_NC10 AH23

PEX_TX10
PEX_TX10_N

PCIE_MTX_GRX_P10 AL23
PCIE_MTX_GRX_N10 AL24

PEX_RX10
PEX_RX10_N

PCIE_MRX_GTX_PC11 AK24
PCIE_MRX_GTX_NC11 AJ24

PEX_TX11
PEX_TX11_N

PCIE_MTX_GRX_P11 AM24
PCIE_MTX_GRX_N11 AM25

PEX_RX11
PEX_RX11_N

PCIE_MRX_GTX_PC12 AJ25
PCIE_MRX_GTX_NC12 AH25

PEX_TX12
PEX_TX12_N

PCIE_MTX_GRX_P12 AK25
PCIE_MTX_GRX_N12 AK26

PEX_RX12
PEX_RX12_N

PCIE_MRX_GTX_PC13 AH26
PCIE_MRX_GTX_NC13 AG26

PEX_TX13
PEX_TX13_N

PCIE_MTX_GRX_P13 AL26
PCIE_MTX_GRX_N13 AL27

PEX_RX13
PEX_RX13_N

PCIE_MRX_GTX_P11C258 2
PCIE_MRX_GTX_N11C260 2

PCIE_MRX_GTX_P12C262 2
PCIE_MRX_GTX_N12C265 2

PCIE_MRX_GTX_P13C719 2
PCIE_MRX_GTX_N13C716 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

AK21
AJ21

PEX_TX8
PEX_TX8_N

PCIE_MTX_GRX_P8 AM21
PCIE_MTX_GRX_N8 AM22

PEX_RX8
PEX_RX8_N

PCIE_MRX_GTX_PC9 AJ22
PCIE_MRX_GTX_NC9 AH22

PEX_TX9
PEX_TX9_N

PCIE_MRX_GTX_P14C273 2
PCIE_MRX_GTX_N14C277 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PCIE_MRX_GTX_PC14 AK27
PCIE_MRX_GTX_NC14 AJ27

PEX_TX14
PEX_TX14_N

PCIE_MTX_GRX_P14 AM27
PCIE_MTX_GRX_N14 AM28

PEX_RX14
PEX_RX14_N

PCIE_MRX_GTX_P15C291 2
PCIE_MRX_GTX_N15C288 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PCIE_MRX_GTX_PC15 AJ28
PCIE_MRX_GTX_NC15 AH27

PEX_TX15
PEX_TX15_N

PCIE_MTX_GRX_P15 AL28
PCIE_MTX_GRX_N15 AL29

PEX_RX15
PEX_RX15_N

AF15
AE15
AE16

0.11A

C163
SC1U10V3KX-3GP
TC26
ST100U6D3VBM-13GP

C904
SC10U6D3V5KX-1GP
2
1

C211
SCD1U16V2KX-3GP
C165
SCD1U16V2KX-3GP

C641
SC1U10V3KX-3GP
2
1

C171
SCD1U16V2KX-3GP
2
1
C184
SCD1U16V2KX-3GP
2
1

C901
SC10U6D3V5KX-1GP
2
1

C183
SCD1U16V2KX-3GP
2
1
C203
SCD1U16V2KX-3GP
2
1

C191
SCD1U16V2KX-3GP
2
1
C158
SCD1U16V2KX-3GP
2
1

C161
SCD1U16V2KX-3GP
2
1
C217
SCD1U16V2KX-3GP
2
1

C671
SC1U10V3KX-3GP
2
1

C179
SCD1U16V2KX-3GP
2
1
C157
SCD1U16V2KX-3GP
2
1

HDMI_SPDIF

C198
SCD1U16V2KX-3GP
2
1
C185
SCD1U16V2KX-3GP
2
1
1

C82

Place on the edge

10nH
300mA 0.26ohm DC

Place near balls

J6

C193
SCD1U16V2KX-3GP
2
1
C167
SCD1U16V2KX-3GP
2
1

PEX_PLL_AVDD

SPDIF

C900
SC10U6D3V5KX-1GP
2
1

C210
SCD1U16V2KX-3GP
2
1

1
2
1

C177
SCD1U16V2KX-3GP
2
1

C601
SC1U10V3KX-3GP

PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND

3D3V_S0

AC11
AC12
AC24
AD24
AE11
AE12
H7
J7
K7
L10
L7
L8
M10

PEX_RX7
PEX_RX7_N

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

PEX_TX7
PEX_TX7_N

PCIE_MTX_GRX_P7 AL20
PCIE_MTX_GRX_N7 AL21

TP64
TP65

Place near balls

PCIE_MRX_GTX_PC7 AG21
PCIE_MRX_GTX_NC7 AH21

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

GP1_VDD_SENSE
GP1_GND_SENSE

C149
SC1U6D3V2KX-GP

PEX_RX6
PEX_RX6_N

N20
M21

C123
SCD47U6D3V2KX-GP

PCIE_MTX_GRX_P6 AK19
PCIE_MTX_GRX_N6 AK20

VDD_SENSE
GND_SENSE

-1

C152
SCD47U6D3V2KX-GP

PEX_TX6
PEX_TX6_N

PEX_RX5
PEX_RX5_N

PCIE_MRX_GTX_PC6 AG20
PCIE_MRX_GTX_NC6 AH20

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PEX_TX5
PEX_TX5_N

PCIE_MTX_GRX_P5 AM18
PCIE_MTX_GRX_N5 AM19

P20
T20
T23
U20
U23
W20

AJ19
1 SCD1U10V2KX-4GPPCIE_MRX_GTX_PC5
1 SCD1U10V2KX-4GP PCIE_MRX_GTX_NC5 AH19

VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD_LP
VDD_LP

C154
SCD1U16V2KX-3GP

PEX_RX4
PEX_RX4_N

PCIE_MRX_GTX_P7 C698 2
PCIE_MRX_GTX_N7 C695 2

PEX_TX4
PEX_TX4_N

PCIE_MTX_GRX_P4 AL17
PCIE_MTX_GRX_N4 AL18

PCIE_MRX_GTX_P6 C687 2
PCIE_MRX_GTX_N6 C685 2

AK18
AJ18

C111
SCD1U16V2KX-3GP

PCIE_MRX_GTX_PC4
PCIE_MRX_GTX_NC4

PEX_RX3
PEX_RX3_N

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

Place on the edge

Place near balls

C170
SCD1U16V2KX-3GP

PCIE_MTX_GRX_P3 AK16
PCIE_MTX_GRX_N3 AK17
PCIE_MRX_GTX_P4 C200 2
PCIE_MRX_GTX_N4 C205 2

C253
SCD022U16V2KX-3GP

PEX_TX3
PEX_TX3_N

C131
SCD022U16V2KX-3GP

PCIE_MRX_GTX_PC3 AG18
PCIE_MRX_GTX_NC3 AH18

PEX_RX2
PEX_RX2_N

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

Place near balls

PEX_TX2
PEX_TX2_N

PCIE_MTX_GRX_P2 AL15
PCIE_MTX_GRX_N2 AL16

U14
U15
U18
U19
V16
V17
W13
W14
W16
W17
W19
Y13
Y14
Y16
Y17
Y19
Y20

C173
SCD01U16V2KX-3GP
2
1

PCIE_MRX_GTX_PC2 AG17
PCIE_MRX_GTX_NC2 AH17

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

C199
SCD1U16V2KX-3GP
2
1

PEX_RX1
PEX_RX1_N

PCIE_MTX_GRX_P1 AM14
PCIE_MTX_GRX_N1 AM15

PEX_TX1
PEX_TX1_N

C137
SCD022U16V2KX-3GP
2
1

PEX_RX0
PEX_RX0_N

PCIE_MRX_GTX_PC1 AH16
PCIE_MRX_GTX_NC1 AG16

PCIE_MRX_GTX_P3 C670 2
PCIE_MRX_GTX_N3 C676 2

PCIE_MRX_GTX_P5 C682 2
PCIE_MRX_GTX_N5 C678 2

PEX_TX0
PEX_TX0_N

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

AJ15
AK15

PCIE_MTX_GRX_P0 AK13
PCIE_MTX_GRX_N0 AK14

PCIE_MRX_GTX_P2 C665 2
PCIE_MRX_GTX_N2 C663 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PCIE_MRX_GTX_PC0
PCIE_MRX_GTX_NC0

C114
SCD022U16V2KX-3GP
2
1

PCIE_MRX_GTX_P1 C655 2
PCIE_MRX_GTX_N1 C658 2

1 SCD1U10V2KX-4GP
1 SCD1U10V2KX-4GP

PEX_REFCLK
PEX_REFCLK_N

1D25V_S0

L12
1
2
COIL-10NH-GP

SB

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

K10
K23
K29
K4
L27
L6
M12
M2
M31
N15
N18
N29
N4
P15
P18
P27
P6
R13
R14
R15

AF4
AF7
AG10
AG11
AG14
AG15
AG19
AG2
AG22
AG31
AG8
AH24
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ26
AJ29

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

R18
R19
R2
R20
R31
T16
T17
T24
T29
T4
U16
U17
U24
U29
U8
V13
V14
V15
V18
V19

AJ4
AJ7
AK2
AK28
AK31
AL11
AL14
AL19
AL22
AL25
AL3
AL6
AL9
AM13
AM16
AM17
AM20
AM23
AM26
AM29

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

V2
V20
V31
W15
W18
W27
W6
Y15
Y18
Y29
Y4
AL10
AM10
AG13

B12
B15
B18
B21
B24
B27
B3
B30
B6
B9
C2
C31
D10
D13
D16
D17
D20
D23
D26
D29

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

D4
D7
F11
F14
F19
F2
F22
F25
F31
F8
G26
G29
G4
G7
H27
H6
J16
J17
J2
J31

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

C148
SC4D7U6D3V3KX-GP

Place on the edge

1 SCD01U16V2KX-3GP

AUD_SPDIF_OUT

AUD_SPDIF_OUT

31

PCIE_MRX_GTX_P0 C174 2
PCIE_MRX_GTX_N0 C168 2

PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N

AH14
AJ14

AA12
AA2
AA21
AA31
AB27
AB6
AC10
AC23
AC29
AC4
AD16
AD17
AD2
AD31
AE17
AE27
AE6
AF11
AF26
AF29

R80
36KR2J-GP
2

4 CLK_PCIE_VGA
4 CLK_PCIE_VGA#

AM12
AM11

CLK_PCIE_VGA
CLK_PCIE_VGA#

K16
K17
N13
N14
N16
N17
N19
P13
P14
P16
P17
P19
R16
R17
T13
T14
T15
T18
T19
U13

PEX_TEST_PLL_CLK_OUT
PEX_TEST_PLL_CLK_OUT#

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NVVDD 19.81A (NB8E-SE is 24.51A)

2
200R2F-L-GP

RFU#AG12
RFU#AH13

VDD33 0.11A

1
R326

AG12
AH13

C175
SCD1U16V2KX-3GP
2
1

VCC_GFX_CORE_S0

OF 14

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VGA-PCIE (1/4)
Size
C
Date:
A

Document Number

Rev

Hawke-Intel
Sunday, September 09, 2007

Sheet
E

-1
47

of

57

FBADQSR#[0..3]
FBADQSR#0
FBADQSR#1
FBADQSR#2
FBADQSR#3
FBADQSR#4
FBADQSR#5
FBADQSR#6
FBADQSR#7

FBADQSR#[4..7]

M28
K32
G31
G27
AA28
AL31
AF31
AH29

FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7

FBA_DEBUG

TP73

H_PLLVDD

G25

FBA_PLLAVDD

FBA_PLLGND

G24

NC#D31
NC#D32

D31
D32

FBCDQM[4..7]

52 FBCDQSW[4..7]

51
51
51
51

52 FBCDQSR#[0..3]

220ohm 100MHz
300mA 0.45ohm DC

52 FBCDQSR#[4..7]

1
2
1D25V_S0
L34
BLM15AG221SN-GP
C743
SC4D7U6D3V3KX-GP

C166
SC4D7U6D3V3KX-GP

C201
SC4D7U6D3V3KX-GP

C222
SCD47U6D3V2KX-GP
2
1

C153
SCD47U6D3V2KX-GP
2
1

C206
SCD47U6D3V2KX-GP

C739
SCD47U6D3V2KX-GP

C150
SCD1U10V2KX-4GP

FBC_A4
FBC_RAS#
FBC_A5
FBC_BA1
FBD_A2
FBD_A4
FBD_A3
FBC_BA2_CS1#
FBC_CS0#
FBC_A11
FBC_CAS#
FBC_WE#
FBC_BA0
FBD_A5
FBC_A12
FBC_RST
FBC_A7
FBC_A10
FBC_CKE
FBC_A0
FBC_A9
FBC_A6
FBC_A2
FBC_A8
FBC_A3
FBC_A1
FBC_A13
FBC_CMD27
FBC_CMD28

FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N

E13
F13
F18
E17

FBC_CLK0
FBC_CLK0#
FBC_CLK1
FBC_CLK1#

FBC_DEBUG

F12

FBC_DEBUG

FBC_A4
52
FBC_RAS# 52
FBC_A5
52
FBC_BA1 52
FBD_A2
52
FBD_A4
52
FBD_A3
52
FBC_BA2_CS1#
FBC_CS0# 52
FBC_A11 52
FBC_CAS# 52
FBC_WE# 52
FBC_BA0 52
FBD_A5
52
TP50

52

FBC_RST
FBC_A7
FBC_A10

52
52

FBC_A0
FBC_A9
FBC_A6
FBC_A2
FBC_A8
FBC_A3
FBC_A1
TP111
TP55
TP110

52
52
52
52
52
52
52

52

R102
10KR2J-3-GP

FBC_CKE 52
R98
10KR2J-3-GP

FBC_CLK0 52
FBC_CLK0# 52
FBC_CLK1 52
FBC_CLK1# 52
TP47

TPAD28

FBC_PLLVDD

2
1D25V_S0
BLM15AG221SN-GP

FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND

G8

FBC_PLLVDD

G10 +FBC_PLLAVDD

TP45
TP48

G9
K26

VRAM_PD_VDDQ

1
R106
1
R104
VRAM_TERM_GND 1
R105

1D8V_S0

45D3R2F-L-GP

H26 VRAM_PU_GND

J26

24D9R2F-L-GP
40D2R2F-GP

FB_VREAF2

A28

C223
SCD1U10V2KX-4GP

C13
A16
A13
B17
B20
A19
B19
B14
E16
A14
C15
B16
F17
C19
D15
C17
A17
C16
D14
F16
C14
C18
E14
B13
E15
F15
A20
C20
A15

FBC_PLLAVDD

1
L33
C742
SC4D7U6D3V3KX-GP

FBC_CMD0
FBC_CMD1
FBC_CMD2
FBC_CMD3
FBC_CMD4
FBC_CMD5
FBC_CMD6
FBC_CMD7
FBC_CMD8
FBC_CMD9
FBC_CMD10
FBC_CMD11
FBC_CMD12
FBC_CMD13
FBC_CMD14
FBC_CMD15
FBC_CMD16
FBC_CMD17
FBC_CMD18
FBC_CMD19
FBC_CMD20
FBC_CMD21
FBC_CMD22
FBC_CMD23
FBC_CMD24
FBC_CMD25
FBC_CMD26
FBC_CMD27
FBC_CMD28

FBC_PLLGND

C257
SC1KP50V2KX-1GP

C196
SCD1U10V2KX-4GP
2
1

FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7

C213
SCD1U10V2KX-4GP
2
1

C6
E9
E6
A8
B29
E25
A25
F21

C225
SCD1U10V2KX-4GP
2
1

FBCDQSR#0
FBCDQSR#1
FBCDQSR#2
FBCDQSR#3
FBCDQSR#4
FBCDQSR#5
FBCDQSR#6
FBCDQSR#7

FBCDQSR#[0..3]

FBCDQSR#[4..7]

C178
SCD1U10V2KX-4GP
2
1

FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7

Place near balls

FBCDQSW[0..3]

FBCDQSW[4..7]

C5
E10
E5
B8
A29
D25
B25
F20

FBCDQSW0
FBCDQSW1
FBCDQSW2
FBCDQSW3
FBCDQSW4
FBCDQSW5
FBCDQSW6
FBCDQSW7

C188
SCD1U10V2KX-4GP
2
1

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

A4
E11
F5
C9
C28
F24
C24
E20

AA23
AB23
H16
H17
J10
J23
J24
J9
K11
K12
K21
K22
K24
K9
L23
M23
T25
U25

C283
SCD47U6D3V2KX-GP
2
1

C237
SC4D7U6D3V3KX-GP
C235
SC4D7U6D3V3KX-GP

C285
SCD47U6D3V2KX-GP
2
1

C284
SCD47U6D3V2KX-GP
C287
SCD47U6D3V2KX-GP

C248
SCD1U10V2KX-4GP
C241
SCD1U10V2KX-4GP

C249
SCD1U10V2KX-4GP
2
1

52 FBCDQSW[0..3]

TPAD28

1
2

DY

DY
2

R134
1K82R2F-1-GP

52 FBCDQM[4..7]

Place near balls

FB_VREF1

R120
2K49R2F-GP
2

DY

E32

51

R109
10KR2J-3-GP

C230
SCD1U10V2KX-4GP

G23

DY
FB_VREF1

51
51
51
51
51
51
51

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

1D8V_S0

C290
SCD1U10V2KX-4GP

C227
SCD1U10V2KX-4GP
2
1

C252
SCD1U10V2KX-4GP
2
1

FBA_CKE
FBA_A0
FBA_A9
FBA_A6
FBA_A2
FBA_A8
FBA_A3
FBA_A1
TP115
TP74
TP116

51

R110
10KR2J-3-GP

FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7

FBCDQM[0..3]

FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT
FBVTT

AC27

51
51

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

FBA_DEBUG

FBA_RST
FBA_A7
FBA_A10

B7
A7
C7
A2
B2
C4
A5
B5
F9
F10
D12
D9
E12
D11
E8
D8
E7
F7
D6
D5
D3
E4
C3
B4
C10
B10
C8
A10
C11
C12
A11
B11
B28
C27
C26
B26
C30
B31
C29
A31
D28
D27
F26
D24
E23
E26
E24
F23
B23
A23
C25
C23
A22
C22
C21
B22
E22
D22
D21
E21
E18
D19
D18
E19

FBA_CLK0
FBA_CLK0#
FBA_CLK1
FBA_CLK1#

52 FBCDQM[0..3]

P28
R28
Y27
AA27

H_PLLAVDD

R136
1K05R3F-GP

FBCD[32..63]

FBA_CLK0
FBA_CLK0_N
FBA_CLK1
FBA_CLK1_N

FBA_A4
51
FBA_RAS# 51
FBA_A5
51
FBA_BA1 51
FBB_A2
51
FBB_A4
51
FBB_A3
51
FBA_BA2_CS1# 51
FBA_CS0# 51
FBA_A11 51
FBA_CAS# 51
FBA_WE# 51
FBA_BA0 51
FBB_A5
51
TP66

FBA_A4
FBA_RAS#
FBA_A5
FBA_BA1
FBB_A2
FBB_A4
FBB_A3
FBA_BA2_CS1#
FBA_CS0#
FBA_A11
FBA_CAS#
FBA_WE#
FBA_BA0
FBB_A5
FBA_A12
FBA_RST
FBA_A7
FBA_A10
FBA_CKE
FBA_A0
FBA_A9
FBA_A6
FBA_A2
FBA_A8
FBA_A3
FBA_A1
FBA_A13
FBA_CMD27
FBA_CMD28

42mA FBA_PLLAVDD

15mA

C240
SCD1U10V2KX-4GP
2
1

1
2

C233
SCD1U10V2KX-4GP
2
1

P32
U27
P31
U30
Y31
W32
W31
T32
V27
T28
T31
U32
W29
W30
T27
V28
V30
U31
R27
V29
T30
W28
R29
R30
P29
U28
Y32
Y30
V32

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28

FBADQSW[4..7]

L28
K31
G32
G28
AB28
AL32
AF32
AH30

1
2

52 FBCD[32..63]

FBADQSW0
FBADQSW1
FBADQSW2
FBADQSW3
FBADQSW4
FBADQSW5
FBADQSW6
FBADQSW7

Please Close to FBVDDQ not FBVTT

51 FBADQSR#[4..7]

FBADQSW[0..3]

1
2

FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63

51 FBADQSR#[0..3]

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

51 FBADQSW[4..7]

FBADQM[4..7]

M29
M30
G30
F29
AA29
AK30
AC30
AG30

1D8V_S0

3 OF 14

FBCD[0..31]

1D8V_S0

51 FBADQSW[0..3]

FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

AA25
AA26
AB25
AB26
G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
H22
L25
L26
M25
M26
R25
R26
V25
V26

51 FBADQM[4..7]

FBADQM[0..3]

FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ

52 FBCD[0..31]

C754
SCD1U10V2KX-4GP

51 FBADQM[0..3]

A12
A18
A21
A24
A27
A3
A30
A6
A9
AA32
AD32
AG32
AK32
C32
F32
J32
M32
R32

FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD
FBVDD

FBAD[32..63]

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

51 FBAD[32..63]

N27
M27
N28
L29
K27
K28
J29
J28
P30
N31
N30
N32
L31
L30
J30
L32
H30
K30
H31
F30
H32
E31
D30
E30
H28
H29
E29
J27
F27
E27
E28
F28
AD29
AE29
AD28
AC28
AB29
AA30
Y28
AB30
AM30
AF30
AJ31
AJ30
AJ32
AK29
AM31
AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27
AF28
AH28
AG28
AG29
AD27
AF27
AE28

U55C

C247
SCD1U10V2KX-4GP
2
1

FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63

FBVDD/Q 6.27A

51 FBAD[0..31]

2 OF 14

U55B

C156
SCD1U10V2KX-4GP
2
1

FBAD[0..31]

FB_VREF1_FET
3

SW_VREF 50,51,52

Q9
2N7002PT-U
SW_VREF
1
DY G
S

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

VGA-VRAM(2/4)
Size
C
Date:
A

Document Number

Rev

Hawke-Intel
Sunday, September 09, 2007

Sheet
E

-1
48

of

57

3D3V_S0
PLLVDD
T9
T10

C133
SC470P50V2KX-3GP

U10

220ohm 100MHz
300mA 0.45ohm DC

OF 14

36mA

PEX_PLL_EN_TERM

DY

1 2K2R2J-2-GP

DY

1 2K2R2J-2-GP

Enable

32 Mb

Disable

16 Mb

BAR2_SIZE

R300 2

DEVID0

R304 2

1 2K2R2J-2-GP

DEVID1

R305 2

1 2K2R2J-2-GP

DEVID2

R303 2

1 2K2R2J-2-GP

DEVID3

R87

DEVID4

R79

3GIO_ADR_0

R89

1 2K2R2J-2-GP

0000

Desktop

(Default)

3GIO_ADR_1

R88

1 2K2R2J-2-GP

0001

Mobile1

Recommended for NV43/NV44/G7x

3GIO_ADR_2

R60

1 2K2R2J-2-GP

0010

Mobile2

NV42

3GIO_PADFG3

R68

1 2K2R2J-2-GP

0011

Mobile3

0100

Reserved

PLLGND

T1

XTALSSIN

U1

XTALIN

XTALOUTBUFF

T2

XTALOUT

U2

VGAOUTBUFF 1
R288
VGA_XOUT

2
10KR2J-3-GP
TP37

TPAD28

CLK_VGA_27M_SS
CLK_VGA_27M_NSS

C141
SC470P50V2KX-3GP

C607
SC1U6D3V2KX-GP

C602
SC2D2U6D3V3MX-1-GP

4 CLK_VGA_27M_NSS

L24
2
1
BLM15AG221SN-GP

BAR2_SIZE

DEVICE
4 CLK_VGA_27M_SS
DISP_PLLVDD

PLLAVDD
VID_PLLVDD

C76
SC1U6D3V2KX-GP

C73
SC2D2U6D3V3MX-1-GP

1D25V_S0

13

U55M

PEX_PLL_EN_TERM100 R289 2

L6
2
1
BLM15AG221SN-GP

1D25V_S0

1 2K2R2J-2-GP

DY
DY

1 2K2R2J-2-GP

DEVID4

DEVID3

DEVID2

DEVID1

G72M

G72MV

G86-GS
G84-GS

3GIO_PADCFG[3:0]

Place near balls

3D3V_S0
C134
1

M7
M8
R8
T8
U9

MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ
MIOA_VDDQ

10mA

SCD1U10V2KX-4GP

11

U55K

TP97

MIOACAL_PD_VDDQ

L1

MIOACAL_PD_VDDQ

TP29

MIOACAL_PU_GND

L3

MIOACAL_PU_GND

TP98

MIOA_VREF

L2

OF 14

PEX_PLL_EN_TERM100
SUB_VENDOR
MIOAD2
MIOAD3
MIOAD4
MIOAD5
3GIO_ADR_0
TVMODE0*
3GIO_ADR_1
3GIO_ADR_2
TVMODE1*
MIOAD11

P2
N2
N1
N3
M1
M3
P5
N6
N5
M4
L4
L5

MIOAD0
MIOAD1
MIOAD2
MIOAD3
MIOAD4
MIOAD5
MIOAD6
MIOAD7
MIOAD8
MIOAD9
MIOAD10
MIOAD11

1
1
1
1

TP103
TP25
TP105
TP27

TP44

DY
DY
DY

P3
R3
R1
P1

MIOA_CLKOUT
MIOA_CLKOUT_N
RFU#M5

R4
P4
M5

MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE

ROM_TYPE_0

TP32
TP41

R78

SUB_VENDOR

TP31
1
10KR2J-3-GP
TP106
1
TP104
1
1

2
R81

DY

Reserved

1 2K2R2J-2-GP

DY

R290 2

PCI_IOBAR

R75

00

Parallel

01

Serial

10

Reserved

11

LPC

1 2K2R2J-2-GP
1 2K2R2J-2-GP

DY

RFU_M5

Notes

ROMTYPE[1:0]

MIOA_VREF

MIOA_CTL3
MIOA_HSYNC
MIOA_VSYNC
MIOA_DE

0101...1110 Reserved
1111

1
1

DEVID0

G72GLM

SUB_VENDOR

PCI_IOBAR

No vedio BIOS ROM

Disabled

BIOS ROM is present

Enabled

TP26

3D3V_S0

Infineon 8MX32
DDR3 1.8V

0101

Hynix 8MX32
DDR3 1.8V

0111

MIOBD0

Samsung

MIOBD1

Samsung 8MX32
DDR3 1.8V

0110

MIOBD8

Infineon 16MX32
DDR3 1.8V

0001

Hynix 16MX32
DDR3 1.8V

0010

Samsung 16MX32
DDR3 1.8V

0011

R77
10KR2J-3-GP

RAM_CFG[3:0]

Hynix

Y1

MIOBCAL_PD_VDDQ

MIOBCAL_PU_GND

Y3

MIOBCAL_PU_GND

TP30

MIOB_VREF

Y2

MIOB_VREF

W4
W5
V5
Y6

3D3V_S0
R302
10KR2J-3-GP

TP34

RFU#W4
RFU#W5
RFU#V5
RFU#Y6

3D3V_S0

TP33

R67

DY10KR2J-3-GP
2

MIOBCAL_PD_VDDQ

RAM_CFG0
RAM_CFG1
CRYSTAL
DEVID2
DEVID0
DEVID1
TVMODE2*
PCI_IOBAR
RAM_CFG2
RAM_CFG3
ROM_TYPE_0
DEVID3
RFU_W3
RFU_V1
RFU_Y5
RFU_W1

TP36
TP102
TP42
TP101

DYR301
10KR2J-3-GP

TP28

MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
RFU#W3
RFU#V1
RFU#Y5
RFU#W1

AC3
AC1
AC2
AB2
AB1
AA1
AB3
AA3
AC5
AB5
AB4
AA5
W3
V1
Y5
W1

R66

220ohm 100MHz
300mA 0.45ohm DC
IFPCD_PLLVDD

1
10KR2J-3-GP

CPUCORE_ON

RFU#V3
RFU#V4
RFU#AM8
RFU#AM9
RFU#B32
RFU#U6
RFU#AC26
RFU#D1

BUFRST#

F3

STEREO

T3

SWAPRDY_A

M6

TESTMEMCLK
TESTMODE

A26
H2

1
R107 2
R293 2

DY

HDMI_TXD0 R72

TP43

HDMI_TXD1 R298 1

1 10KR2J-3-GP
1 10KR2J-3-GP

HDMI_TXD#2 R296 1
HDMI_TXD2 R297 1
HDMI_TX#C R294 1
HDMI_TXC

1
2

IFPD_IOVDD

50mA

IFPC_TXD0_N
IFPC_TXD0

AE1
AE2

HDMI_TXD#0
HDMI_TXD0

IFPC_TXD1_N
IFPC_TXD1

AF2
AF1

HDMI_TXD#1
HDMI_TXD1

IFPC_TXD2_N
IFPC_TXD2

AH1
AG1

HDMI_TXD#2
HDMI_TXD2

IFPD_TXC_N
IFPD_TXC

AH2
AG3

IFPD_TXD4_N
IFPD_TXD4

AJ1
AK1

IFPD_TXD5_N
IFPD_TXD5

AL1
AL2

IFPD_TXD6_N
IFPD_TXD6

AJ3
AJ2

HDMI_TX#C 16
HDMI_TXC 16
HDMI_TXD#0 16
HDMI_TXD0 16
HDMI_TXD#1 16
HDMI_TXD1 16
HDMI_TXD#2 16
HDMI_TXD2 16

IFPCD_PLLGND

C125
SC470P50V2KX-3GP

+3.3V_IFPC
HDMI_TXD#0 R71

HDMI_TXD#1 R299 1

SWAPRDY
HDCP_TESTCLK
HDCP_TESTMODE

AE7

HDMI_TX#C
HDMI_TXC

AT88SC0808C-SU-1-GP

R287
10KR2J-3-GP
1

V3
V4
AM8
AM9
B32
U6
AC26
D1

IFPC_IOVDD

50mA

90mA

AM3
AM2

C597
SC4700P50V2KX-1GP

39,40,42,43,44,53

1
2
3
4

R295 1

DY
DY
DY
DY
DY
DY
DY
DY

2 49D9R2F-GP
2 49D9R2F-GP
2 49D9R2F-GP

NC#1
NC#2
NC#3
GND

12SCH_SCL
12SCH_SDA

VCC
NC#7
SCL
SDA

G3
H3

Q34
2N7002PT-U

U54
8
7
6
5

C590
SCD1U10V2KX-4GP

<Core Design>

DY

Wistron Corporation

2 49D9R2F-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

2 49D9R2F-GP
2 49D9R2F-GP
2 49D9R2F-GP

I2CH_SCL
I2CH_SDA

3D3V_S0
R286
10KR2J-3-GP

W2
AA6
AA7
1

MEMSTRAPSEL0
MEMSTRAPSEL1
MEMSTRAPSEL2
MEMSTRAPSEL3

AD6

AB10

IFPCD_PLLVDD

IFPC_TXC_N
IFPC_TXC

ROM_SI
ROM_SO
ROM_SCLK

STRAP

AE26
AD26
AH31
AH32

AA10

OF 14

F1

AA4

D
ROMCS#

C151
SC470P50V2KX-3GP

OF 14

2
R281

C594
SC1U6D3V2KX-GP

10

IFPCD_RSET

C600
SC470P50V2KX-3GP

2
3D3V_S0
U55J

AH3

IFPC_IOVDD

L23
2
1
BLM15AG221SN-GP

+3.3V_IFPC

ENABLE_IFPC

220ohm 100MHz
300mA 0.45ohm DC

Q35
NDS0610-NL-GP

3D3V_S0

R65
10KR2J-3-GP
2

1
10KR2J-3-GP

C646
SC4700P50V2KX-1GP

2
R86

2
1 IFPCD_RSET
R82
1KR2J-1-GP
C645
SC1U6D3V2KX-GP

1
2
BLM15AG221SN-GP

1D8V_S0

MIOB_CLKIN

IFPCD_VPROBE

C124
SC4700P50V2KX-1GP

R64
10KR2J-3-GP

TP38

AK3

L26

DY

MIOB_CLKOUT
MIOB_CLKOUT_N
MIOB_CLKIN

AD4
AD5
AE4

DEVID4
3GIO_PADFG3
MIOB_VSYNC
BAR2_SIZE

AD3
AF3
AE3
AD1

U55H
IFPCD_VPROBE

TP100

MIOB_CTL3
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE

10KR2J-3-GP

3D3V_S0
1

TP99

MIOBD9

R76
10KR2J-3-GP
2

MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ
MIOB_VDDQ

OF 14

SCD1U10V2KX-4GP

12

U55L
AA8
AB7
AB8
AC6
AC7

3D3V_S0
C115
1

10mA

Place near balls

Title
C606
SCD1U10V2KX-4GP

DY

VGA-HDMI/STRAP
Size
C

2 49D9R2F-GP
Date:
D

Document Number

Rev

Hawke-Intel
Sheet

Sunday, September 09, 2007


E

-1
49

of

57

AD10

DACA_VDD

130mA

K2
J3

G_CLK_DDC2_R
G_DAT_DDC2_R

AF10
AK10

VGA_HSYNC
VGA_VSYNC

DACA_RED

AH11

M_RED

DACA_GREEN

AJ12

M_GREEN

DACA_BLUE

AH12

M_BLUE

I2CA_SCL
I2CA_SDA

DACA_VREF
DACA_HSYNC
DACA_VSYNC

DACA_RSET

2 DACA_RSET
124R2F-U-GP

VGA_HSYNC 17
VGA_VSYNC 17
M_RED

DACB_VDD

V8

DACB_VDD

DACB_VREF

R5

DACB_VREF

R7

DACB_RSET

R93
10KR2J-3-GP

U5

DACB_RED

R6

M_CRMA

DACB_GREEN

T5

M_LUMA

DACB_BLUE

T6

M_COMP

DACB_IDUMP

V7

DACC_RSET

TPAD28

DACC_HSYNC
DACC_VSYNC

AG7
AG5

DACC_RED

AF6

DACC_GREEN

AG6

DACC_BLUE

AE5

DACC_IDUMP

AG4

R90
150R2F-1-GP

45mA
2

C640
SC4700P50V2KX-1GP

C120
SC470P50V2KX-3GP

AF9

IFPA_IOVDD

AF8

IFPB_IOVDD

45mA

IFPB_TXD4_N
IFPB_TXD4

AM5
AM6

IFPB_TXD5_N
IFPB_TXD5

AL7
AM7

IFPB_TXD6_N
IFPB_TXD6

AK5
AK6

IFPB_TXD7_N
IFPB_TXD7

AL8
AK7

C130
SC470P50V2KX-3GP

C639
SC4700P50V2KX-1GP

C84
SC2200P50V2KX-2GP

DY

VGA_THERMDA

RN19

2
1

VGA_TCK

3
4

TPAD28 TP46
TPAD28 TP49
TPAD28 TP109

SRN10KJ-5-GP

DY

R83
0R2J-2-GP

R385 2

1 10KR2J-3-GP

PANEL_BKEN

R92

1 10KR2J-3-GP

LCDVDD_EN

R85

1 10KR2J-3-GP

LBKLT_CTL

R91

1 2K2R2J-2-GP

SW_VREF

DY

VGA_TXAOUT1+ 18
VGA_TXAOUT2- 18
VGA_TXAOUT2+ 18
VGA_TXBCLK- 18

VGA_TXBCLK+ 18
VGA_TXBOUT0- 18

C633
SC3D3P50V2CN-GP

DY

F6

V6

THERMALSENSOR_OBS

I2CS_SCL
I2CS_SDA

C1
B1

J1

THERMDN

I2CC_SCL
I2CC_SDA

G2
G1

LDDC_CLK
LDDC_DATA

K1

THERMDP
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
DRA_SYNC/GPIO11
GPIO12
GPIO13
DRB_SYNC/GPIO14

K3
H1
K5
G5
E2
J5
G6
K6
E1
D2
H5
F4
E3
U3
U4

HDMI_HDP

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST#

C89
SC8P250V2CC-GP

DY

I2CS_SCL
I2CS_SDA

AJ11
AK11
AK12
AL12
VGA_TRST# AL13

DY

C631
SC3D3P50V2CN-GP

OF 14

CLAMP

VGA_THERMDC

35 VGA_THERMDA

C109
SC3D3P50V2CN-GP

3D3V_S0

U55I

35 VGA_THERMDC

1
2

AL4
AK4

IFPB_TXC_N
IFPB_TXC

2 1

AH5
AJ5

2 1

IFPA_TXD3_N
IFPA_TXD3

DY

C637
SC4D7U6D3V5KX-3GP

AK8
AJ8

IFPAB_PLLGND

IFPA_IOVDD
L25

IFPA_TXD2_N
IFPA_TXD2

80mA

VGA_TXAOUT0+ 18
VGA_TXAOUT1- 18

IFPAB_PLLVDD

C118
SC3D3P50V2CN-GP

AD9

IFPA_TXD1_N
IFPA_TXD1

AH7
AH8

DY

220ohm 100MHz
300mA 0.45ohm DC

AJ6
AH6

C135
SC470P50V2KX-3GP

IFPA_TXD0_N
IFPA_TXD0

VGA_TXACLK+ 18
VGA_TXAOUT0- 18

C100
SC3D3P50V2CN-GP

C74
SC4700P50V2KX-1GP

AJ9
AK9

IFPAB_RSET

C70
SC4D7U6D3V5KX-3GP

BLM15AG221SN-GP

AC9

IFPA_TXC_N
IFPA_TXC

2 1

AL5

IFPAB_VPROBE

DY

2 1

7 OF 14

U55G

AM4

DY

R61
150R2F-1-GP
2
1

1
2

VGA_TXACLK- 18
C127
SC8P250V2CC-GP

DY

1
2

RN38
SRN2K2J-1-GP
4
3

1
2

RN9
SRN2K2J-1-GP
4
3

VGA_TXBOUT0+ 18
VGA_TXBOUT1- 18

VGA_TXBOUT1+ 18
VGA_TXBOUT2- 18
VGA_TXBOUT2+ 18

3D3V_S0

3D3V_S0

LDDC_CLK 18
LDDC_DATA 18
HDMI_HDP 16

LBKLT_CTL
LCDVDD_EN
PANEL_BKEN
GFX_CORE_CNTRL

LBKLT_CTL 18
LCDVDD_EN 18
PANEL_BKEN 33
GFX_CORE_CNTRL 53

NB8M_THERM#
R292
SW_VREF

<Core Design>

0R2J-2-GP

THERMTRIP_VGA# 33

Wistron Corporation

SW_VREF 48,51,52

R291
HDMI_CEC

C101
SC3D3P50V2CN-GP

IFP_VPROBE

1 IFP_RST#
1KR2J-1-GP

2
R318

IFPAB_PLLVDD

1
2K2R2J-2-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

3D3V_S0

Size
A3

HDMI_CEC 16

VGA-LVDS/TV/CRT (3/3)

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

HDMI_SCLK 16
HDMI_SDATA 16

M_COMP 34

C113
SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

DY1

L7

DACC_VREF

AF5

HDMI_SCLK
HDMI_SDATA

M_LUMA 34

BLM15AG221SN-GP

AH4

DACC_RSET

H4
J4

M_CRMA 34

R62
150R2F-1-GP

2
C623

1D8V_S0

DACC_VREF

TP40

I2CB_SCL
I2CB_SDA

DACB_CSYNC

2 DACB_RSET
124R2F-U-GP

TP39

R63
150R2F-1-GP
2
1

1
R94

TV_SYNC_C

R95
0R2J-2-GP

TP35

180mA

1D8V_S0

DACC_VDD

130mA

R100
150R2F-1-GP

AD7

C112
SCD01U16V2KX-3GP

R97
150R2F-1-GP

5 OF 14

U55E

C138
SC2D2U6D3V3MX-1-GP

BLM15AG221SN-GP

C140
SC470P50V2KX-3GP
2
1

L10

C126
SC1U6D3V2KX-GP
2
1

3D3V_S0

DACC_VDD

AG9
R101
150R2F-1-GP

6 OF 14

U55F

M_BLUE 17

DACA_IDUMP

220ohm 100MHz
300mA 0.45ohm DC

17

M_GREEN 17

DDC_CLK_CON 17
DDC_DATA_CON 17

1
R96

DACA_VDD

DACA_VREF AH10
C144
SCD01U16V2KX-3GP
AH9

RN10
SRN33J-5-GP-U
1
4
2
3

220ohm 100MHz
300mA 0.45ohm DC

4 OF 14

U55D
C139
SC2D2U6D3V3MX-1-GP

1
2

C143
SC1U6D3V2KX-GP
2
1

L11
1
2
BLM15AG221SN-GP

C146
SC470P50V2KX-3GP
2
1

3D3V_S0

Sheet
E

-1
50

of

57

FBAD[32..63]

48 FBAD[32..63]
1D8V_S0

RAS#

BA2

FBA_CS0#

F4

CAS#

CS#

FBA_WE#

H4

CKE

WE#

FBA_CLK0#
FBA_CLK0

J10
J11

CK#
CK

FBADQSR#3
FBADQSR#2
FBADQSR#1
FBADQSR#0

P3
P10
D10
D3

RDQS3
RDQS2
RDQS1
RDQS0

FBADQSW3
FBADQSW2
FBADQSW1
FBADQSW0

P2
P11
D11
D2

WDQS3
WDQS2
WDQS1
WDQS0

N3
N10
E10
E3

DM3
DM2
DM1
DM0

V9

RES

A4

ZQ

FBADQM[0..3]

48 FBADQM[0..3]

FBADQM3
FBADQM2
FBADQM1
FBADQM0
FBA_RST

48 FBA_RST
1D8V_S0
R373 2

2
R361

1 FBA_ZQ1
240R2F-1-GP

1 1K15R2F-GP

R369 2
1 2K67R2F-2-GP
2
1
C752
SCD01U16V2KX-3GP

1 1K07R2F-1-GP

FBA_REF_LWR H1

VREF

H12

VREF

VSSA
VSSA

J12
J1

PAR

J3

RFU

J2

RFU

V4

1D8V_S0

F9

CS#

CAS#

H9

WE#

CKE

FBA_BA2_CS1#

H3

RAS#

BA2

FBA_CS0#

F4

CAS#

CS#

FBA_WE#

H4

CKE

WE#

FBA_CLK1#
FBA_CLK1

J10
J11

CK#
CK

FBADQSR#4
FBADQSR#6
FBADQSR#5
FBADQSR#7

P3
P10
D10
D3

RDQS3
RDQS2
RDQS1
RDQS0

FBADQSW4
FBADQSW6
FBADQSW5
FBADQSW7

P2
P11
D11
D2

WDQS3
WDQS2
WDQS1
WDQS0

FBADQM4
FBADQM6
FBADQM5
FBADQM7

N3
N10
E10
E3

DM3
DM2
DM1
DM0

R360

V9

RES

A4

ZQ

FBA_RST
1
10KR2J-3-GP
FBA_ZQ2
1
240R2F-1-GP

1 1K15R2F-GP

FBA_REF_UPR H1

R359 2
1 2K67R2F-2-GP
2
1
C737
SCD01U16V2KX-3GP
R358
1K07R2F-1-GP

HY5RS573225AFP-GP

HYNIX:72.51232.A0U
Samsung:72.45232.A0U

H12

VSSA
VSSA

J12
J1

PAR

J3

RFU

J2

RFU

V4

MF

A9

VREF

C764
SC1U6D3V2KX-GP

1D8V_S0

1D8V_S0

VREF
HY5RS573225AFP-GP

<Core Design>

FBA_VREF_SW_A2

Wistron Corporation

Q40
2N7002PT-U
SW_VREF
1
G

SW_VREF 48,50,52

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

VRAM (1/2)

Q42
2N7002PT-U
SW_VREF
1
G
S

Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

C726
SC470P50V2KX-3GP

2
1
C724
SC1KP50V2KX-1GP
C767
SCD1U10V2KX-4GP
2
1
2
1
C759
SCD01U16V2KX-3GP
C768
SC1KP50V2KX-1GP
2
1
2
1
C733
C289
SC1U6D3V2KX-GP
SC1KP50V2KX-1GP
2
1
2
1
C725
SC1U6D3V2KX-GP
C765
SC4D7U6D3V5KX-3GP
2
1
2
1

C775
SCD01U16V2KX-3GP
2
1

C735
SCD1U10V2KX-4GP

2
1

C720
SCD01U16V2KX-3GP
2
1

2
C763
SC1KP50V2KX-1GP
2
1

K1
K12

VDDA
VDDA

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

C729
SCD1U10V2KX-4GP

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A2
A11
F1
F12
M1
M12
V2
V11

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

C753
SCD01U16V2KX-3GP

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

C723
SCD01U16V2KX-3GP

1
2

C728
SC1U6D3V2KX-GP
2
1

C774
SC1U6D3V2KX-GP
C282
SC1U6D3V2KX-GP

1
2
1
2

C776
C286
SCD01U16V2KX-3GP SCD1U10V2KX-4GP
C333
2
1
SC4D7U6D3V5KX-3GP
2
1
C773
2
1
C758
SC1KP50V2KX-1GP
C761
2
1 SCD1U10V2KX-4GP
SC1KP50V2KX-1GP
2
1
C762
2
1
SC1KP50V2KX-1GP
C281
C722
SC1U6D3V2KX-GP
SCD01U16V2KX-3GP
2
1
2
1

C745
SC470P50V2KX-3GP
2
1

48 FBADQM[4..7]

R375 2

A9

A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0

FBADQM[4..7]

R146

MF

L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

FBADQSW[4..7]

48 FBADQSW[4..7]

1D8V_S0

FBA_A7
FBA_A8
FBB_A3
FBA_A10
FBA_A11
FBB_A2
FBA_A1
FBA_A0
FBA_A9
FBA_A6
FBB_A5
FBB_A4

FBADQSR#[4..7]

FBA_VREF_SW_A1 R371 2

48 FBA_CLK1
48 FBADQSR#[4..7]

RAS#
BA0
BA1

FBA_CKE

R372
243R2F-2-GP

K1
K12

BA2
BA1
BA0

MF=0 MF=1

FBA_CAS#
48 FBA_CLK1#

1D8V_S0

H10
G9
G4

FBADQSW[0..3]

48 FBADQSW[0..3]

VDDA
VDDA

48 FBB_A5
48 FBB_A4

FBA_RAS#
FBA_BA0
FBA_BA1

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

C746
SCD047U10V2KX-2GP

H3

48 FBB_A2

T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2

FBA_BA2_CS1#

48 FBB_A3

FBAD39
FBAD38
FBAD37
FBAD36
FBAD35
FBAD34
FBAD33
FBAD32
FBAD55
FBAD54
FBAD53
FBAD52
FBAD51
FBAD50
FBAD49
FBAD48
FBAD47
FBAD46
FBAD45
FBAD44
FBAD43
FBAD42
FBAD41
FBAD40
FBAD63
FBAD62
FBAD61
FBAD60
FBAD59
FBAD58
FBAD57
FBAD56

CKE

FBADQSR#[0..3]

48 FBADQSR#[0..3]
3

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

CAS#

WE#

48 FBA_WE#

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

CS#

48 FBA_CS0#

A2
A11
F1
F12
M1
M12
V2
V11

1
2
1
2
1
C732
C770
C741
SC1KP50V2KX-1GP
SCD01U16V2KX-3GP SCD1U10V2KX-4GP
2
1

A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0

H9

48 FBA_BA2_CS1#

L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

FBA_CKE

48 FBA_CKE

FBA_A7
FBA_A8
FBA_A3
FBA_A10
FBA_A11
FBA_A2
FBA_A1
FBA_A0
FBA_A9
FBA_A6
FBA_A5
FBA_A4

F9

48 FBA_CLK0#

48 FBA_CLK0

RAS#
BA0
BA1

MF=0 MF=1

FBA_CAS#

48 FBA_CAS#

R370
243R2F-2-GP

BA2
BA1
BA0

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

FBA_A7
FBA_A8
FBA_A3
FBA_A10
FBA_A11
FBA_A2
FBA_A1
FBA_A0
FBA_A9
FBA_A6
FBA_A5
FBA_A4

H10
G9
G4

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

48
48
48
48
48
48
48
48
48
48
48
48

FBA_RAS#
FBA_BA0
FBA_BA1

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

C614
SCD047U10V2KX-2GP

48 FBA_RAS#
48 FBA_BA0
48 FBA_BA1

U11

T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2

C214
SCD047U10V2KX-2GP
2
1

1D8V_S0

U10
FBAD31
FBAD30
FBAD29
FBAD28
FBAD27
FBAD26
FBAD25
FBAD24
FBAD23
FBAD22
FBAD21
FBAD20
FBAD19
FBAD18
FBAD17
FBAD16
FBAD15
FBAD14
FBAD13
FBAD12
FBAD11
FBAD10
FBAD9
FBAD8
FBAD7
FBAD6
FBAD5
FBAD4
FBAD3
FBAD2
FBAD1
FBAD0

C693
SCD047U10V2KX-2GP
2
1

FBAD[0..31]

48 FBAD[0..31]

C744
SC1U6D3V2KX-GP

Sheet
E

-1
51

of

57

FBCD[32..63]

48 FBCD[32..63]
1D8V_S0

CS#

FBC_WE#

H4

CKE

WE#

FBC_CLK0#
FBC_CLK0

J10
J11

FBCDQSR#2
FBCDQSR#0
FBCDQSR#3
FBCDQSR#1

P3
P10
D10
D3

RDQS3
RDQS2
RDQS1
RDQS0

P2
P11
D11
D2

WDQS3
WDQS2
WDQS1
WDQS0

N3
N10
E10
E3

DM3
DM2
DM1
DM0

V9

RES

A4

ZQ

FBCDQSR#[0..3]

FBCDQSW[0..3]

48 FBCDQSW[0..3]

FBCDQSW2
FBCDQSW0
FBCDQSW3
FBCDQSW1
FBCDQM[0..3]

48 FBCDQM[0..3]

FBCDQM2
FBCDQM0
FBCDQM3
FBCDQM1
FBC_RST

48 FBC_RST
1D8V_S0

2
R323

R306 2
R307 2
2
C621

NB8P

1 FBC_ZQ1
240R2F-1-GP

1 1K15R2F-GP

FBC_REF_LWR H1

VREF

H12

VREF

NB8P

1 2K67R2F-2-GP
1
SCD01U16V2KX-3GP

CK#
CK

VDDA
VDDA

1 1K07R2F-1-GP

PAR

J3

RFU

J2

RFU

V4

48 FBC_CLK1
48 FBCDQSR#[4..7]

NB8P

48 FBCDQM[4..7]

NB8P

1D8V_S0

HY5RS573225AFP-GP

NB8P
NB8P

FBC_CAS#

F9

CS#

CAS#

FBC_CKE

H9

WE#

CKE

FBC_BA2_CS1#

H3

RAS#

BA2

FBC_CS0#

F4

CAS#

CS#

FBC_WE#

H4

CKE

WE#

FBC_CLK1#
FBC_CLK1

J10
J11

CK#
CK

FBCDQSR#7
FBCDQSR#6
FBCDQSR#4
FBCDQSR#5

P3
P10
D10
D3

RDQS3
RDQS2
RDQS1
RDQS0

FBCDQSW7
FBCDQSW6
FBCDQSW4
FBCDQSW5

P2
P11
D11
D2

WDQS3
WDQS2
WDQS1
WDQS0

FBCDQM7
FBCDQM6
FBCDQM4
FBCDQM5

N3
N10
E10
E3

DM3
DM2
DM1
DM0

V9

RES

R115

NB8P

R340 2
2
C699

1 1K15R2F-GP

A4

ZQ

FBC_REF_UPR H1

NB8P

1 2K67R2F-2-GP
1
SCD01U16V2KX-3GP

H12

J3

RFU

J2

RFU

V4

MF

A9

VREF

C711
SCD01U16V2KX-3GP
2
1

NB8P

NB8P

NB8P

NB8P

NB8P

NB8P

C713
SC470P50V2KX-3GP

NB8P

NB8P

NB8P

NB8P

1D8V_S0

NB8P

1D8V_S0

VREF
HY5RS573225AFP-GP

NB8P

R343
1K07R2F-1-GP

NB8P
FBC_VREF_SW_A2

<Core Design>

SW_VREF 48,50,51

Wistron Corporation

Q39
2N7002PT-U

NB8P

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

SW_VREF
Title

VRAM (2/2)

Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

NB8P

C688
SC1U6D3V2KX-GP

2
1
C226
SC1KP50V2KX-1GP
C208
SCD1U10V2KX-4GP
2
1
2
1
C703
SCD01U16V2KX-3GP
C700
SC1KP50V2KX-1GP
2
1
2
1
C189
C234
SC1U6D3V2KX-GP
SC1KP50V2KX-1GP
2
1
2
1
C704
SC1U6D3V2KX-GP
C718
SC4D7U6D3V5KX-3GP
2
1
2
1

C264
SCD1U10V2KX-4GP

1
2

2
1

C712
SCD01U16V2KX-3GP
2
1

2
C690
SC1KP50V2KX-1GP
2
1

NB8P

J12
J1

PAR

NB8P

NB8P

NB8P

VSSA
VSSA

C692
SCD1U10V2KX-4GP

K1
K12

VDDA
VDDA

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

C694
SCD01U16V2KX-3GP

A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0

A2
A11
F1
F12
M1
M12
V2
V11

NB8P

L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NB8P

SW_VREF

FBC_A7
FBC_A8
FBD_A3
FBC_A10
FBC_A11
FBD_A2
FBC_A1
FBC_A0
FBC_A9
FBC_A6
FBD_A5
FBD_A4

FBC_RST
1
10KR2J-3-GP
FBC_ZQ2
1
240R2F-1-GP

HYNIX:72.51232.A0U
Samsung:72.45232.A0U

Q38
2N7002PT-U

NB8P

RAS#
BA0
BA1

FBCDQM[4..7]

R342 2

A9

BA2
BA1
BA0

MF=0 MF=1

FBCDQSW[4..7]

48 FBCDQSW[4..7]

1D8V_S0

H10
G9
G4

FBCDQSR#[4..7]

R99

MF

C635
SCD01U16V2KX-3GP

1
2

C599
SC1U6D3V2KX-GP

NB8P

1D8V_S0

FBC_RAS#
FBC_BA0
FBC_BA1

C630
SC1U6D3V2KX-GP
2
1

R335
243R2F-2-GP

C110
SC1U6D3V2KX-GP

2
C731
SCD01U16V2KX-3GP
2
1

C103
SC1KP50V2KX-1GP
2
1

C598
SC4D7U6D3V5KX-3GP
2
1

1
2
1
2

48 FBC_CLK1#

NB8P

C736
C596
SCD01U16V2KX-3GP SCD1U10V2KX-4GP
2
1
2
1
C128
C605
SC1KP50V2KX-1GP
2
1 SCD1U10V2KX-4GP
2
1
C611
SC1KP50V2KX-1GP
C102
SC1U6D3V2KX-GP

48 FBD_A5
48 FBD_A4

NB8P

FBC_VREF_SW_A1 R315 2

C612
SC470P50V2KX-3GP
2
1

1
2

C636
C608
SCD01U16V2KX-3GP SCD1U10V2KX-4GP

2
1

C615
SC1KP50V2KX-1GP
2
1

48 FBD_A2

K1
K12

J12
J1

NB8P

48 FBD_A3

NB8P

VSSA
VSSA

NB8P

NB8P

C727
SCD047U10V2KX-2GP

CAS#

NB8P

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

F4

NB8P

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

FBC_CS0#

NB8P

NB8P

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

BA2

NB8P

NB8P

T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2

RAS#

NB8P

NB8P

FBCD63
FBCD62
FBCD61
FBCD60
FBCD59
FBCD58
FBCD57
FBCD56
FBCD55
FBCD54
FBCD53
FBCD52
FBCD51
FBCD50
FBCD49
FBCD48
FBCD39
FBCD38
FBCD37
FBCD36
FBCD35
FBCD34
FBCD33
FBCD32
FBCD47
FBCD46
FBCD45
FBCD44
FBCD43
FBCD42
FBCD41
FBCD40

H3

B1
B4
B9
B12
D1
D4
D9
D12
G2
G11
L2
L11
P1
P4
P9
P12
T1
T4
T9
T12
A3
A10
G1
G12
L1
L12
V3
V10

NB8P

NB8P

FBC_BA2_CS1#

VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NB8P

NB8P

CKE

A2
A11
F1
F12
M1
M12
V2
V11

NB8P

NB8P

CAS#

WE#

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

NB8P

1
2

A7
A8/AP
A3
A10
A11
A2
A1
A0
A9
A6
A5
A4

CS#

48 FBC_WE#

NB8P

A11
A10
A9
A8/AP
A7
A6
A5
A4
A3
A2
A1
A0

F9

48 FBC_CS0#

NB8P

L4
K2
M9
K11
L9
K10
H11
K9
M4
K3
H2
K4

H9

48 FBC_BA2_CS1#

48 FBC_CLK0
48 FBCDQSR#[0..3]

FBC_A7
FBC_A8
FBC_A3
FBC_A10
FBC_A11
FBC_A2
FBC_A1
FBC_A0
FBC_A9
FBC_A6
FBC_A5
FBC_A4

FBC_CKE

48 FBC_CKE

NB8P

RAS#
BA0
BA1

FBC_CAS#

48 FBC_CAS#
48 FBC_CLK0#

R317
243R2F-2-GP

BA2
BA1
BA0

MF=0 MF=1

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

FBC_A7
FBC_A8
FBC_A3
FBC_A10
FBC_A11
FBC_A2
FBC_A1
FBC_A0
FBC_A9
FBC_A6
FBC_A5
FBC_A4

H10
G9
G4

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

48
48
48
48
48
48
48
48
48
48
48
48

FBC_RAS#
FBC_BA0
FBC_BA1

DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

C604
SCD047U10V2KX-2GP

48 FBC_RAS#
48 FBC_BA0
48 FBC_BA1

U7

T3
T2
R3
R2
M3
N2
L3
M2
T10
T11
R10
R11
M10
N11
L10
M11
G10
F11
F10
E11
C10
C11
B10
B11
G3
F2
F3
E2
C3
C2
B3
B2

C613
SCD047U10V2KX-2GP

1D8V_S0

U6
FBCD23
FBCD22
FBCD21
FBCD20
FBCD19
FBCD18
FBCD17
FBCD16
FBCD7
FBCD6
FBCD5
FBCD4
FBCD3
FBCD2
FBCD1
FBCD0
FBCD31
FBCD30
FBCD29
FBCD28
FBCD27
FBCD26
FBCD25
FBCD24
FBCD15
FBCD14
FBCD13
FBCD12
FBCD11
FBCD10
FBCD9
FBCD8

C734
SCD047U10V2KX-2GP

FBCD[0..31]

48 FBCD[0..31]

C657
SC1U6D3V2KX-GP

Sheet
E

-1
52

of

57

Design Current = 18.43A


OCP design < 20A
VGA_CORE = 1.2V

C269
1

SC

51117C_DRVH
51117C_DRVL

LL

12

51117C_LL

VOUT
PGOOD

3
6

GND
PGND

7
8

51117_VOUT_VGA
GFX_CORE_PG
1
R528
0R2J-2-GP

U58

DY

SC

NB8P

R2

1
2

2
1

C221
SC10U25V6KX-1GP

TC17
ST330U2D5VDM-9GP

TC18
ST330U2D5VDM-9GP
2
1

C638
SCD1U10V2KX-4GP

R354
18K7R2F-GP

NB8P

R4

NB8P

NB8M
2

NB8P

R1

-1

DY

Vout=0.75V*(Rtop+Rbottom)/Rbottom

NB8P
1

NB8P

R351
100KR2J-1-GP

C721
SCD01U16V2KX-3GP

NB8P

50 GFX_CORE_CNTRL

GFX_CORE_CNTRL_R
1
10KR2J-3-GP
G

51117C_VFB

8K45R2F-2-GP
R124
10KR2F-2-GP

C296
SCD1U16V2KX-3GP

Q8
2N7002PT-U

2
R349

R3

NB8P

NB8P
GFX_CORE_CNTRL

R125
ENABLE_GFX_CORE_CNTRL#_R

40K2R2F-GP
D

R348
10KR2J-3-GP

R356
10KR2F-2-GP

R121

SB

51117_VOUT_VGA

SC
ENABLE_GFX_CORE_CNTRL# 1

O/P cap: 330u/2V


2R5TPE330M9L 9mOhm
3.9Arms

SB

DY

C730
SC68P50V2JN-1GP

LS:
Rds(on)=3.8mohm ~ 4.6mohm
Qg= 44nC ~53
Id=20A@25degree C
Vgs(th)=1.4V,1.8V,2.4V
Rg= 0.9 , 1.4 ohm

3D3V_S0

EC89
SCD1U25V3KX-GP

C673
SCD1U25V3KX-GP

1
2

C675
SC10U25V6KX-1GP

8
7
6
5

39,40,42,43,44,49

CPUCORE_ON

TPS51117PWR-GP

DY 2

R114
10K5R2F-GP
2

VGA_CORE_P

EN_PSV
TON
TRIP

DY

L27
1
2
COIL-1UH-33-GP
R341
2D2R5J-1-GP

GFX_CORE_ON_R 1
51117C_LL_TON
2
51117C_TRIP
11

13
9

G58
GAP-CLOSE-PWR-3-GP
1
2

f=400kHz,Ton resister =150k

VFB
VBST

SC

DRVH
DRVL

150KR2J-GP

5
14

2 1KR2J-1-GP
2 1KR2J-1-GP
2

DY

V5FILT
V5DRV

C220
SC2200P50V2KX-2GP

SB

51117C_VFB
51117C_VBST

4
10

AOS AOL1412
84.01412.037

U59

R524 1
R353 1
R118 1

2
G66
GAP-CLOSE-PWR
1
2
G65
GAP-CLOSE-PWR
1
2
G57
GAP-CLOSE-PWR
1
2
G64
GAP-CLOSE-PWR
1
2
G63
GAP-CLOSE-PWR
1
2
G62
GAP-CLOSE-PWR
1
2
G61
GAP-CLOSE-PWR
1
2
G60
GAP-CLOSE-PWR
1
2
G59
GAP-CLOSE-PWR
1
2
G54
GAP-CLOSE-PWR
1
2
G55
GAP-CLOSE-PWR
1
2
G56
GAP-CLOSE-PWR
1
2
G53
GAP-CLOSE-PWR
1
2
G52
GAP-CLOSE-PWR
1
2
G51
GAP-CLOSE-PWR
1
2
G50
GAP-CLOSE-PWR
1
2
G49
GAP-CLOSE-PWR

Choke:
Cyntec 1.0u 10.0mm x 11.5mm x 4.0mm
PCMC104T-1R0MN
Idc=15A , Isat=40A
DCR = 3.0 ~ 3.5mohm

U56

SCD1U16V2KX-3GP

SC

D11
CH551H-30PT-GP

33 GFX_CORE_ON
21,33,39,42,44,45 PM_SLP_S3#

51117C_LL1

C702
SC330P50V2KX-3GP

2 R116
1
0R0603-PAD

POWERPAK-8P-GP
D
1 S
D
2 S
D
3 S
D
4 G

51117C_V5FILT
C295
SC1U6D3V2KX-GP

5V_S5

POWERPAK-8P-GP
D 8
1 S
D 7
2 S
D 6
3 S
D 5
4 G

2
1

SC

R123
3D3R3J-L-GP

AOS AOL1426
84.01426.037

HS:
Rds(on)=10mohm ~ 12.5mohm
Qg= 10nC
Id=15A@25 degree C
Vgs(th)=1V,1.55V , 2.5V
Rg= 1.2 , 1.6 ohm

C272
SC1U10V3KX-3GP

DCBATOUT

5V_S5

VCC_GFX_CORE_S0

VGA_CORE_P

GFX_CORE_CNTRL

R1

R2

R3

R4

DY

DY

DY

18.7K

1.15V

8.45K

10K

40.2K

DY

1.15V

8.45K

10K

DY

1.2V

Vout(V)

NA
3

GFX_CORE_CNTRL
Low

to FET

GFX_CORE_CNTRL
High

40.2K
to GND

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

DCDC VGA_Core
Size
A3

Document Number

Rev

Hawke-Intel

Date: Sunday, September 09, 2007


A

Sheet
E

-1
53

of

57

ICH8 SMBus Block Diagram

KBC SMBus Block Diagram


5V_S0

3D3V_S5

3D3V_S0

3D3V_S0
SRN2K2J-1-GP

ICH8-M
SMBCLK
SMBDATA

SMB_CLK
SMB_DATA

10KR2J-3-GP

SRN2K2J-1-GP

TouchPad Conn.

DIMM 1
ICH_SMBCLK
ICH_SMBDATA

10KR2J-3-GP

SCL

PSDAT1

TPDATA

PSCLK1

TPCLK

SDA

TPDATA

TPDATA

TPCLK

TPCLK

3D3V_AUX_S5

SMBus Address:A0
2N7002DW-1-GP

DIMM 2

ICH_SMBDATA

ICH_SMBCLK

SCL

Battery Conn.

SMBus Address:A4

SMB_CLK
SMB_DATA

SMB_CLK
SMB_DATA

SCL1 BAT_SCL
SDA1 BAT_SDA

Express
Card
ICH_SMBCLK
ICH_SMBDATA

10KR2J-3-GP

10KR2J-3-GP

SDA

Clock
Generator

SMBus address:D2

PBAT_SMBCLK1

CLK_SMB

100R2J-2-GP

PBAT_SMBDAT1

DAT_SMB

KBC

SMBus address:58

SCL

SDA

WPC8763L

ICH_SMBCLK
ICH_SMBDATA

SMBus address:16

INVERTER

SCLK
SDATA

100R2J-2-GP

MAX8731

WLAN
Minicard

SCL

SMBus address:12

SDA

SMB_CLK

3D3V_S0

SMB_DATA

3D3V_AUX_S5
3D3V_S0

ICH_SMBCLK
ICH_SMBDATA

WWAN
Minicard

10KR2J-3-GP

10KR2J-3-GP

SMB_CLK

KBC_SCL1
KBC_SDA1

ICH_SMBCLK

Thermal

G792_SCL

SCL

G792_SDA

SDA

SMBus address:5E

2N7002DW-1-GP

GPIO62/SDA2

ICH_SMBDATA

SMB_DATA

GPIO61/SCL2

SRN2K2J-1-GP

Robson/BT
Minicard

Capacity
Button

0R2J-2-GP

SMB_CLK

0R2J-2-GP

SMB_DATA

SMBus address:86

3D3V_S0

5V_CRT_S0
SRN2K2J-1-GP

I2CC_SCL

LDDC_CLK

I2CC_SDA

LDDC_DATA

LCD Conn.
SRN2K2J-1-GP

SRN33J-5-GP-U
I2CA_SCL
I2CA_SD]

G_CLK_DDC2_R
G_DAT_DDC2_R

DDC_CLK_CON
DDC_DATA_CON

CRT Conn.

5V_S0

VGA

CH751H-40PT

SRN1K5J-GP

I2CB_SCL

HDMI_SCLK

I2CB_SDA

HDMI_SDATA

HDMI_SCLK_C SCL
HDMI_SDATA_C SDA

<Core Design>

Wistron Corporation

HDMI CONN

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
C
Date:

SMBUS Block Diagram

Document Number

Rev

Hawke-Intel
Sunday, September 09, 2007

Sheet
E

-1
54

of

57

Thermal Block Diagram

Audio Block Diagram


SPEAKER

OUTR+
OUTROUTLOUTL+

PORT_D_L

SPKR_INL

PORT_D_R

SPKR_INR

MAX9789A
CPU
DXP1

H_THERMDA

THRMDA

PORT_A_L

GAIN2

HPL

PORT_A_R

GAIN1

HPR

LINE1
OUT

SC2200P50V2KX-2GP
THRMDC

SGND1

H_THERMDC

Codec
STAC9228X5

Thermal
G792
DXP2

MAX4411

PORTF_L

INL

OUTL

PORTF_R

INR

OUTR

LINE2
OUT

G792_DXP2
PMBS3904-4-GP
SC2200P50V2KX-2GP

SGND2

G792_DXN2

Place near the GMCH

MIC
IN

PORTE_L

PORTE_R
VREFOUT_E

VGA
DXP3

VGA_THERMDA

Digital
MIC
Array

DMIC_CLK

THERMDP

DMIC_IN0

SC2200P50V2KX-2GP
THERMDN
SGND3

VGA_THERMDC
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
B

Thermal/Audio Block Diagram

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

-1
55

of

57

DATE

VERSON

ITEM

PAGE

Modify List

Changed R431 from 10K ohm to 2.2K ohm.

Changed X4's CL from 20pF to 10pF and changed C392 and C399
from 27pF to 12pF.
Changed RN27, RN28, RN29 and RN31 from 0 ohm to 22 ohm.

18

Changed LVDS connector from 42-pin to 40-pin.

18,33

6
7
8
9

Issue Description

OWNER
EE
EE

Follow M08 design.


By the Xtal vendor's FAE suggestion.
To solved these clock signals' Slew Rate are
over spec.
By ME suggestion.

EE
ME
EE

Connected the LCD1 pin 3 to GND and connected pin 6 to


WPC8763's GPIO05 (pin 108 of U17) with 10K ohm pull up to
3D3V_AUX_S5.

Supported the LCD cable PAID.

18

Added EC75-EC78 near CAMERA1.

By EMC team suggestion.

20

By the Xtal vendor's FAE suggestion.

21

Change C354 and C355 from 15pF to 12pF and changed X1


package from DMX26S to SM-14J.
Added R526 10K ohm between GPIO26 and 3D3V_S0, removed R404.

To solved 3D3V_S0 has leakage when S3 and S5.

21

Added the reserved Q47, D31, R530, R531 and R532.

For test EC_RMRST#_R circuit.

10

21

Changed R442 from 22.6 ohm to 20 ohm.

11

23

Changed HDD connector.

To sloved the left side USB ports and Camera


USB's eye diagram fail.
By ME suggestion.

12

25

Changed 1394 connector.

To used reverse type by ME suggestion.

13

25

Changed X5's CL from 20pF to 12pF.

By the Xtal vendor's FAE suggestion.

14

25

For these materials are no used.

2007/07/06 X00 to X01 15

25

Removed R466, U26, R192 and D19, and connected the net
MC_PWR_CTRL_0 to U25 pin 4.
Populated C887, C888 and C894-C896.

By EMC team suggestion.

16

26

Changed C387 and C390 from 27pF to 12pF.

By the Xtal vendor's FAE suggestion.

17

27

Changed RJ1 connector.

By ME suggestion.

18

30

Changed U61 from 8Mbits to 16Mbits SPI ROM.

By customer requirement.

19

30

Added EC79-EC82 near CAP1.

By EMC team suggestion.

20

30

Added EC83-EC88 near BT1.

By EMC team suggestion.

21

30

Added EC90-EC91 near CN2 (Biometric).

By EMC team suggestion.

22

31

Changed C880 and C881 from 0402 size to 0603 size.

Follow Thurman design.

23

32

To sloved the HP1 hadn't output.

24

32

Swaped the nets AUD_HP1_OUT_R1, AUD_HP1_OUT_L1 with


AUD_AMP_GAIN1, AUD_AMP_GAIN2.
Changed R211 and R212 from 100K ohm to 10M ohm.

25

33

De-pop R396 and populated R395.

26

33

Changed R391 and R405 from 10K ohm to 100K ohm.

To sloved the INSTANT_BTN# and


SNIFFER_PWR_SW# can't work.

27

33

Added R527 100K ohm between WLAN/BT_BTN# and 3D3V_AUX_S5.

To sloved the WLAN/BT_BTN# can't work.

28

33

Changed X2 package from DMX26S to SM-14J.

By the Xtal vendor's FAE suggestion.

29

33,36

Changed KB1 from 25-pin to 27-pin connector, connected the


KB1 pin 27 to GND and connected pin 26 to WPC8763's GPI92
(pin 99 of U17) with 10K ohm pull up to 3D3V_AUX_S5.

Supported the KB cable PAID.

30

33

Changed R408 and R389 from 10K ohm to 4.7K ohm.

By Vendor's FAE suggestion.

31

35

Changed FAN1 from 4-pin to 3-pin connector.

By ME suggestion.

32

36

Added R534, Q48 and R535 off SATA_LED# and Q23.

33

36

Connected LED2 pin A from 5V_S0 to 5V_S5.

34

38

35

39

36

40

37

42

Changed C530 and C531 from 1206 size to 1210 size and
populated C7.
Changed R477 from 12.1K ohm to 13.3K ohm and
changed R468 from 12.1K ohm to 11.8K ohm.
Changed R7 from 12.7K ohm to 11.8K ohm and
changed R468 from 3.24K ohm to 3.65K ohm.
Changed R135 from 12.1K ohm to 11K ohm .

Supported the HDD LED is dim when sinffer


switch press.
To sloved the Power LED can't breath when
system enter S3.
To solved noise when battery full load.

38

43

Populated C529.

To adjust 3.3V and 5V current limit by power


team suggestion.
To adjust CPU Vcore current limit by power
team suggestion.
To adjust 1.05V current limit by power
team suggestion.
By EMC team suggestion.

39

46

Added more one hole H33.

By EMC team suggestion.

40

46

Populated EC28 and EC31.

By EMC team suggestion.

41

47

Added C900, C901, C904 10uF and TC26 100uF.

To sloved VGA Vcore had OVP when run 3Dmark.

42

53

Changed R135 from 12.1K ohm to 10.5K ohm .

43

53

Added EC89 0.1uF between DCBATOUT and GND.

To adjust CPU Vcore current limit by power


team suggestion.
By EMC team suggestion.

EMC
EE
EE
EE
EE
ME
ME
EE
EE
EMC
EE
ME
EE
EMC
EMC
EMC
EE
EE

To sloved the AUD_HP1_EN and AUD_HP2_EN


volatge level lower than 2V.
To changed the MB version id to SB.

EE
EE
EE
EE
EE
ME,EE

EE
ME
EE
EE
Power
Power
Power
Power
EMC
EMC
EMC
Power
Power
EMC

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HISTORY from X00 to X01


Size
A3

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

56

-1
of

57

DATE

VERSON

ITEM

PAGE

2
3

2007/08/17 X01 to X02

Modify List

Issue Description

15

Changed U22 from ICS 9LPRS365BKLFT to Realtek


RTM875M-606-LF.
Changed HDMI power rail from +5V_HDMI to 5V_S0.

Changed clock gen symbol from ICS


9LPRS365BKLFT to Realtek RTM875M-606-LF.
Follow Thurman design.

17

Populated D4, D5, D6, D7 and D8.

By NV GPU ESD requirement.

17

Changed L1, L2 and L4 from BLM18BA100SN1 to BLM18BB470SN1

To solve the ring on RGB singnal.

18,33

Added D32, connected pin 1 to LCDVDD_TST_EN, pin 2 to


LCDVDD_EN and pin 3 to ENVDD.
Changed R276 from 0 to 100k ohm and changed R276.1 to GND

Added LCDVDD_TST_EN from U17.27 to control


U53.3

OWNER
EE
EE
EMC
EE
EE

18

Disconnted LCD1 pin 3 and pin 10

To prevent the power short to GND.

21

Added R542 for ECSCI# need to pull up 3D3V_S0

To solve one of CPU core always loading 100%.

27

Added EC92 22pF between NEWCARD_CLKREQ# and GND

By EMC team suggestion.

27

Added note for transformer source part number.

By EMC team suggestion.

10

29

1.Changed D20 to U73 for Bluetooth Action circuit.


2.Reserved U73, R193 and R195, populated R194.

1.It can be used both BT module and BT


mini-card.
2.Just keep BT module now.

11

29, 33

Connect MINI2 pin 20 to U17.24 (GPO47 of KBC).

12

30, 33

13

30

Rename SNIFFER_YELLOW# to SNIFFER_YELLOW, SNIFFER_BLUE# to


SNIFFER_BLUE.
Disconnted SNIFFER_BD1 pin 8 and CAP1 pin 7.

Changed WWAN enable WiFi RF controlled by


another GPIO pin (U17.24 is GPO47 of KBC).
These pins are High active.
To prevent power short to GND.

14

30

Changed EC90 and EC91 from 22pF to MLVG0402220NV05BP.

By EMC team suggestion.

15

32

Populated EC24, EC25, EC26 and EC27 and change to 1000pF.

16

32

Changed Q45 to U47 and added R543.

17

32

18

33

Changed R197 from 0 ohm to 100K ohm and pull up to


+5V_SPK_AMP, dispopulated R505 and populated R213.
Populated R396 and R398, dispopulated R395 and R399.

19

36

Populated Q48 and R534, dispopulated R535.

20

36

21

36

Changed C275 and C276 from reserved 33pF to


MLVG0402220NV05BP, and populated them
Changed KB EMI caps from 220pF to 180pF.

22

38

The U42 and U44 were swap the main source and 2nd source.

23

39

Populated R485 and dispopulated R489.

EE

EMC

To solved the word has repeat symptom when


key-in.
To prevented used AO4468 that SI4800BDY 2nd
source on charger H/S and L/S MOS.
To changed 3V and 5V PWM to Skip mode.

42, 43, 53

25

43, 53

26

20

Changed C354 and C355 from 12pF to 8.2pF.

For Negative Resistance of X1 isn't enough.

27

33

Changed C350 and C351 from 15pF to 10pF.

For Negative Resistance of X2 isn't enough.

EE
EE

HDD LED should be dim when power on by


Sniffer button.
By EMC team suggestion.

and

EE
EE
EE
EE
EE

EE
EMC
By EMC team suggestion.
EMC
To add AUD_SPK_ENABLE# controlled by AMP_MUTE#. EE
To solve HP1, HP2 and Speaker have "BoBo"
EE

24

Change the U56 and U39 from 2nd source to main source,
swap the U38 and U58's the main source and 2nd source

EE

noisy when power on, off, enter S3.


Change Board ID to version SC.

Changed C329, C566 and C272 rated voltage from 6.3V to 10V.

EE
EE
EE
EE
EE

For derating issues by power team requirment.


To combined U39 and U56 material item of BOM
with CPU H/S MOS (U4 and U35).

EE
EE

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HISTORY from X01 to X02


Size
A3

Document Number

Date: Sunday, September 09, 2007


A

Rev

Hawke-Intel
Sheet
E

57

-1
of

57

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