Escolar Documentos
Profissional Documentos
Cultura Documentos
Page Index
===============
P01-Cover Page
P02-Block Diagram
P03-Notes List
P04-Dothan(1/2)
P05-Dothan(2/2)
1
P06-Alviso HOST(1/5)
P07-Alviso DDR(2/5)
P08-Alviso PCI-E(3/5)
P09-Alviso POWER(4/5)
P10-Alviso POWER(5/5)
P11-DDRI-SODIMM0
Compal Confidential
P12-DDRI-SODIMM1
P13-DDR Decoupling
P14-Clock Generator
P15-CRT Conn.
P16-VGA / LCD Conn.
P17-ICH6(1/4)_HUB,PCI,HOST
P18-ICH6(2/4)_CPU,AC97,IDE,LPC
P19-ICH6(3/4)_USB,PM,LAN,GPIO
P20-ICH6(4/4)_POWER&GND
P21-HDD/CDROM
P22-DVI / TV_Out
Conn
P26-LAN BCM5788M
P27-LAN Magnetic & RJ45/RJ11
P28-Mimi-PCI Slot
P29-AC97 Codec_ALC250D
P30-Audio Line in Switch
P31-AMP & Audio Jack
P32-Super IO SMC217
Rev:0.2
P33-ENE-KB910
P34-MDC / BT / KBD / TP Conn.
P49-PWR-OTP
P50-PWR-PIR
Compal Secret Data
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
Cover Sheet
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
Rev
0.2
Sheet
E
of
51
Compal confidential
Project Code: EFL50/ EFT51
File Name : LA-2761
CRT & TV-OUT
Clock Generator
ICS954226AGT
page 4,5
page 4
page 15
Thermal Sensor
ADM1032ARM
FSB
H_A#(3..31)
PCI-E BUS
page 15
page 14
H_D#(0..63)
DDR-2
DDRII-SO-DIMM X2
BANK 0, 1, 2, 3page 11,12,13
PCBGA 1257
page 6,7,8,9,10
page 16
DMI
LCD CONN
page 16
USB conn x 3
USB 2.0
page 37
Intel ICH6-M
BT Conn
USB 2.0
page 34
mBGA-609
PCI BUS
Audio CKT
ALC250-D
AC-LINK
BroadCOM
BCM4401KFB
BCM5788M
Mini PCI
Socket
page 26
page 28
page 17,18,19,20
ENE Controller
CB712
1394 Controller
TSB43AB21
RJ45 CONN
page 27
page 24
3in1 CardReader
page 24
Slot
page 36
page 36
1 394
Conn.
page 21
LPC BUS
Docking Conn.
PCI-E Bridge
RJ45
VGA
DVI
TV-Out
HP-Out/ Line-Out
Mic-in/ Line-in
SPDIF
Parallel Port
Serial Port
KB/ Mouse (PS/2)
page 25
HDD Conn.
CDROM Conn.
PATA
page 21
SMsC LPC47N217
RTC CKT.
page 40
page 39
ENE KB910Q
page 32
page 33
Int. KBD
Power Circuit DC/DC
page 42~49
Power OK CKT.
Parellel Port
DOCKING CONN
page 39
page 38
page 36
page 25
page 23,24
Slot 0
page 31
RJ11 CONN
MDC Conn.
SATA
3
Jack x2
page 29
Serial Port
DOCKING CONN
page 38
page 34
Touch Pad
CONN.page 34
page 39
4
BIOS
page 35
Button
LED
Security Classification
page 38
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
Block Diagrams
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
Rev
0.2
Sheet
E
of
51
SIGNAL
STATE
Voltage Rails
Description
S1
S3
S4/ S5
VIN
N/A
N/A
N/A
B+
N/A
N/A
N/A
+CPU_CORE
ON
OFF
OFF
+1.05VS
ON
OFF
OFF
+DDRVTT
ON
OFF
OFF
HIGH
HIGH
ON
ON
ON
ON
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
LOW
ON
OFF
OFF
OFF
ON
ON
ON*
ON
OFF
OFF
+1.8VS
ON
OFF
OFF
+DDRVCC
ON
ON
OFF
Vcc
Ra / Rc
+2.5VS
ON
OFF
OFF
Board ID
+3VALW
ON
ON
ON*
+3V
ON
ON
OFF
+3VS
ON
OFF
OFF
+5VALW
ON
ON
ON*
+5VS
ON
OFF
OFF
+5VMOD
ON
OFF
OFF
+12VALW
ON
ON
ON*
+RTCVCC
RTC power
ON
ON
ON
0
1
2
3
4
5
6
7
PIRQA/PIRQB
1394
AD16
PIRQE
SD
AD20
PIRQA/PIRQB
Mini-PCI
AD18
PIRQG/PIRQH
LAN
AD17
PIRQF
Board ID
0
1
2
3
4
5
6
7
Interrupts
EC SM Bus1 address
Address
Device
Address
Smart Battery
0001 011X b
ADM1032
1001 110X b
(24C04)
SKU ID
0
1
2
3
4
5
6
7
1010 000X b
1011 000Xb
Device
Address
Clock Generator
(ICS 954226AGT)
1101 001Xb
DDRII DIMM0
1001 000Xb
DDRII DIMM2
1001 010Xb
V AD_BID min
0 V
0.216 V
0.436 V
0.712 V
1.036 V
1.453 V
1.935 V
2.500 V
V AD_BID typ
0 V
0.250 V
0.503 V
0.819 V
1.185 V
1.650 V
2.200 V
3.300 V
PCB Revision
0.1
0.2
BTO Item
UMA
Discrete
LAN 10/100
LAN GIGA
1 Spindle
2 Spindle
2 Spindle with SATA
2 Spindle with PATA
1 Spindle with SATA
1 Spindle with PATA
With Docking
Without Docking
With 1394
With 1394 4pin
With 1394 6pin
SKU
BOM Structure
GM@
PM@
4401@
5788@
1S@
2S@
2SS@
2SP@
1SS@
1SP@
WD@
ND@
1394@
1394<4>@
1394<6>@
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
Notes
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
V AD_BID max
0 V
0.289 V
0.538 V
0.875 V
1.264 V
1.759 V
2.341 V
3.300 V
SKU ID Table
EC SM Bus2 address
Device
3.3V +/- 5%
100K +/- 5%
Rb / Rd
0
8.2K +/- 5%
18K +/- 5%
33K +/- 5%
56K +/- 5%
100K +/- 5%
200K +/- 5%
NC
BOARD ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
C ardBus
Clock
HIGH
REQ#/GNT#
+VS
LOW
IDSEL#
+V
HIGH
+1.5VALW
Device
+VALW
S1(Power On Suspend)
+1.5VS
EEPROM(24C16/02)
Full ON
Power Plane
Rev
0.2
Sheet
E
of
51
JP20A
6 H_D#[0..63]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#[0..4]
H_RS#[0..2]
H_D#[0..63]
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
6 H_ADSTB#0
6 H_ADSTB#1
H_ADSTB#0
H_ADSTB#1
13 CLK_CPU_BCLK
13 CLK_CPU_BCLK#
6 H_ADS#
6 H_BNR#
6 H_BPRI#
6 H_BR0#
6 H_DEFER#
6 H_DRDY#
6 H_HIT#
6 H_HITM#
6 H_LOCK#
6 H_CPURST#
6 H_TRDY#
CLK_CPU_BCLK
CLK_CPU_BCLK#
H_ADS#
H_BNR#
H_BPRI#
H_BR0#
H_DEFER#
H_DRD Y#
H_HIT#
H_HITM#
H_IERR#
H_LOCK#
H_CPURST#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#
6 H_DBSY#
17 H_DPSLP#
17 H_DPRSTP#
6 H_DPWR#
17 H_PWRGOOD
6,17 H_CPUSLP#
6,17 H_THERMTRIP#
A
ITP_DBRRESET#
H_DBSY#
H_DPSLP#
H_DPRSTP#
H_DPWR#
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
AA3
Y3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
R2
P3
T2
P1
T1
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADDR GROUP
A19
A25
A22
B21
A24
B26
A21
B20
C20
B24
D24
E24
C26
B23
E23
C25
H23
G25
L23
M26
H24
F25
G24
J23
M23
J25
L26
N24
M25
H26
N25
K25
Y26
AA24
T25
U23
V23
R24
R26
R23
AA23
U26
V24
U25
V26
Y23
AA26
Y25
AB25
AC23
AB24
AC20
AC22
AC25
AD23
AE22
AF23
AD24
AF20
AE21
AD21
AF25
AF22
AF26
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DINV0#
DINV1#
DINV2#
DINV3#
D25
J26
T24
AD20
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
DATA GROUP
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
U3
AE5
ADSTB0#
ADSTB1#
A16
A15
ITP_CLK0
ITP_CLK1
B15
B14
BCLK0
BCLK1
N2
L1
J3
N4
L4
H2
K3
K4
A4
J2
B11
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
Dothan
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
HITM#
IERR#
LOCK#
RESET#
H1
K1
L2
M3
RS0#
RS1#
RS2#
TRDY#
C8
B8
A9
C9
BPM0#
BPM1#
BPM2#
BPM3#
HOST CLK
CONTROL GROUP
PRO_CHOT#
A7
M2
B7
G1
C19
A10
B10
B17
DBR#
DBSY#
DPSLP#
DPRSTP#
DPWR#
PRDY#
PREQ#
PROCHOT#
H_PWRGOOD
H_CPUSLP#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
E4
A6
A13
C12
A12
C5
F23
C11
B13
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
THERMDA
THERMDC
H_THERMTRIP#
B18
A18
C17
THERMDA DIODE
THERMDC
THERMTRIP#
MISC
THERMAL
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
C23
K24
W25
AE24
C22
L24
W24
AE25
+3VS
1
C402
6 H_RS#[0..2]
H_A#[3..31]
C401
0.1U_0402_16V4Z
U29
2200P_0402_50V7K
33 EC_SMB_CK2
33 EC_SMB_DA2
R379
@ 10K_0402_5%
6 H_A#[3..31]
6 H_REQ#[0..4]
THERMDA
D+
VDD1
THERMDC
D-
ALERT#
EC_SMB_CK2
SCLK
EC_SMB_DA2
SDATA
THERM#
GND
ADM1032ARM_RM8
+1.05VS
C
ITP_TDI
R53
ITP_TDO
R383
1 @ 54.9_0402_1%
150_0402_5%
H_CPURST#
R382
1 @ 54.9_0402_1%
ITP_TMS
R54
40.2_0402_1%
PRO_CHOT#
R386
56_0402_5%
H_PWRGOOD
R56
200_0402_5%
H_IERR#
R380
56_0402_5%
+3VS
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
C2
D3
A3
B5
D1
D4
H_A20M#
H_FERR#
H_IGNNE#
H_INIT#
H_INTR
H_NMI
STPCLK#
SMI#
C6
B4
H_STPCLK#
H_SMI#
6
6
6
6
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
6
6
6
6
6
6
6
6
ITP_DBRRESET#
R381
150_0402_5%
ITP_TRST#
R384
680_0402_5%
ITP_TCK
R385
27.4_0402_1%
TEST1
R55
1 @ 1K_0402_5%
TEST2
R401
1 @ 1K_0402_5%
0415
H_A20M# 17
H_FERR# 17
H_IGNNE# 17
H_INIT# 17
H_INTR 17
H_NMI 17
LEGACY CPU
H_INIT#
C685 1
2 47P_0402_50V8J
H_NMI
C686 1
2 47P_0402_50V8J
H_SMI#
C687 1
2 47P_0402_50V8J
H_CPURST# C688 1
2 47P_0402_50V8J
H_STPCLK# 17
H_SMI# 17
TYCO_1612365-1_Dothan
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Rev
0.2
Sheet
1
of
51
+CPU_CORE
+CPU_CORE
JP20B
@ 54.9_0402_1%
@ 54.9_0402_1%
2
2
R393
R388
R387
R417
+VCCA
1
1
1
1
30 mils0_0603_5%
2
@20_0603_5%
@20_0603_5%
@20_0603_5%
+1.8VS
P23
W4
VCCQ0
VCCQ1
2
@ 0_1206_5%
+VCCA
2
0_1206_5%
1
R399
C405
0.01U_0402_16V7K 2
C463
2
10U_0805_10V4Z
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
+CPU_CORE
+1.05VS
PSI#
E1
PSI#
46
46
46
46
46
46
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
E2
F2
F3
G3
G4
H4
VID0
VID1
VID2
VID3
VID4
VID5
R422
1K_0402_1%
46 PSI#
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
1
R420
GTL_REF0
2
2K_0402_1%
13 CPU_BSEL0
13 CPU_BSEL1
AD26
JP20C
VCCSENSE
VSSSENSE
VCCA0
VCCA1
VCCA2
VCCA3
AE7
AF6
VCCA0
F26
VCCA1
B1
VCCA2
N1
VCCA3 AC26
+1.05VS
VCCSENSE
VSSSENSE
Dothan
POWER, GROUNG, RESERVED SIGNALS AND NC
R144 1
R141 1
GTLREF
CPU_BSEL0
CPU_BSEL1
C16
C14
BSEL0
BSEL1
COMP0
COMP1
COMP2
COMP3
P25
P26
AB2
AB1
COMP0
COMP1
COMP2
COMP3
B2
C3
E26
AF7
AC1
RSVD
RSVD
RSVD
RSVD
RSVD
TYCO_1612365-1_Dothan
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A2
A5
A8
A11
A14
A17
A20
A23
A26
B3
B6
B9
B12
B16
B19
B22
B25
C1
C4
C7
C10
C13
C15
C18
C21
C24
D2
D5
D7
D9
D11
D13
D15
D17
D19
D21
D23
D26
E3
E6
E8
E10
E12
E14
E16
E18
E20
E22
E25
F1
F4
F5
F7
F9
F11
F13
F15
F17
F19
F21
F24
G2
G6
G22
G23
G26
H3
H5
H21
H25
J1
J4
J6
J22
J24
K2
K5
K21
K23
K26
L3
L6
L22
L25
M1
220U_D2_4VM_R12
1
1
+
+ C50
C49
2
220U_D2_4VM_R12
220U_D2_4VM_R12
1
+ C151
C150
2
220U_D2_4VM_R12
+CPU_CORE
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
1
C455
C456
C424
C435
C443
C448
C453
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
C112
C421
C420
C434
C442
C447
C423
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
C57
C61
C72
C82
C97
C109
C60
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
C81
C452
C113
C96
C108
C58
C71
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
10U_0805_10V4Z
+CPU_CORE
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
C668
C669
C670
C671
C672
C673
C667
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
2
2
10U_0805_10V4Z
F20
F22
G5
G21
H6
H22
J5
J21
K22
U5
V6
V22
W5
W21
Y6
Y22
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
M4
M5
M21
M24
N3
N6
N22
N23
N26
P2
P5
P21
P24
R1
R4
R6
R22
R25
T3
T5
T21
T23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Dothan
POWER, GROUND
2
10U_0805_10V4Z
0331
Vcc-core
Decoupling
SPCAP,Polymer
C,uF
ESR, mohm
ESL,nH
3X330uF
9m ohm/3
3.5nH/4
35X10uF
5m ohm/35
0.6nH/35
0.1U_0402_16V4Z
0.1U_0402_16V4Z
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
TYCO_1612365-1_Dothan
+1.05VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
50 mils
R408 1
27.4_0402_1%
COMP0
R407 1
54.9_0402_1%
COMP1
R424 1
27.4_0402_1%
COMP2
R425 1
54.9_0402_1%
COMP3
500 mils
C404
1
C63
1
C68
1
C90
1
C75
1
C85
C43
C42
1
C41
C98
2
A
150U_D2_6.3VM
0.1U_0402_16V4Z
2005/03/08
Issued Date
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
1
C78
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Rev
0.2
Sheet
1
of
51
H_RS#[0..2]
+1.5VS
H_RS#[0..2] 4
H_A#[3..31]
4 H_A#[3..31]
H_REQ#[0..4]
4 H_REQ#[0..4]
H_D#[0..63]
H_D#[0..63] 4
CLK_DREF_SSC
R114 1
2 PM@ 0_0402_5%
CLK_DREF_SSC#
R122 1
2 PM@ 0_0402_5%
U31A
13 CLK_MCH_BCLK#
13 CLK_MCH_BCLK
4
4
4
4
4
4
4
4
4
4
4
4
CLK_MCH_BCLK#
CLK_MCH_BCLK
AB1
AB2
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
G4
K1
R3
V3
G5
K2
R2
W4
H8
K3
T7
U5
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_CPURST#
4 H_CPURST#
H_ADS#
H_TRDY#
H_DPWR#
H_DRD Y#
H_DEFER#
4 H_ADS#
4 H_TRDY#
4 H_DPWR#
4 H_DRDY#
4 H_DEFER#
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
HCLKN
HCLKP
HDSTBN#0
HDSTBN#1
HDSTBN#2
HDSTBN#3
HDSTBP#0
HDSTBP#1
HDSTBP#2
HDSTBP#3
HDINV#0
HDINV#1
HDINV#2
HDINV#3
H10
HCPURST#
F8
B5
G6
F7
E6
F6
D6
D4
B3
E7
A5
D5
C6
G8
A4
C5
B4
HADS#
HTRDY#
HDPWR#
HDRDY#
HDEFER#
HEDRDY#
HHITM#
HHIT#
HLOCK#
HBREQ0#
HBNR#
HBPRI#
HDBSY#
HCPUSLP#
HRS0#
HRS1#
HRS2#
J11
C1
C2
T1
L1
D1
P1
H_VREF
H_XRCOMP
H_XSCOMP
H_YRCOMP
H_YSCOMP
H_XSWING
H_YSWING
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
18
18
18
18
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
18
18
18
18
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
11 M_CLK_DDR0
11 M_CLK_DDR1
12 M_CLK_DDR3
12 M_CLK_DDR4
11 M_CLK_DDR#0
11 M_CLK_DDR#1
12 M_CLK_DDR#3
12 M_CLK_DDR#4
11
11
12
12
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
11
11
12
12
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
R162 1
R163 1
2 40.2_0402_1%
2 40.2_0402_1%
10mils 11 M_ODT0
11 M_ODT1
12 M_ODT2
12 M_ODT3
R165 1
R166 1
+1.8V
2 80.6_0402_1%
2 80.6_0402_1%
10mils
AA31
AB35
AC31
AD35
DMIRXN0
DMIRXN1
DMIRXN2
DMIRXN3
DMI_ITX_MRX_P0
DMI_ITX_MRX_P1
DMI_ITX_MRX_P2
DMI_ITX_MRX_P3
Y31
AA35
AB31
AC35
DMIRXP0
DMIRXP1
DMIRXP2
DMIRXP3
AA33
AB37
AC33
AD37
DMITXN0
DMITXN1
DMITXN2
DMITXN3
Y33
AA37
AB33
AC37
DMITXP0
DMITXP1
DMITXP2
DMITXP3
DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3
DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3
M_CLK_DDR0
M_CLK_DDR1
AM33
AL1
AE11
AJ34
AF6
AC10
M_CLK_DDR3
M_CLK_DDR4
M_CLK_DDR#0
M_CLK_DDR#1
SM_CK0
SM_CK1
SM_CK2
SM_CK3
SM_CK4
SM_CK5
AN33
AK1
AE10
AJ33
AF5
AD10
SM_CK0#
SM_CK1#
SM_CK2#
SM_CK3#
SM_CK4#
SM_CK5#
DDR_CKE0_DIMMA AP21
DDR_CKE1_DIMMA AM21
DDR_CKE2_DIMMB AH21
DDR_CKE3_DIMMB AK21
SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3
M_CLK_DDR#3
M_CLK_DDR#4
CFG/RSVD
HVREF
HXRCOMP
HXSCOMP
HYRCOMP
HYSCOMP
HXSWING
HYSWING
18
18
18
18
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
SM_CS0#
SM_CS1#
SM_CS2#
SM_CS3#
M_OCDCOMP0
M_OCDCOMP1
M_ODT0
M_ODT1
M_ODT2
M_ODT3
AF22
AF16
AP14
AL15
AM11
AN10
SM_OCDCOMP0
SM_OCDCOMP1
SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3
M_RCOMPN
M_RCOMPP
SMVREF
AK10
AK11
AF37
AD1
AE27
AE28
AF9
AF10
SMRCOMPN
SMRCOMPP
SMVREF0
SMVREF1
SMXSLEWIN
SMXSLEWOUT
SMYSLEWIN
SMYSLEWOUT
+1.05VS
1
2
1
2
24.9_0402_1%
54.9_0402_1%
24.9_0402_1%
54.9_0402_1%
(10mil:20mil)
BM_BUSY#
EXT_TS0#
EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN
DREF_CLKP
DREF_SSCLKP
DREF_SSCLKN
CPU_SLP#
H_YSWING
+1.05VS
R409
221_0603_1%
R406
0.1U_0402_16V4Z
200_0603_1%
2 @ 1K_0402_5%
CFG16
CFG6
R124 1
2 1K_0402_5%
CFG18
CFG19
CFG7
R117 1
2 @ 1K_0402_5%
CFG9
R119 1
2 @ 1K_0402_5%
CFG12 R125 1
2 @ 1K_0402_5%
CFG13 R137 1
2 @ 1K_0402_5%
CFG16 R140 1
2 @ 1K_0402_5%
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
CLK_DREF_96M#
CLK_DREF_96M
CLK_DREF_SSC
CLK_DREF_SSC#
AP37
AN37
AP36
AP2
AP1
AN1
B1
A2
B37
A36
A37
SMVREF
0.1U_0402_16V4Z
R158
C185
1K_0402_1%
(12mil:10mil)
C179
0.1U_0402_16V4Z
C149
0.1U_0402_16V4Z
R423
100_0603_1%
C459
R411
0.1U_0402_16V4Z
100_0603_1%
CFG18 R128 1
2 @ 1K_0402_5%
CFG19 R135 1
2 @ 1K_0402_5%
PM_BMBUSY# 18
H_THERMTRIP# 4,17
VGATE 13,18,46
PLT_RST# 16,18,20,32,33,41
CLK_DREF_96M# 13
CLK_DREF_96M 13
CLK_DREF_SSC 13
CLK_DREF_SSC# 13
+2.5VS
EXT_TS#0 R139 1
2 10K_0402_5%
EXT_TS#1 R136 1
2 10K_0402_5%
CFG5
CFG6
Low = DDR-II
High = DDR-I
CFG7
CFG9
CFG[13:12]
00
01
10
11
CFG16
(FSB Dynamic
ODT)
Low = Disabled
High = Enabled
CFG[2:0]
*
*
= Reserved
= XOR Mode Enabled
= All Z Mode Enabled
= Normal Operation (Default)
CFG18
(VCC Select)
CFG19
(VTT Select)
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
2 @ 1K_0402_5%
R127 1
C138
R132 1
CFG5
H_XSWING
CFG0
(12mil:10mil)
H_VREF
CFG12
CFG13
1K_0402_1%
R421
221_0603_1%
R405
100_0603_1%
(5mil:15mil)
2 10K_0402_5%
A24
A23
D37
C37
ALVISO_BGA1257
0_0402_5%
+1.05VS
R131 1
PM_BMBUSY#
EXT_TS#0
EXT_TS#1
H_THERMTRIP#
VGATE
PLT_RST#
CFG0
J23
J21
H22
F5
AD30
AE29
R164
R130 1
+1.05VS
H_CPUSLP#
+1.05VS
CFG9
4,17 H_CPUSLP#
CFG5
CFG6
CFG7
+1.8V
ALVISO_BGA1257
MCH_CLKSEL1 13
MCH_CLKSEL0 13
10mils
R1202
R1111
R1512
R1451
CFG0
MCH_CLKSEL1
MCH_CLKSEL0
AN16
AM14
AH15
AG16
M_YSLEW
G16
H13
G14
F16
F15
G15
E16
D17
J16
D15
E15
D14
E14
H12
C14
H15
J15
H14
G22
G23
D23
G25
G24
J17
A31
A30
D26
D25
+2.5VS
DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#
M_XSLEW
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
RSVD21
RSVD22
RSVD23
RSVD24
RSVD25
RSVD26
RSVD27
4
4
4
4
4
4
4
H_HITM#
H_HIT#
H_LOCK#
H_BR0#
H_BNR#
H_BPRI#
H_DBSY#
CPU_SLP#
H_RS#0
H_RS#1
H_RS#2
HPCREQ#
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HADSTB#0
HADSTB#1
DMI_ITX_MRX_N0
DMI_ITX_MRX_N1
DMI_ITX_MRX_N2
DMI_ITX_MRX_N3
NC
4 H_ADSTB#0
4 H_ADSTB#1
A11
A7
D7
B8
C7
A8
B9
E13
18
18
18
18
DDR MUXING
E4
E1
F4
H7
E2
F1
E3
D3
K7
F2
J7
J8
H6
F3
K8
H5
H1
H2
K5
K6
J4
G3
H3
J1
L5
K4
J5
P7
L7
J3
P5
L3
U7
V6
R6
R5
P3
T8
R7
R8
U8
R4
T4
T5
R1
T3
V8
U6
W6
U3
V5
W8
W7
U2
U1
Y5
Y2
V4
Y7
W1
W3
Y3
Y6
W2
CLK PM
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_ADSTB#0
H_ADSTB#1
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
Alviso
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HOST
G9
C9
E9
B7
A10
F9
D8
B10
E10
G10
D9
E11
F10
G11
G13
C10
C11
D11
C12
B13
A12
F12
G12
E12
C13
B11
D13
A13
F13
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
DMI
U31B
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
Rev
0.2
Sheet
1
of
51
11 DDR_A_DQS#[0..7]
C
11 DDR_A_MA[0..13]
11 DDR_A_CAS#
11 DDR_A_RAS#
11 DDR_A_WE#
B
SA_BS0#
SA_BS1#
SA_BS2#
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
AJ37
AP35
AL29
AP24
AP9
AP4
AJ2
AD3
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
AK36
AP33
AN29
AP23
AM8
AM4
AJ1
AE5
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
AK35
AP34
AN30
AN23
AN8
AM5
AH1
AE4
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
AL17
AP17
AP18
AM17
AN18
AM18
AL19
AP20
AM19
AL20
AM16
AN20
AM20
AM15
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
DDR_A_CAS#
DDR_A_RAS#
AN15
AP16
AF29
AF28
AP15
SA_CAS#
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
DDR_A_WE#
11 DDR_A_DQS[0..7]
AK15
AK16
AL21
AG35
AH35
AL35
AL37
AH36
AJ35
AK37
AL34
AM36
AN35
AP32
AM31
AM34
AM35
AL32
AM32
AN31
AP31
AN28
AP28
AL30
AM30
AM28
AL28
AP27
AM27
AM23
AM22
AL23
AM24
AN22
AP22
AM9
AL9
AL6
AP7
AP11
AP10
AL7
AM7
AN5
AN6
AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2
AG1
AL3
AM2
AH3
AG3
AF3
AE3
AD6
AC4
AF2
AF1
AD4
AD5
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
U31D
DDR_A_D[0..63] 11
12 DDR_B_BS#0
12 DDR_B_BS#1
12 DDR_B_BS#2
12 DDR_B_DM[0..7]
12 DDR_B_DQS[0..7]
12 DDR_B_DQS#[0..7]
12 DDR_B_MA[0..13]
12 DDR_B_CAS#
12 DDR_B_RAS#
12 DDR_B_WE#
DDR_B_BS#0
DDR_B_BS#1
DDR_B_BS#2
AJ15
AG17
AG21
SB_BS0#
SB_BS1#
SB_BS2#
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
AF32
AK34
AK27
AK24
AJ10
AK5
AE7
AB7
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
AF34
AK32
AJ28
AK23
AM10
AH6
AF8
AB4
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
AF35
AK33
AK28
AJ23
AL10
AH7
AF7
AB5
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
AH17
AK17
AH18
AJ18
AK18
AJ19
AK19
AH19
AJ20
AH20
AJ16
AG18
AG20
AG15
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
AH14
AK14
AF15
AF14
AH16
SB_CAS#
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
DDR_B_CAS#
DDR_B_RAS#
DDR_B_WE#
U31C
DDR_A_BS#0
DDR_A_BS#1
DDR_A_BS#2
11 DDR_A_BS#0
11 DDR_A_BS#1
11 DDR_A_BS#2
11 DDR_A_DM[0..7]
ALVISO_BGA1257
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
AE31
AE32
AG32
AG36
AE34
AE33
AF31
AF30
AH33
AH32
AK31
AG30
AG34
AG33
AH31
AJ31
AK30
AJ30
AH29
AH28
AK29
AH30
AH27
AG28
AF24
AG23
AJ22
AK22
AH24
AH23
AG22
AJ21
AG10
AG9
AG8
AH8
AH11
AH10
AJ9
AK9
AJ7
AK6
AJ4
AH5
AK8
AJ8
AJ5
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
DDR_B_D[0..63] 12
ALVISO_BGA1257
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Rev
0.2
Sheet
1
of
51
+2.5VS
+3VS
PCIE_MTX_C_GRX_N[0..15]
15,41 PCIE_MTX_C_GRX_N[0..15]
R92
GM@ 2.2K_0402_5%
2
G
2
GMCH_ENBKL
GM@ BSS138_SOT23
PCEI_GTX_C_MRX_P[0..15]
15,41 PCEI_GTX_C_MRX_P[0..15]
Q10
1
@ 0_0402_5%
U31G
R143
4.99K_0603_1%
GMCH_CRT_CLK
GMCH_CRT_DATA
14 GMCH_CRT_CLK
14 GMCH_CRT_DATA
14 GMCH_CRT_B
GMCH_CRT_B
2
R121
2
R107
2
R403
14 GMCH_CRT_G
14 GMCH_CRT_R
14 GMCH_CRT_VSYNC
14 GMCH_CRT_HSYNC
1
PM@ 150_0402_5%
1
PM@ 150_0402_5%
1
PM@ 150_0402_5%
+2.5VS
R97
R98
R100
R99
4.7K_0402_5%
GMCH_CRT_CLK
4.7K_0402_5%
GMCH_CRT_DATA
2.2K_0402_5%
LCTLB_DATA
2.2K_0402_5%
2
R108
TV_REFSET
1
0_0402_5%
15 GMCH_ENVDD
GMCH_CRT_G
GMCH_CRT_R
GMCH_CRT_VSYNC
GMCH_CRT_HSYNC
1
2 REFSET
R142
255_0402_1%
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
GMCH_ENVDD
LIBG
LCTLA_CLK
15
15
15
15
R134
100K_0402_5%
LBKLT_EN
R112
1.5K_0402_1%
LIBG
R109
2 PM@ 150_0402_5%
GMCH_TV_COMPS
R118
2 PM@ 150_0402_5%
GMCH_TV_LUMA
R101
2 PM@ 150_0402_5%
GMCH_TV_CRMA
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+
MISC
SDVOCTRL_DATA
SDVOCTRL_CLK
GCLKN
GCLKP
A15
C16
A17
J18
B15
B16
B17
TVDAC_A
TVDAC_B
TVDAC_C
TV_REFSET
TV_IRTNA
TV_IRTNB
TV_IRTNC
E24
E23
E21
D21
C20
B20
A19
B19
H21
G21
J20
DDCCLK
DDCDATA
BLUE
BLUE#
GREEN
GREEN#
RED
RED#
VSYNC
HSYNC
REFSET
E25
F25
C23
C22
F23
F22
F26
C33
C31
F28
F27
LBKLT_CTL
LBKLT_EN
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
LIBG
LVBG
LVREFH
LVREFL
GMCH_TXCLKGMCH_TXCLK+
GMCH_TZCLKGMCH_TZCLK+
B30
B29
C25
C24
LACLKN
LACLKP
LBCLKN
LBCLKP
GMCH_TXOUT0GMCH_TXOUT1GMCH_TXOUT2-
B34
B33
B32
LADATAN0
LADATAN1
LADATAN2
GMCH_TXOUT0+
GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TZOUT0GMCH_TZOUT1GMCH_TZOUT2-
A34
A33
B31
C29
D28
C27
GMCH_TV_COMPS
GMCH_TV_LUMA
GMCH_TV_CRMA
21 GMCH_TV_COMPS
21 GMCH_TV_LUMA
21 GMCH_TV_CRMA
SDVO_SDAT
SDVO_SCLK
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
H24
H25
AB29
AC29
TV
15,41
15,41
13
13
SDVO_SDAT
SDVO_SCLK
CLK_MCH_3GPLL#
CLK_MCH_3GPLL
VGA
2
R88
LVDS
PCEI_GTX_C_MRX_N[0..15]
15,41 PCEI_GTX_C_MRX_N[0..15]
LBKLT_EN
1
D
15,33 GMCH_ENBKL
PCIE_MTX_C_GRX_P[0..15]
15,41 PCIE_MTX_C_GRX_P[0..15]
LADATAP0
LADATAP1
LADATAP2
LBDATAN0
LBDATAN1
LBDATAN2
+2.5VS
+3VS
C28
D27
C26
LBDATAP0
LBDATAP1
LBDATAP2
1
R115
EXP_COMPI
EXP_ICOMPO
EXP_RXN0/SDVO_TVCLKIN#
EXP_RXN1/SDVO_INT#
EXP_RXN2/SDVO_FLDSTALL#
EXP_RXN3
EXP_RXN4
EXP_RXN5
EXP_RXN6
EXP_RXN7
EXP_RXN8
EXP_RXN9
EXP_RXN10
EXP_RXN11
EXP_RXN12
EXP_RXN13
EXP_RXN14
EXP_RXN15
E30
F34
G30
H34
J30
K34
L30
M34
N30
P34
R30
T34
U30
V34
W30
Y34
PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_N4
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_N15
EXP_RXP0/SDVO_TVCLKIN
EXP_RXP1/SDVO_INT
EXP_RXP2/SDVO_FLDSTALL
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9
EXP_RXP10
EXP_RXP11
EXP_RXP12
EXP_RXP13
EXP_RXP14
EXP_RXP15
D30
E34
F30
G34
H30
J34
K30
L34
M30
N34
P30
R34
T30
U34
V30
W34
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_P15
EXP_TXN0/SDVOB_RED#
EXP_TXN1/SDVOB_GREEN#
EXP_TXN2/SDVOB_BLUE#
EXP_TXN3/SDVOB_CLKN
EXP_TXN4/SDVOC_RED#
EXP_TXN5/SDVOC_GREEN#
EXP_TXN6/SDVOC_BLUE#
EXP_TXN7/SDVOC_CLKN
EXP_TXN8
EXP_TXN9
EXP_TXN10
EXP_TXN11
EXP_TXN12
EXP_TXN13
EXP_TXN14
EXP_TXN15
E32
F36
G32
H36
J32
K36
L32
M36
N32
P36
R32
T36
U32
V36
W32
Y36
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N8
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N13
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_N15
EXP_TXP0/SDVOB_RED
EXP_TXP1/SDVOB_GREEN
EXP_TXP2/SDVOB_BLUE
EXP_TXP3/SDVOB_CLKP
EXP_TXP4/SDVOC_RED
EXP_TXP5/SDVOC_GREEN
EXP_TXP6/SDVOC_BLUE
EXP_TXP7/SDVOC_CLKP
EXP_TXP8
EXP_TXP9
EXP_TXP10
EXP_TXP11
EXP_TXP12
EXP_TXP13
EXP_TXP14
EXP_TXP15
D32
E36
F32
G36
H32
J36
K32
L36
M32
N36
P32
R36
T32
U36
V32
W36
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P10
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_P13
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
24.9_0402_1%
+1.5VS
C422 1
C437 1
C445 1
C451 1
C460 1
C465 1
C469 1
C476 1
C418 1
C430 1
C444 1
C450 1
C458 1
C464 1
C468 1
C475 1
2
2
2
2
2
C416
0.1U_0402_16V4Z
C428
0.1U_0402_16V4Z
C440
0.1U_0402_16V4Z
C449
0.1U_0402_16V4Z
C457
0.1U_0402_16V4Z
C462
0.1U_0402_16V4Z
C467
0.1U_0402_16V4Z
C474
0.1U_0402_16V4Z
C413
0.1U_0402_16V4Z
C425
0.1U_0402_16V4Z
C438
0.1U_0402_16V4Z
C446
0.1U_0402_16V4Z
C454
0.1U_0402_16V4Z
C461
0.1U_0402_16V4Z
C466
0.1U_0402_16V4Z
C470
0.1U_0402_16V4Z
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N1
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N3
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N5
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N7
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N9
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N11
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N13
0.1U_0402_16V4Z PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N15
B
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P3
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P5
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P9
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P13
0.1U_0402_16V4Z PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P15
GMCH_LCD_CLK
ALVISO_BGA1257
LDDC_CLK
R87
GM@ 4.7K_0402_5%
R104
GM@ 4.7K_0402_5%
15 GMCH_TZOUT0+
15 GMCH_TZOUT1+
15 GMCH_TZOUT2+
GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT2+
PEG_COMP
D36
D34
GMCH_LCD_CLK 15
Q9
GM@ 2N7002_SOT23
+2.5VS
+3VS
R404
GM@ 4.7K_0402_5%
Security Classification
R105
GM@ 4.7K_0402_5%
2005/03/08
GMCH_LCD_DATA
GMCH_LCD_DATA 15
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Q32
GM@ 2N7002_SOT23
5
Deciphered Date
LDDC_DATA
Issued Date
Size
B
Date:
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
of
51
+1.05VS
U31F
U31E
T29
R29
N29
M29
K29
J29
V28
U28
T28
R28
P28
N28
M28
L28
K28
J28
H28
G28
V27
U27
T27
R27
P27
N27
M27
L27
K27
J27
H27
K26
H26
K25
J25
K24
K23
K22
K21
W20
U20
T20
K20
V19
U19
K19
W18
V18
T18
K18
K17
+1.05VS
+1.5VS
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
AC1
AC2
B23
C35
AA1
AA2
VCC0
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
F17
E17
D18
C18
F18
E18
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
POWER
VCCD_HMPLL1
VCCD_HMPLL2
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
120mA
+3VS_TVDAC
K13
J13
K12
W11
V11
U11
T11
R11
P11
N11
M11
L11
K11
W10
V10
U10
T10
R10
P10
N10
M10
K10
J10
Y9
W9
U9
R9
P9
N9
M9
L9
J9
N8
M8
N7
M7
N6
M6
A6
N5
M5
N4
M4
N3
M3
N2
M2
B2
V1
N1
M1
G1
+1.05VS
1
+
C55
TV@150U_D2_6.3VM
H18
G18
VCCA_TVBG
VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
D19
H17
24mA
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
B26
B25
A25
60mA
VCCA_LVDS
A35
VCCHV0
VCCHV1
VCCHV2
B22
B21
A21
VCCTX_LVDS0
VCCTX_LVDS1
VCCTX_LVDS2
B28
A28
A27
VCCA_SM0
VCCA_SM1
VCCA_SM2
VCCA_SM3
AF20
AP19
AF19
AF18
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
AE37
W37
U37
R37
N37
L37
J37
VCCA_3GPLL0
VCCA_3GPLL1
VCCA_3GPLL2
Y29
Y28
Y27
VCCA_3GBG
VSSA_3GBG
F37
G37
VCC_SYNC
H20
+1.5VS
10mA
+2.5VS
2mA
60mA
+1.5VS_DDRDLL
+1.5VS_PEG
1500mA
C432 1
0.47U_0603_16V4Z
+1.5VS_3GPLL
0.15mA
+2.5VS_3GBG
1
F19
E19
G19
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
+2.5VS
VTT0
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
VTT10
VTT11
VTT12
VTT13
VTT14
VTT15
VTT16
VTT17
VTT18
VTT19
VTT20
VTT21
VTT22
VTT23
VTT24
VTT25
VTT26
VTT27
VTT28
VTT29
VTT30
VTT31
VTT32
VTT33
VTT34
VTT35
VTT36
VTT37
VTT38
VTT39
VTT40
VTT41
VTT42
VTT43
VTT44
VTT45
VTT46
VTT47
VTT48
VTT49
VTT50
VTT51
POWER
C431
70mA
0.47U_0603_16V4Z 2
1
C163
0.22U_0402_10V4Z 2
ALVISO_BGA1257
C131
0.22U_0402_10V4Z 2
+2.5VS
1
1
C663+
150U_D2_6.3VM
TV@
C664
C665
+1.5VS_DDRDLL
+1.5VS_DPLLA
C59
C70
2 10U_1206_16V4Z
2
+1.5VS_DDRDLL
+1.5VS_DPLLB
L15
60mA
CHB1608U301_0603
+1.5VS_DPLLB
1
2
+1.5VS
60mA
C77
2 0.1U_0402_16V4Z
@ 1000P_0402_50V7K
C73
C87
2 10U_1206_16V4Z
2
L16
CHB1608U301_0603
1
2
+1.5VS
C183
2 10U_1206_16V4Z
2
C80
C478
C481
C477
C161
C167
VCCD_LVDS(Ball A25,B25,B26)
R153
C186
+1.05VS
+1.5VS_PEG
+1.5VS
2 0.1U_0402_16V4Z
+1.5VS_3GPLL
+1.5VS_MPLL
L31
60mA
CHB1608U301_0603
+1.5VS_MPLL
1
2
+1.5VS
+1.5VS_HPLL
2.2U_0603_6.3V6K
1
1
C146
2 10U_1206_16V4Z
C153
C141
2 4.7U_0805_10V4Z
2
950mA
2
0_0805_5%
C157
2 4.7U_0805_10V4Z
+1.5VS
1
+
C168
C165
C166
2
470U_D2_2.5VM2 2.2U_0603_6.3V6K
@ 1000P_0402_50V7K
C158
2 2.2U_0603_6.3V6K
C159
2 2.2U_0603_6.3V6K
C132
2 2.2U_0603_6.3V6K
@ 1000P_0402_50V7K
2 0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AM37
AH37
1
1
1
1
1
1
C169 C160
C144
C143
AP29
AD28
+1.8V
C154
C152
AD27
2
2
2
2
2
2
AC27
10U_1206_16V4Z
AP26
2.2U_0603_6.3V6K
0.1U_0402_16V4Z
AN26
D
AM26
+1.8V
AL26
2200mA
AK26
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AJ26
AH26
1
AG26
1
1
1
1
1
1
1
1
+
C174
C188
C172
C177
AF26
AE26
C200
C175
C176
C178
C187
AP25
2
2
2
2
2
2
2
2
330U_D2E_2.5VM 2
AN25
AM25
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AL25
AK25
AJ25
AH25
AG25
+2.5VS
AF25
VCCHV(Ball A21,B21,B22)
AE25
AE24
AE23
AE22
1
1
1
1
1
1
C101
C100
C94
C107
C92
C102
AE21
AE20
AE19
2 0.1U_0402_16V4Z 2 0.01U_0402_16V7K 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z
AE18
AE17
AE16
AE15
AE14
VCCA_LVDS (Ball A35)
VCCTX_LVDS(Ball A27,A28,B28) C
AP13
AN13
+2.5VS
AM13
VCCA_CRTDAC(Ball F19,E19)
AL13
AK13
AJ13
AH13
1
1
1
1
C91
C133
C126
C103
AG13
AF13
AE13
2 4.7U_0805_10V4Z 2 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z 2 0.022U_0402_16V7K
AP12
AN12
AM12
AL12
AK12
VCC_SYNC(Ball H20)
AJ12
AH12
AG12
VCCD_TVDAC (Ball D19)
+1.5VS
AF12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
AE12
AD11
AC11
AB11
1
1
1
1
1
1
C199
C93
C104
C120
C122
C140
C134
AB10
0.1U_0402_16V4Z C197
AB9
0.1U_0402_16V4Z
1
AP8 V1.8_DDR_CAP6 2
2
2
2
2
2
4.7U_0805_10V4Z 2
2
1
AM1 V1.8_DDR_CAP4
2
1
AE1 V1.8_DDR_CAP3
B
C182
0.1U_0402_16V4Z
0.022U_0402_16V7K
0.022U_0402_16V7K
0.1U_0402_16V4Z
+1.5VS_PEG
@ 1000P_0402_50V7K
@ 1000P_0402_50V7K
60mA
C181
R159
L24
0.5_0603_1%
CHB1608U301_0603 +2.5VS_3GBG
1
2 +3GPLL 1
2
+1.5VS
+2.5VS_3GBG
+1.5VS_3GPLL
+1.5VS_HPLL
R160
0_0603_5%
1
2
4000mA
C189
0.1U_0402_16V4Z
1
2
1
C198
0.1U_0402_16V4Z
ALVISO_BGA1257
0307
@ 1000P_0402_50V7K
0.1U_0402_16V4Z
+1.5VS_DPLLA
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCSM37
VCCSM38
VCCSM39
VCCSM40
VCCSM41
VCCSM42
VCCSM43
VCCSM44
VCCSM45
VCCSM46
VCCSM47
VCCSM48
VCCSM49
VCCSM50
VCCSM51
VCCSM52
VCCSM53
VCCSM54
VCCSM55
VCCSM56
VCCSM57
VCCSM58
VCCSM59
VCCSM60
VCCSM61
VCCSM62
VCCSM63
VCCSM64
C195
0.1U_0402_16V4Z
V1.8_DDR_CAP1
2
1
V1.8_DDR_CAP2
2
V1.8_DDR_CAP5
L21
CHB1608U301_0603
1
2
+1.5VS
C184
C171
1
1
C170
2 10U_1206_16V4Z
2
2 0.1U_0402_16V4Z
1
R123
+3VS_TVDAC
L17
CHB1608U301_0603
1
2
+3VS
2
+2.5VS
0_0603_5%
C74
2 10U_1206_16V4Z
@ 1000P_0402_50V7K
1000P_0402_50V7K
C155
C139
C123
C136
C130
C128
C129
0.1U_0402_16V4Z
C65
VCCA_TVDAC
2 1000P_0402_50V7K 2 0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
A
0.022U_0402_16V7K
@ 1000P_0402_50V7K
120mA
2 10U_1206_16V4Z
2
2 0.1U_0402_16V4Z
@ 1000P_0402_50V7K
2 10U_1206_16V4Z
2
2 0.1U_0402_16V4Z
Security Classification
@ 1000P_0402_50V7K
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Rev
0.2
Sheet
1
of
51
U31H
U31I
+1.05VS
L12
M12
N12
P12
R12
T12
U12
V12
W12
L13
M13
N13
P13
R13
T13
U13
V13
W13
VTT_NCTF17
VTT_NCTF16
VTT_NCTF15
VTT_NCTF14
VTT_NCTF13
VTT_NCTF12
VTT_NCTF11
VTT_NCTF10
VTT_NCTF9
VTT_NCTF8
VTT_NCTF7
VTT_NCTF6
VTT_NCTF5
VTT_NCTF4
VTT_NCTF3
VTT_NCTF2
VTT_NCTF1
VTT_NCTF0
Y12
AA12
Y13
AA13
L14
M14
N14
P14
R14
T14
U14
V14
W14
Y14
AA14
AB14
L15
M15
N15
P15
R15
T15
U15
V15
W15
Y15
AA15
AB15
L16
M16
N16
P16
R16
T16
U16
V16
W16
Y16
AA16
AB16
R17
Y17
AA17
AB17
AA18
AB18
AA19
AB19
AA20
AB20
R21
Y21
AA21
AB21
Y22
AA22
AB22
Y23
AA23
AB23
Y24
AA24
AB24
Y25
AA25
AB25
Y26
AA26
AB26
VSS_NCTF68
VSS_NCTF67
VSS_NCTF66
VSS_NCTF65
VSS_NCTF64
VSS_NCTF63
VSS_NCTF62
VSS_NCTF61
VSS_NCTF60
VSS_NCTF59
VSS_NCTF58
VSS_NCTF57
VSS_NCTF56
VSS_NCTF55
VSS_NCTF54
VSS_NCTF53
VSS_NCTF52
VSS_NCTF51
VSS_NCTF50
VSS_NCTF49
VSS_NCTF48
VSS_NCTF47
VSS_NCTF46
VSS_NCTF45
VSS_NCTF44
VSS_NCTF43
VSS_NCTF42
VSS_NCTF41
VSS_NCTF40
VSS_NCTF39
VSS_NCTF38
VSS_NCTF37
VSS_NCTF36
VSS_NCTF35
VSS_NCTF34
VSS_NCTF33
VSS_NCTF32
VSS_NCTF31
VSS_NCTF30
VSS_NCTF29
VSS_NCTF28
VSS_NCTF27
VSS_NCTF26
VSS_NCTF25
VSS_NCTF24
VSS_NCTF23
VSS_NCTF22
VSS_NCTF21
VSS_NCTF20
VSS_NCTF19
VSS_NCTF18
VSS_NCTF17
VSS_NCTF16
VSS_NCTF15
VSS_NCTF14
VSS_NCTF13
VSS_NCTF12
VSS_NCTF11
VSS_NCTF10
VSS_NCTF9
VSS_NCTF8
VSS_NCTF7
VSS_NCTF6
VSS_NCTF5
VSS_NCTF4
VSS_NCTF3
VSS_NCTF2
VSS_NCTF1
VSS_NCTF0
V25
W25
L26
M26
N26
P26
R26
T26
U26
V26
W26
VCC_NCTF10
VCC_NCTF9
VCC_NCTF8
VCC_NCTF7
VCC_NCTF6
VCC_NCTF5
VCC_NCTF4
VCC_NCTF3
VCC_NCTF2
VCC_NCTF1
VCC_NCTF0
VCCSM_NCTF31
VCCSM_NCTF30
VCCSM_NCTF29
VCCSM_NCTF28
VCCSM_NCTF27
VCCSM_NCTF26
VCCSM_NCTF25
VCCSM_NCTF24
VCCSM_NCTF23
VCCSM_NCTF22
VCCSM_NCTF21
VCCSM_NCTF20
VCCSM_NCTF19
VCCSM_NCTF18
VCCSM_NCTF17
VCCSM_NCTF16
VCCSM_NCTF15
VCCSM_NCTF14
VCCSM_NCTF13
VCCSM_NCTF12
VCCSM_NCTF11
VCCSM_NCTF10
VCCSM_NCTF9
VCCSM_NCTF8
VCCSM_NCTF7
VCCSM_NCTF6
VCCSM_NCTF5
VCCSM_NCTF4
VCCSM_NCTF3
VCCSM_NCTF2
VCCSM_NCTF1
VCCSM_NCTF0
NCTF
+1.05VS
VCC_NCTF78
VCC_NCTF77
VCC_NCTF76
VCC_NCTF75
VCC_NCTF74
VCC_NCTF73
VCC_NCTF72
VCC_NCTF71
VCC_NCTF70
VCC_NCTF69
VCC_NCTF68
VCC_NCTF67
VCC_NCTF66
VCC_NCTF65
VCC_NCTF64
VCC_NCTF63
VCC_NCTF62
VCC_NCTF61
VCC_NCTF60
VCC_NCTF59
VCC_NCTF58
VCC_NCTF57
VCC_NCTF56
VCC_NCTF55
VCC_NCTF54
VCC_NCTF53
VCC_NCTF52
VCC_NCTF51
VCC_NCTF50
VCC_NCTF49
VCC_NCTF48
VCC_NCTF47
VCC_NCTF46
VCC_NCTF45
VCC_NCTF44
VCC_NCTF43
VCC_NCTF42
VCC_NCTF41
VCC_NCTF40
VCC_NCTF39
VCC_NCTF38
VCC_NCTF37
VCC_NCTF36
VCC_NCTF35
VCC_NCTF34
VCC_NCTF33
VCC_NCTF32
VCC_NCTF31
VCC_NCTF30
VCC_NCTF29
VCC_NCTF28
VCC_NCTF27
VCC_NCTF26
VCC_NCTF25
VCC_NCTF24
VCC_NCTF23
VCC_NCTF22
VCC_NCTF21
VCC_NCTF20
VCC_NCTF19
VCC_NCTF18
VCC_NCTF17
VCC_NCTF16
VCC_NCTF15
VCC_NCTF14
VCC_NCTF13
VCC_NCTF12
VCC_NCTF11
AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD25
AC26
AD26
+1.8V
L17
M17
N17
P17
T17
U17
V17
W17
L18
M18
N18
P18
R18
Y18
L19
M19
N19
P19
R19
Y19
L20
M20
N20
P20
R20
Y20
L21
M21
N21
P21
T21
U21
V21
W21
L22
M22
N22
P22
R22
T22
U22
V22
W22
L23
M23
N23
P23
R23
T23
U23
V23
W23
L24
M24
N24
P24
R24
T24
U24
V24
W24
L25
M25
N25
P25
R25
T25
U25
+1.05VS
U31J
VSS271
VSS270
VSS269
VSS268
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226
VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
VSSALVDS
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS
AL24
AN24
A26
E26
G26
J26
B27
E27
G27
W27
AA27
AB27
AF27
AG27
AJ27
AL27
AN27
E28
W28
AA28
AB28
AC28
A29
D29
E29
F29
G29
H29
L29
P29
U29
V29
W29
AA29
AD29
AG29
AJ29
AM29
C30
Y30
AA30
AB30
AC30
AE30
AP30
D31
E31
F31
G31
H31
J31
K31
L31
M31
N31
P31
R31
T31
U31
V31
W31
AD31
AG31
AL31
A32
C32
Y32
AA32
AB32
B36
AA11
AF11
AG11
AJ11
AL11
AN11
B12
D12
J12
A14
B14
F14
J14
K14
AG14
AJ14
AL14
AN14
C15
K15
A16
D16
H16
K16
AL16
C17
G17
AF17
AJ17
AN17
A18
B18
U18
AL18
C19
H19
J19
T19
W19
AG19
AN19
A20
D20
E20
F20
G20
V20
AK20
C21
F21
AF21
AN21
A22
D22
E22
J22
AH22
AL22
H23
AF23
B24
D24
F24
J24
AG24
AJ24
ALVISO_BGA1257
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS129
VSS128
VSS127
VSS126
VSS125
VSS124
VSS123
VSS122
VSS121
VSS120
VSS119
VSS118
VSS117
VSS116
VSS115
VSS114
VSS113
VSS112
VSS111
VSS110
VSS109
VSS108
VSS107
VSS106
VSS105
VSS104
VSS103
VSS102
VSS101
VSS100
VSS99
VSS98
VSS97
VSS96
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90
VSS89
VSS88
VSS87
VSS86
VSS85
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS77
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
AC32
AD32
AJ32
AN32
D33
E33
F33
G33
H33
J33
K33
L33
M33
N33
P33
R33
T33
U33
V33
W33
AD33
AF33
AL33
C34
AA34
AB34
AC34
AD34
AH34
AN34
B35
D35
E35
F35
G35
H35
J35
K35
L35
M35
N35
P35
R35
T35
U35
V35
W35
Y35
AE35
C36
AA36
AB36
AC36
AD36
AE36
AF36
AJ36
AL36
AN36
E37
H37
K37
M37
P37
T37
V37
Y37
AG37
VSS67
VSS66
VSS65
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VSS0
VSS
ALVISO_BGA1257
+1.05VS
+1.5VS
C?
2 0.1U_0603_16V7K
C?
2 0.1U_0603_16V7K
C?
2 0.1U_0603_16V7K
C689
2 0.1U_0402_16V4Z
C690
2 0.1U_0402_16V4Z
C691
2 0.1U_0402_16V4Z
C692
2 0.1U_0402_16V4Z
C693
2 0.1U_0402_16V4Z
C694
2 0.1U_0402_16V4Z
Security Classification
2005/03/08
Issued Date
ALVISO_BGA1257
Y1
D2
G2
J2
L2
P2
T2
V2
AD2
AE2
AH2
AL2
AN2
A3
C3
AA3
AB3
AC3
AJ3
C4
H4
L4
P4
U4
Y4
AF4
AN4
E5
W5
AL5
AP5
B6
J6
L6
P6
T6
AA6
AC6
AE6
AJ6
G7
V7
AA7
AG7
AK7
AN7
C8
E8
L8
P8
Y8
AL8
A9
H9
K9
T9
V9
AA9
AC9
AE9
AH9
AN9
D10
L10
Y10
AA10
F11
H11
Y11
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Size
B
Date:
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
10
of
51
DDR_A_DM0
DDR_A_D6
DDR_A_D7
DDR_A_D12
DDR_A_D13
M_CLK_DDR0
M_CLK_DDR#0
C310
M_CLK_DDR0 6
M_CLK_DDR#0 6
DDR_A_D14
DDR_A_D15
+1.8V
@
@
@
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
1
C292
C293
C294
C295
C296
C297
C298
@680P_0402_50V7K
C314
C275
C662
1
C276
C311
2
C320
1
2
C278
0.1U_0402_16V4Z
C319
+3VS
A
0.1U_0402_16V4Z
D_CK_SDATA
D_CK_SCLK
2
C318
12,13,38 D_CK_SDATA
12,13,38 D_CK_SCLK
0.1U_0402_16V4Z
DDR_A_D58
DDR_A_D59
C304
DDR_A_DM7
0.1U_0402_16V4Z
DDR_A_D56
DDR_A_D57
C305
DDR_A_D50
DDR_A_D51
0.1U_0402_16V4Z
DDR_A_DQS#6
DDR_A_DQS6
C316
DDR_A_D48
DDR_A_D49
0.1U_0402_16V4Z
DDR_A_D42
DDR_A_D43
M_ODT0
DDR_A_MA13
C317
DDR_A_DM5
DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#
0.1U_0402_16V4Z
DDR_A_D40
DDR_A_D41
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
C321
DDR_A_D34
DDR_A_D35
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
0.1U_0402_16V4Z
DDR_A_DQS#4
DDR_A_DQS4
DDR_CKE1_DIMMA 6
C299
DDR_A_D32
DDR_A_D33
DDR_CKE1_DIMMA
0.1U_0402_16V4Z
M_ODT1
+0.9VS
C300
6 M_ODT1
DDR_A_CAS#
DDR_CS1_DIMMA#
2
10U_0805_10V4Z
@
C313
DDR_A_D30
DDR_A_D31
0.1U_0402_16V4Z
7 DDR_A_CAS#
6 DDR_CS1_DIMMA#
DDR_A_DQS#3
DDR_A_DQS3
C301
7 DDR_A_BS#0
7 DDR_A_WE#
DDR_A_MA10
DDR_A_BS#0
DDR_A_WE#
C312
DDR_A_D28
DDR_A_D29
C302
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
2
2
10U_0805_10V4Z
@
DDR_A_D22
DDR_A_D23
C303
DDR_A_MA12
DDR_A_MA9
DDR_A_MA8
2
2
10U_0805_10V4Z
@
0.1U_0402_16V4Z
DDR_A_BS#2
0.1U_0402_16V4Z
7 DDR_A_BS#2
DDR_CKE0_DIMMA
2
10U_0805_10V4Z
@
DDR_A_DM2
0.1U_0402_16V4Z
6 DDR_CKE0_DIMMA
DDR_A_D20
DDR_A_D21
0.1U_0402_16V4Z
1K_0402_1%
DDR_A_DM1
0.1U_0402_16V4Z
DDR_A_D26
DDR_A_D27
+1.8V
R226
C277
DDR_A_DM3
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DDR_A_DQS#[0..7]
7 DDR_A_DQS#[0..7]
0.1U_0402_16V4Z
DDR_A_D24
DDR_A_D25
0304 EMI
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
Layout Note:
Place near DIMM
DDR_A_MA[0..13]
0.1U_0402_16V4Z
DDR_A_D18
DDR_A_D19
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
DDR_A_DQS[0..7]
7 DDR_A_MA[0..13]
C260
DDR_A_DQS#2
DDR_A_DQS2
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
1K_0402_1%
0.1U_0402_16V4Z
DDR_A_D16
DDR_A_D17
1
2
DDR_A_D4
DDR_A_D5
DDR_A_DM[0..7]
7 DDR_A_DQS[0..7]
4.7U_0805_10V4Z
DDR_A_D10
DDR_A_D11
C273
4.7U_0805_10V4Z
DDR_A_DQS#1
DDR_A_DQS1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
4.7U_0805_10V4Z
@680P_0402_50V7K
C661
1
2
DDR_A_D8
DDR_A_D9
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
DDR_A_D2
DDR_A_D3
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
7 DDR_A_DM[0..7]
R228
DDR_A_DQS#0
DDR_A_DQS0
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
4.7U_0805_10V4Z
C659
1
@680P_0402_50V7K
DDR_A_D0
DDR_A_D1
+1.8V
@680P_0402_50V7K
C660
1
2
JP31
+1.8V
DDR_A_D[0..63]
7 DDR_A_D[0..63]
@680P_0402_50V7K
+1.8V
+1.8V
+1.8V
C272
+DIMM_VREF
0.1U_0402_16V4Z
C658
1
+1.8V
+1.8V
4.7U_0805_10V4Z
+1.8V
4.7U_0805_10V4Z
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
DDR_A_BS#1 7
DDR_A_RAS# 7
DDR_CS0_DIMMA# 6
Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil
M_ODT0 6
DDR_A_D36
DDR_A_D37
+0.9VS
DDR_A_DM4
DDR_A_D38
DDR_A_D39
DDR_A_D44
DDR_A_D45
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 6
M_CLK_DDR#1 6
DDR_A_MA2
DDR_A_MA4
R264 1
R263 1
2 56_0402_5%
2 56_0402_5%
DDR_A_MA5
DDR_A_MA8
R247 1
R246 1
2 56_0402_5%
2 56_0402_5%
DDR_A_MA10
DDR_A_MA11
R248 1
R262 1
2 56_0402_5%
2 56_0402_5%
DDR_A_BS#0
DDR_A_BS#2
R249 1
R245 1
2 56_0402_5%
2 56_0402_5%
DDR_A_RAS#
R265 1
DDR_CKE0_DIMMA R244 1
2 56_0402_5%
2 56_0402_5%
DDR_CKE1_DIMMA R261 1
M_ODT1
R250 1
2 56_0402_5%
2 56_0402_5%
R269 1
R254 1
2 56_0402_5%
2 56_0402_5%
DDR_A_MA0
DDR_A_MA1
R253 1
R268 1
2 56_0402_5%
2 56_0402_5%
DDR_A_MA3
DDR_A_MA6
R267 1
R252 1
2 56_0402_5%
2 56_0402_5%
DDR_A_MA7
DDR_A_MA9
R251 1
R273 1
2 56_0402_5%
2 56_0402_5%
DDR_A_MA12
DDR_A_MA13
R270 1
R255 1
2 56_0402_5%
2 56_0402_5%
DDR_A_BS#1
DDR_A_WE#
R256 1
R271 1
2 56_0402_5%
2 56_0402_5%
DDR_A_CAS#
DDR_CS0_DIMMA#
R257 1
R272 1
2 56_0402_5%
2 56_0402_5%
DDR_CS1_DIMMA#
M_ODT0
Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
R242 1
R243 1
2 10K_0402_5%
2 10K_0402_5%
A
P-TWO_A5640C-A0G16-N
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
R ev
0.2
Sheet
1
11
of
51
+1.8V
+DIMM_VREF
DDR_B_D[0..63]
7 DDR_B_D[0..63]
DDR_B_D12
DDR_B_D13
7 DDR_B_MA[0..13]
DDR_B_DQS#2
DDR_B_DQS2
DDR_B_D18
DDR_B_D19
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
6 DDR_CKE2_DIMMB
2S@
DDR_B_MA4
DDR_B_MA2
DDR_B_MA0
DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#
M_ODT2
DDR_B_MA13
DDR_B_BS#1 7
DDR_B_RAS# 7
DDR_CS2_DIMMB# 6
1
C291
0.1U_0402_16V4Z
C290
2
+1.8V
1
1
+
2
2
1
+
C328
150U_D2_6.3VM
C306
150U_D2_6.3VM
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
M_ODT2 6
DDR_B_D36
DDR_B_D37
+0.9VS
DDR_B_DM4
DDR_B_BS#2
DDR_CKE2_DIMMB
R203 1
R202 1
2 56_0402_5%
2 56_0402_5%
R211 1
R210 1
2 56_0402_5%
2 56_0402_5%
DDR_B_MA9
DDR_B_MA12
DDR_B_MA5
DDR_B_MA8
R205 1
R204 1
2 56_0402_5%
2 56_0402_5%
R213 1
R212 1
2 56_0402_5%
2 56_0402_5%
DDR_B_MA1
DDR_B_MA3
DDR_B_BS#0
DDR_B_MA10
R207 1
R206 1
2 56_0402_5%
2 56_0402_5%
R215 1
R214 1
2 56_0402_5%
2 56_0402_5%
DDR_B_CAS#
DDR_B_WE#
M_ODT3
DDR_CS3_DIMMB#
R209 1
R208 1
2 56_0402_5%
2 56_0402_5%
R233 1
R234 1
2 56_0402_5%
2 56_0402_5%
DDR_CKE3_DIMMB
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
R229 1
R230 1
2 56_0402_5%
2 56_0402_5%
R235 1
R236 1
2 56_0402_5%
2 56_0402_5%
DDR_B_MA4
DDR_B_MA2
R237 1
R238 1
2 56_0402_5%
2 56_0402_5%
DDR_B_MA0
DDR_B_BS#1
R239 1
R240 1
2 56_0402_5%
2 56_0402_5%
DDR_B_D38
DDR_B_D39
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
DDR_B_DQS5
DDR_B_D46
DDR_B_D47
DDR_B_D52
DDR_B_D53
M_CLK_DDR4
M_CLK_DDR#4
C258
DDR_B_MA11
DDR_B_MA7
DDR_B_MA6
C257
1
C244
0.1U_0402_16V4Z
1
C274
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
4
DDR_CKE3_DIMMB 6
C281
D_CK_SDATA
D_CK_SCLK
1
C245
0.1U_0402_16V4Z
0.1U_0402_16V4Z
11,13,38 D_CK_SDATA
11,13,38 D_CK_SCLK
+0.9VS
DDR_CKE3_DIMMB
C280
DDR_B_D58
DDR_B_D59
0.1U_0402_16V4Z
DDR_B_DM7
DDR_B_D30
DDR_B_D31
C256
DDR_B_D56
DDR_B_D57
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D50
DDR_B_D51
DDR_B_DQS#3
DDR_B_DQS3
C255
DDR_B_DQS#6
DDR_B_DQS6
1
C246
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_D48
DDR_B_D49
C254
DDR_B_D42
DDR_B_D43
0.1U_0402_16V4Z
DDR_B_DM5
DDR_B_D28
DDR_B_D29
C253
DDR_B_D40
DDR_B_D41
1
C247
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C326
C287
0.1U_0402_16V4Z
C283
DDR_B_D34
DDR_B_D35
C286
0.1U_0402_16V4Z
C248
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_DQS#4
DDR_B_DQS4
1
C249
0.1U_0402_16V4Z
C259
DDR_B_D32
DDR_B_D33
1
C250
0.1U_0402_16V4Z
0.1U_0402_16V4Z
M_ODT3
DDR_B_D22
DDR_B_D23
C284
6 M_ODT3
DDR_B_CAS#
DDR_CS3_DIMMB#
C288
0.1U_0402_16V4Z
0.1U_0402_16V4Z
7 DDR_B_CAS#
6 DDR_CS3_DIMMB#
DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#
+1.8V
DDR_B_DM2
C285
7 DDR_B_BS#0
7 DDR_B_WE#
DDR_B_D20
DDR_B_D21
C282
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
0.1U_0402_16V4Z
DDR_B_MA12
DDR_B_MA9
DDR_B_MA8
VSS
DQ20
DQ21
VSS
NC
DM2
VSS
DQ22
DQ23
VSS
DQ28
DQ29
VSS
DQS3#
DQS3
VSS
DQ30
DQ31
VSS
NC/CKE1
VDD
NC/A15
NC/A14
VDD
A11
A7
A6
VDD
A4
A2
A0
VDD
BA1
RAS#
S0#
VDD
ODT0
NC/A13
VDD
NC
VSS
DQ36
DQ37
VSS
DM4
VSS
DQ38
DQ39
VSS
DQ44
DQ45
VSS
DQS5#
DQS5
VSS
DQ46
DQ47
VSS
DQ52
DQ53
VSS
CK1
CK1#
VSS
DM6
VSS
DQ54
DQ55
VSS
DQ60
DQ61
VSS
DQS7#
DQS7
VSS
DQ62
DQ63
VSS
SAO
SA1
C289
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_B_BS#2
VSS
DQ16
DQ17
VSS
DQS2#
DQS2
VSS
DQ18
DQ19
VSS
DQ24
DQ25
VSS
DM3
NC
VSS
DQ26
DQ27
VSS
CKE0
VDD
NC
BA2
VDD
A12
A9
A8
VDD
A5
A3
A1
VDD
A10/AP
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
VSS
DQ32
DQ33
VSS
DQS4#
DQS4
VSS
DQ34
DQ35
VSS
DQ40
DQ41
VSS
DM5
VSS
DQ42
DQ43
VSS
DQ48
DQ49
VSS
NC,TEST
VSS
DQS6#
DQS6
VSS
DQ50
DQ51
VSS
DQ56
DQ57
VSS
DM7
VSS
DQ58
DQ59
VSS
SDA
SCL
VDDSPD
0.1U_0402_16V4Z
7 DDR_B_BS#2
DDR_CKE2_DIMMB
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
C324
C265
C264
DDR_B_D14
DDR_B_D15
C322
0.1U_0402_16V4Z
+1.8V
M_CLK_DDR3 6
M_CLK_DDR#3 6
C263
Layout Note:
Place near DIMM
2
DDR_B_D16
DDR_B_D17
DDR_B_DQS#[0..7]
7 DDR_B_DQS#[0..7]
C325
C261
M_CLK_DDR3
M_CLK_DDR#3
0.1U_0402_16V4Z
DDR_B_DM1
C323
DDR_B_MA[0..13]
4.7U_0805_10V4Z
DDR_B_D6
DDR_B_D7
DDR_B_DQS[0..7]
0.1U_0402_16V4Z
4.7U_0805_10V4Z
DDR_B_DM0
7 DDR_B_DQS[0..7]
4.7U_0805_10V4Z
C252
DDR_B_DM[0..7]
7 DDR_B_DM[0..7]
1
C262
DDR_B_D10
DDR_B_D11
0.1U_0402_16V4Z
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D4
DDR_B_D5
0.1U_0402_16V4Z
DDR_B_D8
DDR_B_D9
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C251
DDR_B_D2
DDR_B_D3
VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7
VSS
DQ12
DQ13
VSS
DM1
VSS
CK0
CK0#
VSS
DQ14
DQ15
VSS
0.1U_0402_16V4Z
DDR_B_DQS#0
DDR_B_DQS0
VREF
VSS
DQ0
DQ1
VSS
DQS0#
DQS0
VSS
DQ2
DQ3
VSS
DQ8
DQ9
VSS
DQS1#
DQS1
VSS
DQ10
DQ11
VSS
4.7U_0805_10V4Z
JP26
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
DDR_B_D0
DDR_B_D1
4.7U_0805_10V4Z
+1.8V
4.7U_0805_10V4Z
+1.8V
M_CLK_DDR4 6
M_CLK_DDR#4 6
DDR_B_DM6
DDR_B_D54
DDR_B_D55
DDR_B_D60
DDR_B_D61
DDR_B_RAS#
DDR_CS2_DIMMB#
DDR_B_DQS#7
DDR_B_DQS7
R231 1
R232 1
2 56_0402_5%
2 56_0402_5%
Layout Note:
Place these resistor
closely DIMM0,all
trace length<750 mil
3
Layout Note:
Place these resistor
closely DIMM0,all
trace length
Max=1.3"
M_ODT2
DDR_B_MA13
DDR_B_D62
DDR_B_D63
R222 1
R223 1
2 10K_0402_5%
2 10K_0402_5%
+3VS
4
SUPER_AKH-110A-092-3
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
DDRII-SODIMM SLOT1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
R ev
0.2
Sheet
E
12
of
51
+CLK_VDD48
FSC
FSB
FSA
CLKSEL0
CLKSEL1
CLKSEL2
2 2.2U_0603_6.3V6K
100
100
33.3
133
100
33.3
166
100
33.3
200
100
33.3
+CLK_VDDREF
C541
+3VS
C537
2 0.047U_0402_16V7K
L32
KC FBM-L11-201209-221LMAT_0805
1
2
1
C539
0.047U_0402_16V7K
C524
2.2U_0603_6.3V6K
Clock Generator
+CLK_VDD1
40mil
1
1
C525
0.047U_0402_16V7K
+CLK_VDD1
1
C536
0.047U_0402_16V7K
1
C529
0.047U_0402_16V7K
C533
0.047U_0402_16V7K
+CLK_VCCA
+CLK_VDD1
U33
+CLK_VDD2
21
28
34
+3VS
CLK_PCI1
2
10K_0402_5%
42
2 +CLK_VDDREF
48
1_0402_5%
15mil
VDDCPU
VDDREF
1
R517
2 +CLK_VDD48
11
2.2_0402_5%
15mil
VDD48
C542
22P_0402_50V8J
1
2
CLK_ICH_48M R494 1
18 CLK_ICH_48M
2
2 12_0402_5%
CLK_SD_48M
R499 1
CLK_14M_CODEC
2
R520
2 12_0402_5%
1
33_0402_5%
22 CLK_SD_48M
29 CLK_14M_CODEC
CLK_PCI_PCM
1
R506
CLK_PCI_LAN
1
R507
CLK_PCI_MINI1
1
R510
CLK_PCI_MINI2
1
R511
CLK_PCI_SIO
1
R516
CLK_PCI_1394
1
R524
CLK_PCI_LPC
1
R493
CLK_PCI_ICH
1
R501
D_CK_SCLK
22 CLK_PCI_PCM
25 CLK_PCI_LAN
27 CLK_PCI_MINI1
28 CLK_PCI_MINI2
32 CLK_PCI_SIO
24 CLK_PCI_1394
33 CLK_PCI_LPC
16 CLK_PCI_ICH
11,12,38 D_CK_SCLK
2
2S@ 33_0402_5%
2
1S@33_0402_5%
CLK_PCI3
2
33_0402_5%
CLK_PCI2
2
33_0402_5%
CLK_PCI1
2
33_0402_5%
2
33_0402_5%
2
G
CLKSEL2
CLKSEL0
12
53
FS_A/USB_48MHz
REF1/FSLC/TEST_SEL
CLKSEL1
16
FSLB/TEST_MODE
X2
CPUCLKT1
41
CLK_CPU1
R485 1
2 33_0402_5%
CLK_MCH_BCLK
CPUCLKC1
40
CLK_CPU1# R478 1
2 33_0402_5%
CLK_MCH_BCLK#
CPUCLKT0
44
CLK_CPU0
R497 1
2 33_0402_5%
CLK_CPU_BCLK
CPUCLKC0
43
CLK_CPU0# R490 1
2 33_0402_5%
CLK_CPU_BCLK#
CPUCLKT2_ITP/PCIEXT6
36
CLK_SRC3
R468 1
2 33_0402_5%
CLK_MCH_3GPLL
CPUCLKC2_ITP/PCIEXC6
35
CLK_SRC3# R463 1
2 33_0402_5%
CLK_MCH_3GPLL#
PCICLK4
PEREQ1#/PCIEXT5
33
PEREQ2#
R455 1
2 0_0402_5%
PE_REQ2#
PCICLK3
PEREQ2#/PCIEXC5
32
PEREQ1#
R456 1
2 0_0402_5%
PE_REQ1#
56
9
CLK_PCI0
47
PCICLK2/REQ_SEL
PCIEXT4
31
CLK_SRC2
R450 1
2 33_0402_5%
CLK_PCIE_VGA
PCIEXC4
30
CLK_SRC2# R446 1
2 33_0402_5%
CLK_PCIE_VGA#
ITP_EN/PCICLK_F0
SATACLKT
26
CLK_SRC4
R447 1
2 33_0402_5%
CLK_EZ_CLK2
SCLK
SATACLKC
27
CLK_SRC4# R442 1
2 33_0402_5%
CLK_EZ_CLK2#
R453 1
2 33_0402_5%
CLK_EZ_CLK1
SELPCIEX_LCDCLK#/PCICLK_F1
SDATA
PCIEXT3
24
CLK_SRC6
PCIEXC3
25
CLK_SRC6# R451 1
2 33_0402_5%
CLK_EZ_CLK1#
+1.05VS
PCIEXT2
22
CLK_SRC7
R460 1
2 33_0402_5%
CLK_PCIE_ICH
PCIEXC2
23
CLK_SRC7# R457 1
2 33_0402_5%
CLK_PCIE_ICH#
PCIEXT1
19
CLK_SRC1
R470 1
2 33_0402_5%
CLK_PCIE_SATA
PCIEXC1
20
CLK_SRC1# R465 1
2 33_0402_5%
CLK_PCIE_SATA#
R479 1
2 33_0402_5%
CLK_DREF_SSC
29
GND_1
LCDCLK_SS/PCIEX0T
17
GND_2
LCDCLK_SS/PCIEX0C
18
CLK_SRC0# R473 1
2 33_0402_5%
CLK_DREF_SSC#
45
GND_3
51
GND_4
DOTT_96MHz
DOTC_96MHz
14
15
CLK_DOT
CLK_DOT#
2 33_0402_5%
2 33_0402_5%
CLK_DREF_96M
CLK_DREF_96M#
GND_5
2
R512
0_0402_5%
+1.05VS
R518
0_0402_5%
1
2
MCH_CLKSEL0
MCH_CLKSEL0 6
CPU_BSEL0
CPU_BSEL0 5
R515
4.7K_0402_5%
CLKSEL1 1
2
1
R521
@ 0_0402_5%
R525
@ 1K_0402_5%
VTT_PWRGD#/PD
10
REF0
52
C545
C538
2 0.047U_0402_16V7K 2 0.047U_0402_16V7K
CLK_MCH_BCLK 6
CLK_MCH_BCLK# 6
CLK_MCH_BCLK
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_3GPLL 8
R505
0_0402_5%
1
2
2
R509
0_0402_5%
MCH_CLKSEL1
CPU_BSEL1
1
R484
CLK_MCH_BCLK# 1
R477
CLK_CPU_BCLK
1
R496
CLK_CPU_BCLK# 1
R489
CLK_EZ_CLK1
1
R454
CLK_EZ_CLK1#
1
R452
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
CLK_PCIE_SATA
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
2
49.9_0402_1%
CLK_MCH_3GPLL# 8
1
R471
CLK_PCIE_SATA# 1
R466
CLK_MCH_3GPLL 1
R467
CLK_MCH_3GPLL# 1
R462
CLK_PCIE_VGA
1
R449
CLK_PCIE_VGA# 1
R445
CLK_PCIE_ICH
1
R461
CLK_PCIE_ICH#
1
R458
CLK_DREF_SSC 1
R480
CLK_DREF_SSC# 1
R474
CLK_DREF_96M
1
R487
CLK_DREF_96M# 1
R482
CLK_EZ_CLK2
1
R448
CLK_EZ_CLK2#
1
R443
PE_REQ2# 33
PE_REQ1# 33
CLK_PCIE_VGA 15
CLK_PCIE_VGA# 15
CLK_EZ_CLK2 38
CLK_EZ_CLK2# 38
CLK_EZ_CLK1 38
CLK_EZ_CLK1# 38
CLK_PCIE_ICH 18
CLK_PCIE_ICH# 18
CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17
R486 1
R481 1
1
R488
CLK_DREF_SSC 6
CLK_DREF_SSC# 6
CLK_DREF_96M 6
CLK_DREF_96M# 6
VGATE
2
10K_0402_5%
1
R513
CLK_14M_SIO
2
12_0402_5%
CLK_14M_SIO 32
1
R514
CLK_ICH_14M
2
12_0402_5%
CLK_ICH_14M 18
VGATE 6,18,46
3
Q35
2N7002_SOT23
MCH_CLKSEL1 6
CPU_BSEL1 5
Title
Clock Generator
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C546
2 2.2U_0603_6.3V6K
VTT_POWERGD#
CLK_REF
ICS954226AGT_TSSOP56
1
R526
@ 0_0402_5%
2
4
R522
@ 1K_0402_5%
GND_0
+3VS
R519
4.7K_0402_5%
CLKSEL0 1
2
IREF
CLK_SRC0
S
Q34
2N7002_SOT23
+CLK_VDD2
+CLK_VDD2
D_CK_SCLK
D_CK_SDATA
40mil
PM_STP_CPU# 18,46
R502
4.7K_0402_5%
1
2
+3VS
2
G
D
54
PM_STP_PCI# 18
CLK_PCI4
13
CPU_STOP#
PM_STP_CPU#
PCICLK5
+3VS
CK_SDATA 1
PM_STP_PCI#
Q33
2N7002_SOT23
18 CK_SDATA
55
CLK_PCI5
2 CLKIREF
39
475_0402_1% 15mil
R503
4.7K_0402_5%
1
2
+3VS
49
46
1
R475
PCI/SRC_STOP#
+3VS
C532
2 0.047U_0402_16V7K
X1
CK_SCLK
XTALOUT
12_0402_5%
+3VS
18 CK_SCLK
50
D_CK_SDATA
11,12,38 D_CK_SDATA
XTALIN
2 12_0402_5%
2
GNDA
38
L33
KC FBM-L11-201209-221LMAT_0805
1
2
2
G
CLK_PCI0
2
10K_0402_5%
1
R508
R492
37
+CLK_VDD1
R500
C544
Y3
22P_0402_50V8J 14.318MHZ_16PF_DSX840GA
1
2
C523
2 2.2U_0603_6.3V6K
VDDA
VDDPCI_0
VDDPCI_1
+CLK_VDD1
CLK_PCI2
2
10K_0402_5%
VDDPCIEX_0
VDDPCIEX_1
VDDPCIEX_2
40mil
R523
CLKSEL2
2
10K_0402_5%
R495
1
7
1
2
R472
2.2_0402_5%
Size
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
of
13
H
51
CRT Connector
0_0402_5%
0_0402_5%
0_0402_5%
1A
2A
3A
4A
VCC
1B1
2B1
3B1
4B1
2
5
11
14
1B2
2B2
3B2
4B2
3
6
10
13
R30
R25
150_0402_5%
C5
C10
C14
C16
8P_0402_50V8K
8 GMCH_CRT_HSYNC
GMCH_CRT_HSYNC
2
R370
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
CRT_HSYNC 2
P
OE#
1
R373
1
R372
1
10K_0402_5%
1
L1
C9
10P_0402_50V8J
C6
C13 2
10P_0402_50V8J 68P_0402_50V8K
D_DDC_CLK
1
C3
68P_0402_50V8K
D_CRT_HSYNC 38
5
1
CRT_VSYNC 2
P
OE#
2
PM@ 0_0402_5%
2
GM@ 39_0402_5%
D_CRT_VSYNC
1
R377
GMCH_CRT_VSYNC
1
R378
1
1
U28
SN74AHCT1G125GW_SOT353-5
VGA_CRT_VSYNC
2
0.1U_0402_16V4Z
(CL55)
VSYNC_L
2
FCM1608C-121T_0603
D_CRT_HSYNC
SUYIN_070112FR015S2227U
D_DDC_DATA
U27
SN74AHCT1G125GW_SOT353-5
1
C400
8 GMCH_CRT_VSYNC
100P_0402_25V8K
H SYNC_L
2
FCM1608C-121T_0603
+CRT_VCC
15 VGA_CRT_VSYNC
2
2
C8
8P_0402_50V8K
C4
1
L3
2
0.1U_0402_16V4Z
VGA_CRT_HSYNC
DDC_MD2
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
8P_0402_50V8K
1
C399
C11
8P_0402_50V8K
15 VGA_CRT_HSYNC
1
2 CRT_R_L
L5
FCM2012C-800_0805
1
2 CRT_G_L
L4
FCM2012C-800_0805
1
2 CRT_B_L
L2
FCM2012C-800_0805
CRT_B
VGA_CRT_G
GMCH_CRT_G
CRT_G
150_0402_5%
JP3
CRT_R
GND
VGA_CRT_B
GMCH_CRT_B
C398
0.1U_0402_16V4Z
D_CRT_R 38
D_CRT_G 38
D_CRT_B 38
5
1
D_CRT_VSYNC 38
+CRT_VCC
R371
4.7K_0402_5%
2 PM@ 0_0402_5%
+3VS
R48
2 GM@ 0_0402_5%
+2.5VS
R41
2
2
4.7K_0402_5%
1
D
D_DDC_DATA
R374
2
38 D_DDC_DATA
R43
GMCH_CRT_DATA 8
D_DDC_CLK
VGA_DDC_DATA
Q3
2N7002_SOT23
38 D_DDC_CLK
GM@ 0_0402_5%
GMCH_CRT_DATA
1
VGA_DDC_DATA 15
2
G
15 VGA_CRT_B
8 GMCH_CRT_B
D_CRT_R
D_CRT_G
D_CRT_B
W D@ FSAV330MTC_TSSOP16
VGA_CRT_R
GMCH_CRT_R
D19
@ DAN217_SC59
2
1.1A_6VDC_FUSE
1
2
G
15 VGA_CRT_G
8 GMCH_CRT_G
+3VS
R32
15 VGA_CRT_R
8 GMCH_CRT_R
W=40mils
R60
1
1
0_0402_5%
0_0402_5%
4
7
9
12
SEL
OE#
0.1U_0402_16V4Z
R38
R59
0_0402_5%
1
15
16
VGA_CRT_B
GMCH_CRT_B
1
1
2 PM@
2
GM@
2 PM@
2
GM@
2 PM@
2
GM@
CRT_RQ
CRT_GQ
CRT_BQ
C22
U4
+CRT_VCC
W=40mils
F1
RB411D_SOT23
VGA_CRT_G
GMCH_CRT_G
1
1
+5VS
DOCKIN#
+R_CRT_VCC
D18
21,26,33,38 DOCKIN#
R39
R37
CRT_R
ND@ 0_0402_5%
CRT_G
ND@ 0_0402_5%
CRT_B
2
ND@ 0_0402_5%
R40
+5VS
D21
D20
@ DAN217_SC59 @ DAN217_SC59
CRT_RQ
1
R375
CRT_GQ
1
R376
CRT_BQ
1
R389
VGA_CRT_R
GMCH_CRT_R
Q4
2N7002_SOT23
VGA_DDC_CLK
VGA_DDC_CLK 15
GMCH_CRT_CLK
2
1
R47
GM@ 0_0402_5%
GMCH_CRT_CLK 8
Size
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
E
14
of
51
8,41 PCEI_GTX_C_MRX_N[0..15]
8,41 PCEI_GTX_C_MRX_P[0..15]
8,41 PCIE_MTX_C_GRX_N[0..15]
8,41 PCIE_MTX_C_GRX_P[0..15]
PCEI_GTX_C_MRX_N[0..15]
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS
PCEI_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
R618
R619
R620
R621
R622
R623
PCIE_MTX_C_GRX_P[0..15]
1
1
1
1
1
1
2
2
2
2
2
2
150_0402_5%
150_0402_5%
150_0402_5%
150_0402_5%
150_0402_5%
150_0402_5%
2005/01/24
+3V
JP22
R63
+3VS
100K_0402_5%
GM@
R65
GMCH_ENVDD
C29
R625
10K_0402_5%
W=60mils
Q43
+LCDVDD
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
C21
GM@ 4.7U_0805_10V4Z
2
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
+LCDVDD
GM@ 0.047U_0402_16V7K 1
2
G
3
GM@ 100K_0402_5%
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
Q6
GM@ SI2301BDS_SOT23
2
1
2
G
S
Q7
GM@ 2N7002_SOT23
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
W=60mils
R624
1 2
1K_0402_5%
D
8 GMCH_ENVDD
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
VGA_CRT_VSYNC
VGA_CRT_HSYNC
14 VGA_CRT_R
14 VGA_CRT_G
14 VGA_CRT_B
14 VGA_CRT_VSYNC
14 VGA_CRT_HSYNC
+LCDVDD
R61
GM@ 300_0603_1%
GM@
C27
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
0.1U_0402_16V4Z
2
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
BSS138_SOT23
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_N6
+3VS
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
+3VS
R57
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_N10
4.7K_0402_5%
C25
@ 0.1U_0402_16V4Z
33 BKOFF#
BKOFF#
D3
2 RB751V_SOD323
DISPOFF#
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
INVT_PWM
D5
@ 1N4148_SOT23
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
C33
@ 1U_0603_10V4Z
8,33 GMCH_ENBKL
GMCH_ENBKL
R86
ENBKL
2
GM@ 0_0402_5%
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15
VGA_DDC_CLK
VGA_DDC_DATA
14 VGA_DDC_CLK
14 VGA_DDC_DATA
GMCH_LCD_CLK
GMCH_LCD_DATA
GMCH_TZOUT0GMCH_TZOUT0+
GMCH_TZOUT1+
GMCH_TZOUT1GMCH_TZOUT2+
GMCH_TZOUT2GMCH_TZCLKGMCH_TZCLK+
8 GMCH_TZCLK8 GMCH_TZCLK+
A
LCD_ID
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
DAC_BRIG
INVT_PWM
DISPOFF#
DAC_BRIG 33
INVT_PWM 33
+LCDVDD
GMCH_TXOUT0GMCH_TXOUT0+
GMCH_TXOUT1GMCH_TXOUT1+
GMCH_TXOUT2+
GMCH_TXOUT2GMCH_TXCLKGMCH_TXCLK+
41
41
41
41
DVI_TXC+
DVI_TXCDVI_TXD0+
DVI_TXD0-
41
41
41
41
DVI_TXD1+
DVI_TXD1DVI_TXD2+
DVI_TXD2-
DVI_TXC+
DVI_TXCDVI_TXD0+
DVI_TXD0DVI_TXD1+
DVI_TXD1DVI_TXD2+
DVI_TXD2CLK_PCIE_VGA
CLK_PCIE_VGA#
13 CLK_PCIE_VGA
13 CLK_PCIE_VGA#
GMCH_TXOUT0- 8
GMCH_TXOUT0+ 8
+5VALW
+5VS
GMCH_TXOUT1- 8
GMCH_TXOUT1+ 8
+3VALW
+2.5VS
GMCH_TXOUT2+ 8
GMCH_TXOUT2- 8
+1.8VS
GMCH_TXCLK- 8
GMCH_TXCLK+ 8
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
B+
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
VGA_TV_LUMA
VGA_TV_CRMA
VGA_TV_COMPS
VGA_TV_LUMA 21
VGA_TV_CRMA 21
VGA_TV_COMPS 21
PCEI_GTX_C_MRX_P0
PCEI_GTX_C_MRX_N0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1
PCEI_GTX_C_MRX_P2
PCEI_GTX_C_MRX_N2
PCEI_GTX_C_MRX_P3
PCEI_GTX_C_MRX_N3
PCEI_GTX_C_MRX_P4
PCEI_GTX_C_MRX_N4
C
PCEI_GTX_C_MRX_P5
PCEI_GTX_C_MRX_N5
PCEI_GTX_C_MRX_P6
PCEI_GTX_C_MRX_N6
PCEI_GTX_C_MRX_P7
PCEI_GTX_C_MRX_N7
PCEI_GTX_C_MRX_P8
PCEI_GTX_C_MRX_N8
PCEI_GTX_C_MRX_P9
PCEI_GTX_C_MRX_N9
PCEI_GTX_C_MRX_P10
PCEI_GTX_C_MRX_N10
PCEI_GTX_C_MRX_P11
PCEI_GTX_C_MRX_N11
PCEI_GTX_C_MRX_P12
PCEI_GTX_C_MRX_N12
PCEI_GTX_C_MRX_P13
PCEI_GTX_C_MRX_N13
PCEI_GTX_C_MRX_P14
PCEI_GTX_C_MRX_N14
PCEI_GTX_C_MRX_P15
PCEI_GTX_C_MRX_N15
SDVO_SCLK
SDVO_SDAT
DVI_DET
DVI_SCLK
DVI_SDATA
DAC_BRIG
DISPOFF#
INVT_PWM
PLTRST_VGA#
SUSP#
ENBKL
LCD_ID
SDVO_SCLK 8,41
SDVO_SDAT 8,41
DVI_DET 38,41
DVI_SCLK 38,41
DVI_SDATA 38,41
PLTRST_VGA# 18,41
SUSP# 33,35,40
ENBKL 33
LCD_ID 18
+1.5VS
+3VS
+1.8VS
PM@ ACES_88081-1600
ACES_88107-4000G
GM@
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
1
15
of
51
RP14
22,24,25,27,28 PCI_AD[0..31]
8.2K_1206_8P4R_5%
RP11
1
2
3
4
+3VS
8
7
6
5
PCI_PLOCK#
P CI_IRDY#
PCI_PERR#
PCI_DEVSEL#
8.2K_1206_8P4R_5%
RP15
1
2
3
4
+3VS
8
7
6
5
PCI_PIRQD#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQA#
8.2K_1206_8P4R_5%
RP12
1
2
3
4
+3VS
C
8
7
6
5
PCI_PIRQE#
PCI_PIRQF#
D_USB_SMI#2
PCI_PIRQG#
8.2K_1206_8P4R_5%
RP13
1
2
3
4
+3VS
8
7
6
5
PCI_REQ#3
D_USB_SMI#1
PCI_REQ#4
PCI_REQ#1
22,24,25,27,28 PCI_FRAME#
22 PCI_PIRQA#
22 PCI_PIRQB#
PCI_FRAME#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5
K2
K5
D4
L6
G3
H4
H2
H5
B3
M6
B2
K6
K3
A5
L1
K4
J3
AD[0]
AD[1]
AD[2]
AD[3]
AD[4]
AD[5]
AD[6]
AD[7]
AD[8]
AD[9]
AD[10]
AD[11]
AD[12]
AD[13]
AD[14]
AD[15]
AD[16]
AD[17]
AD[18]
AD[19]
AD[20]
AD[21]
AD[22]
AD[23]
AD[24]
AD[25]
AD[26]
AD[27]
AD[28]
AD[29]
AD[30]
AD[31]
L5
C1
B5
B6
M5
F1
B8
C8
F7
E7
E8
F6
B7
D8
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
PCI_REQ#4
C/BE[0]#
C/BE[1]#
C/BE[2]#
C/BE[3]#
J6
H6
G4
G2
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
A3
E1
R2
C3
E3
C5
G5
J1
J2
P CI_IRDY#
PCI_PAR
PCI_RST#
PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PLTRST#
PCICLK
PME#
R5
G6
P6
PLT_RST#
CLK_ICH_PCI
D9
C7
C6
M3
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
REQ[0]#
GNT[0]#
REQ[1]#
GNT[1]#
REQ[2]#
GNT[2]#
REQ[3]#
GNT[3]#
REQ[4]#/GPI[40]
GNT[4]#/GPO[48]
REQ[5]#/GPI[1]
GNT[5]#/GPO[17]
REQ[6]#/GPI[0]
GNT[6]#/GPO[16]
PCI
FRAME#
Interrupt
N2
L2
M1
L3
PIRQ[A]#
PIRQ[B]#
PIRQ[C]#
PIRQ[D]#
I/F
PIRQ[E]#/GPI[2]
PIRQ[F]#/GPI[3]
PIRQ[G]#GPI[4]
PIRQ[H]#/GPI[5]
D_USB_SMI#1
PCI_GNT#5
D_USB_SMI#2
PCI_GNT#6
PCI_REQ#0
PCI_GNT#0
PCI_REQ#1
PCI_GNT#1
PCI_REQ#2
PCI_GNT#2
PCI_REQ#3
PCI_GNT#3
24
24
27,28
27,28
22
22
25
25
Internal Pull-up.
Sample high destination is LPC.
PCI_GNT#5
R154
@ 0_0402_5%
D_USB_SMI#1 38
D_USB_SMI#2 38
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3
22,24,25,27,28
22,24,25,27,28
22,24,25,27,28
22,24,25,27,28
PCI_IRDY# 22,24,25,27,28
PCI_PAR 22,24,25,27,28
PCI_RST# 22,24,25,27,28,32,33
PCI_DEVSEL# 22,24,25,27,28
PCI_PERR# 22,24,25,27,28
PCI_SERR# 22,24,25,27,28
PCI_STOP# 22,24,25,27,28
PCI_TRDY# 22,24,25,27,28
PLT_RST# 6,18,20,32,33,41
CLK_PCI_ICH 13
CLK_PCI_ICH
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
24
25
27,28
27,28
R157
@ 10_0402_5%
8.2K_1206_8P4R_5%
U13B
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_SERR#
PCI_TRDY#
PCI_FRAME#
PCI_STOP#
8
7
6
5
1
2
3
4
+3VS
AC5
AD5
AF4
AG4
AC9
AD9
AF8
AG8
U3
RP23
1
2
3
4
+3VS
8
7
6
5
PCI_GNT#6
PCI_REQ#0
PCI_REQ#2
PCI_PIRQH#
8.2K_1206_8P4R_5%
RESERVED
SATA[1]RXN/RSVD[1]
SATA[1]RXP/RSVD[2]
SATA[1]TXN/RSVD[3]
SATA[1]TXP/RSVD[4]
SATA[3]RXN/RSVD[5]
SATA[3]RXP/RSVD[6]
SATA[3]TXN/RSVD[7]
SATA[3]TXP/RSVD[8]
TP[3]/RSVD[9]
C173
@ 10P_0402_50V8J
ICH6_BGA609
ICH6(1/4)
Size
Rev
0.2
EFL50 LA-2761
Date:
Document Number
Wednesday, April 20, 2005
Sheet
1
16
of
51
OUT
NC
IN
1M_0402_1%
C203
18P_0402_50V8J
2
1
INTRUDER#
ICH_RTCRST#
1
2
R444
20K_0402_5%
+RTCVCC
J3
ICH_RTCX2
INTRUDER#
1
JOPEN
+3VS
1
R185
10K_0402_5%
PHDD_LED#
C142
@ 10P_0402_50V8J
1
2
ICH_AC_BITCLK
AC97_SYNC_R
33_0402_5%
AC97_RST_R#
1
2
R146
33_0402_5%
ICH_AC_SDIN0
29 ICH_AC_SDIN0
ICH_AC_SDIN1
34 ICH_AC_SDIN1
ICH_AC_SYNC
R150
ICH_AC_RST#
29,34 ICH_AC_RST#
ICH_AC_SDOUT
2
R427
29,34 ICH_AC_SDOUT
PHDD_LED#
33 PHDD_LED#
AC_SDOUT
33_0402_5%
1
R184
P_HDD_LED#
33_0402_5%
IDE_IRQ
20 IDE_DIORDY
20 IDE_IRQ
20 IDE_DDACK#
20 IDE_DIOW#
20 IDE_DIOR#
IDE _DIORDY
IDE_IRQ
IDE_DDACK#
IDE_DIOW#
IDE_DIOR#
SATA_DTX_C_IRX_N0
0.01U_0402_16V7K
SATA_DTX_C_IRX_N0 20
SATA_DTX_C_IRX_P0
0.01U_0402_16V7K
SATA_DTX_C_IRX_P0 20
SATA_ITX_C_DRX_N0
0.01U_0402_16V7K
SATA_ITX_C_DRX_N0 20
SATA_ITX_C_DRX_P0
0.01U_0402_16V7K
SATA_ITX_C_DRX_P0 20
IORDY
IDEIRQ
DDACK#
DIOW#
DIOR#
R199 1
2 10K_0402_5%
+3VS
FERR#
CPUPWRGD/GPO[49]
AG25
H_PWRGOOD
H_PWRGOOD 4
IGNNE#
INIT3_3V#
INIT#
INTR
AG26
AE22
AF27
AG24
H_IGNNE#
H_IGNNE# 4
H_INIT#
H_INTR
H_INIT# 4
H_INTR 4
RCIN#
AD23
KB_RST#
NMI
SMI#
AF25
AG27
H_NMI
H_SMI#
H_NMI 4
H_SMI# 4
STPCLK#
AE26
H_STPCLK#
H_STPCLK# 4
THRMTRIP#
AE23
THRMTRIP#
DA[0]
DA[1]
DA[2]
AC16
AB17
AC17
IDE_DA0
IDE_DA1
IDE_DA2
DCS1#
DCS3#
AD16
AE17
IDE_DCS1#
IDE_DCS3#
DD[0]
DD[1]
DD[2]
DD[3]
DD[4]
DD[5]
DD[6]
DD[7]
DD[8]
DD[9]
DD[10]
DD[11]
DD[12]
DD[13]
DD[14]
DD[15]
AD14
AF15
AF14
AD12
AE14
AC11
AD11
AB11
AE13
AF13
AB12
AB13
AC13
AE15
AG15
AD13
IDE_DD0
IDE_DD1
IDE_DD2
IDE_DD3
IDE_DD4
IDE_DD5
IDE_DD6
IDE_DD7
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
DDREQ
AB14
IDE_DDREQ
R182 1
@ 0_0402_5% H_CPUSLP#
2 @ 0_0402_5% H_DPRSTP#
H_DPSLP# 4
56_0402_5%
H_FERR#
H_CPUSLP# 4,6
H_DPRSTP# 4
H_FERR# 4
MAINPWON
+1.05VS
R195
10K_0402_5%
1
2
EC_KBRST# 33
R194
@ 330_0402_5%
1
2
MAINPWON 40,42,44,45
Q16
@ 2SC2411K_SC59
2
B
E
+3VS
+1.05VS
1
R187
2
75_0402_1%
THRMTRIP#
R186
56_0402_5%
H_THERMTRIP#
H_THERMTRIP# 4,6
IDE_DA[0..2] 20
IDE_DCS1# 20
IDE_DCS3# 20
IDE_DD[0..15] 20
IDE_DDREQ 20
ICH6_BGA609
C534
AF16
AB16
AB15
AC14
AE16
SATARBIAS#
SATARBIAS
2
56_0402_5%
2
@ 56_0402_5%
EC_GA20 33
H_A20M# 4
AF24
SATA
SATA_CLKN
SATA_CLKP
R181
LPC_FRAME# 32,33
FERR#
SATALED#
AC2
AC1
2 8.2K_0402_5%
C535
ACZ_SDO
SATA[2]RXN
SATA[2]RXP
SATA[2]TXN
SATA[2]TXP
R201 1
SATA_ITX_DRX_P0
ACZ_SDIN[0]
ACZ_SDIN[1]
ACZ_SDIN[2]
AD7
AC7
AF6
AG6
IDE _DIORDY
C530
F11
F10
B10
SATA_DTX_IRX_N2
SATA_DTX_IRX_P2
2 4.7K_0402_5%
SATA_ITX_DRX_N0
ACZ_RST#
1 R491
1 R483
2 24.9_0402_1%
AF22
AF23
R183
H_DPRSTP#
DPRSTP# R180 1
DPSLP#
ACZ_BIT_CLK
ACZ_SYNC
1K_0402_5% 2
1K_0402_5% 2
A20GATE
A20M#
EC_GA20
H_A20M#
LANTXD[0]
LANTXD[1]
LANTXD[2]
A10
AG11
SATARBIAS AF11
P3
LPC_FRAME#
H_FERR#
LPC_DRQ#1 32
CPUSLP# R176 1
LANRXD[0]
LANRXD[1]
LANRXD[2]
SATA[0]RXN
SATA[0]RXP
SATA[0]TXN
SATA[0]TXP
CLK_PCIE_SATA#
CLK_PCIE_SATA
LPC_DRQ#1
AE24
AD27
E12
E11
C13
AC19
N6
P4
32,33
32,33
32,33
32,33
AE27
LAN_RSTSYNC
C9
LDRQ[0]#
LDRQ[1]#/GPI[41]
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
CPUSLP#
LAN_CLK
C10
B9
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
DPRSLP#/TP[4]
DPSLP#/TP[2]
F12
B11
AE3
AD3
AG2
AF2
R189 1
SATA_DTX_IRX_P0
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
C12
C11
E13
P2
N3
N5
N4
LFRAME#/FWH[4]
D12
B12
D11
F13
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
SATA_ITX_DRX_N0
SATA_ITX_DRX_P0
R188
C531
INTRUDER#
INTVRMEN
1 R464
1 R459
SATA_DTX_IRX_N0
RTCRST#
AA3
AA5
1K_0402_5% 2
1K_0402_5% 2
13 CLK_PCIE_SATA#
13 CLK_PCIE_SATA
+3VS
AA2
LAD[0]/FWH[0]
LAD[1]/FWH[1]
LAD[2]/FWH[2]
LAD[3]/FWH[3]
AC-97/AZALIA
29,34 ICH_AC_BITCLK
29,34 ICH_AC_SYNC
R149
@ 10_0402_5%
2
1
+1.05VS
RTCX1
RTCX2
LAN
C522
1U_0402_6.3V4Z
1
2
U13A
Y1
Y2
RTC
NC
PIDE
32.768KHZ_12.5P_1TJS125DJ2A073
LPC
1
R440
ICH_RTCX1
Y2
CPU
C205
18P_0402_50V8J
2
1
+RTCVCC
R171
10M_0402_5%
2
1
ICH6(2/4)
Size
Rev
0.2
EFL50 LA-2761
Date:
Document Number
Wednesday, April 20, 2005
Sheet
1
17
of
51
+3VALW
U13C
EZ_PE_REQ2#
D8 1
RB751V_SOD323
2
33 EC_SMI#
33 ACIN1
33 EC_LID_OUT#
EC_LID_OUT#
2
R432
EC_LID_OUT#
D25 1
RB751V_SOD323
LID_OUT#
1
@ 0_0402_5%
2
33 EC_SCI#
13 PM_STP_PCI#
35 SB_INT_FLASH_SEL#
13,46 PM_STP_CPU#
CK_SCLK
CK_SDATA
LINKALERT#
ICH_SMLINK0
ICH_SMLINK1
MCH_SYNC#
SB_SPKR
Y4
W5
Y5
W4
U6
AG21
F8
SMBCLK
SMBDATA
LINKALERT#
SMLINK[0]
SMLINK[1]
MCH_SYNC#
SPKR
SUS_STAT#
W3
SUS_STAT#/LPCPD#
SYSRST#
U2
SYS_RESET#
PM_BMBUSY#
AD19
BM_BUSY#/GPI[6]
ICH_GPI7
EC_SMI#
AE19
R1
GPI[7]
GPI[8]
ACIN1
W6
SMBALERT#/GPI[11]
LID_OUT#
EC_SCI#
M2
R6
GPI[12]
GPI[13]
PM_STP_PCI#
AC21
STP_PCI#/GPO[18]
SB_INT_FLASH_SEL#
AB21
GPO[19]
PM_STP_CPU#
AD22
STP_CPU#/GPO[20]
PLTRST_VGA#
AD20
AD21
GPO[21]
GPO[23]
IDE_HRESET#
V3
GPIO[24]
15,41 PLTRST_VGA#
+3VS
20 IDE_HRESET#
ICH_GPI7
2
10K_0402_5%
PM_CLKRUN#
2
8.2K_0402_5%
ICH_VGATE
2
10K_0402_5%
MCH_SYNC#
2
10K_0402_5%
SERIRQ
2
10K_0402_5%
LID_OUT#
2
10K_0402_5%
1
R190
1
R191
1
R196
1
R193
1
R197
1
R430
LCD_ID
15 LCD_ID
EC_FLASH#
PM_CLKRUN#
35 EC_FLASH#
24,25,27,28,32,33 PM_CLKRUN#
PE_WAKE#
R435 2
22,32,33 SERIRQ
33 EC_THERM#
1
R172
1
R441
SYS_PWROK
2
@ 10K_0402_5%
EC_RSMRST#
2
10K_0402_5%
6,13,46 VGATE
VGATE
0_0402_5%
GPI29
GPI28
GPI27
GPI26
33 RTC_CLK
33 PM_SLP_S3#
39 SYS_PWROK
PM_DPRSLPVR
2
100K_0402_5%
46 PM_DPRSLPVR
33 PBTN_OUT#
6,16,20,32,33,41 PLT_RST#
33 EC_RSMRST#
WAKE#
AB20
SERIRQ
AC20
THRM#
AF21
VRMPWRGD
2
1 ICH_VGATE
R198
0_0402_5%
CLK_14M_ICH
E10
CLK14
A27
CLK48
RTC_CLK
V6
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
T4
T5
T6
SLP_S3#
SLP_S4#
SLP_S5#
100_1206_8P4R_5%
1
R192
U5
SERIRQ
RP16
5
6
7
8
WAKE#
GPIO[25]
GPIO[27]
GPIO[28]
CLKRUN#/GPIO[32]
GPIO[33]
GPIO[34]
EC_THERM#
CLK_48M_ICH
4
3
2
1
P5
R3
T3
AF19
AF20
AC18
SYS_PWROK
PM_DPRSLPVR
AA1
AE20
PCI-EXPRESS
SATA[0]GP/GPI[26]
SATA[1]GP/GPI[29]
SATA[2]GP/GPI[30]
SATA[3]GP/GPI[31]
6 PM_BMBUSY#
AF17
AE18
AF18
AG18
GPIO
29 SB_SPKR
35 SUS_STAT#
RI#
GPI26
GPI27
GPI28
GPI29
PWROK
DPRSLPVR/TP[1]
PM_BATLOW#
V2
BATLOW#/TP[0]
PBTN_OUT#
U1
PWRBTN#
PLT_RST#
V5
LAN_RST#
EC_RSMRST#
Y3
RSMRST#
PERn[1]
PERp[1]
PETn[1]
PETp[1]
H25
H24
G27
G26
EZ_PCIE_RXN1
EZ_PCIE_RXP1
EZ_PCIE_C_TXN1
EZ_PCIE_C_TXP1
PERn[2]
PERp[2]
PETn[2]
PETp[2]
K25
K24
J27
J26
EZ_PCIE_RXN2
EZ_PCIE_RXP2
EZ_PCIE_C_TXN2
EZ_PCIE_C_TXP2
PERn[3]
PERp[3]
PETn[3]
PETp[3]
M25
M24
L27
L26
PERn[4]
PERp[4]
PETn[4]
PETp[4]
P24
P23
N27
N26
DMI[0]RXN
DMI[0]RXP
DMI[0]TXN
DMI[0]TXP
T25
T24
R27
R26
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
DMI[1]RXN
DMI[1]RXP
DMI[1]TXN
DMI[1]TXP
V25
V24
U27
U26
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
DMI[2]RXN
DMI[2]RXP
DMI[2]TXN
DMI[2]TXP
Y25
Y24
W27
W26
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
DMI[3]RXN
DMI[3]RXP
DMI[3]TXN
DMI[3]TXP
AB24
AB23
AA27
AA26
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
DMI_CLKN
DMI_CLKP
AD25
AC25
CLK_PCIE_ICH#
CLK_PCIE_ICH
C489 1
2 1@ 0.1U_0402_16V4Z EZ_PCIE_TXN1
EZ_PCIE_TXP1
1
2
C490
1@ 0.1U_0402_16V4Z
C494 1
2 1@ 0.1U_0402_16V4Z EZ_PCIE_TXN2
EZ_PCIE_TXP2
1
2
C495
1@ 0.1U_0402_16V4Z
EZ_PCIE_RXN1
EZ_PCIE_RXP1
EZ_PCIE_TXN1
EZ_PCIE_TXP1
38
38
38
38
EZ_PCIE_RXN2
EZ_PCIE_RXP2
EZ_PCIE_TXN2
EZ_PCIE_TXP2
38
38
38
38
+3VALW
DMI_ZCOMP
F24
DMI_IRCOMP
F23
DMI_IRCOMP
OC[4]#/GPI[9]
OC[5]#/GPI[10]
OC[6]#/GPI[14]
OC[7]#/GPI[15]
C23
D23
C25
C24
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
OC[0]#
OC[1]#
OC[2]#
OC[3]#
C27
B27
B26
C26
USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USBP[0]N
USBP[0]P
USBP[1]N
USBP[1]P
USBP[2]N
USBP[2]P
USBP[3]N
USBP[3]P
USBP[4]N
USBP[4]P
USBP[5]N
USBP[5]P
USBP[6]N
USBP[6]P
USBP[7]N
USBP[7]P
C21
D21
A20
B20
D19
C19
A18
B18
E17
D17
B16
A16
C15
D15
A14
B14
USB20_N0
USB20_P0
USBRBIAS#
USBRBIAS
A22
B22
USB
33,38 EZ_PE_REQ2#
13 CK_SCLK
13 CK_SDATA
T2
CLOCK
EC_SWI#
33 EC_SWI#
POWER MGT
ICH_SMLINK0
2
10K_0402_5%
ICH_SMLINK1
2
10K_0402_5%
CK_SCLK
2
2.2K_0402_5%
CK_SDATA
2
2.2K_0402_5%
LINKALERT#
2
10K_0402_5%
EC_LID_OUT#
2
10K_0402_5%
EC_SWI#
2
10K_0402_5%
PM_BATLOW#
2
8.2K_0402_5%
PE_WAKE#
2
1K_0402_5%
SYSRST#
2
10K_0402_5%
1
R439
1
R434
1
R438
1
R437
1
R436
1
R431
1
R167
1
R168
1
R433
1
R170
DMI_MTX_IRX_N0
DMI_MTX_IRX_P0
DMI_ITX_MRX_N0
DMI_ITX_MRX_P0
6
6
6
6
DMI_MTX_IRX_N1
DMI_MTX_IRX_P1
DMI_ITX_MRX_N1
DMI_ITX_MRX_P1
6
6
6
6
DMI_MTX_IRX_N2
DMI_MTX_IRX_P2
DMI_ITX_MRX_N2
DMI_ITX_MRX_P2
6
6
6
6
DMI_MTX_IRX_N3
DMI_MTX_IRX_P3
DMI_ITX_MRX_N3
DMI_ITX_MRX_P3
6
6
6
6
RP9
USB_OC#5
4
3
2
1
USB_OC#6
USB_OC#7
5
6
7
8
10K_1206_8P4R_5%
RP10
USB_OC#3
USB_OC#0
USB_OC#1
4
3
2
1
5
6
7
8
10K_1206_8P4R_5%
CLK_PCIE_ICH# 13
CLK_PCIE_ICH 13
R429 1
2 24.9_0402_1%
+1.5VS
USB_OC#4 37
USB_OC#6 37
1231_Modify
USB_OC#0 37
USB_OC#2 37
USB20_N0 37
USB20_P0 37
USB20_N2
USB20_P2
USB20_N2 37
USB20_P2 37
B
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
USBRBIAS
USB20_N4
USB20_P4
USB20_N5
USB20_P5
USB20_N6
USB20_P6
1
R426
37
37
34
34
37
37
22.6_0402_1%
ICH6_BGA609
+3VALW
IN1
SLP_S4#
IN2
SLP_S5#
U14
CLK_14M_ICH
13 CLK_ICH_14M
33 PM_SLP_S5#
PM_SLP_S5#
R428
@ 10_0402_5%
SN74AHC1G08DCKR_SC70
R152
@ 10_0402_5%
CLK_48M_ICH
13 CLK_ICH_48M
C201
0.1U_0402_16V4Z
2
1
1
C162
@ 10P_0402_50V8J
C486
@ 10P_0402_50V8J
ICH6(3/4)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
18
of
51
+1.5VS
+1.5VS
C521
0.1U_0402_16V4Z
2
+5VALW +3VALW
C517
0.1U_0402_16V4Z
1
R147
D6
RB751V_SOD323
10_0402_5%
ICH6_VCCPLL
+3VS
ICH_V5REF_SUS
C145
1U_0603_10V4Z
C487
0.1U_0402_16V4Z
C483
0.1U_0402_16V4Z 1
Near PIN
E26, E27
C208
0.1U_0402_16V4Z 1
VCCDMIPLL
VCC3_3[1]
+3VS
A13
F14
G13
G14
C480
0.1U_0402_16V4Z
ICH6_VCCPLL
C479
0.1U_0402_16V4Z
+1.5VS
A
AC27
E26
+1.5VS
+3VS
+3VALW
L25
R173
CHB1608U301_0603
0.5_0603_1%
1
2 ICH6_VCCDMIPLL 1
2
VCC1_5[56]
VCC1_5[57]
VCC1_5[58]
VCC1_5[59]
VCC1_5[60]
VCC1_5[61]
VCC1_5[62]
VCC1_5[63]
VCC1_5[64]
VCC1_5[65]
AE1
AG10
+3VALW
AA7
AA8
AA9
AB8
AC8
AD8
AE8
AE9
AF9
AG9
A11
U4
V1
V7
W2
Y7
A17
B17
C17
F18
G17
G18
G19
VCC1_5[78]
VCC1_5[77]
VCC1_5[76]
VCC1_5[75]
VCC1_5[74]
VCC1_5[73]
VCC1_5[72]
VCC1_5[71]
VCC1_5[70]
VCC1_5[69]
VCC1_5[68]
G20
F20
E24
E23
E22
E21
E20
D27
D26
D25
D24
VCC1_5[67]
G8
C485
C4961
Near PIN
AG13, AG16
C498
0.1U_0402_16V4Z
1
2
+3VS
C502
0.01U_0402_16V7K
1
2
Near PIN
A2-A6, D1-H1
+1.5VALW
+3VALW
C520
0.1U_0402_16V4Z
1
2
+1.5VS
C488
0.1U_0402_16V4Z
1
2
+2.5VS
V5REF[2]
V5REF[1]
AA18
A8
ICH_V5REF_RUN
V5REF_SUS
F21
ICH_V5REF_SUS
VCCUSBPLL
VCCLAN3_3/VCCSUS3_3[1]
VCCSUS3_3[20]
VCCLAN3_3/VCCSUS3_3[2]
VCCLAN3_3/VCCSUS3_3[3]
VCCRTC
VCCLAN3_3/VCCSUS3_3[4]
VCCLAN1_5/VCCSUS1_5[2]
VCCSUS3_3[1]
VCCLAN1_5/VCCSUS1_5[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
V_CPU_IO[3]
VCCSUS3_3[4]
V_CPU_IO[2]
VCCSUS3_3[5]
V_CPU_IO[1]
VCCSUS3_3[6]
VCCSUS3_3[19]
VCCSUS3_3[7]
VCCSUS3_3[18]
VCCSUS3_3[8]
VCCSUS3_3[17]
VCCSUS3_3[9]
VCCSUS3_3[16]
VCCSUS3_3[10]
VCCSUS3_3[15]
VCCSUS3_3[11]
VCCSUS3_3[14]
VCCSUS3_3[12]
VCCSUS3_3[13]
A25
A24
+1.5VS
+3VALW
AB3
+RTCVCC
G11
G10
+1.5VS
AG23
AD26
AB22
G16
G15
F16
F15
E16
D16
C16
C493
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
AB18
P7
VCCSATAPLL
VCC3_3[22]
C482
0.1U_0402_16V4Z
1
2
VCC2_5[4]
VCC2_5[2]
PCI/IDE RBP
C484
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z +3VS
C511
0.1U_0402_16V4Z
1
2
C514
0.1U_0402_16V4Z
1
2
+3VS
+1.05VS
C518
0.1U_0402_16V4Z
1
2
E27
Y6
Y27
Y26
Y23
W7
W25
W24
W23
W1
V4
V27
V26
V23
U25
U24
U23
U15
U13
T7
T27
T26
T23
T16
T15
T14
T13
T12
T1
R4
R25
R24
R23
R17
R16
R15
R14
R13
R12
R11
P22
P16
P15
P14
P13
P12
N7
N17
N16
N15
N14
N13
N12
N11
N1
M4
M27
M26
M23
M16
M15
M14
M13
M12
L25
L24
L23
L15
L13
K7
K27
K26
K23
K1
J4
J25
J24
J23
H27
H26
H23
G9
G7
G21
G12
G1
VSS[172]
VSS[171]
VSS[170]
VSS[169]
VSS[168]
VSS[167]
VSS[166]
VSS[165]
VSS[164]
VSS[163]
VSS[162]
VSS[161]
VSS[160]
VSS[159]
VSS[158]
VSS[157]
VSS[156]
VSS[155]
VSS[154]
VSS[153]
VSS[152]
VSS[151]
VSS[150]
VSS[149]
VSS[148]
VSS[147]
VSS[146]
VSS[145]
VSS[144]
VSS[143]
VSS[142]
VSS[141]
VSS[140]
VSS[139]
VSS[138]
VSS[137]
VSS[136]
VSS[135]
VSS[134]
VSS[133]
VSS[132]
VSS[131]
VSS[130]
VSS[129]
VSS[128]
VSS[127]
VSS[126]
VSS[125]
VSS[124]
VSS[123]
VSS[122]
VSS[121]
VSS[120]
VSS[119]
VSS[118]
VSS[117]
VSS[116]
VSS[115]
VSS[114]
VSS[113]
VSS[112]
VSS[111]
VSS[110]
VSS[109]
VSS[108]
VSS[107]
VSS[106]
VSS[105]
VSS[104]
VSS[103]
VSS[102]
VSS[101]
VSS[100]
VSS[99]
VSS[98]
VSS[97]
VSS[96]
VSS[95]
VSS[94]
VSS[93]
VSS[92]
VSS[91]
VSS[90]
VSS[89]
VSS[88]
VSS[87]
GROUND
VCCSUS1_5[1]
CORE
SATA
+1.5VS
U7
R7
C513
0.1U_0402_16V4Z
1
2
C505
0.1U_0402_16V4Z
VCC1_5[46]
VCC1_5[47]
VCC1_5[48]
VCC1_5[49]
VCC1_5[50]
VCC1_5[51]
VCC1_5[52]
VCC1_5[53]
VCC1_5[54]
VCC1_5[55]
VCCSUS1_5[3]
VCCSUS1_5[2]
C503
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
AA6
AB4
AB5
AB6
AC4
AD4
AE4
AE5
AF5
AG5
P1
M7
L7
L4
J7
H7
H1
E4
B1
A6
C497
0.1U_0402_16V4Z
1
2
C510
0.1U_0402_16V4Z
VCC3_3[11]
VCC3_3[10]
VCC3_3[9]
VCC3_3[8]
VCC3_3[7]
VCC3_3[6]
VCC3_3[5]
VCC3_3[4]
VCC3_3[3]
VCC3_3[2]
0.1U_0402_16V4Z
C492
0.1U_0402_16V4Z
C507
0.1U_0402_16V4Z
1
2
C516
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
C515
0.1U_0402_16V4Z
C491
0.1U_0402_16V4Z
C148
AA10
AG19
AG16
AG13
AD17
AC15
AA17
AA15
AA14
AA12
C5271
C501
0.1U_0402_16V4Z
2
C147
1U_0603_10V4Z
VCC3_3[21]
VCC3_3[20]
VCC3_3[19]
VCC3_3[18]
VCC3_3[17]
VCC3_3[16]
VCC3_3[15]
VCC3_3[14]
VCC3_3[13]
VCC3_3[12]
C526
C509
ICH_V5REF_RUN
2
U13D
C512
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
C528
0.1U_0402_16V4Z
RB751V_SOD323
F9
U17
U16
U14
U12
U11
T17
T11
P17
P11
M17
M11
L17
L16
L14
L12
L11
AA21
AA20
AA19
PCIE
10_0402_5%
VCC1_5[98]
VCC1_5[97]
VCC1_5[96]
VCC1_5[95]
VCC1_5[94]
VCC1_5[93]
VCC1_5[92]
VCC1_5[91]
VCC1_5[90]
VCC1_5[89]
VCC1_5[88]
VCC1_5[87]
VCC1_5[86]
VCC1_5[85]
VCC1_5[84]
VCC1_5[83]
VCC1_5[82]
VCC1_5[81]
VCC1_5[80]
VCC1_5[79]
IDE
D7
VCC1_5[1]
VCC1_5[2]
VCC1_5[3]
VCC1_5[4]
VCC1_5[5]
VCC1_5[6]
VCC1_5[7]
VCC1_5[8]
VCC1_5[9]
VCC1_5[10]
VCC1_5[11]
VCC1_5[12]
VCC1_5[13]
VCC1_5[14]
VCC1_5[15]
VCC1_5[16]
VCC1_5[17]
VCC1_5[18]
VCC1_5[19]
VCC1_5[20]
VCC1_5[21]
VCC1_5[22]
VCC1_5[23]
VCC1_5[24]
VCC1_5[25]
VCC1_5[26]
VCC1_5[27]
VCC1_5[28]
VCC1_5[29]
VCC1_5[30]
VCC1_5[31]
VCC1_5[32]
VCC1_5[33]
VCC1_5[34]
VCC1_5[35]
VCC1_5[36]
VCC1_5[37]
VCC1_5[38]
VCC1_5[39]
VCC1_5[40]
VCC1_5[41]
VCC1_5[42]
VCC1_5[43]
VCC1_5[44]
VCC1_5[45]
PCI
R148
AA22
AA23
AA24
AA25
AB25
AB26
AB27
F25
F26
F27
G22
G23
G24
G25
H21
H22
J21
J22
K21
K22
L21
L22
M21
M22
N21
N22
N23
N24
N25
P21
P25
P26
P27
R21
R22
T21
T22
U21
U22
V21
V22
W21
W22
Y21
Y22
C508
0.1U_0402_16V4Z
1
2
+RTCVCC
U13E
USB
+3VS
+1.5VS
USB CORE
+5VS
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C500
0.1U_0402_16V4Z
C499
C219
C504
+1.5VS
220U_D2_4VM_R12
VSS[86]
VSS[85]
VSS[84]
VSS[83]
VSS[82]
VSS[81]
VSS[80]
VSS[79]
VSS[78]
VSS[77]
VSS[76]
VSS[75]
VSS[74]
VSS[73]
VSS[72]
VSS[71]
VSS[70]
VSS[69]
VSS[68]
VSS[67]
VSS[66]
VSS[65]
VSS[64]
VSS[63]
VSS[62]
VSS[61]
VSS[60]
VSS[59]
VSS[58]
VSS[57]
VSS[56]
VSS[55]
VSS[54]
VSS[53]
VSS[52]
VSS[51]
VSS[50]
VSS[49]
VSS[48]
VSS[47]
VSS[46]
VSS[45]
VSS[44]
VSS[43]
VSS[42]
VSS[41]
VSS[40]
VSS[39]
VSS[38]
VSS[37]
VSS[36]
VSS[35]
VSS[34]
VSS[33]
VSS[32]
VSS[31]
VSS[30]
VSS[29]
VSS[28]
VSS[27]
VSS[26]
VSS[25]
VSS[24]
VSS[23]
VSS[22]
VSS[21]
VSS[20]
VSS[19]
VSS[18]
VSS[17]
VSS[16]
VSS[15]
VSS[14]
VSS[13]
VSS[12]
VSS[11]
VSS[10]
VSS[9]
VSS[8]
VSS[7]
VSS[6]
VSS[5]
VSS[4]
VSS[3]
VSS[2]
VSS[1]
F4
F22
F19
F17
E25
E19
E18
E15
E14
D7
D22
D20
D18
D14
D13
D10
D1
C4
C22
C20
C18
C14
B25
B24
B23
B21
B19
B15
B13
AG7
AG3
AG22
AG20
AG17
AG14
AG12
AG1
AF7
AF3
AF26
AF12
AF10
AF1
AE7
AE6
AE25
AE21
AE2
AE12
AE11
AE10
AD6
AD24
AD2
AD18
AD15
AD10
AD1
AC6
AC3
AC26
AC24
AC23
AC22
AC12
AC10
AB9
AB7
AB2
AB19
AB10
AB1
AA4
AA16
AA13
AA11
A9
A7
A4
A26
A23
A21
A19
A15
A12
A1
ICH6_BGA609
C519
0.1U_0402_16V4Z
1
2
ICH6_BGA609
ICH6(4/4)
Near PIN
AC27
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
Size
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
1
19
of
51
HDD CONN
IDE_DD[0..15]
17 IDE_DD[0..15]
IDE_DA[0..2]
17 IDE_DA[0..2]
JP28
IDE_RESET#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
+5VS
IDE_DDREQ
IDE_DIOW#
IDE_DIOR#
IDE _DIORDY
IDE_DDACK#
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
IDE_DDREQ
IDE_DIOW#
IDE_DIOR#
IDE_DIORDY
IDE_DDACK#
IDE_IRQ
R224
100K_0402_5%
17
17
17
17
17
17
17 IDE_DCS1#
IDE_LED#
33 IDE_LED#
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
+5VS
80mils
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_CSEL R219 1
PDIAG#
IDE_DA2
IDE_DCS3#
2 470_0402_5%
IDE_DCS3# 17
+5VS
80mils
2SP@
SUYIN_200138FR044G272ZU_RV
For 2 Spindle
C
+5VS
C269
2 0.1U_0402_16V4Z
+5VS
C598
C594
1
C593
6,16,18,32,33,41 PLT_RST#
PLT_RST#
C590
0.1U_0402_16V4Z
C267
2
1000P_0402_50V7K
1U_0603_10V4Z
Y
A
U19
5
1
IDE_HRESET#
18 IDE_HRESET#
1
C268
IDE_RESET#
0.1U_0402_16V4Z
1
C270
C279
2
10U_0805_10V4Z
0.1U_0402_16V4Z
10U_0805_10V4Z
+3VS
TC7SH08FU_SSOP5
2
1000P_0402_50V7K
CDROM CONN
JP29
JP39
17 SATA_ITX_C_DRX_P0
17 SATA_ITX_C_DRX_N0
17 SATA_DTX_C_IRX_N0
17 SATA_DTX_C_IRX_P0
+3VS
+5VS
SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
CDROM_L
CD_AGND
IDE_RESET#
IDE_DD7
IDE_DD6
IDE_DD5
IDE_DD4
IDE_DD3
IDE_DD2
IDE_DD1
IDE_DD0
29 INT_CD_L
29 CD_AGND
GND
HTX+
HTXGND
HRXHRX+
GND
VCC3.3
VCC3.3
VCC3.3
GND
GND
GND
VCC5
VCC5
VCC5
GND
RESERVED
GND
VCC12
VCC12
VCC12
IDE_DIOW#
IDE _DIORDY
IDE_IRQ
IDE_DA1
IDE_DA0
IDE_DCS1#
IDE_LED#
+5VS
2
R567
OCTEK_SAT-22RD1_REVERS
2SS@
SD_CSEL
1
@ 470_0402_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
If CDROM is Slave
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
CDROM_R
INT_CD_R 29
IDE_DD8
IDE_DD9
IDE_DD10
IDE_DD11
IDE_DD12
IDE_DD13
IDE_DD14
IDE_DD15
IDE_DDREQ
IDE_DIOR#
IDE_DDACK#
PDIAG#
IDE_DA2
IDE_DCS3#
80mils
+5VS
1
2
R566
@100K_0402_5%
+5VS
OCTEK_CDR-50JD1
2S@
For 2 Spindle
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Size
Rev
0.2
EFL50 LA-2761
Date:
Sheet
1
20
of
51
8 GMCH_TV_COMPS
GMCH_TV_CRMA
VGA_TV_COMPS
GMCH_TV_COMPS
2
PM@
2
GM@
2
PM@
2
GM@
1
R77
1
R78
2
PM@ 0_0402_5%
2
GM@ 0_0402_5%
LUMA_Q
CRMA_Q
COMPS_Q
0_0402_5%
0_0402_5%
4
7
9
12
1A
2A
3A
4A
0_0402_5%
0_0402_5%
2
5
11
14
1B2
2B2
3B2
4B2
3
6
10
13
LUMA
2
ND@ 0_0402_5%
CRMA
2
ND@ 0_0402_5%
COMPS
2
ND@ 0_0402_5%
JP17
L8 1
2
FBM-11-160808-121T_0603
CRMA
L14 1
2
FBM-11-160808-121T_0603
COMPS
L13 1
2
FBM-11-160808-121T_0603
GND
3
6
7
5
2
4
1
8
9
CRMA_L
COMPS_L
LUMA_L
R74
2
1
R391
1
R392
COMPS_Q 1
R80
CRMA_Q
D_TV_LUMA 38
D_TV_CRMA 38
D_TV_COMPS 38
LUMA
FSAV330MTC_TSSOP16
W D@
LUMA_Q
+3VS
D_TV_LUMA
D_TV_CRMA
D_TV_COMPS
R66
2
15 VGA_TV_COMPS
VGA_TV_CRMA
1
R69
1
R67
1
R71
1
R75
16
1B1
2B1
3B1
4B1
D22
@DAN217_SOT23
8 GMCH_TV_CRMA
GMCH_TV_LUMA
VCC
R62
1
C40
15 VGA_TV_CRMA
VGA_TV_LUMA
SEL
OE#
8 GMCH_TV_LUMA
1
15
15 VGA_TV_LUMA
DOCKIN#
14,26,33,38 DOCKIN#
D24
@DAN217_SOT23
D23
@DAN217_SOT23
+5VS
U5
1
C48
1
C28
1
C44
150_0402_5%
150_0402_5% 270P_0402_50V7K
270P_0402_50V7K
150_0402_5%
270P_0402_50V7K
(CL55)
1
C53
SUYIN_030107FR007SX08FU
C30
330P_0402_50V7K 330P_0402_50V7K
330P_0402_50V7K
Size
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
1
21
of
51
1
C591
@15P_0402_50V8J
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
16,24,25,27,28,32,33 PCI_RST#
16,24,25,27,28 PCI_FRAME#
16,24,25,27,28 PCI_IRDY#
16,24,25,27,28 PCI_TRDY#
16,24,25,27,28 PCI_DEVSEL#
16,24,25,27,28 PCI_STOP#
16,24,25,27,28 PCI_PERR#
16,24,25,27,28 PCI_SERR#
16,24,25,27,28 PCI_PAR
16 PCI_REQ#2
IDSEL:
16 PCI_GNT#2
PCI_AD20 13 CLK_PCI_PCM
+3VS
PCI_AD20
+3VS
23 SD_PULLHIGH
R565
R297
43K_0402_5%
R561 1
0_0402_5%
23 MSPWREN#
43K_0402_5%
1
R563
1
R584
16 PCI_PIRQA#
16 PCI_PIRQB#
18,32,33 SERIRQ
33 CARD_LED#
PCI_RST#
CLK_PCI_PCM
2
10K_0402_5%
2 PCM_ID
100_0402_1%
PCI_PIRQA#
SD_PULLHIGH
PCI_PIRQB#
SDOC#
XDOC#
23 SDOC#
23 XDOC#
B4
C8
D12
H11
L9
L6
N4
K2
G1
F3
VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
A7
G13
VCCA2
VCCA1
M12
N12
VPPD1
VPPD0
E1
J3
N1
N5
CBE3#
CBE2#
CBE1#
CBE0#
G4
J4
K1
K3
L1
L2
L3
M1
M2
A1
B1
H1
PCIRST#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#
PAR
PCIREQ#
PCIGNT#
PCICLK
L8
L11
RIOUT#_PME#
SUSPEND#
F4
MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6
MFUNC7
M10
GRST#
23 SDCK
R570
1
22_0402_5%
2
23 XDWE#
R569
1
22_0402_5%
2
13 CLK_SD_48M
23
23
23
23
23
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
E8
F8
G7
SDCD#
SDWP/SMWPD#
SDPWREN33#
CLK_SD_48M
H5
SDCLKI
SDCM_XDALE
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
F6
E5
E6
F7
F5
G6
SDCLK/SMWE#
SDCMD/SMALE
SDDAT0/SMDATA7
SDDAT1/SMDATA0
SDDAT2/SMCLE
SDDAT3/SMDATA4
G5
GND_SD
+3VS
SDCD#
2
@43K_0402_5%
SDWP
2
@43K_0402_5%
MSINS#
2
@43K_0402_5%
S1_REG#
S1_A12
S1_A8
S1_CE1#
CRST#/RESET
CFRAME#/A23
CIRDY#/A15
CTRDY#/A22
CDEVSEL#/A21
CSTOP#/A20
CPERR#/A14
CSERR#/WAIT#
CPAR/A13
CREQ#/INPACK#
CGNT#/WE#
CCLK/A16
B9
B11
A12
A13
B13
C12
C13
A5
D13
B8
C11
B12
C5
D5
S1_RST
S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A14
S1_WAIT#
S1_A13
S1_INPACK#
S1_WE#
A16_CLK
1
R593
S1_BVD1
S1_WP
D11
S1_A19
D6
S1_RDY#
M9
B5
PCM_SPK#
S1_BVD2
A4
L12
D9
C6
A2
E10
J13
S1_CD2#
S1_CD1#
S1_VS2
S1_VS1
S1_D2
S1_A18
S1_D14
SD/MMC/MS/SM
MSINS#
MSPWREN#/SMPWREN#
MSBS/SMDATA1
MSCLK/SMRE#
MSDATA0/SMDATA2
MSDATA1/SMDATA6
MSDATA2/SMDATA5
MSDATA3/SMDATA3
H7
J8
H8
E9
G9
H9
G8
F9
SMBSY#
SMCD#
SMWP#
SMCE#
H6
J7
J6
J5
D3
H2
L4
M8
K11
F12
C10
B6
C344
15P_0402_50V8J
B7
A11
E11
H13
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
2
2
23 SDCD#
23 SDWP
23 SDPWREN#
CCBE3#/REG#
CCBE2#/A12
CCBE1#/A8
CCBE0#/CE1#
CCD2#/CD2#
CCD1#/CD1#
CVS2/VS2#
CVS1/VS1
CRSV3/D2
CRSV2/A18
CRSV1/D14
VCC_SD
SDCD#
SDWP
B2
C3
B3
A3
C4
A6
D7
C7
A8
D8
A9
C9
A10
B10
D10
E12
F10
E13
F13
F11
G10
G11
G12
H12
H10
J11
J12
K13
J10
K10
K12
L13
SPKROUT
CAUDIO/BVD2_SPKR#
E7
+VCC_5IN1
CAD31/D10
CAD30/D9
CAD29/D1
CAD28/D8
CAD27/D0
CAD26/A0
CAD25/A1
CAD24/A2
CAD23/A3
CAD22/A4
CAD21/A5
CAD20/A6
CAD19/A25
CAD18/A7
CAD17/A24
CAD16/A17
CAD15/IOWR#
CAD14/A9
CAD13/IORD#
CAD12/A11
CAD11/OE#
CAD10/CE2#
CAD9/A10
CAD8/D15
CAD7/D7
CAD6/D13
CAD5/D6
CAD4/D12
CAD3/D5
CAD2/D11
CAD1/D4
CAD0/D3
CINT#/READY_IREQ#
R296
@10_0402_5%
2
C620
0.1U_0402_16V4Z
C623
0.1U_0402_16V4Z
S1_D[0..15] 23
S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3
CBLOCK#/A19
CLK_SD_48M
PCI_RST#
S1_D[0..15]
CSTSCHG/BVD1_STSCHG#
CCLKRUN#/WP_IOIS16#
IDSEL
K8
N9
K9
N10
L10
N11
M11
J9
S1_A[0..25] 23
1
C346
0.1U_0402_16V4Z
1
C349
0.1U_0402_16V4Z
1
C357
0.1U_0402_16V4Z
1
C605
0.1U_0402_16V4Z
C599
0.1U_0402_16V4Z
+S1_VCC
1
S1_IOWR# 23
S1_IORD# 23
1
C617
0.1U_0402_16V4Z
1
C618
0.1U_0402_16V4Z
1
C616
0.1U_0402_16V4Z
C615
0.1U_0402_16V4Z
S1_OE# 23
S1_CE2# 23
S1_REG# 23
S1_CD1#
S1_CE1# 23
C348
S1_RST 23
10P_0402_50V8K
S1_CD2#
C619
10P_0402_50V8K
Closed to Pin A4
S1_WAIT# 23
S1_INPACK# 23
S1_WE# 23
S1_A16
2
33_0402_5%
S1_BVD1 23
S1_WP 23
S1_RDY# 23
MSD1_XDD6
PCM_SPK# 29
S1_BVD2 23
MSD2_XDD5
MSD3_XDD3
S1_CD2# 23
S1_CD1# 23
S1_VS2 23
S1_VS1 23
MSBS_XDD1
1
R582
1
R579
1
R585
1
R588
1
R575
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
2
@43K_0402_5%
MSINS#
MSBS_XDD1
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
XDWP#
MSINS# 23
XD_MS_PWREN# 23
MSBS_XDD1 23
1
R590
MSD0_XDD2 23
MSD1_XDD6 23
MSD2_XDD5 23
MSD3_XDD3 23
2
33_0402_5%
MSCLK_XDRE# 23
XDBSY# 23
XDCD# 23
XDWP# 23
XDCE# 23
R581
@10_0402_5%
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
CARDBUS
CLK_PCI_PCM
S1_A[0..25]
1
C347
0.1U_0402_16V4Z
+3VS
C2
C1
D4
D2
D1
E4
E3
E2
F2
F1
G2
G3
H3
H4
J1
J2
N2
M3
N3
K4
M4
K5
L5
M5
K6
M6
N6
M7
N7
L7
K7
N8
PCI Interface
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
16,24,25,27,28
16,24,25,27,28
16,24,25,27,28
16,24,25,27,28
VCCD1#
VCCD0#
PCI_AD[0..31]
M13
N13
1
U39
16,24,25,27,28 PCI_AD[0..31]
+3VS
+S1_VCC
+3VS
23 VPPD0
23 VPPD1
23 VCCD0#
23 VCCD1#
R574
2.2K_0402_5%
CB714_LFBGA169
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
PCMCIA Controller
Size
B
Date:
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
22
of
51
1
9
+S1_VPP
+5VS
0.1U_0402_16V4Z
C573
4.7U_0805_10V4Z
C570
VPP
5
6
VCCD0
VCCD1
VPPD0
VPPD1
C337
10U_0805_10V4Z
1
2
15
14
+S1_VCC
C339
0.1U_0402_16V4Z
2
VCCD0# 22
VCCD1# 22
VPPD0 22
VPPD1 22
C343
4.7U_0805_10V4Z
R562
10K_0402_5%
16
OC
C341
0.01U_0402_16V7K
2
2
G
S
SDDA3_XDD4
SDDA1_XDD0
SDDA0_XDD7
SDCM_XDALE
SDDA2_XDCL
MSBS_XDD1
MSD1_XDD6
MSD0_XDD2
MSD2_XDD5
MSINS#
MSD3_XDD3
SDWP
SDCD#
+S1_VPP
R550
@0_0805_5%
XD_CD#
GND
GND
DATA3
CD1#
DATA4
DATA11
DATA5
DATA12
DATA6
DATA13
DATA7
DATA14
CE1#
DATA15
ADD10
CE2#
OE#
VS1#
ADD11
IORD#
ADD9
IOWR#
ADD8
ADD17
ADD13
ADD18
ADD14
ADD19
WE#
ADD20
READY
ADD21
VCC
VCC
VPP
VPP
ADD16
ADD22
ADD15
ADD23
ADD12
ADD24
ADD7
ADD25
ADD6
VS2#
ADD5
RESET
ADD4
WAIT#
ADD3
INPACK#
ADD2
REG#
ADD1
BVD2
ADD0
BVD1
DATA0
DATA8
DATA1
GND DATA9
GND DATA2
DATA10
WP
CD2#
GND
GND
Q45
2N7002_SOT23
C571
3.3V
3.3V
SHDN
3
4
GND
C574
4.7U_0805_10V4Z
Close to
CardBus Conn.
5V
5V
+3VS
0.1U_0402_16V4Z
20mil
10
22 XDCD#
C584 0.1U_0402_16V4Z
1
2
C586 10U_0805_10V4Z
1
2
C583 0.01U_0402_16V7K
1
2
C587
1U_0603_10V4Z
1
D
VCC
VCC
VCC
12V
XDCD#
CardBus Socket
JP7
1
2
C585 0.1U_0402_16V4Z
40mil
13
12
11
SDDA3_XDD4 22
SDDA1_XDD0 22
SDDA0_XDD7 22
SDCM_XDALE 22
SDDA2_XDCL 22
MSBS_XDD1 22
MSD1_XDD6 22
MSD0_XDD2 22
MSD2_XDD5 22
MSINS# 22
MSD3_XDD3 22
SDWP 22
SDCD# 22
+VCC_5IN1
CP2211D3_SSOP16
SD/ MMC/ MS
C589
1U_0603_10V4Z
34
+VCC_SM/XD
+VCC_SM/XD
1 XDBSY#
43K_0402_5%
2
43K_0402_5%
1 MSCLK_XDRE#
43K_0402_5%
1 XDWE#
2.2K_0402_5%
XDBSY# 22
XDCE# 22
SD CLK
XDWE# 22
C579
10P_0402_50V8K
C588
0.1U_0402_16V4Z
22 XDWP#
SD_PULLHIGH
@
@
@
@
@
XDWE#
XDWP#
SDCM_XDALE
XD_CD#
XDBSY#
MSCLK_XDRE#
XDCE#
SDDA2_XDCL
24
25
23
18
19
20
21
22
MS CLK
SD_PULLHIGH
2
0_0603_5%
SDCM_XDALE
2
43K_0402_5%
SDDA0_XDD7
2
43K_0402_5%
SDDA1_XDD0
2
43K_0402_5%
SDDA2_XDCL
2
43K_0402_5%
SDDA3_XDD4
2
43K_0402_5%
SD-VCC
MS-VCC
4 IN 1 CONN
SD / MMC / MS(PRO) / XD
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
14
3
SD-CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-CMD
SD-CD-SW
SD-WP-SW
15
16
17
11
12
13
2
35
SDCK
SDDA0_XDD7
SDDA1_XDD0
SDDA2_XDCL
SDDA3_XDD4
SDCM_XDALE
SDCD#
SDWP
MS-SCLK
MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3
MS-INS
MS-BS
4
8
9
7
5
6
10
MSCLK_XDRE#
MSD0_XDD2
MSD1_XDD6
MSD2_XDD5
MSD3_XDD3
MSINS#
MSBS_XDD1
4IN1-GND
4IN1-GND
1
36
XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE
MSCLK_XDRE#
22 MSCLK_XDRE#
TAITW_R007-520-L3
26
27
28
29
30
31
32
33
XD-VCC
+VCC_SM/XD
R549
@0_0402_5%
69
70
+VCC_5IN1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
R294
1
R557
1
R553
1
R541
1
R560
1
R559
SDDA1_XDD0
MSBS_XDD1
MSD0_XDD2
MSD3_XDD3
SDDA3_XDD4
MSD2_XDD5
MSD1_XDD6
SDDA0_XDD7
SDCK
22 SDCK
C580
0.1U_0402_16V4Z
JP36
2
R551
1
R547
2
R564
2
R545
C572
@10P_0402_50V8K
S1_D[0..15]
22 S1_D[0..15]
MSINS#
R552
@ 43K_0402_5%
+S1_VCC
U36
S1_A[0..25]
22 S1_A[0..25]
+3VS
1
C656
1U_0603_10V4Z
Close to 5 in 1 socket
1
C657
C551
1U_0603_10V4Z
0.1U_0402_16V4Z
1
C556
1
C555
0.1U_0402_16V4Z
1
C554
C553
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
34
68
S1_D3
S1_CD1#
S1_D4
S1_D11
S1_D5
S1_D12
S1_D6
S1_D13
S1_D7
S1_D14
S1_CE1#
S1_D15
S1_A10
S1_CE2#
S1_OE#
S1_VS1
S1_A11
S1_IORD#
S1_A9
S1_IOWR#
S1_A8
S1_A17
S1_A13
S1_A18
S1_A14
S1_A19
S1_WE#
S1_A20
S1_RDY#
S1_A21
S1_A16
S1_A22
S1_A15
S1_A23
S1_A12
S1_A24
S1_A7
S1_A25
S1_A6
S1_VS2
S1_A5
S1_RST
S1_A4
S1_WAIT#
S1_A3
S1_INPACK#
S1_A2
S1_REG#
S1_A1
S1_BVD2
S1_A0
S1_BVD1
S1_D0
S1_D8
S1_D1
S1_D9
S1_D2
S1_D10
S1_WP
S1_CD2#
+VCC_SM/XD
R629
4.7K_0402_5%
22 XD_MS_PWREN#
R531
100K_0402_5%
22 SDPWREN#
R632
2
0_0402_5%
VOUT
GND
1
2
0_0402_5%
CE
S1_RDY# 22
+S1_VCC
+S1_VCC
+S1_VPP
+S1_VPP
S1_VS2 22
S1_RST 22
S1_WAIT# 22
S1_INPACK# 22
S1_REG# 22
S1_BVD2 22
S1_BVD1 22
S1_WP 22
S1_CD2# 22
XDOC#
XDOC# 22
R630
100K_0402_5%
RT9702ACB_SOT23-5
C666
0.1U_0402_16V4Z
2 @
100K
A
100K
+VCC_SM/XD
0307
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0307
5
2
0_0603_5%
2
1
2
DTC115EKA_SOT23
Q44
R571
+VCC_5IN1
22 MSPWREN#
22 XD_MS_PWREN#
0308
TPS2041ADR_SO8
S1_WE# 22
0_0402_5%
10K_0402_5%
XDOC#
SDOC# 22
R633
1
R628
FLG
VIN
0_0402_5%
8
7
6
5
S1_IOWR# 22
OUT
OUT
OUT
OC#
U48
R627
GND
IN
IN
EN#
1
2
3
4
+3VS
S1_IORD# 22
R626
10K_0402_5%
5 IN 1 PWR Control
2
2
R536
4.7K_0402_5%
R538
U49
+3VS
R537
10K_0402_5%
S1_CE2# 22
S1_OE# 22
S1_VS1 22
+3VS
0.1U_0402_16V4Z
+3VS
+VCC_5IN1
S1_CE1# 22
SANTA_130609-1_LT
+3VS
5 IN 1 PWR Control
+3VS
+3VS
S1_CD1# 22
PCMCIA Socket
Size
B
Date:
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
23
of
51
+3VS
+3VS
1394_CYCLEIN
1
R548
1
R546
1
R554
1
R542
2
R543
1394_CYCLEOUT
+3VS
1394_CNA
1394_TEST17
86
96
10
11
CYCLEOUT/CARDBUS
CNA
TEST17
TEST16
20
35
48
62
78
CYCLEIN
NC/(TPBIAS1)
NC/(TPA1+)
NC/(TPA1-)
NC/(TPB1+)
NC/(TPB1-)
125
124
123
122
121
+3VS
RP24
1394_GPIO3
1394_GPIO2
1394_SCL
1394_SDA
C567
0.1U_0402_16V4Z
C563
1000P_0402_50V7K
C559
1000P_0402_50V7K
C558
1000P_0402_50V7K
C557
1000P_0402_50V7K
R1
119
1394_BIAS1
X0
1394_X0
X1
1394_X1
FILTER0
FILTER1
C578 1
C575 1
2 22P_0402_50V8J
1394_SDA
SCL
91
1394_SCL
PC0
PC1
PC2
99
98
97
R217
56.2_0402_1%
PC1
PC2
TPBIAS0
TPA0+
TPA0TPB0+
TPB0-
116
115
114
113
112
94
95
TEST3
TEST2
TEST1
TEST0
101
102
104
105
C266
0.33U_0603_16V4Z
JP30
4
3
2
1
4
3
2
1
R220
56.2_0402_1%
R225
56.2_0402_1%
SUYIN_020204FR004S506ZL
1394<4>@
TEST9
TEST8
1
R218
56.2_0402_1%
5
6
7
8
0.1U_0402_16V4Z
92
TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -
C576 1
PHY PORT 1
2 22P_0402_50V8J
X2
24.576MHz_16P_3XG-24576-43E1
POWER CLASS
GND1
GND2
GND3
GND4
FILTER
1394_BIAS0 1
2
R556
6.34K_0402_1%
+3VS
1K_0402_5%
2 @
1K_0402_5%
1394<4>@
OSCILLATOR
118
R0
BIAS CURRENT
1
R558
1
R555
C271
R221
5.11K_0402_1%
220P_0402_50V7K
4
3
2
1
1394_CPS
8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103
5
6
7
8
0.1U_0402_16V4Z
GPIO3
GPIO2
C564
4.7U_0805_10V4Z
G_RST
89
90
PLLGND1
REG_EN
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND
1394_GPIO3
1394_GPIO2
14
0.1U_0402_16V4Z
L34
BLM21A601SPT_0805
0.01U_0402_16V7K
1
2
+3VS
1
1
C569
C568
16,22,25,27,28 PCI_FRAME#
16,22,25,27,28 PCI_IRDY#
16,22,25,27,28 PCI_TRDY#
16,22,25,27,28 PCI_DEVSEL#
16,22,25,27,28 PCI_STOP#
16,22,25,27,28 PCI_PERR#
16 PCI_PIRQE#
33 1394_PME#
16,22,25,27,28 PCI_SERR#
16,22,25,27,28 PCI_PAR
18,25,27,28,32,33 PM_CLKRUN#
16,22,25,27,28,32,33 PCI_RST#
106
+1394_PLLVDD
C581
16,22,25,27,28 PCI_C/BE#3
16,22,25,27,28 PCI_C/BE#2
16,22,25,27,28 PCI_C/BE#1
16,22,25,27,28 PCI_C/BE#0
13 CLK_PCI_1394
16 PCI_GNT#0
16 PCI_REQ#0
CPS
TSB43AB21
/(TSB43AB22)
+3VS
2 1394_IDSEL
100_0402_5%
1
R533
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA/CINT
PCI_PME/CSTSCHG
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST
0.1U_0402_16V4Z
+3VS
PCI_AD16
84
82
81
80
79
77
76
74
71
70
69
67
66
65
63
61
46
45
43
42
41
40
38
37
32
31
29
28
26
25
24
22
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD
C582
IDSEL:PCI_AD16
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0
1394_IDSEL
PCI_FRAME#
P CI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_PIRQE#
1394_PME#
PCI_SERR#
PCI_PAR
PM_CLKRUN#
PCI_RST#
1
15
27
39
51
59
72
88
100
7
1
2
107
108
120
PCI_AD[0..31]
VDDP
VDDP
VDDP
VDDP
VDDP
16,22,25,27,28 PCI_AD[0..31]
87
1394_TEST16
U37
TSB43AB21_PQFP128
2
4.7K_0402_5%
2
10K_0402_5%
2
4.7K_0402_5%
2
4.7K_0402_5%
1
4.7K_0402_5%
220_1206_8P4R_5%
+3VS
1
CLK_PCI_1394
R540
10_0402_5%
PC1
C577
0_0402_5%
2 R614
R615 2
1 4.7K_0402_5%
@
0_0402_5%
@
2 R616
R617 2
1 4.7K_0402_5%
0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
PC2
C561
2005/01/24
C565
10P_0402_50V8K
Size
Document Number
Custom
EFL50
Date:
Rev
0.2
LA-2761
Sheet
1
24
of
51
+3VALW
R129
0_1206_5%
VGS(th) = -0.45V
IDmax = 2.3A
Q11
SI2301DS_SOT23
@
80mils
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
1
1
C114
C119
C111
3
G
EN_WOL#
1
L19
2
0_0603_5%
4401@
1
2
L20 5788@ 0_0603_5%
+3VS
C99
C415
C52
2
0.1U_0402_16V4Z
+3V_LAN
C417
2
4
2
2
10U_0805_10V4Z
2
2
0.1U_0402_16V4Z
1
R103
10_0402_5%
2
1
C95
18P_0402_50V8K
16,22,24,27,28
16,22,24,27,28
16,22,24,27,28
16,22,24,27,28
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#0
100_0402_5%
PCI_AD17 R96 1
16,22,24,27,28 PCI_FRAME#
16,22,24,27,28 PCI_IRDY#
16,22,24,27,28 PCI_TRDY#
16,22,24,27,28 PCI_DEVSEL#
16,22,24,27,28 PCI_STOP#
16,22,24,27,28 PCI_PERR#
16,22,24,27,28 PCI_SERR#
16,22,24,27,28 PCI_PAR
13 CLK_PCI_LAN
16 PCI_PIRQF#
16,22,24,27,28,32,33 PCI_RST#
16 PCI_GNT#3
16 PCI_REQ#3
1
R396
+3V_LAN
2
4
0.1U_0402_16V4Z
1
C406
2
2
10U_0805_10V4Z
D
C419
2
0.1U_0402_16V4Z
60mils
0.1U_0402_16V4Z
1
1
2
0.1U_0402_16V4Z
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z
1
1
1
C439
C429
2
2
0.1U_0402_16V4Z
C441
0.1U_0402_16V4Z
1
1
C436
C426
2
2
2
0.1U_0402_16V4Z 0.1U_0402_16V4Z
C412
C414
2
0.1U_0402_16V4Z
33 ONBD_LAN_PME#
B8
A8
C7
C6
B6
B5
A5
B4
B2
B1
C1
D3
D2
D1
E3
K1
L2
L1
M3
M2
M1
N2
N3
P3
N4
P4
M5
N5
P5
P6
M7
N7
C4
F3
L3
M4
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
A4
F2
F1
G3
H3
H1
J2
A2
J1
A3
IDSEL
FRAME
IRDY
TRDY
DEVSEL
STOP
PERR
SERR
PAR
PCI_CLK
PCI_PIRQF#
PCI_RST#
PCI_GNT#3
PCI_REQ#3
H2
C2
J3
C3
INTA
PCI_RST
GNT
REQ
J12
F4
A6
E13
E14
D13
D14
C13
C14
B13
B14
REGSUP12/(NC_B9)
REGCTL12/(NC_B10)
REGSEN12/(REG18OUT)
B9
B10
A9
REGSUP25/(REGSUP18)
REGCTL25/(NC_C11)
REGSEN25/(REGSUP18)
B11
C11
C10
VESD1
VESD2
VESD3
LAN_MDI3+
LAN_MDI3LAN_MDI2+
LAN_MDI2LAN_MDI1+
LAN_MDI1LAN_MDI0+
LAN_MDI0-
LAN_MIDI3+
LAN_MIDI3LAN_MIDI2+
LAN_MIDI2LAN_MIDI1+
LAN_MIDI1LAN_MIDI0+
LAN_MIDI0-
LAN_CTRL_1.2V
26
26
26
26
26
26
26
26
+2.5V_LAN
+1.2V_LAN
LAN_CTRL_2.5V
+2.5V_LAN
+3V_LAN
P10
M10
GPIO0/(NC_H12)
GPIO1/(NC_K13)
GPIO2/(NC_J13)
H12
K13
J13
LINKLED/(LINKLED10)
SPD100LED/(LINKLED100)
SPD1000LED/(COL_LED)
TRAFFICLED/(ACT_LED)
G13
H13
G12
G14
PLLVDD2/(PLLVDD)
NC_P7
H14
P7
TCK
TDI
TDO
TMS
TRST
C12
D12
B12
A12
D11
LAN_EEDA
LAN_EECLK
LAN_EEWP 1
R394
2
10K_0402_5%
+3V_LAN
LAN_LINK#
LAN_LINK# 26
LAN_LINK#1G R397 1
LAN_ACTIVITY#
2 0_0402_5%
LAN_ACTIVITY# 26
+1.2V_LAN_PLLVDD
20mils
+1.2V_LAN_PLLVDD
XTALVDD
XTALO
XTALI
J14
N10
N11
NC_G11
NC_E10/(EEDATA_PXE)
NC_E11/(EECLK_PXE)
NC_H11
G11
E10
E11
H11
0.1U_0402_16V4Z
1
C31
C35
1
L7
0_0603_5%
+1.2V_LAN
A14
D10
NC_A10
NC_C9
A10
C9
K14
L13
P11
+2.5V_LAN
4.7U_0805_10V4Z
+3V_LAN
LAN_TRST# 1
R398
2
4.7K_0402_5%
LAN_X1
LAN_X2_R 1
R82
PM_CLKRUN#
+2.5V_LAN
2 LAN_X2
200_0402_1%
VDDC_E12
VDDC_H5
VDDC_H6
VDDC_H7
VDDC_H8
VDDC_J5
VDDC_J6
VDDC_J7
VDDC_J8
VDDC_J9
VDDC_J10
VDDC_K5
VDDC_K6
VDDC_K7
VDDC_K8
VDDC_K9
VDDC_K10
VDDC_L5
VDDC_L10
VDDC_M14
VDDC_N14
VDDC_P8
VDDC_P12
VDDC_P13
VDDC_P14
VSS_B7
VSS_D4
VSS_D5
VSS_D6
VSS_D7
VSS_D8
VSS_D9/(NC_D9)
VSS_E2
VSS_E5
VSS_E6
VSS_E7
VSS_E8
VSS_E9
VSS_F5
VSS_F6
VSS_F7
VSS_F8
VSS_F9
VSS_F10
VSS_G4
VSS_G5
VSS_G6
VSS_G7
VSS_G8
VSS_G9
VSS_G10
VSS_H9
VSS_K2
VSS_L6
VSS_L9
VSS_M6
VSS_M12
VSS_M13/(NC_M13)
VSS_N1
VSS_N12
VSS_N13
BCM5788M
/(BCM4401)
VDDIO-PCI_A7
VDDIO-PCI_B3
VDDIO-PCI_C5
VDDIO-PCI_E1
VDDIO-PCI_E4
VDDIO-PCI_G1
VDDIO-PCI_K3
VDDIO-PCI_L4
VDDIO-PCI_N6
VDDIO-PCI_P2
A11
F11
K12
L12
VDDP_K14/(NC_K14)
AVDDL_F12/(AVDD_F12)
VDDP_L13/(NC_L13)AVDDL_F13/(AVDD_F13)
VDDP_P11/(NC_P11) AVDD_F14/(NC_F14)
AVDD_A13/(NC_A13)
VDDIO_A11
VDDIO_F11
VDDIO_K12
VDDIO_L12
C8
H4
H10
J4
K4
J11
K11
L7
L8
NC_C8
CLKRUN
NC_L11/(VSS_L11)
NC_H10
NC_L14/(VSS_L14)
NC_J4
NC_M8
NC_K4
NC_M9/(VREF)
NC_J11/(GPIO_1)LOW_POWER/(TESTMODE)
NC_K11/(GPIO_0)
NC_N8/(EXT_POR)
NC_L7
NC_N9/(DOUT)
NC_L8
NC_P9/(DIN)
B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13
5788
F12 +1.2V_LAN_AVDD
F13
F14 +2.5V_LAN_AVDD
A13
1
1
C38
2
0.1U_0402_16V4Z
L11
L14
M8
M9
M11
N8
N9
P9
LAN_RDAC 1
R400
10mils
Pop
Q17
Pop
Q18
Pop
R318
1.24K
LAN_X2
25MHZ_20P
C54
27P_0402_50V8J
1.27K
U18
Pop
C424
Pop
U19
Pop
R319
Pop
R320
Pop
C423
Pop
1
L11
0_0603_5%
1
L10
0_0603_5%
+1.2V_LAN
20mils
+2.5V_LAN
20mils
B
C37
0.1U_0402_16V4Z
LAN_TESTMODE
1
R395
2
10K_0402_5%
LAN_EEDI
LAN_EEDO
BCM5788M_FBGA196
C83
2 1000P_0402_50V7K
1
L9
2
1.24K_0402_1%
0_0603_5%
+2.5V_LAN
BCM5788M_FBGA196
1
2
3
4
CS
SK
DI
DO
VCC
NC
NC
GND
8
7
6
5
C89
0.1U_0402_16V4Z
2
4401@
AT93C46-10SI-2.7_SO8
4401@
LAN_EEWP
LAN_EECLK
LAN_EEDA
LAN_EEDA
LAN_EECLK
LAN_EEDI
LAN_EEDO
+3V_LAN
5788@
0.1U_0402_16V4Z
5788@ R93
4.7K_0402_5%
+3V_LAN
2
@ 10K_0402_5%
2
@ 10K_0402_5%
Y1
LAN_X1 2
Pop
L19
U10
LAN_A10
1
LAN_C9 R84
1
R402
4401
L18
+3V_LAN
C36
10mils
+LAN_BIASVDD
BIASVDD
RDAC
A7
B3
C5
E1
E4
G1
K3
L4
N6
P2
+3V_LOM_PCI
18,24,27,28,32,33 PM_CLKRUN#
VAUXPRSNT
M66EN/(NC_F4)
PME
E12
H5
H6
H7
H8
J5
J6
J7
J8
J9
J10
K5
K6
K7
K8
K9
K10
L5
L10
M14
N14
P8
P12
P13
P14
+1.2V_LAN
+3V_LAN
P1
G2
A1
EEDATA/(SPROM_CS)
EECLK/(SPROM_CLK)
BCM5788M
/(BCM4401)
CBE3
CBE2
CBE1
CBE0
2 LAN_IDSEL
PCI_FRAME#
P CI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_SERR#
PCI_PAR
CLK_PCI_LAN
2 LAN_AUXPWR
1K_0402_5%
ONBD_LAN_PME#
U8B
TRD3+/(NC_E13)
TRD3-/(NC_E14)
TRD2+/(NC_D13)
TRD2-/(NC_D14)
TRD1+/(RDP)
TRD1-/(RDN)
TRD0+/(TDP)
TRD0-/(TDN)
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
CLK_PCI_LAN
C407
U8A
Q8
5788@
BCP69_SOT223
+1.2V_LAN
PCI_AD[0..31]
16,22,24,27,28 PCI_AD[0..31]
+2.5V_LAN
10U_0805_10V4Z
0.1U_0402_16V4Z
1
1
1
1
C411
C408
C410
C409
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
1
1
C88
C116
C117
C79
2
2
0.1U_0402_16V4Z
60mils
C66
+1.2V_LAN
0.1U_0402_16V4Z
1
1
1
C76
C118
C84
LAN_CTRL_1.2V
20mils
+3V_LAN
+3V_LAN
0.1U_0402_16V4Z
1
2
2
2
10U_0805_10V4Z
0.1U_0402_16V4Z
+3V_LOM_PCI
0.1U_0402_16V4Z
1
1
33 EN_WOL#
LAN_CTRL_2.5V
+3V_LAN
EN_WOL# = Low,
System can wake on LAN
( keep Low when Power On)
R89 5788@
4.7K_0402_5%
U9
8 VCC
7 WP
6 SCL
5 SDA
A0
A1
NC
GND
1
2
3
4
A
AT24C256_SO8~D
5788@
C47
27P_0402_50V8J
2
LAN BCM5788M
Size
B
Date:
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
25
of
51
+3V_LAN
C46
C51
RP19
1
2
4
3
L_LAN_MDI3L_LAN_MDI3+
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
2
56
50
38
27
18
10
4
LAN_MIDI3LAN_MIDI3+
U6
R73
49.9_0402_1%
ND@ 0_0404_4P2R_5%
VDD6
VDD5
VDD4
VDD3
VDD2
VDD1
VDD0
R76
49.9_0402_1%
R79
49.9_0402_1%
R83
49.9_0402_1%
RP21
LAN_MIDI1LAN_MIDI1+
1
2
4
3
L_LAN_MDI1L_LAN_MDI1+
LAN_MIDI0+
LAN_MIDI0LAN_MIDI1+
LAN_MIDI1-
ND@ 0_0404_4P2R_5%
RP22
LAN_LINK#
1
LAN_ACTIVITY# 2
4
3
L_LAN_LINK#
L_LAN_ACTIVITY#
R72
49.9_0402_1%
5788@
ND@ 0_0404_4P2R_5%
R70
5788@ R68
49.9_0402_1%
49.9_0402_1%
5788@
C39 1
R64
49.9_0402_1%
5788@
LAN_MIDI0-
2
3
0B1
1B1
48
47
D_LAN_MDI0+
D_LAN_MDI0-
2B1
3B1
43
42
D_LAN_MDI1+
D_LAN_MDI1-
4B1
5B1
37
36
D_LAN_MDI2+
D_LAN_MDI2-
6B1
7B1
32
31
D_LAN_MDI3+
D_LAN_MDI3-
A0
A1
A2
25 LAN_MIDI1-
LAN_MIDI1-
A3
25 LAN_MIDI2+
LAN_MIDI2+
11
A4
25 LAN_MIDI2-
LAN_MIDI2-
12
A5
0LED1
1LED1
2LED1
22
23
52
D_LAN_ACTIVITY#
D_LAN_LINK#
25 LAN_MIDI3+
LAN_MIDI3+
14
A6
0B2
1B2
46
45
L_LAN_MDI0+
L_LAN_MDI0-
25 LAN_MIDI3-
LAN_MIDI3-
15
A7
2B2
3B2
41
40
L_LAN_MDI1+
L_LAN_MDI1-
DOCKIN#
17
SEL
4B2
5B2
35
34
L_LAN_MDI2+
L_LAN_MDI2-
LAN_ACTIVITY#
LAN_LINK#
19
20
54
LED0
LED1
LED2
6B2
7B2
30
29
L_LAN_MDI3+
L_LAN_MDI3-
0LED2
1LED2
2LED2
25
26
51
L_LAN_ACTIVITY#
L_LAN_LINK#
25 LAN_ACTIVITY#
25 LAN_LINK#
0.1U_0402_16V4Z
5788@ 2
D_LAN_MDI3+ 38
D_LAN_MDI3- 38
D_LAN_ACTIVITY# 38
D_LAN_LINK# 38
GND0
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
NC
PI3L500E_TQFN56~D
W D@
1
6
9
13
16
21
24
28
33
39
44
49
53
55
LAN BCM5788M/BCM4401KFB
24ST0023-3(SP050004200) for BCM4401(10/100)
24HST1041A-3(SP050002110) for BCM5788M(GbE)
JP19
+3V_LAN
2 R90
300_0603_5%
LAN_LED_ACTIVE
Yellow LED+
L_LAN_ACTIVITY#
Yellow LED-
RJ45_MDI1-
RX1-
RJ45_MDI1+
RX1+
RJ45_MDI0-
TX1-
RJ45_MDI0+
10
TX1+
RJ45_MDI3-
RX2-
RJ45_MDI3+
RX2+
RJ45_MDI2-
TX2-
RJ45_MDI2+
TX2+
T1
L_LAN_MDI2+
L_LAN_MDI2-
7
8
9
L_LAN_MDI3+
L_LAN_MDI3-
10
11
12
0.01U_0402_16V7K
TCT2
TD2+
TD2TCT3
TD3+
TD3TCT4
TD4+
TD4-
MCT1
MX1+
MX1MCT2
MX2+
MX2-
21
20
19
MCT3
MX3+
MX3-
18
17
16
MCT4
MX4+
MX4-
15
14
13
RJ45_MDI0+
RJ45_MDI0RJ45_MDI1+
RJ45_MDI1RJ45_MDI2+
RJ45_MDI2RJ45_MDI3+
RJ45_MDI3-
L_LAN_LINK#
24HST1041A-3
+3V_LAN
L_LAN_MDI1+
L_LAN_MDI1-
4
5
6
TCT1
TD1+
TD1-
24
23
22
L_LAN_MDI0+
L_LAN_MDI0-
1
2
3
2 R133
300_0603_5%
LAN_LED_LINK
12
Green LED-
11
Green LED+
1
1
1
1
C135 C124 C110
C86
R110
75_0402_1%
1
2
R95
75_0402_1%
MOD_RING
L22 1
20_0603_5%
RJ11_RING
13
RJ11_1
MOD_TIP
L23 1
20_0603_5%
RJ11_TIP
14
RJ11_2
MOLEX_53398-0290
0.01U_0402_16V7K
2 0.01U_0402_16V7K
2
2
SGND1
15
SGND2
16
RJ45 / LED
JP23
D_LAN_MDI2+ 38
D_LAN_MDI2- 38
25 LAN_MIDI1+
D_LAN_MDI1+ 38
D_LAN_MDI1- 38
+2.5V_LAN
D_LAN_MDI0+ 38
D_LAN_MDI0- 38
LAN_MIDI1+
14,21,33,38 DOCKIN#
C34 1
0.1U_0402_16V4Z
5788@ 2
25 LAN_MIDI0-
RP18
LAN_MIDI0+
ND@ 0_0404_4P2R_5%
LAN_MIDI2+
LAN_MIDI2LAN_MIDI3+
LAN_MIDI3-
L_LAN_MDI0L_LAN_MDI0+
4
3
1
2
LAN_MIDI0LAN_MIDI0+
25 LAN_MIDI0+
L_LAN_MDI2L_LAN_MDI2+
4
3
1
2
RP20
LAN_MIDI2LAN_MIDI2+
ND@ 0_0404_4P2R_5%
RJ11
TYCO_1770365-1
0.01U_0402_16V7K
4401@
0_0402_5%
2
0_0402_5%
2 4401@
R106 1
R102 1
0_0402_5%
2 4401@
0_0402_5%
2 4401@
RJ45_GND
C64
1000P_1206_2KV7K
LANGND
1
C62
0.1U_0402_16V4Z
2
2
RJ45_MDI2+
RJ45_MDI2-
1
1
R94
R91
C67
4.7U_0805_10V4Z
RJ45_MDI3+
RJ45_MDI3-
R138
75_0402_1%
R126
75_0402_1%
RJ45_GND
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
26
of
51
PCI_AD[0..31]
PCI_AD[0..31] 16,22,24,25,28
MINI_PCI SOCKET
JP35
TIP
LAN RESERVED
+3VS_MINIPCI1
+3VS
D10
2S@RB751V_SOD323
WL_ON 1
2
28,33 WL_ON
L29
1
2
0_0603_5%
2S@
PCI_PIRQH#
16,28 PCI_PIRQH#
W= 40mils
CLK_PCI_MINI1
13 CLK_PCI_MINI1
PCI_REQ#1
16,28 PCI_REQ#1
PCI_AD31
PCI_AD29
CLK_PCI_MINI1
R544
@ 33_0402_5%
PCI_AD27
PCI_AD25
WLAN_BT_DATA
PCI_C/BE#3
PCI_AD23
28,34 WLAN_BT_DATA
16,22,24,25,28 PCI_C/BE#3
PCI_AD21
PCI_AD19
C566
@ 10P_0402_50V8J
PCI_AD17
PCI_C/BE#2
P CI_IRDY#
16,22,24,25,28 PCI_C/BE#2
16,22,24,25,28 PCI_IRDY#
PM_CLKRUN#
PCI_SERR#
18,24,25,28,32,33 PM_CLKRUN#
16,22,24,25,28 PCI_SERR#
PCI_PERR#
PCI_C/BE#1
PCI_AD14
16,22,24,25,28 PCI_PERR#
16,22,24,25,28 PCI_C/BE#1
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
3
PCI_AD3
+5VS_MINIPCI1
+5VS
L30
W=30mils
PCI_AD1
W=30mils
2
2S@ 0_0603_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
QTC_C102A-040B31-4
2S@
0603
+5VS_MINIPCI1
RING
LAN RESERVED
W=30mils
PCI_PIRQG#
+5VS_MINIPCI1
PCI_PIRQG# 16,28
+3VS_MINIPCI1
W=40mils
PCI_RST#
+3V
PCI_RST# 16,22,24,25,28,32,33
PCI_GNT#1
PCI_GNT#1 16,28
WLANPME#
WLAN_BT_CLK
PCI_AD30
W= 40mils
L26
1
2
0_0603_5%
2S@
+3VS
WLANPME# 28,33
WLAN_BT_CLK 28,34
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL11
R281
PCI_AD22
PCI_AD20
2 PCI_AD18
2S@100_0402_5%
IDSEL : PCI_AD18
PCI_PAR 16,22,24,25,28
PCI_AD18
PCI_AD16
PCI_FRAME#
PCI_TRDY#
PCI_STOP#
PCI_FRAME# 16,22,24,25,28
PCI_TRDY# 16,22,24,25,28
PCI_STOP# 16,22,24,25,28
PCI_DEVSEL#
PCI_DEVSEL# 16,22,24,25,28
PCI_AD15
PCI_AD13
PCI_AD11
+5VS_MINIPCI1
2
C381
1000P_0402_50V7K
2
C327
0.1U_0402_16V4Z
2S@
PCI_AD9
PCI_C/BE#0
2S@
1
C364
0.1U_0402_16V4Z
C315
10U_1206_16V4Z
2S@
2S@
PCI_C/BE#0 16,22,24,25,28
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
+3VS_MINIPCI1
2
C355
0.1U_0402_16V4Z
2S@
W=20mils
2
C352
0.1U_0402_16V4Z
2S@
2
C345
0.1U_0402_16V4Z
2S@
2
C334
0.1U_0402_16V4Z
2S@
1
C330
0.1U_0402_16V4Z
C331
10U_1206_16V4Z
2S@
2S@
+3V
C378
2S@ 0.1U_0402_16V4Z
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
E
27
of
51
PCI_AD[0..31]
PCI_AD[0..31] 16,22,24,25,27
MINI_PCI SOCKET
JP18
TIP
LAN RESERVED
+3VS_MINIPCI2
+3VS
27,33 WL_ON
L12
1
2
0_0603_5%
1S@
D4
1S@RB751V_SOD323
1
2
PCI_PIRQH#
16,27 PCI_PIRQH#
W= 40mils
CLK_PCI_MINI2
13 CLK_PCI_MINI2
16,27 PCI_REQ#1
PCI_AD31
PCI_AD29
CLK_PCI_MINI2
PCI_AD27
PCI_AD25
R390
@ 33_0402_5%
27,34 WLAN_BT_DATA
16,22,24,25,27 PCI_C/BE#3
PCI_AD23
PCI_AD21
PCI_AD19
C403
@ 10P_0402_50V8J
PCI_AD17
16,22,24,25,27 PCI_C/BE#2
16,22,24,25,27 PCI_IRDY#
18,24,25,27,32,33 PM_CLKRUN#
16,22,24,25,27 PCI_SERR#
16,22,24,25,27 PCI_PERR#
16,22,24,25,27 PCI_C/BE#1
PCI_AD14
PCI_AD12
PCI_AD10
PCI_AD8
PCI_AD7
PCI_AD5
PCI_AD3
+5VS_MINIPCI2
+5VS
L6
W=30mils
PCI_AD1
W=30mils
2
1S@ 0_0603_5%
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
QTC_C102A-040B31-4
1S@
0603
+5VS_MINIPCI2
RING
LAN RESERVED
W=30mils
PCI_PIRQG#
+5VS_MINIPCI2
PCI_PIRQG# 16,27
+3VS_MINIPCI2
W=40mils
PCI_RST#
+3V
PCI_RST# 16,22,24,25,27,32,33
W= 40mils
PCI_GNT#1 16,27
L18
1
2
0_0603_5%
1S@
+3VS
WLANPME# 27,33
WLAN_BT_CLK 27,34
PCI_AD30
PCI_AD28
PCI_AD26
PCI_AD24
MINI_IDSEL21
R81
PCI_AD22
PCI_AD20
2 PCI_AD18
1S@100_0402_5%
IDSEL : PCI_AD18
PCI_PAR 16,22,24,25,27
PCI_AD18
PCI_AD16
PCI_FRAME# 16,22,24,25,27
PCI_TRDY# 16,22,24,25,27
PCI_STOP# 16,22,24,25,27
PCI_DEVSEL# 16,22,24,25,27
PCI_AD15
PCI_AD13
PCI_AD11
+5VS_MINIPCI2
C137
1000P_0402_50V7K
2 1S@
2
C164
0.1U_0402_16V4Z
1S@
1
C23
0.1U_0402_16V4Z
1S@
C156
10U_1206_16V4Z
1S@
PCI_AD9
PCI_C/BE#0 16,22,24,25,27
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0
+3VS_MINIPCI2
W=20mils
C24
0.1U_0402_16V4Z
1 1S@
C32
0.1U_0402_16V4Z
1
1S@
C125
0.1U_0402_16V4Z
1
1S@
C127
0.1U_0402_16V4Z
1
1S@
C45
0.1U_0402_16V4Z
2
1S@
C69
10U_1206_16V4Z
1S@
+3V
C26
0.1U_0402_16V4Z
1S@
Document Number
Rev
0.2
EFL50 LA2761
Date:
Sheet
E
28
of
51
R321
10K_0402_5%
C634
10U_0805_10V4Z
1
2
560_0402_5%
1000P_0402_50V7K
2
B
E
U44
VIN
VOUT
ERROR
CNOISE
GND
+VDDA
40mil
C643
2
10U_1206_16V4Z
SD
1
R603
150K_0603_1%
1
C650
4.85V
C637
10U_0805_10V4Z
SI9182DH-AD_MSOP8
MONO_IN
1U_0402_6.3V4Z
1
2
Q20
R323
2SC2411K_SC59 2.4K_0402_5%
R601
51K_0603_1%
0.1U_0402_16V4Z
R528
1
2
560_0402_5%
1U_0402_6.3V4Z
C552
2
1
R529
C367
1
2
+5VAMP
60mil
L42 1
2
KC FBM-L11-201209-221LMAT_0805
L37 1
2
KC FBM-L11-201209-221LMAT_0805
C549
2
1
U34B
SN74LVC14APWLE_TSSOP14
14
+3V
1
2
560_0402_5%
1U_0402_6.3V4Z
+5VS
C366
1U_0402_6.3V4Z
2
1
R530
22 PCM_SPK#
R326
10K_0402_5%
U34A
SN74LVC14APWLE_TSSOP14
C550
2
1
O 2
2 0.1U_0402_16V4Z
14
P
1
33 BEEP#
+VDDA
C560
+3V
+3V
14
+AUD_VREF
D27
RB751V_SOD323
R527
10K_0402_5%
P
5
C640
1U_0603_10V4Z
18 SB_SPKR
AC97 Codec
U34C
SN74LVC14APWLE_TSSOP14
10mil
1
R583
2
0_0603_5%
1
R580
2
0_0603_5%
1
R608
2
0_0603_5%
C629
0.1U_0402_16V4Z
+AVDD_AC97
GND
0.1U_0402_16V4Z
1
1
1
1
1
2
17,34 ICH_AC_SDOUT
LINE_OUT_L
35
250_LINE_OUTL
C635 1
2 4.7U_0805_10V4Z
LINE_OUTL
AUX_R
LINE_OUT_R
36
250_LINE_OUTR
C636 1
2 4.7U_0805_10V4Z
LINE_OUTR
16
JD2
MONO_OUT/VREFOUT3
37
NBA_PLUG
17
JD1
HP_OUT_L
39
LINE_IN_L_AC
23
LINE_IN_L
HP_OUT_R
41
24
LINE_IN_R
18
CD_L
R319 1
2 0_0402_5%
LINE_IN_R_AC
C368 1
C369 1
2
2
1U_0402_6.3V4Z
CD_RC_L
1U_0402_6.3V4Z
CD_RC_R
1U_0603_10V4Z
20
CD_GNDA
19
MIC
C_MIC
1
2
C612
1U_0603_10V4Z
C_MIC2
1
2
C613
1U_0603_10V4Z
MDC_RC_SPK
2
0.1U_0402_16V4Z
MIC2
13
PHONE
12
PC_BEEP
11
RESET#
ICH_AC_SYNC
10
SYNC
33 EAPD
31 SPDIFO
ICH_AC_BITCLK
2 22_0402_5%
ICH_AC_SDIN0
250_XTL_IN
ICH_AC_BITCLK 17,34
3
ICH_AC_SDIN0 17
1
R310
CLK_14M_CODEC
CLK_14M_CODEC 13
XTL_OUT
AFILT1
29
C375 1
2 1000P_0402_50V7K
AFILT2
30
C374 1
2 1000P_0402_50V7K
VREFOUT
28
47
SPDIFI/EAPD
SPDIFO
48
SPDIFO
4
7
DVSS1
DVSS2
C362
22P_0402_50V8J
@
+AUD_VREF
250_VREF
VREF
27
DCVOL
32
C630 1
C642 1
NC
VREFOUT2
VAUX
DISABLE#
SCK
31
33
34
43
44
C641 1
R336 1
NC
AVSS1
AVSS2
40
26
42
SDATA_OUT
EAPD
1U_0402_6.3V4Z
2 0.01U_0402_16V7K
1U_0603_10V4Z
2
2
1U_0603_10V4Z
2 @ 0_0402_5%
C632
C631
0.1U_0402_16V4Z
R322
@ 20K_0402_5%
ALC250-VD_LQFP48
6.8K_0402_5%
XTL_IN
2 22_0402_5%
0_0402_5%
SDA
XTLSEL
1
R598
0_0402_5%
R311 1
45
46
DGND
AGND
MIC1
ICH_AC_RST#
ICH_AC_SDOUT
250_BIT_CLK
250_SDIN
CD_GND
22
LINE_OUTR 31
27P_0402_50V8J
C595 1
2
SDATA_IN
CD_R
21
LINE_OUTL 31
R578
BIT_CLK
U40
R596
AUX_L
15
CD_GNA
C626
1000P_0402_50V7K
14
2
2
R597 2
1
20K_0402_5%
CD_AGND
AUDIO_AUX_R
R317
0_0402_5%
20 CD_AGND
AUDIO_AUX_L
250_XTLSEL
1U_0603_10V4Z
MONO_IN
17,34 ICH_AC_RST#
C625
1000P_0402_50V7K
1U_0603_10V4Z
1
@ C365
17,34 ICH_AC_SYNC
0.1U_0402_16V4Z
31 MIC
MIC
C592
10U_1206_16V4Z
CD_GNA C607 1
R332
2.2K_0402_5%
@
20K_0402_5% CD_R_L
6.8K_0402_5%
6.8K_0402_5%
20K_0402_5% CD_R_R
+AUD_VREF
20 INT_CD_R
2
2
2
2
31 NBA_PLUG
R320
R318
R328
R324
2
0.1U_0402_16V4Z
C601
30 LINE_IN_L_AC
30 LINE_IN_R_AC
20 INT_CD_L
C596
C602
31,33 NBA_PLUG_M
1
C597
C627
DVDD2
1
1
DVDD1
0.1U_0402_16V4Z
1
C628
38
25
C638
10U_0805_10V4Z
AVDD2
1
2
FBM-L10-160808-301-T_0603
AVDD1
+VDDA
GNDA
+3VS
L36
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
D
AC97 CODEC
Size
Document Number
Rev
0.2
EFL50 LA2761
Date:
Sheet
29
of
H
51
31 LINE_IN_R
R325 2
1 @ 6.8K_0402_5%
R333 2
1 @ 6.8K_0402_5%
LINE_IN_L
R327 2
1 6.8K_0402_5%
LINE_IN_L_R
2 C371
1U_0402_6.3V4Z
LINE_IN_R
R329 2
1 6.8K_0402_5%
LINE_IN_R_R
2 C373
1U_0402_6.3V4Z
31 LINE_IN_L
C370
@ 1U_0402_6.3V4Z
31 AUD_INL
LINE_IN_L_AC
LINE_IN_L_AC 29
LINE_IN_R_AC
LINE_IN_R_AC 29
C376
@ 1U_0402_6.3V4Z
31 AUD_INR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Rev
0.2
EFL50 LA-2761
Date:
Document Number
Sheet
1
30
of
51
Speaker Conn.
JP9
SPKR+O
SPKR-O
SPKL+O
SPKL-O
+5VAMP
W=40mil
4
3
2
1
4
3
2
1
JP42
SPKR+O
SPKR-O
SPKL+O
SPKL-O
ACES_85205-0400
1
R348 1
L IN
C649
C363
0.1U_0402_16V4Z
2 33K_0402_5%
2 100P_0603_50V8J
R347 1
29 LINE_OUTR
29 LINE_OUTL
C644
LINE_OUTL
C645
100K_0402_5% 2
+5VAMP
1 R314
EC_MUTE
2
16
9
2 10K_0402_5%
RIN
L IN
2 10K_0402_5%
AMP_MUTE
NBA_PLUG
33 AMP_MUTE
29 NBA_PLUG
2
7
12
14
1
8
R313
100K_0402_5%
EC_MUTE 33
0.1U_0402_16V4Z
0419
SHUTDOWN
10
ROUT+
LOUT+
ROUTLOUT-
3
6
15
11
GND
GND
GND
4
5
13
RIN
LIN
MUTE
SE/BTL#
RBYPASS
LBYPASS
0228
SPKR+
SPKL+
SPKRSPKL-
L43
L44
L45
L46
1
1
1
1
2
2
2
2
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
FBM-11-160808-700T_0603
+AUD_VREF
SPKR+O
SPKL+O
SPKR-O
SPKL-O
DOCK_MIC_S
R338
100K_0402_5%
R337
2.2K_0402_5%
Docking MIC
APA2066KAI-TRL_SOP16
L -->B1
H --->B2
U24
AUD_MIC2
C621
4.7U_0805_10V4Z
1
2
3
AUD_MIC1
RVDD
LVDD
1K_0402_5%
U41
RIGHT_2 R346 1
2
0.47U_0603_16V4Z
LEFT_2
R345 1
2
0.47U_0603_16V4Z
C695
2 33K_0402_5%
4
3
2
1
ACES_85205-0400
R638
SPKL+
0330
LINE_OUTR
C603
4.7U_0805_10V4Z
4
3
2
1
SPKR+
0_0603_5%
0_0603_5%
0_0603_5%
0_0603_5%
C380
220P_0402_50V7K
2
2 100P_0603_50V8J
2
2
2
2
C648
1
1
1
1
RIN
R634
R635
R636
R637
B2
GND
B1
S
VCC
A
6
5
4
DOCK_MIC_S
+VDDA
MIC 29
SN74LVC1G3157DCKR_SC70-6
R342 1
2 2@0_0402_5%
2
NBA_PLUG_S
1
2
3
4
5
6
7
8
9
10
150U_D2_6.3VM
C608 1
2 INTSPK_L1-2
R591
C622 1
2 INTSPK_R1-2
R604
150U_D2_6.3VM
SPKL+
SPKR+
FBM-11-160808-700T_0603
L35
INTSPK_L1-31
2 INTSPK_L1-4
47_0402_5%
1
2
2
1
47_0402_5%
ACES_87212-1000
R589
@
ACES_87213-1200
INT_MIC1
NBA_PLUG_S
I1
HP_S
+5VS
LINE_IN_L-1
0304
+5VSPDIF
NBA_PLUG_M
+AUD_VREF
Q42
2N7002_SOT23
2
G
R351
@ 2.2K_0402_5%
WM-64PCY_2P
AUD_MIC1
LINE_IN_R-1
LINE_IN_L-1
L41
FBM-11-160808-700T_0603 1
C384
220P_0402_50V7K
C385
220P_0402_50V7K
MIC JACK
NBA_PLUG_MP
INT_MIC1
1
2
1
2
NDS352AP_SOT23
Q38
JP41
5
4
3
6
2
1
PHONEJACK
C386
220P_0402_50V7K
TC7SH32FU_SSOP5
R602
1
2
10K_0402_5%
NBA_PLUG_MP
LINE_IN_R-1
MIC1
MOLEX_53398-0290
@
R352
100K_0402_5%
+5VAMP
JP10
I0
4
7
8
10
29 SPDIFO
+5VSPDIF
R350
2.2K_0402_5%
U25
2
29,33 NBA_PLUG_M
R349
100K_0402_5%
0.1U_0402_16V4Z
NBA_PLUG
LINE_IN_L
30 LINE_IN_L
L39 1
2
FBM-11-160808-700T_0603
L40 1
2
FBM-11-160808-700T_0603
+5VAMP
C651
FOX_2F11381-SJ5-TR
LINE_IN_R
30 LINE_IN_R
JP37
+5VAMP
C382
330P_0402_50V7K
NBA_PLUG_S#
+5VSPDIF
NBA_PLUG_S#
C379
330P_0402_50V7K
30 AUD_INR
30 AUD_INL
R607
1K_0402_5%
@
@ 1K_0402_5%
12
11
10
9
8
7
6
5
4
3
2
1
INTSPK_R1-31
2 INTSPK_R1-4
L38
FBM-11-160808-700T_0603
12
11
10
9
8
7
6
5
4
3
2
1
JP40
1
2
6
3
SPDIFO
HP_S
DOCK_MIC_S
SPKR+
SPKL+
AGND
AUD_MIC2
AGND
AUD_INR
AUD_INL
NBA_PLUG_S
29 SPDIFO
HeadPhone JACK
30 AUD_INR
30 AUD_INL
1
2
3
4
5
6
7
8
9
10
SPDIFO
HP_S
DOCK_MIC_S
SPKR+
SPKL+
AGND
AUD_MIC2
AGND
AUD_INR
AUD_INL
Q37
2N7002_SOT23
2
G
JP38
R316
1
2
10K_0402_5%
NBA_PLUG_S#
+5VAMP
29 SPDIFO
Docking :
Docking :
Document Number
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
E
31
of
51
+3VS
1
17,33 LPC_AD[0..3]
+3VS
LPC_AD[0..3]
R51
2 10K_0402_5%
SIO_PD#
R42
2 10K_0402_5%
SIO_SMI#
1
C7
4.7U_0805_10V4Z
1
C12
0.1U_0402_16V4Z
1
C18
0.1U_0402_16V4Z
C19
0.1U_0402_16V4Z
1 10K_0402_5%
IRRX
R35
2 10K_0402_5%
13 CLK_14M_SIO
CLK_SIO_14M
C20
@ 15P_0402_50V8J
CLK14
FIR IRRX2
IRTX2
IRMODE/IRRX3
37
38
39
IRRX
IRTXOUT
IRMODE
INIT#
SLCTIN#
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
SLCT
PE
BUSY
ACK#
ERROR#
ALF#
STROBE#
41
42
44
46
47
48
49
50
51
53
55
56
57
58
59
60
61
LPTINIT#
LPTSLCTIN#
LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTERR#
AFD#/3M#
R_LPTSTB#
VTR
VCC
VCC
VCC
VCC
7
11
26
45
54
CLOCK
23
24
25
27
28
29
30
31
32
33
34
35
36
40
GPIO40
GPIO41
GPIO42
GPIO43
GPIO44
GPIO45
GPIO46
GPIO47
GPIO10
GPIO11/SYSOPT
GPIO12/IO_SMI#
GPIO13/IRQIN1
GPIO14/IRQIN2
GPIO23
8
22
43
52
VSS
VSS
VSS
VSS
POWER
+3VS
IRRX 37
IRTXOUT 37
IRMODE 37
CLKRUN#
PCI_CLK
SER_IRQ
IO_PME#
SERIAL I/F
19
20
21
6
SIO_GPIO11
SIO_SMI#
SIO_IRQ
R52
@ 10_0402_5%
C17
@ 15P_0402_50V8J
PM_CLKRUN#
CLK_PCI_SIO
SERIRQ
SIO_PME#
R33
@ 10K_0402_5%
PCI_RESET#
LPCPD#
CLK_PCI_SIO
CLK_SIO_14M
SIO_PD#
17
18
R44
@ 10K_0402_5%
LPTINIT# 38
LPTSLCTIN# 38
R36
18,24,25,27,28,33 PM_CLKRUN#
13 CLK_PCI_SIO
18,22,33 SERIRQ
33 SIO_PME#
LFRAME#
LDRQ#
RXD 38
TXD 38
DSR# 38
RTS# 38
CTS# 38
DTR# 38
RI# 38
DCD# 38
0 *= 02Eh
1 = 04Eh
SIO_GPIO11
SIO_IRQ
1
1
15
16
RXD
TXD
DSR#
RTS#
CTS#
DTR#
R I#
DC D#
R46
1K_0402_5%
LPTSLCT 38
LPTPE 38
LPTBUSY 38
LPTACK# 38
LPTERR# 38
AFD#/3M# 38
R_LPTSTB# 38
16,22,24,25,27,28,33 PCI_RST#
6,16,18,20,33,41 PLT_RST#
2 @ 0_0402_5%
0_0402_5%
2
LPC_FRAME#
LPC_DRQ#1
RXD1
TXD1
DSR1#
RTS1#
CTS1#
DTR1#
RI1#
DCD1#
62
63
64
1
2
3
4
5
PARALLEL I/F
R50
R49
LAD0
LAD1
LAD2
LAD3
GPIO
17,33 LPC_FRAME#
17 LPC_DRQ#1
10
12
13
14
LPC I/F
U3
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
+3VS
+3VS
C15
0.1U_0402_16V4Z
+5VS
LPC47N217_STQFP64
+5V_PRN
+5VS
JP15
RXD
TXD
DSR#
RTS#
CTS#
DTR#
R I#
DC D#
2
1
D2
RB420D_SOT23
1@
+5V_PRN
1
2
3
4
5
6
7
8
9
10
@ ACES_85201-1005
R22
@ 2.7K_0402_5%
LPTSLCT
R17
@ 2.7K_0402_5%
LPTPE
R21
@ 2.7K_0402_5%
LPTBUSY
R16
@ 2.7K_0402_5%
LPTACK#
R15
@ 2.7K_0402_5%
AFD#/3M#
R20
@ 2.7K_0402_5%
LPTERR#
R34
@ 2.7K_0402_5%
LPTINIT#
R31
@ 2.7K_0402_5%
R26
2 33_0402_5%
LPD0
R27
2 33_0402_5%
LPD1
R29
2 33_0402_5%
LPD2
R28
2 33_0402_5%
LPD3
R24
2 33_0402_5%
LPD4
R19
2 33_0402_5%
LPD5
R23
2 33_0402_5%
LPD6
R18
2 33_0402_5%
LPD7
LPTSLCTIN#
FD0 38
FD1 38
FD2 38
FD3 38
FD4 38
FD5 38
4
FD6 38
FD7 38
Document Number
Rev
0.2
EFL50 LA2751
Date:
Sheet
E
32
of
51
+3VALW
2
+3VALW
LRST#
6,16,18,20,32,41 PLT_RST#
R572 1
0_0402_5%
+3VALW
SKU ID definition,
Please see page 3.
R258
100K_0402_5%
1
Rc
SKU_ID
+3VALW
R259
Rd
0.1U_0402_16V4Z
35,45
35,45
4
4
+5VS
RP17
1
2
3
4
8
7
6
5
KB_CLK
KB_DATA
PS_CLK
PS_DATA
4.7K_1206_8P4R_5%
RP26
8
7
6
5
EC_SMI#
FR D#
SELIO#
FSEL#
10K_1206_8P4R_5%
+5VALW
RP25
1
2
3
4
8
7
6
5
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
4.7K_1206_8P4R_5%
+5VS
2
4.7K_0402_5%
2
4.7K_0402_5%
0.1U_0402_16V4Z
2
+3VALW
1
C335
2
47K_0402_5%
1
R284
24 1394PWRON
39 CAPSLED#
39 NUMLED#
17 PHDD_LED#
100K_0402_5%
KB_CLK
KB_DATA
PS_CLK
PS_DATA
TP_CLK
TP_DATA
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
EC_SCI#
ENBKL
BKOFF#
FSTCHG
EC_SMI#
PE_REQ1#
LID_SW#
BT_ON#
SYSON
SUSP#
VR_ON
PE_REQ2#
PBTN_OUT#
1394PWRON
CAPSLED#
NUMLED#
17 EC_GA20
17 EC_KBRST#
163
164
169
170
SCL1
SDA1
SCL2
SDA2
8
20
21
22
27
28
48
62
63
69
70
75
109
118
119
148
149
155
156
162
168
GPIO04
GPIO07
GPIO08
GPIO09
GPIO0D
GPIO0E
GPIO10
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO2A
GPIO2B
GPIO2D
55
54
23
41
19
5
6
31
1K_0402_5%
1K_0402_5%
1K_0402_5%
2
2
2
20K_0402_5%
2
10K_0402_5%
KBA1
1
R292
KBA4
1
R293
KBA5
1
R295
1 LID_SW#
R289
DOCKIN#
1
R260
1
R278
1
R290
1
R291
GPIAD0/AD0
GPIAD1/AD1
GPIAD2/AD2
GPIAD3/AD3
GPIAD4/AD4
GPIAD5/AD5
GPIAD6/AD6
GPIAD7/AD7
81
82
83
84
87
88
89
90
BATT_TEMP
SKU_ID
BATT_OVP
ADP_I-R
GPODA0/DA0
GPODA1/DA1
GPODA2/DA2
GPODA3/DA3
GPODA4/DA4
GPODA5/DA5
GPODA6/DA6
GPODA7/DA7
99
100
101
102
1
42
47
174
DAC_BRIG
85
86
91
92
93
94
97
98
PWR_LED#
PWR_SUSP_LED#
BATT_FULL_LED#
BATT_CHGI_LED#
WL_ON_LED#
BT_ON_LED#
E_MAIL_LED#
MEDIA_LED#
GPIO2E/TOUT1/FANFB1
DPLL_TP/GPIO06/FANFB3
171
12
11
FAN_SPEED1
DPLL_TP
TEST_TP
175
EC_THERM#
E51IT0/GPIO00
E51IT1/GPIO01
E51RXD/GPIO21/ISPCLK
E51TXD/GPIO22/ISPDAT
3
4
106
107
XCLKI
XCLKO
158
160
Wake Up
SMBus
Digital To Analog
* GPIO18/XIO8CS#
* GPIO19/XIO9CS#
* GPIO1A/XIOACS#
* GPIO1B/XIOBCS#
Expanded I/O * GPIO1C/XIOCCS#
* GPIO1D/XIODCS#
* GPIO1E/XIOECS#
* GPIO1F/XIOFCS#
GPIO
FANTEST_TP/GPIO05/FAN3PWM
FnLock#/GPIO12 *
CapLock#/GPIO011 *
NumLock#/GPIO0A *
ScrollLock#/GPIO0F *
MISC
ECRST#
GA20/GPIO02
KBRST#/GPIO03
ECSCI#
ENBKL
@ 120K_0402_5%
DPLL_TP
2
1K_0402_5%
TEST_TP
2
1K_0402_5%
2
2
1
95
159
ON /OFF
GPWU0
GPWU1
GPWU2
GPWU3
Pin
GPWU4
GPWU5
TIN1/GPWU6
TIN2/FANFB2/GPWU7
Analog To Digital
+3VALW
2
2
26
29
30
44
76
172
176
Pulse
Interface
BATGND
PSCLK1
PSDAT1
PSCLK2
PSDAT2PS2
PSCLK3
PSDAT3
VCC
VCC
VCC
VCC
VCC
VCC
VCC
110
111
114
115
116
117
INVT_PWM
BEEP#
17
35
46
122
137
167
1 TP_CLK
R287
1 TP_DATA
R286
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
38 EZ_SMBUS_ON#
18 EC_SCI#
38 EZ_PE_REQ1#
18,38 EZ_PE_REQ2#
15 ENBKL
15 BKOFF#
43 FSTCHG
18 EC_SMI#
20 IDE_LED#
34,39 EN_WL#
18 EC_SWI#
25 EN_WOL#
13 PE_REQ1#
36 LID_SW#
34 BT_ON#
37,40,48 SYSON
15,35,40 SUSP#
46,47 VR_ON
22 CARD_LED#
13 PE_REQ2#
18 PBTN_OUT#
+3VALW
1
2
3
4
38 KB_CLK
38 KB_DATA
38 PS_CLK
38 PS_DATA
34 TP_CLK
34 TP_DATA
C309
0_0402_5%
R280
GPOW0/PWM0
GPOW1/PWM1
FAN2PWM/GPOW2/PWM2
GPOW3/PWM3
Width GPOW4/PWM4
GPOW5/PWM5
GPOW6/PWM6
FAN1PWM/GPOW7/PWM7
32
33
36
37
38
39
40
43
R275
Rb
0_0402_5%
C329
0.1U_0402_16V4Z
C
+3VALW
INVT_PWM 15
BEEP# 29
ACOFF
ACOFF 42,43
EC_ON
EC_LID_OUT#
EC_MUTE
R279
10K_0402_5%
EC_ON 39
EC_LID_OUT# 18
EC_MUTE 31
ON/OFF 39
PM_SLP_S3#
PM_SLP_S5#
EN_BT#
EC_PME#
D11
2
CH751H-40_SC76
1
ACIN 42
PM_SLP_S3# 18
PM_SLP_S5# 18
EN_BT# 34,39
ACIN1 18
ECAGND
2
1
C307 0.01U_0402_16V7K
BATT_OVP 43
DOCKIN#
AD_BID0
R276 1
DOCKIN# 14,21,26,38
2 0_0402_5%
NBA_PLUG_M 29,312
CRY11 R300
2 CRY2
@ 20M_0603_5%
R312
PWR_LED# 34,39
PWR_SUSP_LED# 34,39
BATT_FULL_LED# 34,39
BATT_CHGI_LED# 34,39
WL_ON_LED# 34,39
BT_ON_LED# 34,39
E_MAIL_LED# 39
MEDIA_LED# 39
0_0402_5%
C359
FAN_SPEED1 36
EC_THERM# 18
EC_TCK
EC_TDO
CRY2
R577 1
CRY1
ADP_I
C308
0.1U_0402_16V4Z
1231_Modify
DAC_BRIG 15
EZ_SUSON 38
IREF 43
EN_DFAN1 36
WL_ON 27,28
AMP_MUTE 31
EZ_MAINON 38
EZ_PERST# 38
IREF
EN_DFAN1#
WL_ON
AMP_MUTE
BATT_TEMP 45
2 ADP_I
100K_0402_5%
R266 1
1
2 @ 0_0402_5%
AD_BID0
1
R573 1
R274
100K_0402_5%
Ra
KSO16 39
1
C358
X1
10P_0402_50V8J
16,22,24,25,27,28,32 PCI_RST#
+3VALW
ENBKL
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
IN
0_0402_5%
71
72
73
74
77
78
79
80
KSO[0..15] 34
OUT
GPIK0/KSI0
GPIK1/KSI1
GPIK2/KSI2
GPIK3/KSI3
GPIK4/KSI4
GPIK5/KSI5
GPIK6/KSI6
GPIK7/KSI7
KSI[0..7] 34,39
KSO[0..15]
NC
R277 1
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
NC
8,15 GMCH_ENBKL
KSI[0..7]
49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154
GPOK0/KSO0
GPOK1/KSO1
GPOK2/KSO2
GPOK3/KSO3
GPOK4/KSO4
GPOK5/KSO5
GPOK6/KSO6
GPOK7/KSO7
GPOK8/KSO8
GPOK9/KSO9
GPOK10/KSO10
GPOK11/KSO11
GPOK12/KSO12
GPOK13/KSO13
GPOK14/KSO14
GPOK15/KSO15
GPOK16/KSO16
GPOK17/KSO17
EC_PME#
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
1
2
3
4
JP33
2
2
2
2
RD#
WR#
MEMCS#
IOCS#
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1/XIOP_TP
A2
A3
A4/DMRP_TP
A5/EMWB_TP
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20/GPIO23
E51CS#/GPIO20/ISPEN
1U_0603_10V4Z
1
1
1
1
150
151
173
152
138
139
140
141
144
145
146
147
124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103
108
105
X-BUS Interface
R302
R298
R303
R299
24 1394_PME#
25 ONBD_LAN_PME#
27,28 WLANPME#
32 SIO_PME#
FR D#
FW R#
FSEL#
SELIO#
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
0.1U_0402_16V4Z
35 FRD#
35 FWR#
35 FSEL#
R305
10K_0402_5%
@
ACES_85205-0400
1
2
3
4
EC_TCK
EC_TDO
C356
0.1U_0402_16V4Z
10P_0402_50V8J
18,22,32 SERIRQ
18,24,25,27,28,32 PM_CLKRUN#
+3VALW
13 CLK_PCI_LPC
ENE-KB910-B4
1 @ 33_0402_5%
LAD0
LAD1
LAD2
LAD3
LFRAME# LPC Interface
LRST#/GPIO2C
LCLK
SERIRQ
CLKRUN#/GPIO0C *
LPCPD#/GPIO0B *
C353
GND
GND
GND
GND
GND
GND
R285 2
15
14
13
10
9
165
18
7
25
24
VCCA
16
34
45
123
136
157
166
U20
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LRST#
17,32 LPC_AD0
17,32 LPC_AD1
17,32 LPC_AD2
17,32 LPC_AD3
17,32 LPC_FRAME#
+5VALW
1
C332
C338
@ 22P_0402_50V8J
2
1
For EC Tools
C333
1000P_0402_50V7K
Internal Keyboard
L27
ECAGND
1
2
FBM-L11-160808-800LMT_0603
2
2
0.1U_0402_16V4Z
C340
1000P_0402_50V7K
1
1
ECAGND
2
2
0.1U_0402_16V4Z
C354
161
C350
VCCBAT
ADB[0..7] 35
R304
0_0402_5%
L28
1
2
2 FBM-L11-160808-800LMT_0603
0.1U_0402_16V4Z
1
2
96
0.1U_0402_16V4Z
1
1 C351
1
C342
KBA[0..19] 35
ADB[0..7]
AGND
KBA[0..19]
EC_RSMRST# 18
EAPD 29
32.768KHZ_12.5P_1TJS125DJ2A073
2 @ 0_0402_5%
RTC_CLK
RTC_CLK 18
KB910Q B4_LQFP176
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
3
ENE-KB910
Document Number
R ev
0.2
EFL50 LA2761
Wednesday, April 20, 2005
Sheet
1
33
of
51
TO M/B
MDC CONN.
+3V
17,29 ICH_AC_SDOUT
17,29 ICH_AC_SYNC
17 ICH_AC_SDIN1
17,29 ICH_AC_RST#
ICH_AC_SYNC
2 ICHAC_SDIN1_MDC
22_0402_5%
GND1
RES0
IAC_SDATA_OUT
RES1
GND2
3.3V
IAC_SYNC
GND3
IAC_SDATA_IN
GND4
IAC_RESET#
IAC_BITCLK
2
4
6
8
10
12
+5VS
C2
1U_0805_25V4Z
6
5
4
3
2
1
JP5
TP_CLK
TP_DATA
33 TP_CLK
33 TP_DATA
+3V
ICHAC_BITCLK_MDC 1
2
R14 22_0402_5%
ICH_AC_BITCLK 17,29
13
14
15
16
17
18
19
20
13
14
15
16
17
18
19
20
1
R13
1
3
5
7
9
11
ACES_85201-0605
JP14
FOX_QT8A0121-4011~D
TO M/B
@
ACES_85201-1605
(EMW80)
<>
TP_DATA
TP_CLK
33 TP_DATA
33 TP_CLK
KSI[0..7]
KSO[0..15]
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
+5VS
KSI[0..7] 33,39
KSO[0..15] 33
KSO8
C215
100P_0402_25V8K
KSI7
C238
100P_0402_25V8K
KSI3
C217
100P_0402_25V8K
KSI6
C236
100P_0402_25V8K
KSO9
C220
100P_0402_25V8K
KSI5
C234
100P_0402_25V8K
KSI2
C222
100P_0402_25V8K
KSO0
C232
100P_0402_25V8K
KSI1
C224
100P_0402_25V8K
KSO1
C226
100P_0402_25V8K
KSO10
C227
100P_0402_25V8K
KSO2
C223
100P_0402_25V8K
KSO11
C233
100P_0402_25V8K
KSI4
C221
100P_0402_25V8K
KSI0
C235
100P_0402_25V8K
KSO3
C218
100P_0402_25V8K
KSO12
C237
100P_0402_25V8K
KSO4
C216
100P_0402_25V8K
KSO13
C239
100P_0402_25V8K
KSO5
C214
100P_0402_25V8K
KSO14
C241
100P_0402_25V8K
KSO6
C213
100P_0402_25V8K
KSO15
C242
100P_0402_25V8K
KSO7
C212
100P_0402_25V8K
EN_WL#
EN_BT#
WL_ON_LED#
BT_ON_LED#
33,39 EN_WL#
33,39 EN_BT#
33,39 WL_ON_LED#
33,39 BT_ON_LED#
33,39 PWR_SUSP_LED#
33,39 PWR_LED#
33,39 BATT_FULL_LED#
33,39 BATT_CHGI_LED#
+5VALW
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
JP6
BlueTooth Interface
Q31
2
G
33 BT_ON#
INT_KBD CONN.
1
SI2301BDS_SOT23
KSO15
KSO14
KSO13
KSO12
KSI0
KSO11
KSO10
KSI1
KSI2
KSO9
KSI3
KSO8
KSO7
KSO6
KSO5
KSO4
KSO3
KSI4
KSO2
KSO1
KSO0
KSI5
KSI6
KSI7
(Left)
(Right)
+3VALW
ACES_87213-0800
JP4
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
BT_VCC
18 USB20_P5
18 USB20_N5
1
2
3
4
5
6
7
8
USB20_P5
USB20_N5
27,28 WLAN_BT_DATA
27,28 WLAN_BT_CLK
BT_VCC
C396
10U_0805_10V4Z
1
2
3
4
5
6
7
8
JP1
Bluetooth Connector
C397
0.1U_0402_16V4Z
ACES_85201-2405
MDC / BT / KBD / TP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Size
Document Number
Rev
0.2
EFL50 LA2761
Date:
Sheet
34
of
51
KBA[0..19]
U22C
ADB[0..7]
INT_FLASH_SEL
OE#
33 KBA[0..19]
33 ADB[0..7]
10
SB_INT_FLASH_SEL# 18
SUS_STAT# 18
SN74LVC125APWLE_TSSOP14
+3VALW
2
+3VALW
+3VALW
+3VALW
R335
100K_0402_5%
R330
10K_0402_5%
SUSP# 15,33,40
2
G
0.1U_0402_16V4Z
INT_FLASH_EN#
FSEL# 33
I0
I1
3
Q21
2N7002_SOT23
TC7SH32FU_SSOP5
U22B
EC_FLASH# 18
INT_FSEL# 1
R331
2
22_0402_5%
U23
FWE#
FRD# 33
R334 1
100K_0402_5%
OE#
0.1U_0402_16V4Z
C377 1
C372
FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FR D#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3
C614
0.1U_0402_16V4Z
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
WE*
A17
A14
A13
A8
A9
A11
OE*
A10
CE*
DQ7
DQ6
DQ5
DQ4
DQ3
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2
U42
FSEL#
SN74LVC125APWLE_TSSOP14
FWR# 33
29F040/SST39VF040_PLCC
(CL55)
+3VALW
U38
INT_FSEL#
FR D#
FWE#
22
24
9
CE#
OE#
WE#
VCC0
VCC1
+5VALW
+5VALW
C383
JP8
D0
D1
D2
D3
D4
D5
D6
D7
25
26
27
28
32
33
34
35
RP#
NC
READY/BUSY#
NC0
NC1
10
11
12
29
38
GND0
GND1
23
39
ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
RESET#
1
2
R301
@ 100K_0402_5%
0.1U_0402_16V4Z
+3VALW
KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
INT_FLASH_EN#
INT_FLASH_SEL
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
31
30
KBA17
C361 1
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4
2 0.1U_0402_16V4Z
R315
100K_0402_5%
21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37
U21
+3VALW
8
7
6
5
33,45 EC_SMB_CK1
33,45 EC_SMB_DA1
VCC
WP
SCL
SDA
A0
A1
A2
GND
1
2
3
4
AT24C16AN-10SI-2.7_SO8
ADB3
ADB2
ADB1
ADB0
FR D#
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19
FSEL#
KBA0
R309
100K_0402_5%
@ SUYIN_80065AR-040G2T
SST39VF080-70_TSOP40
@
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
35
of
51
FAN Conn
+5VS
VSB
P
+IN
-IN
Q15
D SI3456DV-T1_TSOP6
OUT
G
33 EN_DFAN1
EN_FAN1
U15A
LM358A_SO8
AO6400
+VCC_FAN1
FAN1
93/05/16
1
EN_DFAN1
2
1
2
5
6
C231
0.1U_0402_16V4Z
1
R177
2
@2200P_0402_50V7K
D26
2
120K_0402_5%
1
C210
1
C540
1
C543
JP21
1
2
3
1
1
2
@1000P_0402_50V7K
RB751V_SOD323
+3VS
R175
93/05/16
100K_0402_5%
2
10U_1206_16V4Z
R576
10K_0402_5%
ACES_85205-0300
C121
@1000P_0402_50V7K
33 FAN_SPEED1
U18
EN_DFAN1
1
2
3
4
GND
GND
GND
GND
8
7
6
5
G993P1U_SOP8L
C547
10U_1206_16V4Z
LID_SW# 33
SW1
MPU-101-81_4P
VEN
VIN
VO
VSET
D1
@ PSOT24C_SOT23
(ELW80)
1
+5VS
+VCC_FAN1
+5VS
1
C548
+
@ 150U_D2_6.3VM
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
36
of
51
+5VALW
U26
C390
4.7U_0805_10V4Z
1
1
FLG
VOUT
GND
VIN
CE
USB_OC#0 18
+USB_AS
+USB_AS
470P_0402_50V7K
1
1
+
C388
C387
470P_0402_50V7K
1
1
+
C202
SYSON
33,40,48 SYSON
+USB_BS
RT9702ACB_SOT23-5
C204
150U_D2_6.3VM
150U_D2_6.3VM
+3VALW
+5VALW
+USB_BS
U16
C211
4.7U_0805_10V4Z
GND
IN
IN
EN#
8
7
6
5
OUT
OUT
OUT
FLG
18 USB20_N2
18 USB20_P2
1
2
R179
10K_0402_5%
1
2
R174
10K_0402_5%
G528_SO8
SYSON#
40 SYSON#
1
2
3
4
1
2
3
4
0307
JP13
JP24
R178
10K_0402_5%
C206
0.1U_0402_16V4Z
18 USB20_N0
18 USB20_P0
SUYIN_020173MR004S312ZL
USB_OC#4 18
(Left)
USB_OC#2 18
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
SUYIN_020173MR004G533ZR
C209
0.1U_0402_16V4Z
(Rear)
U1
USB20_N0
U32
+5VALW
USB20_N2
U46
C654
4.7U_0805_10V4Z
FLG
VOUT
GND
VIN
1
CE
USB_OC#6 18
USB20_P4
+USB_CS
AS
SDA
GND
ALERT
VDD
SCL
USB20_P2
AS
SDA
GND
ALERT
VDD
SCL
+USB_BS
USB20_N4
USB20_P0
+USB_AS
@ IP4220CZ6_SOT23-6
@ IP4220CZ6_SOT23-6
RT9702ACB_SOT23-5
+USB_CS
SYSON
33,40,48 SYSON
470P_0402_50V7K
1
C655 1
+
@
C652
150U_D2_6.3VM
@
B
+IR_ANODE
R606
4.7_1206_5%
C240
150U_D2_6.3VM
C624
1
C604
10U_1206_16V4Z 2
32 IRRX
C600
0.1U_0402_16V4Z
2
4
6
8
1
2
3
4
ACES_85205-0400
@
@ 150U_D2_6.3VM
JP25
18 USB20_N4
18 USB20_P4
IR1
IRRX
IR_3VS
18 USB20_N6
18 USB20_P6
(1 SPINDLE)
R594
47_1206_5%
1
2
3
4
10U_1206_16V4Z
JP11
470P_0402_50V7K
1
1
+
C225
C610
+3VS
R605
4.7_1206_5%
1
2
+USB_BS
FIR Module
+3VS
IRED_C
RXD
VCC
GND
IRED_A
TXD
SD/MODE
MODE
1
3
5
7
1
2
3
4
SUYIN_020173MR004S312ZL
IRTXOUT
IRTXOUT 32
IRMODE
IRMODE 32
1
2
R586
@ 0_0402_5%
U47
USB20_N6
(Left)
TFDU6102-TR3_8P
2
3
SDA
GND
ALERT
VDD
SCL
AS
USB20_P6
+USB_CS
@ IP4220CZ6_SOT23-6
USB Conn
Size
Document Number
Date:
Rev
0.2
EFL50 LA-2761
Sheet
1
37
of
51
U2
1@ RB751V_SOD323
D12
D_LAN_MDI2+
D_LAN_MDI2-
26 D_LAN_MDI2+
26 D_LAN_MDI2-
D_LAN_MDI3+
D_LAN_MDI3-
26 D_LAN_MDI3+
26 D_LAN_MDI3-
32
32
32
32
32
32
32
32
KB_DATA
KB_CLK
PS_DATA
PS_CLK
R8
R7
R6
R5
1
1
1
1
D_HP_S
D_SPDIFO
R I#
DTR#
CTS#
TXD
RTS#
RXD
DSR#
DC D#
RI#
DTR#
CTS#
TXD
RTS#
RXD
DSR#
DCD#
2 W D@
2 W D@
2 W D@
2 W D@
33 EZ_SUSON
33 EZ_MAINON
33 EZ_PERST#
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
EZ_PCIE_TXP1
EZ_PCIE_TXN1
D_DVI_TXD2D_DVI_TXD2+
18 EZ_PCIE_TXP1
18 EZ_PCIE_TXN1
41 D_DVI_TXD241 D_DVI_TXD2+
LAN0GND
LAN1+
LAN1GND
GND
LAN_LINK#
PP_STB#
PP_AFD#
PP_D0
PP_ERR#
PP_D1
PP_INIT#
PP_D2
PP_SLIN#
PP_D3
PP_D4
PP_D5
PP_D6
PP_D7
PP_ACK#
PP_BUSY
PP_PE
PP_SLCT
PE_WAKE#
GND
GND
PCIECLK1+
PCIECLK1LAN_ACT#
RESERVE
GND
LAN2+
LAN2GND
LAN3+
LAN3GND
HP_S
SPDIF
COM_RI#
COM_DTR#
COM_CTS#
COM_SOUT
COM_RTS#
COM_SIN
COM_DSR#
COM_DCD#
GND
PS2_KBDT
PS2_KBCK
PS2_MSDT
PS2_MSCK
SUSON
MAINON
PE_RST#
GND
PCIETX1+
PCIETX1DVI2DVI2+
GND
DVI_DET
DVI_DAT
GND
DVI_CLK
EZIN_EM#
MIC_S
AUD_INR
AUD_INL
AGND
AUD_MIC
AUD_OR
AUD_OL
AGND
GND
VGA_HS
VGA_VS
VGA_DAT
VGA_CLK
SERIRQ
PE_CLK
EZIN_ME#
PE_REQ2#
PE_DAT
PE_REQ1#
GND
PCIERX1+
PCIERX1DVI1DVI1+
GND
DVI0DVI0+
GND
DVICLK+
DVICLKGND
GND
TV_COMP
TV_Y
TV_C
GND
GND
VGA_R
VGA_G
VGA_B
GND
GND
PCIERX2+
PCIERX2GND
GND
PCIETX2+
PCIETX2GND
GND
PCIECLK2+
PCIECLK2VCC
VCC
GND
GND
DE_DVI_SDATA
D_DVI_DET
DE_DVI_SDATA
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
2
G
R355
4.7K_0402_5%
1
D_DVI_DET
DVI_SDATA
2N7002_SOT23
DE_DVI_SCLK
MZIN_EM#
D_MIC_S
D_AUD_INR
D_AUD_INL
D_AGND
D_AUD_MIC2
D_AUD_OR
D_AUD_OL
D_AGND
Q27
2
G
LAN0+
63
R363
0_0402_5%
GM@ R366 GM@ 6.8K_0402_5%
2
1
+5VS
DVI_SDATA 15,41
DE_DVI_SCLK
Q26
3
S
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
CLK_EZ_CLK1
CLK_EZ_CLK1#
D_LAN_ACTIVITY#
13 CLK_EZ_CLK1
13 CLK_EZ_CLK1#
26 D_LAN_ACTIVITY#
1@ RB751V_SOD323
D_LAN_MDI0-
D_LAN_LINK#
R_LPTSTB#
AFD#/3M#
F D0
LPTERR#
F D1
LPTINIT#
F D2
LPTSLCTIN#
F D3
F D4
F D5
F D6
F D7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT
26 D_LAN_LINK#
32 R_LPTSTB#
32 AFD#/3M#
32 FD0
32 LPTERR#
32 FD1
32 LPTINIT#
32 FD2
32 LPTSLCTIN#
32 FD3
32 FD4
32 FD5
32 FD6
32 FD7
32 LPTACK#
32 LPTBUSY
32 LPTPE
32 LPTSLCT
D13
D_LAN_MDI1+
D_LAN_MDI1-
26 D_LAN_MDI1+
26 D_LAN_MDI1-
D_LAN_MDI0+
R356
4.7K_0402_5%
26 D_LAN_MDI0-
33 KB_DATA
33 KB_CLK
33 PS_DATA
33 PS_CLK
P
TC7SH08FU_SSOP5
26 D_LAN_MDI0+
16 D_USB_SMI#2
+5VS
R11
0_0402_5%
PM@
RB411D_SOT23
Docking
Conn.
JP12
16 D_USB_SMI#1
+3VS
DOCKIN# 14,21,26,33
1@
D_DVI_DET
1@ 100K_0402_5%
DOCKIN#
R1
1@ 10K_0402_5%
D_DVI_DET
MZIN_EM#
D14
R2
1@ 0.1U_0402_16V4Z
1@ 10K_0402_5%
2
1
R3
C1
+3VALW
+5VS
+3VALW
DVI_SCLK
2N7002_SOT23
DVI_SCLK 15,41
+3VS
D_CRT_HSYNC
D_CRT_VSYNC
D_DDC_DATA
D_DDC_CLK
D_CRT_HSYNC 14
D_CRT_VSYNC 14
D_DDC_DATA 14
D_DDC_CLK 14
+5VS
EZ_SMB_CLK
MZIN_ME#
R4
30mil
1@ 2 1K_0402_5%
EZ_PE_REQ2# 18,33
EZ_SMB_DAT
EZ_PE_REQ1# 33
EZ_PCIE_RXP1
EZ_PCIE_RXN1
D_DVI_TXD1D_DVI_TXD1+
EZ_PCIE_RXP1 18
EZ_PCIE_RXN1 18
D_DVI_TXD1- 41
D_DVI_TXD1+ 41
D_DVI_TXD0D_DVI_TXD0+
D_DVI_TXD0- 41
D_DVI_TXD0+ 41
D:DVI_TXC+
D_DVI_TXC-
D_DVI_TXC+ 41
D_DVI_TXC- 41
D_TV_COMPS
D_TV_LUMA
D_TV_CRMA
JP2
D_SPDIFO
D_HP_S
D_MIC_S
D_AUD_INR
D_AUD_INL
D_AGND
D_AUD_MIC2
D_AGND
D_AUD_OR
D_AUD_OL
D_TV_COMPS 21
D_TV_LUMA 21
D_TV_CRMA 21
D_CRT_R
D_CRT_G
D_CRT_B
D_CRT_R 14
D_CRT_G 14
D_CRT_B 14
EZ_PCIE_RXP2
EZ_PCIE_RXN2
EZ_PCIE_RXP2 18
EZ_PCIE_RXN2 18
EZ_PCIE_TXP2
EZ_PCIE_TXN2
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
ACES_87213-1000
EZ_PCIE_TXP2 18
EZ_PCIE_TXN2 18
CLK_EZ_CLK2
CLK_EZ_CLK2#
CLK_EZ_CLK2 13
CLK_EZ_CLK2# 13
DKN_B+
PJP1
1@ JUMP_43X118
1 1
2 2
VIN
VIN
FOX_QL10303-C4444R-4F_124P
+3VS
0.1U_0402_25V4K
EZ_SMBUS_ON# 33
0307
EZ_SMB_CLK
15,41 DVI_DET
C393
1
C395
C394
1
1
@ 4.7K_0402_5%
R357
DVI_DET
D_DVI_DET
100_0402_5%
4
R359
+3VS
D15
@ SKS10-04AT_TSMA
EZ_SMB_DAT
100K_0603_5%
2
G
0.1U_0402_25V4K
0307
3 Q1
@ 2N7002_SOT23
R9
2
+3VS
@ 4.7K_0402_5%
1
2
R362 1@ 0_0603_5%
1
2
R10 1@ 0_0603_5%
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1U_0402_25V4K
2
G
R361
Q28
3
@ 2N7002_SOT23
1
D
11,12,13 D_CK_SCLK
2
0.1U_0402_25V4K
R469
10K_0402_5%
11,12,13 D_CK_SDATA
C391
3 Q30
@ 2N7002_SOT23
C392
+5VS
0.1U_0402_25V4K
2
G
R369
@ 100K_0402_5%
Docking
Size
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
E
38
of
51
TOP Side
2
Power Button
Bottom Side
2
ON/OFFBTN#
SW4
EVQPLHA15_4P
1
KSI2 33,34
ON/OFF 33
33 KSO16
100K_0402_5%
D16
51ON#
51ON# 42
DAN202U_SC70
5
6
KSI3 33,34
e/eManager_BTN
+3VALW
2
R368
4.7K_0402_5%
SW5
EVQPLHA15_4P
3
1
33 KSO16
Q29
KSI0 33,34
33 KSO16
SW6
EVQPLHA15_4P
1
5
6
KSI1 33,34
Q2
DTC124EK_SC59
Launch Manager_BTN
1
2 2
R367
33K_0402_5%
33 EC_ON
D17
RLZ20A_LL34
EC_ON
C389
1000P_0402_50V7K
5
6
SW3
EVQPLHA15_4P
3
1
33 KSO16
R358
1
JOPEN
Internet_BTN
SW2
EVQPLHA15_4P
3
1
5
6
J2
E-Mail_BTN
+3VALW
1
JOPEN
2
J1
5
6
2
G
2N7002_SOT23 S
BlueTooth_BTN
Wireless_BTN
SW7
SW8
EN_BT# 33,34
PTS-042_2P
EN_WL# 33,34
PTS-042_2P
Power ON Circuit
+3VS
+3V
+3V
LED Indicator
O 8
+3V POWER
11
O 10
+3V POWER
SYS_PWROK 18
U34E
SN74LVC14APWLE_TSSOP14
14
U34D
SN74LVC14APWLE_TSSOP14
14
R539
180K_0402_5%
R535
C562
1U_0805_25V4Z
33,34 PWR_SUSP_LED#
LED7
33 E_MAIL_LED#
LED1
33 CAPSLED#
LED2
33 NUMLED#
LED3
PWR_SUSP_LED#D
2
HT-170UD_0805
2
R612
E_MAIL_LED#D
2
HT-170UYG-DT GRN_0805
R12
CAPSLED#D
2
HT-170UYG-DT GRN_0805
R45
NUMLED#D
2
HT-170UYG-DT GRN_0805
R58
PWR_LED#D
2
HT-170UYG-DT GRN_0805
R613
BATT_FULL_LED#D
2
HT-170UYG-DT GRN_0805
R610
BATT_CHGI_LED#D
2
HT-170UD_0805
R611
MEDIA_LED#D
2
HT-170UYG-DT GRN_0805
R85
1
360_0402_5%
+5VALW
100K_0402_5%
RTC Battery
BATT1
+RTCBATT
33,34 PWR_LED#
LED5
33,34 BATT_FULL_LED#
LED6
33,34 BATT_CHGI_LED#
LED8
1
360_0402_5%
+5VS
1
360_0402_5%
+5VS
1
360_0402_5%
+5VS
1
360_0402_5%
+5VALW
1
360_0402_5%
+5VALW
1
360_0402_5%
+5VALW
1
360_0402_5%
+5VS
1
360_0402_5%
+5VALW
1
360_0402_5%
+5VALW
+RTCBATT
RTCBATT
33 MEDIA_LED#
D9
LED4
BAS40-04_SOT23
33,34 WL_ON_LED#
LED10
1
3
WL_ON_LED#D
2
12-21UYOC/S530-A2/TR8_YEL
R353
CHGRTC
+RTCVCC
C243
0.1U_0402_16V4Z
33,34 BT_ON_LED#
LED9
1
3
2
BT_ON_LED#D
R354
12-21UYOC/S530-A2/TR8_YEL
Document Number
Rev
0.2
EFL50 LA-2761
Date:
Sheet
E
39
of
51
+3VALW TO +3V
+3V
+5VALW TO +5VS
+1.8VS
+3V
+5VS
R339
470_0402_5%
1U_0805_25V4Z
U43
1
2
3
4
SYSON_ALW
SI4800DY_SO8
C639
R341
@ 1M_0402_1%
C633
VSB
1
4.7U_0805_10V4Z
C646
2 SYSON#
G
Q23
2N7002_SOT23
1U_0805_25V4Z
C653
4.7U_0805_10V4Z
10U_1206_16V4Z
0.1U_0402_16V4Z
S
R340
100K_0402_5%
1
2
C647
2 SUSP
G
Q14
2N7002_SOT23
5VS_GATE
2 SYSON#
G
Q24
2N7002_SOT23
+5VS
+3VS
+3VS
1
2
3
4
S
S
S
G
10U_1206_16V4Z
1U_0805_25V4Z
R161
100K_0402_5%
1
2
5VS_GATE
+1.5VALW
U17
8 D
7 D
6 D
5 D
VSB
SI4800DY_SO8
R155
@ 1M_0402_1%
SUSP
0.1U_0402_16V4Z
S
2
G
Q12
2N7002_SOT23
1
2
3
4
SI4800DY_SO8
+5VALW
C230
C229
+1.5VS
4.7U_0805_10V4Z
R343
10K_0402_5%
1U_0805_25V4Z
C228
4.7U_0805_10V4Z
R200
470_0402_5%
SUSP
49 SUSP
10U_1206_16V4Z
C180
C196
+1.5VS
S
S
S
G
D
D
D
D
+1.5VALW TO +1.5VS
C190
U11
C194
2 SUSP
G
Q41
2N7002_SOT23
+3VALW
2 SUSP
G
Q13
2N7002_SOT23
+3VALW TO +3VS
R609
470_0402_5%
R156
470_0402_5%
8
7
6
5
S
S
S
G
SI4800DY_SO8
D
D
D
D
8
7
6
5
R169
470_0402_5%
1
2
3
4
S
S
S
G
D
D
D
D
10U_1206_16V4Z
8
7
6
5
C609
+3VALW
C611
U45
+5VALW
5VS_GATE
2 SUSP
G
Q17
2N7002_SOT23
15,33,35 SUSP#
DTC115EKA_SOT23
Q25
100K
100K
+5VALW
+1.8V
R631
470_0402_5%
SYSON#
37 SYSON#
+1.8V
R344
10K_0402_5%
U12
1
2
3
4
+1.8VS
C192
SI4800DY_SO8
4.7U_0805_10V4Z
2 SYSON#
G
Q46
2N7002_SOT23
DTC115EKA_SOT23
Q22
1U_0805_25V4Z
C193
4.7U_0805_10V4Z
SYSON
33,37,48 SYSON
100K
100K
S
S
S
G
D
D
D
D
8
7
6
5
0304
5VS_GATE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND
TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE
B
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
C
Rev
0.2
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
E
40
of
51
H1
H_S354D118
H20
H_S354D118
H19
H_S354D118
H18
H_S354D118
H16
H_C315D165
H17
H_C315D165
H12
H_R354X348D118
Chip_Name
CF3
SMD40M80
H21
H_S354D118
H7
H_S354D118
H14
H_S354D118
H2
H_C276D173
H5
H_C276D173
H15
H_C315D315N
Label_Name
EXP_TXP0/SDVOB_RED
PCIE_MTX_C_GRX_P0
EXP_TXN0/SDVOB_RED#
PCIE_MTX_C_GRX_N0
EXP_TXP1/SDVOB_GREEN
PCIE_MTX_C_GRX_P1
EXP_TXN1/SDVOB_GREEN#
PCIE_MTX_C_GRX_N1
EXP_TXP2/SDVOB_BLUE
PCIE_MTX_C_GRX_P2
EXP_TXN2/SDVOB_BLUE#
PCIE_MTX_C_GRX_N2
EXP_TXP3/SDVOB_CLKP
PCIE_MTX_C_GRX_P3
EXP_TXN3/SDVOB_CLKN
PCIE_MTX_C_GRX_N3
EXP_RXP1/SDVO_INT
PCEI_GTX_C_MRX_P1
EXP_RXN1/SDVO_INT#
PCEI_GTX_C_MRX_N1
0307
CF10
SMD40M80
CF9
SMD40M80
CF7
SMD40M80
CF13
SMD40M80
H23
H_S354D118
CF2
SMD40M80
CF15
SMD40M80
CF16
SMD40M80
CF4
SMD40M80
CF5
SMD40M80
CF6
SMD40M80
CF14
SMD40M80
CF8
SMD40M80
CF1
SMD40M80
H4
H_O335X236D256X157
H6
H13
H10
H11
H3
H_C394BC217D177 H_C394BC217D177 H_C394BC217D177 H_C394BC217D177 H_S433D118
H9
H_R551X350D165
1
H8
H_S354D165
H22
H_S429D157
FD5
FIDUCAL
FD2
FIDUCAL
FD4
FIDUCAL
FD1
FIDUCAL
FD6
FIDUCAL
FD3
FIDUCAL
CF22
PAD_C197
1
CF21
PAD_C197
CF18
PAD_C197
CF17
PAD_C197
CF11
CF12
PAD_181X138 PAD_181X138
OUT
+3VS
+2.5VS
D_DVI_TXD0- 38
D_DVI_TXD0+ 38
D_DVI_TXD1D_DVI_TXD1+
+2.5VS
-IN
D_DVI_TXC- 38
D_DVI_TXC+ 38
D_DVI_TXD0D_DVI_TXD0+
D_DVI_TXD1- 38
D_DVI_TXD1+ 38
D_DVI_TXD2D_DVI_TXD2+
LM358A_SO8
D_DVI_TXD2- 38
D_DVI_TXD2+ 38
12
28
1
15
21
36
42
48
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N3
4
3
R412 1
2 0_0402_5%
PLT_RST#
R410 1
2 0_0402_5%
@
CH_VSWING
PLTRST_VGA#
AS
CH_RST#
R418
R415
43
44
SDVOB_B+
SDVOB_B-
46
47
SDVOB_CLK+
SDVOB_CLK-
3
2
25
AS
RESET#
VSWING
27
26
ATPG
SCEN
R416
10K_0402_5%
1
1.2K_0402_5%
SDVOB_G+
SDVOB_G-
HPDET
29
DVI_DET
SC_DDC
SD_DDC
11
10
DVI_SCLK
DVI_SDATA
SC_PROM
SD_PROM
9
8
SPD
SPC
5
4
1
2
1
2
1
2
DVI_TXC- 15
DVI_TXC+ 15
DVI_TXD0DVI_TXD0+
DVI_TXD0- 15
DVI_TXD0+ 15
DVI_TXD1DVI_TXD1+
DVI_TXD1- 15
DVI_TXD1+ 15
DVI_TXD2DVI_TXD2+
DVI_TXD2- 15
DVI_TXD2+ 15
DVI_DET 15,38
DVI_SCLK 15,38
DVI_SDATA 15,38
+2.5VS
+2.5VS
1
4
3
SDVOB_R+
SDVOB_R-
40
41
D_DVI_TXCD_DVI_TXC+
D_DVI_TXD0D_DVI_TXD0+
D_DVI_TXD1D_DVI_TXD1+
D_DVI_TXD2D_DVI_TXD2+
SDVO_SDAT
SDVO_SCLK
R116 1
R113 1
2 5.6K_0402_5%
2 5.6K_0402_5%
R413
10K_0402_5%
2
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N2
37
38
13
14
16
17
19
20
22
23
DVI_TXCDVI_TXC+
NC
NC
4
3
1
2
TLC#
TLC
TDC0#
TDC0
TDC1#
TDC1
TDC2#
TDC2
34
35
15,18 PLTRST_VGA#
6,16,18,20,32,33 PLT_RST#
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
SDVOB_INT+
SDVOB_INT-
DGND
DGND
AGND
AGND
AGND
TGND
TGND
AGND_PLL
8,15 PCIE_MTX_C_GRX_P3
8,15 PCIE_MTX_C_GRX_N3
4
3
32
33
7
30
31
39
45
18
24
6
8,15 PCIE_MTX_C_GRX_P2
8,15 PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
SDVOB_INT+
SDVOB_INTC433
0.1U_0402_16V4Z
PCIE_MTX_C_GRX_P0-R
1 RP1
PCIE_MTX_C_GRX_N0-R
2
0_0404_4P2R_5%
PCIE_MTX_C_GRX_P1-R
1 RP2
PCIE_MTX_C_GRX_N1-R
2
0_0404_4P2R_5%
PCIE_MTX_C_GRX_P2-R
1 RP3
PCIE_MTX_C_GRX_N2-R
2
0_0404_4P2R_5%
PCIE_MTX_C_GRX_P3-R
RP4
1
PCIE_MTX_C_GRX_N3-R
2
0_0404_4P2R_5%
8,15 PCIE_MTX_C_GRX_P1
8,15 PCIE_MTX_C_GRX_N1
0.1U_0402_16V4Z
C427
8,15 PCIE_MTX_C_GRX_P0
8,15 PCIE_MTX_C_GRX_N0
PCEI_GTX_C_MRX_P1
PCEI_GTX_C_MRX_N1
4 RP8
3
0_0404_4P2R_5%
4 RP7
3
0_0404_4P2R_5%
4 RP6
3
0_0404_4P2R_5%
4 RP5
3
0_0404_4P2R_5%
CH7307C_LQFP48
GM@
10K_0402_5%
AS
W=20 mils
SDVO_SDAT
SDVO_SCLK
SDVO_SDAT 8,15
SDVO_SCLK 8,15
R414
8,15 PCEI_GTX_C_MRX_P1
8,15 PCEI_GTX_C_MRX_N1
DVDD
DVDD
AVDD_PLL
TVDD
TVDD
AVDD
AVDD
AVDD
U30
U15B
5 +IN
D_DVI_TXCD_DVI_TXC+
DVI CONTROLLER
VSB
@ 10K_0402_5%
+3VALW
U22A
+1.5VS
C6741
2 @ 1000P_0603_50V8J
+1.5VS
C6761
2 @ 1000P_0603_50V8J
+3VS
+5VS
C6751
2 @ 1000P_0603_50V8J
+3VS
+5VS
C6771
2 @ 1000P_0603_50V8J
+3VS
DVI_DVDD_2.5V
O
+3VS
12
OE#
13
OE#
0.1U_0402_16V4Z
C360
2
14
C106
SN74LVC125APWLE_TSSOP14
+1.5VS
C6781
2 @ 1000P_0603_50V8J
+3VS
+1.5VS
C6801
2 @ 1000P_0603_50V8J
+1.8V
+5VS
C6811
2 @ 1000P_0603_50V8J
+1.8V
+5VS
C6821
2 @ 1000P_0603_50V8J
+1.8V
+5VS
C6831
2 @ 1000P_0603_50V8J
+1.8V
+5VS
C6841
2 @ 1000P_0603_50V8J
+1.8V
U22D
O
11
+3V
+5VS
C6791
2 @ 1000P_0603_50V8J
+3VS
+2.5VS
1
C105
0.1U_0402_16V4Z
C115
10U_1206_16V4Z
0.1U_0402_16V4Z
DVI_AVDD_3V
For EMI
C472
+3VS
1
C471
0.1U_0402_16V4Z
C473
10U_1206_16V4Z
SN74LVC125APWLE_TSSOP14
A
0.1U_0402_16V4Z
U34F
14
12
13
SN74LVC14APWLE_TSSOP14
Rev
0.2
EFL50 LA-2761
Date:
Document Number
Sheet
41
of
51
PC139
1
2
1
2
0.01U_0603_16V7K
10K_0603_5%
<BOM Structure>
PR1
1
2
1M_0603_1%
VIN
4 G
PD26
SBM1040-13_POWERMITE3
2
1
3
2
8
-
4
PR6
20K_0603_1%
PACIN 43
PZD1
LM393M_SO8
PR7
10K_0603_5%
PC6
RLZ4.3B_LL34
1000P_0603_16V7K
Vin Detector
RTCVREF
PR8
10K_0603_5%
PR9
1
2
1K_1206_5%
3.3V
1
33_1206_5%
VS
PQ34
DTC115EUA_SC70
33,43 ACOFF
PQ1
TP0610K_SOT23
1
PR19
1
1.5M_0603_5%
PR20
330K_0603_1%
8
2
PD6
GND
PC14
10U_0805_10V4Z
1 G920AT24U_SOT89
PC13
1U_0805_25V4Z
1
PR22
1000P_0603_50V7K
300_0603_5%
0.1U_0603_16V7K
RB751V_SOD323
LM393M_SO8
PC12
PR25
137K_0603_1%
634K_0603_1%
PC10
1000P_0603_50V8J
IN
6 @66.5K_0603_1%
2
OUT
PR23
1
2
34K_0603_1%
300_0603_5%
43 ACON
PR24
2 1
PC11
3.3V
PR27
CHGRTC
PU2
PR26
PR21
200_0805_5%
RB751V_SOD323
1
RTCVREF
PD5
2
PU1B
17,40,44,45 MAINPWON
PR18
2
10K_0603_5%
VL
2
22K_0603_5%
PR17
1
39 51ON#
B+
PQ33
DTC115EUA_SC70
PC8
0.1U_0805_25V7K
PC7
0.22U_1206_25V7K
PR14
100K_0603_5%
PR169
100K_0402_5%
1 2
CHGRTCP
PR11
1
RB751V_SOD323
PD3
BATT+
2
PR15
2
1K_1206_5%
1N4148_SOD80
1N4148_SOD80
PQ35
TP0610K_SOT23
1
3
1
PR12
2
1K_1206_5%
100K_0402_5%
PR168
PR10
2
1K_1206_5%
1
1
PD2
PD4
PR167
2
VIN
100K_0402_5%
VIN
ACIN 33
PACIN
100P_0603_50V8J
1000P_0603_50V7K
2200P_0603_50V7K
PC4
1000P_0603_50V7K
100P_0603_50V8J
1
PC5
PC3
PC2
1
2
PC1
2
SINGA 2DC-S026-B07_3P
5 G
1
2
22K_0603_5%
4 G
PR4
2
0_0603_5%
PU1A
PR5
AD IN
PR2
10K_0603_5%
PR3
84.5K_0603_1%
FBM-L11-453215-900LMA60T_2P
VS
VIN
PL1
ADPIN
2
SINGATRON 2DC-S026-I07
PCN1
1
1
G
2
5 G
VIN
3 G
PR170
PJP3
RTCVREF
Precharge detector
D
PJP5
PJP4
+1.5VALW
+1.8VP
PQ2
2
2N7002_SOT23
G
AC ADAPTOR
+1.8V
PR28
PACIN
1
47K_0603_5%
PAD-OPEN 3x3m
14.04
12.90
PAD-OPEN 3x3m
13.70
12.60
13.40
12.40
+1.5VALWP
PQ3
DTC115EUA_SC70
PJP6
+5VALW
PJP7
PAD-OPEN 3x3m
+0.9VP
+0.9VS
Precharge detector
BATTERY
5.85
5.74
5.64
4.74
4.65
4.60
PAD-OPEN 3x3m
PJP8
+3VALWP
+3VALW
PAD-OPEN 3x3m
+2.5VP
PJP10
+1.05VP
+2.5VS
PAD-OPEN 3x3m
+1.05VS
PAD-OPEN 3x3m
PJP9
+5VALWP
+5VALWP
Rev
EFL50 LA-2761
Sheet
D
0.1
42
of
51
P2
Iadp=0~2.84A
P3
B+
PQ5
AO4407_SO8
8
7
6
5
2
FBM-L11-453215-900LMA60T_2P
PC15
PC16
4.7UF_1206_25V
PC18
0.1U_0805_25V7K
ACOFF#
23
+INE2
CS
22
-INE2 VCC(o)
21
FB2
20
PR41
21
VH
19
FB1
VCC
RT
17
CC=0.5~3.3A
CV=12.6V(6 OR 9 CELLS LI-ION)
FSTCHG 33
11
OUTD
CTL
14
PR182
12
@0_0402_5%
-INC1
+INC1
13
PR186
@0_0402_5%
2
MB3887_SSOP24
VREF_MB39A126
PR48
47K_0603_1%
PC148 @10P_0402_25V8K
1
2
PR44
1
BATT+
0.02_2512_1%
PC28
0.1U_0402_16V7K
PR46
2
1
2 PC27
47K_0402_1% 1500P_0603_50V7K
15
SKS30-04AT_TSMA
FB3
PD9
OUTC1
PR45
1
10
10K_0603_1%
PL3
10U_SIQB125-100A_4.5A_20%
1
2
PD24
SKS30-04AT_TSMA
2
1
16
-INE3
+INE1
42 ACON
PC26
0.1UF_0805_25V
1
2
PR42
-INE1
PQ7
2
2.2_0402_5%
68K_0402_1%
PR185
@0_0402_5%
1
2
PR192
1
LXCHRG
18
0_0402_5%
ACOFF 33,42
1SS355_SOD323
0.1U_0603_25V7K
VREF
PR181
PQ8
DTC115EUA_SC70
PD8
2
1
2
PC29
4.7UF_1206_25V
2
1
PC23
1
2 PR184 1
@0_0402_5%
6
PC25
1
2
1
PQ9
2N7002_SOT23
OUT
AO4407_SO8
0.1U_0603_25V7K
PR47
PR37
2
2
10K_0603_5%
G
PR183
2 1
2200P_0603_50V7K
10K_0603_1%
100K_0603_1%
2
1SS355_SOD323
PC20
1
1
2
PR35
150K_0603_5%
PD7
PC22 PR40
21
PR43
2
133K_0603_1%
@0_0402_5%
PC24
0.1U_0603_25V7K
2
1
2
PR187
VREF_MB39A126
33 IREF
PC19
220P_0402_25V8K
1
2
ACOFF# 1
3
2
1
OUTC2 GND
1
1
PR39
10K_0603_1%
PR38
34K_0603_1%
0.1U_0603_25V7K
PQ36
2N7002_SOT23
24
10K_0603_1%
PC21
DTC115EUA_SC70
42 PACIN
+INC2
5
6
7
8
PR31
200K_0603_1%
2
G
-INC2
47K
1
PR36
PC140
0.1U_0603_25V7K
PQ37
VIN
10K_0603_5%
PC30
4.7UF_1206_25V
2
1
47K
PR33
1
2
47K_0603_5%
PU3
33 ADP_I
PR32 1
PR34
0_0603_5%
PQ38
DTA144EUA_SC70
PR30
47K_0402_5%
4.7UF_1206_25V
AO4407_SO8
8
7
6
5
1
2
3
2
1
0.02_2512_1%
1
2
3
1
2
3
PR29
8
7
6
5
VIN
PQ6
PL2
AO4407_SO8
B++
PC17
2200P_0603_50V7K
PQ4
MB39A126
MB39A126
PR49
PR50
150K_0603_0.1%
3
VS
2 PC31
22P_0603_50V8J
VMB
IREF=0.9323Icharge
IREF=0.466~3.1V FOR 6 CELL
300K_0603_0.1%
4.2V
2
1
2
PC32
2
8
P
PU4B
5
LM358A_SO8
PR54
PR53
2.2K_0603_5%
OVP voltage : LI
PC33
0.01U_0402_25V7K
105K_0603_0.5%
+
0
-
LM358A_SO8
PR52
187K_0603_1%
PU4A
3
33 BATT_OVP
0.1U_0603_50V4Z
PR51
340K_0603_1%
FOR 9 CELL
(BAT_OVP=0.124 *VMB)
CHARGER
Size
B
Date:
Document Number
Rev
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
D
0.1
43
of
51
BST5B
PD10
CHP202U_SC70
B+++
PQ11
2
1
2
47K_0402_5%
PC40
4.7U_1206_25V6K
AO4912_SO8
28
26
24
27
22
3HG
BST3A
LX3
PR64
0_0603_5%
DL3
PL5
SIL104R-100
DH3
7
2
2
PRO#
+3VALWP
2 1
10
2
8
7
6
5
45
SPOK
PR74
0_0402_5%
PR73
PR70
0_0402_5% @ 3.57K_0402_1%
1
3
11
1
2
PR173
LDO3
2
0_0402_5%
REF
25
PC54
0.047U_0603_16V7K
RLZ5.1B_LL34
PR65
PR172
100K_0603_5%
2
1
2
1
PZD4
12
2VREF_19998
PR72
47K_0402_5%
2 1
2
PC55
4.7U_0805_10V4Z
2
1
2
PR62
0_0402_5%
GND
23
VS
D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K
PC47
1U_0805_16V7K
1
2 1
2
PR63
PR69
499K_0402_1% 200K_0402_1%
LX5
PU5
DL5
ILIM5
OUT5 MAX1999EEI_QSOP28
FB5
BST3
N.C.
DH3
DL3
SHDN#
LX3
ON5
OUT3
ON3
FB3
SKIP#
PGOOD
ILIM3
1
2 1
2
PR60
PR67
499K_0402_1% 200K_0402_1%
15
19
21
9
1
PC50
0.22U_0603_10V7K
2
1
PR68
10.2K_0402_1%
PR71
0_0402_5%
PC48
150U_D_6.3VM
1
2
PR59
47_0402_5%
DH5
6
4
3
PC42
2200P_0402_50V7K
PR171 1
@4.7_1206_5%
1
2
PC46
2
1
BST5
16
2
+5VALWP
PQ10
1
2
3
4
2VREF_1999
14
VCC
BST5A
B+++
PC41
0.1U_0603_16V7K
PR58
0_0603_5%
TON
PL6
SIL104R-100
18
PC44
4.7U_0805_10V4Z
2
1
VL
170.1U_0603_50V4Z
LX5
13
DH5
20
PR56
5HG
V+
PR57
0_0603_5%
1
2
B+++
1U_1206_25V7K
PR55
0_0603_5%
LD05
DL5
PC43
4.7_1206_5%
2
1 2
1
AO4912_SO8
1
2
3
4
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
VL
8
7
6
5
PC37
4.7U_1206_25V6K
PC36
2200P_0402_50V7K
2
1
PC38
0.1U_0603_50V4Z
1
2
BST3B
PC34
0.1U_0603_50V4Z
1
2
PL4
FBM-L18-453215-900LMA90T_1812
B+
1
+
PC53
150U_D_6.3VM
PC141
0.047U_0603_16V7K
MAINPWON 17,40,42,45
PC51
1U_0603_16V6M
5V/3.3V/12V
Rev
EFL50 LA-2761
Sheet
D
0.1
44
of
51
VMB
PL7
PJP11
VL
PC57
0.01U_0603_50V7K
2
442K_0603_1%
8
2
PU6A
MAINPWON 17,40,42,44
O
4
LM393M_SO8
100K_0603_1%_TH11-4H104FT
PC59
PD14
BATT_TEMP 33
VL
100K_0603_1%
2
PC60
1000P_0402_50V7K
1U_0805_50V4Z
PR87
PH1
PD16
2
154K_0603_1%
TM_REF1
+3VALWP
2
2
PR80
150K_0603_1%
PR81
2
2
6.49K_0603_1%
PR78
PC58
0.1U_0603_50V4Z
PR83
PR84
PR86
1K_0603_1%
@BAS40-04_SOT23
PD15
VL
VS
PC56
1000P_0603_50V7K
PR85
17.8K_0603_1%
PR77
P_SUYIN_200275MR005G179ZL
PC152
1000P_0603_50V7K
EC_SMC1
EC_SMD1
3
2
1
SMC
SMD
GND
TSA
G
G
TS
100_0603_1%
7
6
FBM-L18-453215-900LMA90T_1812
BATT+
100_0603_1%
BATT+
PR88
100K_0603_1%
2
@BAS40-04_SOT23 @BAS40-04_SOT23
EC_SMB_CK1 33,35
+3VALWP
EC_SMB_DA1 33,35
PQ40
TP0610K_SOT23
VSB
8
5
PC144
0.1U_0805_25V7K
PC143
0.22U_1206_25V7K
2
22K_0603_5%
PU6B
LM393M_SO8
PR180
1
VL
PR176
100K_0603_5%
B+
PR175
100K_0603_1%
PR174
PC142
@ 0.1U_0402_16V7K
PQ39
D
2N7002_SOT23
2
G
S
0_0402_5%
1
2
44 SPOK
EFL50 LA-2761
Sheet
D
0.1
45
of
51
+5VS
1
PR111
78.7K_0603_1%
1
2
PC75
LXS
34
DLS
32
PR110
1
DHS1
SUS
CSP
40
CSP
SKIP
CSN
39
CSN
GND
GNDS
13
MAX1532AETL_TQFN40
PR120
10K_0402_1%
PQ23
HMBT2222A_SOT23
PC66
100U_25V_M
PC158
2200P_0402_50V7K
2
1
PC157
2200P_0402_50V7K
2
1
PC156
2200P_0402_50V7K
2
1
PC155
2200P_0402_50V7K
2
1
PC159
2200P_0402_50V7K
2
1
PR102
@ 100K_0402_1%
2
1
909_0402_1%
2
PR114
0_0402_5%
CPUB+
CHP202U_SC70
DHS
PR191
2
PR112
3K_0603_1%
1
PC76
0.022U_0402_16V7K
2
2.2_0402_5%
LXS
PR119
@ 100K_0402_1%
2
1
AO4408_SO8
PQ19
PL10
0.56UH_ETQP4LR56WFC_21A_20%
2
1
RHU002N06_SOT323
4
1
2
B
AO4410_SO8
3
2
1
PC154
2200P_0402_50V7K
2
1
1
2
5VS1
5
6
7
8
1 1
3
PQ20
2
G
3
PR116
2.2_0402_5%
PR118
20K_0402_1%
PC64
4.7U_1206_25V6K
BSTMA 2
18
11
909_0402_1%
2
PD18
PC84
2
1
27P_0402_50V8J
0.47U_0603_16V7K
2
470P_0402_50V8J
1
2
PC72
1000P_0402_50V7K
1
PC74
PR105
3K_0603_1%
1
FB
14
499_0402_1%
2
1
15
CCI
PC71
PR104
FB
CCV
499_0402_1%
2
1
TIME
PR97
PR103
OFS
AO4410_SO8
PQ16
DLM
12
ILIM
4.7_1206_5%
PR100
1
2
OAIN-
PC78
1
2
5
6
7
8
OAIN+
16
3
2
1
17
OAIN-
5
6
7
8
OAIN+
SHDN#
0.22U_0603_16V7K
S1
PC70
2
1
0.22U_0603_16V7K
CMN
33
0.01U_0402_25V7Z
2
38
35
CMN
DHS
S0
BSTS
PR121
100K_0402_1%
5 PSI#
CMP
0.001_2512_5%
37
5VS1
31
CMP
REF
2
G
PR117
0_0402_5%
1
2
18 PM_DPRSLPVR
PGND
VROK
TON
D5
25
PQ18
@RHU002N06_SOT323
1
2
PR115
1
PQ17
RHU002N06_SOT323
2
G
13,18 PM_STP_CPU#
19
PR113 100K_0402_1%
29
PC77
100P_0402_50V8J
270P_0402_50V7K
PR109
200K_0402_1%
10.7K_0402_1%
1
2
FB
27
DLM
+CPU_CORE
PL9
0.56UH_ETQP4LR56WFC_21A_20%
2
1
1
PQ22
PR122 909_0402_1%
2
1
PC73 1
LXM
D4
2
2.2_0402_5%
LXM
PC82
4.7U_1206_25V6K
2
1
D3
20
PR188
30.1K_0402_1%
1
21
DHM1
680P_0603_50V8J
4.7_1206_5%
VCC
PR108
2
28
PC81
4.7U_1206_25V6K
2
1
PR107
@ 100K_0402_5%
DHM
AO4408_SO8
PQ14
PR190
33,47 VR_ON
D2
PR94 2
2.2_0402_5%
PC149
22
4.7U_1206_25V6K
PC63
2
1
PR101 0_0402_5%
PR106
0_0402_5%
26
PC150
680P_0603_50V8J
PR189
2
1
1
2
36
BSTM
3
2
1
V+
D1
5
6
7
8
5 CPU_VID5
6,13,18 VGATE
D0
23
3
2
1
5 CPU_VID4
24
DHM4
0.22U_0603_16V7K
5 CPU_VID3
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
0_0402_5%
1
VCC
5 CPU_VID2
10
VDD
30
BSTMA
5 CPU_VID1
0_0402_5%
1
0_0402_5%
1
PR90 10_0402_5%
1
VCC
5 CPU_VID0
2.2U_0603_6.3V6K
PR91
PC68
1U_0603_16V6K
PU7
B+
PL8
FBM-L11-322513-201LMAT_1210
1
0_1206_5%
PC67
PR92
2
PR93
2
PR95
2
PR96
2
PR98
2
PR99
2
PC69
CPUB+
PR89
5VS1
100K_0402_5%
1
+3VS
PC85
0.47U_0603_16V7K
PR123 909_0402_1%
1
2
PC124
2
2
1000P_0402_50V7K
OAIN+
1
OAIN+
Title
+VCC_H_CORE
PC125
Size
B
1000P_0402_50V7K
Date:
5
Document Number
Rev
0.1
EFL50 LA-2761
Wednesday, April 20, 2005
Sheet
1
46
of
51
PL18
FBM-L11-322513-151LMAT_1210
1
2
PC130
4.7U_1206_25V6K
PR159
D
PC128
0.1U_0603_25V7K
B+
PC127
0.01U_0402_25V7Z
PU8
DH
FB
LX
VCC
DL
GND
BST
1
4.7U_0805_6.3V6K
PD25
1
2
3
4
AO4912_SO8
VCCP_LG2
2
4.7_0402_5%
PR162
PL17
1
1.8U_SIL104R-1R8_9.5A_30%
1
PQ32
G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A
1SS355_SOD323 PC134
0.1U_0603_25V7K
2
PR166
4.7K_0402_1%
+5VALWP
+1.05VP
PC138
3300P_0402_50V7K
PC133
0_0402_5%
@0.1U_0603_16V4Z
PR161
0_0402_5%
VCCP_HG1
2
1 VCCP_HG2 8
7
VCCP_PHASE
6
5
BSTVCCP
MAX8578EUB
+3VS
PR160
750_0402_5%
2
2
1
866_0402_1%
PR163
1
2
PC136
0.1U_0603_25V7K
PC135
6800P_0402_25V7K
680P_0603_50V8J
PC153
PR193
4.7_1206_5%
PR164
1
30_0402_5%
+
PC137
220U_D2_4VM_R15
SS
OCSET
VCCP_LG1
IN
2
1
10
PC132
PR165
4.12K_0402_1%
Size
Document Number
Rev
0.1
EFL50 LA-2761
Sheet
1
47
of
51
B++++
PL13
FBM-L11-322513-151LMAT_1210
1
1
2
1
2.2U_0805_10V6K
5
6
7
8
ISEN2
22
27
DL_1.8V
LGATE1
LGATE2
PGND1
PGND2
26
VOUT2
VSEN2
EN2
PG2/REF
20
19
21
16
OCSET2
18
PR154
1.74K_0402_1%
ISE_1.8V 1
2
PL15
+1.8VP
1.8U_SIL104R-1R8_9.5A_30%
2
PQ27
AO4702_SO8
PR146
0_0402_5%
PC117
0.01U_0402_25V7Z
4
3
2
1
PR143
11K_0402_1%
PC108
@ 0.1U_0402_16V7K
SYSON 33,37,40
1
PR152 0_0402_5%
PR147
@ 0_0402_5%
PR142
10K_0402_1%
2
PR158
80.6K_0402_1%
2
13
1
1
ISL6227CA-T_SSOP28
+
2
OCSET1
PR157
71.5K_0402_1%
PC123
@ 0.1U_0402_16V7K
11
VOUT1
VSEN1
EN1
PG1
VOUT_1.8V
VSE_1.8V
1
PR133
@ 0_0402_5%
2
1
2
PR155
10K_0402_1%
1 PR153 2
0_0402_5%
DDR
VSE_1.5V
+5VALWP
9
10
8
15
GND
VOUT_1.5V
PC114
330U_D_3VM
25
LX_1.8V
PHASE2
ISEN1
D
D
D
D
DH_1.8V
G
S
S
S
VCC
28
24
DL_1.5V
PHASE1
UGATE2
PQ26
AO4422_SO8
4
PR136
2.05K_0402_1%
1
2 ISE_1.5V
UGATE1
PC111
0.1U_0402_16V7K
2
1
23
DH_1.5V
BST_1.8V-1
1
2
PR148
0_0603_5%
BOOT2
4
3
2
1
PR135
0_0603_5%
PQ31
AO4702_SO8
LX_VGA
BOOT1
PC112
2
1
0.01U_0402_25V7Z
5
6
7
8
2BST_1.5V-16
17
D
D
D
D
SOFT2
G
S
S
S
S
S
S
G
1
2
3
4
1
PR141
0_0402_5%
SOFT1
0.01U_0402_25V7Z
PC100
0.1U_0402_16V7K
2
1
PR140
6.81K_0402_1%
PC107
0.01U_0402_25V7Z
PU9
12
VIN
BST_1.5V-2
PC106
2
1
14
D
D
D
D
S
S
S
G
8
7
6
5
1
2
3
4
AO4422_SO8
D
D
D
D
PC104
150U_D_2V18
PC126
8
7
6
5
PR156
2.2_0603_5%
BST_1.8V-2
PQ25
PL14
1.8U_SIL104R-1R8_9.5A_30%
1
2
PC110
4.7U_1206_25V6K
+5VALWP
PC103
0.1U_0603_25V7K
PD22
DAP202U_SOT323
+1.5VALWP
1
2
1
2
PR137
0_1206_5%
PC101
4.7U_0805_6.3V6K
B+
PC99
4.7U_1206_25V6K
PC97
0.1U_0603_25V7K
915PM(DISCRETE)
PR143=11K 1.8VP=1.867V
915GM (UMA)
PR143=10.5K 1.8VP=1.8V
1.5VP
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
4
3
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size
Document Number
EFL50 LA-2761
Rev
0.1
+3VALWP
PJP12
1
JUMP_43X118
PC115
4.7U_1206_25V6K
+5VALWP
RTCVREF
VIN
PGND
VFB
AGND
VTT
VCCA
PU11
1
VTT
REFEN
PC147
AGND
2200PF_0603_16V7K
PC146
1
2
PR178
200K_0402_1%
1U_0603_16V6K
2 PR179
CM8562IS_PSOP8
PC145
0.1U_0603_50V4Z
64.9K_0402_1%
PQ41
D
2N7002_SOT23
2
G
S
1
2
1
PC113
4.7U_1206_25V6K
PR177
10_0603_1%
+2.5VP
SUSP 40
PJ2
JUMP_43X118
+1.8VP
NC
VREF
NC
VOUT
NC
TP
+3VALWP
1
VCNTL
GND
PR149
1.07K_0402_1%
2
PC118
10U_1206_6.3V7K
VIN
2
1
PU12
1
PC119
1U_0603_6.3V6M
APL5331KAC-TR_SO8
A
+0.9VP
PC121
10U_1206_6.3V7K
PC122
@ 0.1U_0402_16V7K
PQ30
D
2N7002_SOT23
PC120
0.1U_0402_16V7K
2
G
PR151
1K_0402_1%
S
3
SUSP
40 SUSP
PR150
0_0402_5%
1
2
Title
1.8VP/0.9VP/2.5VP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
Size
Document Number
Rev
0.1
EFL50 LA-2761
Sheet
1
49
of
51
Fixed Issue
Add C663, C664, C665
Page 1 of 1 for HW
Rev.
PG#
0.2
0.2
11
Improve Audio
0.2
31
Modify List
VER
Phase
D
4
C
7
8
B
Security Classification
2005/03/08
Issued Date
Deciphered Date
2006/03/08
Title
PIR (HW)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
Rev
0.2
Sheet
1
50
of
51
Fixed Issue
Rev.
PG#
1
Modify PU8 IC
2
47
47
42
45
46
47
45
46
43
9
10
47
47
Phase
DVT
DVT
DVT
45
VER
Page 1 of 1
for PWR
42
Modify List
DVT
DVT
DVT
DVT
DVT2
1. add PC152
1. add PR190/191:2.2
1. add PR192:2.2
DVT2
PVT
PVT
8
9
PIR (PWR)
Size
Document Number
Rev
0.1
LA-2511
Date:
5
Sheet
1
51
of
51