Code No: O7A3ECO3 B-Tect 1 Near I Semeste Examinations; November/December, 2012 SWITCHING THEORY AND LOGIC DESIGN (COMMON TO BME, EEF, ETE, F.COMP.E, ICE) ‘Time: 3 hours Max. Marks: 80 Answer any five questions All ueStions carryiéiqual marks Perform the following: a) -105):0 + 120)10 using one’s and two's complement. Comment on the result, b) “coniplement, ©) B40 + (19)s0 using excess ~ 3 code. d) Determine whether single error has occurred and if so, corrects the error using Hamming code, for 1100010. (16) State and prove De - Morgan’s theorems using two variables. [848] Simplify the function F(w.x,y,z) = £m(1.4,6,7,8,9,10,11,15) using tabulation method. Implement the simplified function using gates. Simplify.the-following BopJean function.in SOP and POS form using K-map F(AB.CD) =Em( 3;4.9,13,14,15) #Ed62,5,10,12) 2 + 4 Design the following function F = Em (0, 1, 3, 5, 6, 8, 10, 13, 14) using a multiplexer and a decoder. 16] 8a) What is meant by multistage synthesis? Discuss the need and J applicability of multi stage synthesis. 116] Using SR flip-flops. design a synchronous counter which counts in the sequence 000, 119::101, 110, 001£040;000, 16) Construct the state diagram of a Mealey Pattern detector that can detect a serial string of 4 inputs, where each input is a four bit code. If the string of four bit codes is correctly received, then an output is generated. An incorrect input code patiem is to generate a only after regeivitig the sequei fle Considering weighing machine as an example, explain the steps in generation of its ASM chart Describe different blocks used within an ASM chart. llustrate how timing information.can be included jn an ASM chart, Uo} sitenees