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LCD TV
SERVICE MANUAL
CHASSIS : LJ91A
MODEL : 42LH35FD
42LH35FD-SF
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
Printed in Korea
CONTENTS
CONTENTS .............................................................................................. 2
PRODUCT SAFETY ..................................................................................3
SPECIFICATION ........................................................................................6
ADJUSTMENT INSTRUCTION ...............................................................10
EXPLODED VIEW .................................................................................. 17
SVC. SHEET ...............................................................................................
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
-2-
SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by
in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC
power line. Use a transformer of adequate power rating as this
protects the technician from accidents resulting in personal injury
from electrical shocks.
It will also protect the receiver and it's components from being
damaged by accidental shorts of the circuitry that may be
inadvertently introduced during the service operation.
If any fuse (or Fusible Resistor) in this TV receiver is blown,
replace it with the specified.
When replacing a high wattage resistor (Oxide Metal Film Resistor,
over 1W), keep the resistor 10mm away from PCB.
AC Volt-meter
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
-3-
1.5 Kohm/10W
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service
manual and its supplements and addenda, read and follow the
SAFETY PRECAUTIONS on page 3 of this publication.
NOTE: If unforeseen circumstances create conflict between the
following servicing precautions and any of the safety precautions on
page 3 of this publication, always follow the safety precautions.
Remember: Safety First.
General Servicing Precautions
1. Always unplug the receiver AC power cord from the AC power
source before;
a. Removing or reinstalling any component, circuit board
module or any other receiver assembly.
b. Disconnecting or reconnecting any receiver electrical plug or
other electrical connection.
c. Connecting a test substitute in parallel with an electrolytic
capacitor in the receiver.
CAUTION: A wrong part substitution or incorrect polarity
installation of electrolytic capacitors may result in an
explosion hazard.
2. Test high voltage only by measuring it with an appropriate high
voltage meter or other voltage measuring device (DVM,
FETVOM, etc) equipped with a suitable high voltage probe.
Do not test high voltage by "drawing an arc".
3. Do not spray chemicals on or near this receiver or any of its
assemblies.
4. Unless specified otherwise in this service manual, clean
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable
non-abrasive applicator; 10% (by volume) Acetone and 90% (by
volume) isopropyl alcohol (90%-99% strength)
CAUTION: This is a flammable mixture.
Unless specified otherwise in this service manual, lubrication of
contacts in not required.
5. Do not defeat any plug/socket B+ voltage interlocks with which
receivers covered by this service manual might be equipped.
6. Do not apply AC power to this instrument and/or any of its
electrical assemblies unless all solid-state device heat sinks are
correctly installed.
7. Always connect the test receiver ground lead to the receiver
chassis ground before connecting the test receiver positive
lead.
Always remove the test receiver ground lead last.
8. Use with this receiver only the test fixtures specified in this
service manual.
CAUTION: Do not connect the test fixture ground strap to any
heat sink in this receiver.
Electrostatically Sensitive (ES) Devices
Some semiconductor (solid-state) devices can be damaged easily
by static electricity. Such components commonly are called
Electrostatically Sensitive (ES) Devices. Examples of typical ES
devices are integrated circuits and some field-effect transistors and
semiconductor "chip" components. The following techniques
should be used to help reduce the incidence of component
damage caused by static by static electricity.
1. Immediately before handling any semiconductor component or
semiconductor-equipped assembly, drain off any electrostatic
charge on your body by touching a known earth ground.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
-4-
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through
which the IC leads are inserted and then bent flat against the
circuit foil. When holes are the slotted type, the following technique
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique
as outlined in paragraphs 5 and 6 above.
Removal
1. Desolder and straighten each IC lead in one operation by gently
prying up on the lead with the soldering iron tip as the solder
melts.
2. Draw away the melted solder with an anti-static suction-type
solder removal device (or with solder braid) before removing the
IC.
Replacement
1. Carefully insert the replacement IC in the circuit board.
2. Carefully bend each IC lead against the circuit foil pad and
solder it.
3. Clean the soldered areas with a small wire-bristle brush.
(It is not necessary to reapply acrylic coating to the areas).
"Small-Signal" Discrete Transistor
Removal/Replacement
1. Remove the defective transistor by clipping its leads as close as
possible to the component body.
2. Bend into a "U" shape the end of each of three leads remaining
on the circuit board.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder
each connection.
Power Output, Transistor Device
Removal/Replacement
1. Heat and remove all solder from around the transistor leads.
2. Remove the heat sink mounting screw (if so equipped).
3. Carefully remove the transistor from the heat sink of the circuit
board.
4. Insert new transistor in the circuit board.
5. Solder each transistor lead, and clip off excess lead.
6. Replace heat sink.
Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
-5-
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range
3. Test method
4. Electrical specification
4.1 General Specification
No
1.
Item
Receiving System
Available Channel
Specification
1) SBTVD / NTSC / PAL-M / PAL-N
1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
1) AC 100 ~ 240V 50/60Hz
Central and South AMERICA
32 inch Wide (1920 X 1080)
37 inch Wide (1920 X 1080)
42 inch Wide (1920 X 1080)
32LH35FD-SF
37LH35FD-SF
42LH35FD-SF
Aspect Ratio
Tuning System
Module
16:9
FS
LC320WUN-SAB2 (VITIAZ 3)
LC370WUE-SBB2 (VITIAZ 4)
LC420WUE-SBC1 (VITIAZ 4)
32LH35FD-SF
37LH35FD-SF
42LH35FD-SF
Operating Environment
1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %
2.
3.
4.
5.
6.
7.
8.
9.
10.
Input Voltage
Market
Screen Size
Storage Environment
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
-6-
Remark
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
Item
Max Luminance
(Center 1-point / Full White
Pattern)
Luminance uniformity
Color
RED
coordinate
GREEN
Module
Set
BLUE
WHITE
Color
Temperature
400
500
1400:1
80000:1
0.274
0.281
0.283
0.291
0.311
0.327
0.276
0.283
0.285
0.293
0.313
0.329
Cool
Warm
Color Distortion, DG
Color Distortion, DP
Color S/N, AM/FM
Color Killer Sensitivity
Max
Unit
cd/m
Full white
Typ.
+0.03
N/A
NORMAL
DCR
0.278
0.285
0.287
0.295
0.315
0.331
10.0
10.0
43.0
-80
Remark
LC420WUE-SBC1(V4)
cd/m
%
0.638
0.334
0.290
0.606
0.144
0.064
0.279
0.292
1000:1
50000:1
Standard
13.
14.
15.
16.
Typ
500
77
Typ.
-0.03
X
Y
X
Y
X
Y
X
Y
Min
400
<Test Condition>
85% Full white pattern
** The W/B Tolerance is
0.015 for Adjustment
Dynamic contrast : off
Dynamic color : off
OPC : off
%
deg
dB
dBm
Resolution
720*480
720*480
720*480
720*480
1280*720
1280*720
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
H-freq(kHz)
15.73
15.73
31.47
31.47
45.00
44.96
33.75
33.72
67.500
67.432
27.000
26.97
33.75
33.71
56.25
28.125
V-freq.(kHz)
60
59.94
60
59.94
60.00
59.94
60.00
59.94
60
59.939
24.000
23.976
30.000
29.97
50.000
25.000
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
-7-
Pixel clock
13.5135
13.5
27.027
27.0
74.25
74.176
74.25
74.176
148.50
148.352
74.25
74.176
74.25
74.176
148.5
74.25
Proposed
SDTV ,DVD 480I
SDTV ,DVD 480I
SDTV 480P
SDTV 480P
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
Resolution
PC
1.
640*350
2.
720*400
3.
640*480
4.
800*600
5.
800*600
6.
1024*768
7.
1280*768
8.
1360*768
9.
1280*1024
10. 1600*1200
11 1920*1080
H-freq(kHz)
31.468
31.469
31.469
35.156
37.879
48.363
47.776
47.712
63.981
75.00
67.5
V-freq.(Hz)
Pixel clock(MHz)
70.09
70.08
59.94
56.25
60.31
60.00
59.870
60.015
60.020
60.00
60
25.17
28.32
25.17
36.00
40.00
65.00
79.5
85.50
108.00
162
138.5
Proposed
EGA
DOS
VESA(VGA)
VESA(SVGA)
VESA(SVGA)
VESA(XGA)
CVT(WXGA)
VESA (WXGA)
VESA
VESA (UXGA)
HDTV 1080P
reduced timing
DDC
X
O
O
O
O
O
O
O
O
O
O
Resolution
PC
640*350
720*400
640*480
800*600
800*600
1024*768
1280*768
1360*768
1280*1024
1600*1200
1920*1080
DTV
720*480
720*480
1280*720
1280*720
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
1920*1080
H-freq(kHz)
V-freq.(Hz)
Pixel clock(MHz)
Proposed
31.468
31.469
31.469
35.156
37.879
48.363
47.776
47.712
63.981
75.00
66.587
70.09
70.08
59.94
56.25
60.31
60.00
59.870
60.015
60.020
60.00
59.934
25.17
28.32
25.17
36.00
40.00
65.00
79.5
85.50
108.00
162
138.5
EGA
DOS
VESA(VGA)
VESA(SVGA)
VESA(SVGA)
VESA(XGA)
CVT(WXGA)
VESA (WXGA)
VESA (SXGA)
VESA (UXGA)
HDTV 1080P
31.50
31.47
45.00
44.96
33.75
33.72
67.500
67.432
27.000
26.97
33.75
33.71
56.25
28.125
60
59.94
60.00
59.94
60.00
59.94
60
59.939
24.000
23.976
30.000
29.97
50.000
25.000
27.027
27.00
74.25
74.176
74.25
74.176
148.50
148.352
74.25
74.176
74.25
74.176
148.5
74.25
SDTV 480P
SDTV 480P
HDTV 720P
HDTV 720P
HDTV 1080I
HDTV 1080I
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
HDTV 1080P
DDC
X
O
O
O
O
O
O
O
O
O
O
-8-
8.
9.
10.
11.
Item
Input Mode
Volume Level
Mute
Aspect Ratio
System Color
Booster
Picture
Picture Mode
Backlight
Contrast
Brightness
Sharpness
Color
Tint
Color Temperature
Picture Reset
Audio
Sound Mode
Auto Volume
Clear Voice
SRS TruSurround XT
Balance
TV Speaker
Time
Clock
Off Timer / On Timer
Sleep Timer / Auto Sleep
Option
Language (Menu/Audio)
SimpLink
Key Lock
Caption
Set ID
Channel Memory
Condition
TV02CH
10
Off
16:9
PAL-M
On
Vivid
100
100
50
70
70
0
Cool
Standard
Off
Off
Off
0
On
Auto
Off
Portugues
On
Off
Off
1
RF : 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13,
14, 30, 51, 63
CATV : 15, 16, 17
Item
Con tent
Length (D)
Width (W)
1.
Product
Dim ension
Before Packing
After Packing
2.
Product
Weight
Height (H)
Unit
mm
297
715.4
mm
1028
88.7
1330
228
658.6
770
mm
mm
Without Stand
With Stand
1314
212
18.0
748
mm
Kg
Without Stand
With Stand
16.2
Kg
Without Stand
21.8
Kg
With Stand
Kg
Without Stand
With BOX
20.0
40ft(H-CUBIC)
40ft
Container
Loading
Quantity
Individual or Palletizing
4.
Stand Assy
Swivel Degree
Swivel Force
Indi.
270
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
With Stand
1028
Only SET
3.
Remark
Woo den
Indi.
360
+/- 20 degree
0.8Kg f ~ 2.5Kgf
-9-
Wooden
-
ADJUSTMENT INSTRUCTION
1. Application Range
2. Notice
1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
2) Adjustment must be done in the correct order. But it is
flexible when its factory local problem occurs. .
3) The adjustment must be performed in the circumstance of
25 5C of temperature and 6510% of relative humidity if
there is no specific designation.
4) The input voltage of the receiver must keep 100~220V,
50/60Hz.
5) Before adjustment, execute Heat-Run for 5 minutes.
Pin
TCK
TMS
TDI
11
TDO
13
15
VCC
18 TO 25
GND
3. Adjustment Items
3.1 PCB Assembly adjustment
CPLD DOWNLOAD
Adjust 480i Comp1
Adjust 1080p Comp1/RGB
- If it is necessary, it can adjustment at Manufacture Line
- You can see set adjustment status at 1. ADJUST
CHECK of the In-start menu
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 10 -
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 11 -
Command
1. Inter the
ad 00 00
d 00 OK00x
Set response
kb 00 40
kb 00 60
Adjustment mode
2. Change the
Source
3.Start Adjustment ad 00 10
4.Return the
Response
5.Read
Adjustment data
6.Confirm
ad 00 20
000000000000000000000000007c007b006dx
(main)
ad 00 30
000000070000000000000000007c00830077x
ad 00 99
Adjustment
7. End of Adjustment ad 00 90
d 00 OK90x
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 12 -
5. Factory Adjustment
5.1 Manual Adjust Component 480i/1080p
RGB 1080p
O Summary : Adjustment component 480i/1080i and RGB
1080p is Gain and Black levelsetting at Analog
to Digital converter, and compensate the RGB
deviation
O Using instrument
- Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator (It can output 480i/1080i
horizontal 100% color bar pattern signal, and its output
level must setting 0.7V0.1V p-p correctly)
5.2 EDID
(The
Extended
Display
Identification Data) / DDC (Display Data
Channel) Download.
<Pic.4 Adjustment pattern : 480i / 1080p 60Hz Pattern >
O Summary
It is established in VESA, for communication between
PC and Monitor without order from user for building user
condition. It helps to make easily use realize Plug and
Play function.
For EDID data write, we use DDC2B protocol.
* You must make it sure its resolution and pattern cause every
instrument can have different setting
O Adjustment method 480i Comp1, Adjust 1080p
Comp1/RGB (Factory adjustment)
ADC 480i Component1 adjustment
- Check connection of Component1
- MSPG-925FA Model: 209, Pattern 65
Set Component 480i mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to NORMAL
ADC 1080p Component1 / RGB adjustment
- Check connection both of Component1 and RGB
- MSPG-925FA Model: 225, Pattern 65
Set Component 1080p mode and 100% Horizontal Color
Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to NORMAL
After get each the signal, wait more a second and enter
the IN-START with press IN-START key of Service
remocon. After then select 7. External ADC with
navigator button and press Enter.
After Then Press key of Service remocon Right
Arrow(VOL+)
You can see ADC Component1 Success
Component1 1080p, RGB 1080p Adjust is same
method.
Component 1080p Adjustment in Component1 input
mode
RGB 1080p adjustment in RGB input mode
If you success RGB 1080p Adjust. You can see ADC
RGB-DTV Success
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
O Auto Download
After enter Service Mode by pushing ADJ key,
Enter EDID D/L mode.
Enter START by pushing OK key.
Caution: - Never connect HDMI & D-sub Cable when the user
downloading .
- Use the proper cables below for EDID Writing.
- 13 -
Item
Download
ModeIn
CMD 1
CMD 2
Data 0
Download
*Note1
*Note2
Adjustment
Confirmation
O Manual Download
Write HDMI EDID data
- Using instruments
=> Jig. (PC Serial to D-Sub connection) for PC, DDC
adjustment.
=> S/W for DDC recording (EDID data write and
read)
=> D-sub jack
=> Additional HDMI cable connection Jig.
Main
PC
B/D
RGB cable
Pic.3) For write EDID data, setting Jig and another instruments.
EDID data for LJ91D Chassis (Model name = LG TV)
- HDMI-1 EDID table (0x3D, 0x2C)
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 14 -
F u l l W h i t e P at t er n
C A -100+
COL OR
A NA L Y ZER
T Y PE ; C A -100+
R S-232C
00
10
wb
wb
00
00
1f
20
wb
wb
00
00
2f
ff
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
wb
wb
- 15 -
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 16 -
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
900
A10
320
Copyright
LG Electronics. Inc. All right reserved.
Only for training and service purposes
- 17 -
301
310
302
500
510
300
303
120
200
200T
A2
A5
LV1
530
550
802
803
801
806
804
805
540
521
400
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by
in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
Block Diagram
Cable
(Front-end)
NANDFlash
NANDFlash
IC101
IC101
128MB
128MB
(System + Scalar)
ISDB-T/
PAL/NTS
C
TU101/2
DDR2
DDR2
256MB
256MB
DDR2
DDR2
256MB
256MB
1080P
LVDS
Serial
TP1
CVBS_LIVE
SPDIF
2069_L/R_OUT1
CVBS1/
SIF1
TP1
TP2
MPEG_TS
USB2.0
HDMI0_BCM
SIF_LIVE
CVBS1
CVBS2
AV1 LR
AV2 LR
COMP1_LR
BCM3556
BCM3556
IC100
IC100
(400M
(400M MIPS)
MIPS)
X-TAL
54MHz
(Etc)
COMP2_LR
RGB_LR
I2S_BCM
(Comp1/2, RGB)
SIDE HDMI_PORT4
UI_HW_PORT1
UI_HW_PORT2
I2C
HDMI4
HDMI2
NTP3100L
NTP3100L
IC500
IC500
TDA9996
TDA9996
IC601
IC601
HDMI0_BCM
MICOM
MICOM
IC407
IC407
X-TAL
24MHz
HDMI1
Power-Up Sequence
Min 100us
95%
Min 10ms
Reset Input
Power-Up Sequence
Applications must guarantee all 4 conditions mentioned below during power-on of SAA7164
Condition 1:
RESET has to be LOW, when the 1.2 V digital and the 3.3 V digital supplies become available
RESET has to remain LOW for at least 5 ms after all supplies became available.
Condition 2:
Either power-on the 1.2 V analog and 3.3 V analog supplies simultaneously
Or power-on the 1.2 V analog supplies after the 3.3 V analog supplies
Condition 3:
Either power-on the 1.2 V analog, the 1.2 V digital and 3.3 V digital supplies simultaneously
Or power-on the 1.2 V digital supplies after the 1.2 V analog and 3.3 V digital supplies.
Condition 4:
Either power-on the 2.6 V digital supplies after the 3.3 V digital supplies
Or power-on the 1.2 V digital supplies simultaneously or after the 2.6 V digital supplies.
Power-Up Sequence
Measured Waveform
Y
Check Power connector
Y
Check All Voltage Level
at L804/L807/L808
Replace one of
IC807/IC802/L815/L823/L810/L826
& Recheck
Y
Check Voltage Level 3.3V at L815
Y
Check Voltage Level 2.5V at L827
Y
Check Voltage Level 1.8V
at IC804 #6 pin
Replace one of
IC809/IC800/L803/L816/L819/L801
& Recheck
Y
Check Voltage Level 1.2V at L803
Y
Check X201 Clock 54MHz
Replace X201
Y
Check signal transition
at IC101 #9 pin
Y
Replace IC101 Flash Memory
Y
Check Power connector
Y
Check 12V Voltage Level
at L902
Replace one of
Q900/Q901/Q902/L903
& Recheck
Maybe BCM3556(IC100)
has troubles
Y
Check 12V Voltage Level at L903
Y
Check P903
#16(TXAC-), #17(TXAC+),
#32(TXBC-), #33(TXBC+)
Y
Check LVDS Cable
Replace Cable
Y
Check Voltage LCD Module
Check RF Cable
Y
Check Tuner(TU1101) Power
(5.0V, 2.5V, 3.3V, 1.2V)
Replace one of
L1108/L1105/L1100/L1107/L1109
& Recheck
Y
Check TP Clock, Data, Sync
R1114, R1103, R1102
Y
Maybe BCM3556(IC100)
has problems
Check RF Cable
Y
Check Tuner Power
(5.0V, 2.5V, 3.3V, 1.2V)
Replace one of
L1108/L1105/L1100/L1107/L1109
& Recheck
Y
Check CVBS Signal
TU1101 #9 Pin
Y
Check CVBS Signal
C102
Y
Maybe BCM3556(IC100)
has problems
Y
Check Component Signal
R754, R755, R756
R741, R744, R745
Y
Check Component Signal
C127, C128, C129
C130, C131. C132
Replace Jack
Replace one of
R754, R755, R756
/L705/L706/L707
R741, R744, R745
/L702/L703/L704
& Recheck
Replace it
Y
Maybe BCM3556(IC100)
has problems
Replace Jack
Y
Check RGB Signal
L708, L709, L710
Y
Check Sync Signal
IC702 #11, #3
Replace it or re-burn
& Recheck
Y
Check EEPROM (IC703)
Y
Maybe BCM3556(IC100)
has problems
Replace Jack
Y
Check CVBS Signal
C103
Replace one of
R729/R706/C711/D703
& Recheck
Y
Maybe BCM3556(IC100)
has problems
Replace Jack
Y
Check IC601 Voltage Level
+1.8V_HDMI, +3.3V_HDMI
Y
Check I2C Signal
R670/R671
/R605/R606/R616/R617/R639/R64
2
Replace one of
L601/L602/R665/R663
Y
Maybe BCM3556(IC100)
has problems
Replace Speaker
Y
Check Connector P500
Replace Connector
Y
Check Signal
L504, L506
Replace one of
L508/L509/L510/L511/L504/L506
& Recheck
Y
Check IC500 Power
20V, 3.3V, 1.8V
L500,L501,L502,L503,IC504
Y
Check BCM3556 I2S Output
R148, R149, R150
Y
Maybe BCM3556(IC100)
has problems
Y
Follow procedure All source
audio trouble shooting
Replace one of
L1108/L1105/L1100/L1107/L1109
& Recheck
Y
Check Tuner Power
(5.0V, 2.5V, 3.3V, 1.2V)
Y
Check SIF Signal
TU1101 #8 Pin
Y
Check SIF Signal
C1139
Replace one of
R1124,R1125,C1137,Q1101,R112
9
Recheck
Y
Check SIF Signal
C141
Y
Follow procedure All source
audio trouble shooting
Y
Check Jack JK700/JK703/JK704
Replace Jack
Y
Check Signal
C204, C205
C206, C222
C210, C211
C217, C218
C220, C221
Replace IT
Y
Follow procedure All source
audio trouble shooting
Y
Re-download EDID data
Replace IC601
Y
Follow procedure All source
audio trouble shooting
Replace Jack
Y
Check 5V voltage level at L1407
Replace one of
L1407/IC1402 & Recheck
Y
Maybe BCM3556(IC100)
has problems. Replace It.
Exception
- USB power could be disabled by inrushing current
- In this case, remove the device and try to reboot the TV (AC power off/on)
Y
Check USB HDD more 40Gbyte
Replace HDD
Y
Maybe IC1402 has problems
Replace It.
J
+5.0V_ST
D733
ENKMC2838-T112
A1
COMPONENT1/2,AV1
R,G,B PC INPUT
R750
2.7K
RGB_VSYNC
[RD]O-SPRING-L
6F
[RD]CONTACT-L
4A
[RD]O-SPRING-S_2
3A
[RD]CONTACT-S_2
VCC
D3A
D3B
13
14
C745
25V 1uF
COMP2_INCM
3:T22
R752
100
COMP2_R_IN
D720
ADMC5M03200LR747
470K
5.6V
5.1
R732
470K
R738
100
OPT
JP734
DDC_GND
C752
100pF
COMP1_INCM
5:H33:T24
COMP1_R_IN
C731
1uF
25V
5:H3
OPT
SHILED
5.1
R773
R774
RGB_0OHM
DDC_CLOCK
R771
L710-*1
SYNC_GND
L710
GND_1
D725
ADUC30S03010L
30V
V_SYNC
C759
47pF
D734
ADMC5M03200L
5.6V
15
R749
D710
ADMC5M03200L
5.6V
TP3
14
R_VID_INCM
3:T15
C751
100pF
C738
100pF
C715
100pF
R728
RGB_R
16
5F
R710
100
C707
1uF
25V
11:M19
RGB_SW
9:H6
1K
R778
C768
100pF
AV1_INCM 3:T20
AV1_R_IN
5:E2
R702
470K
D702
ADMC5M03200L
5.6V
BG1608B121F
120ohm
NC
[RD]CONTACT-S_1
R730
470K
D719
ADMC5M03200L
R748
5.6V
470K
L709
L709-*1
0 RGB_0OHM
BLUE
[RD]O-SPRING-S_1
D709
ADMC5M03200L
5.6V
5:H3
COMP1_L_IN
D724
ADUC30S03010L
30V
H_SYNC
R737
100
TP2
C758
47pF
R777
2.7K
GREEN
C729
25V 1uF
5:H3
L708-*1
D723
L708
RGB_0OHM
ADUC30S03010L
0
30V
BG1608B121F
120ohm
RGB_G
G_VID_INCM
3:T15
R751
100
TP1
C757
47pF
BLUE_GND
C744
25V 1uF
R705
5.1
3N
Q3
74F08D
IC702
11:M19
COMP2_L_IN
4N
12
D2B
B_VID_INCM
3:T15
C748
D3.3V
BG1608B121F
120ohm
RGB_B
27pF
C743
27pF
C736
[WH]C-LUG-S_2
11:M18
DDC_DATA
AV1_L_IN
5:E2
C714
100pF
R708
470K
11:M18
COMP2_Pr
11:M17
27pF
13
D704
ADMC5M03200L
5.6V
[RD]E-LUG
11
R755
15
L705
L703
27pF
C724
D727
ADUC30S03010L
30V
R763
10K
[WH]C-LUG-L
COMP1_Pr
D715
ADLC 5S 03 015
5.5V
R714
100
D721
ADLC 5S 03 015
5.5V
R762
10K
GREEN_GND
7G
9F
D726
ADUC30S03010L
30V
R741
15
270nH
C712
25V 1uF
[WH]C-LUG-S_1
C737
C711
47pF
OPT
270nH
8M
8B
C750
[WH]E-LUG
27pF
27pF
C742
27pF
C727
5:E2
D732
ADLC 5S 03 015
5.5V
11:M18
RED
[RD]C-LUG-S
9G
R706
15
R729
75
R772
22
D731
ADLC 5S 03 015
5.5V
RED_GND
8C
RGB_HSYNC
COMP2_Pb
11:M16
GND_2
[RD]C-LUG-L
D703
ADLC 5S 03 015
5.5V
R766
22
R761-*1
1K
12
7H
TP7
12:E4
22
11
[YL]CONTACT-S
R761
[YL]O-SPRING-S
3L
L704
27pF
DDC_SDA
4L
COMP1_Pb
D714
ADLC 5S 03 015
5.5V
AV1_CVBS_INCM
3:T19
AV1_CVBS_IN
12:J4
12:E5
SDA
[YL]E-LUG
D718
ADLC 5S 03 015
5.5V
R745
15
270nH
[BL]C-LUG-S
DDC_SCL
R756
15
270nH
9L
RGB_HV_1K
L707
8D
VSS
RGB_HV_1K
/W_PROTECT
SCL
[BL]C-LUG-L
22 R759-*1
1K
WC
11:K10
COMP1_Y
11:M18
R744
15
27pF
C735
E2
JK701
[BL]E-LUG
7J
27pF L702
C723
E1
KCN-DS-1-0089
9M
D712
ADLC 5S 03 015
5.5V
RGB_HS
D0B
[GN]CONTACT-S
C749
COMP1_VID_INCM
11:M17
270nH
11:K10
COMP2_Y
11:M17
27pF
Q0
[GN]O-SPRING-S
3E
27pFL706
C741
D1A
4E
R754
15
270nH
D717
ADLC 5S 03 015
5.5V
D1B
[GN]CONTACT-L
C761
4700pF
R759
[GN]O-SPRING-L
6K
RGB_VS
5K
COMP2_VID_INCM
11:M16
D2A
Q2
TP5
C760
0.1uF
VCC
JP722
9:H4
10
1K
R753
C747
100pF
8
[GN]E-LUG
TP4
9:H4
PPJ227-01
9N
E0
COMP2_SW
D722
ADMC5M03200L
5.6V
JK700
9:H5
1K
R740
C734
100pF
GND
D701
ADMC5M03200L
5.6V
COMP1_SW
D716
ADMC5M03200L
5.6V
D0A
R736
2.7K
COMPOSITE1_SW
1K
R711
C708
100pF
R707
2.7K
A2
IC703
M24C02-RMN6T
C710
22uF
16V
4.7K
R768
D3.3V
D3.3V
+5.0V
Q1
D3.3V
COMPONENT2
4.7K
R765
COMPONENT1
0.1uF
C753
AV
10
C739
100pF
[YL]U_CAN
D707
ADMC5M03200L
5.6V
[WH]C_LUG
C719
2B
[WH]U_CAN
1uF
25V
4C
[RD]O_SPRING
5C
[RD]CONTACT
2C
[RD]U_CAN
GAS6
5:J4
R725
100
C721
100pF
R734
5.1
SIDE_INCM
3:T18
C720
SIDE_R_IN
PC AUDIO
5:J4
C722
100pF
JK703
PEJ024-01
D708
ADMC5M03200L
5.6V
INCM
RS-232C
6A
T_TERMINAL1
7A
B_TERMINAL1
4
5
T_SPRING
16
15
VCC
RS232C_TxD
GND
C703 0.1uF
C1-
C2+
14
13
DOUT1
RIN1
C2-
V-
12
11
10
SHIELD_PLATE
R742
220
1
6
2
D713
ADUC30S03010L
30V
C718
8
4
9
47pF
C726
47pF
C733
10
D3.3V
+5.0V
JK702
JST1223-001
JP729
DIN2
+5.0V_ST
ROUT2
R723
0
R724
10K
12:D4;14:U23 IR
1/16W
OPT
5%
OPT
R727
3.3K
R704
100
R733
100K
VCC
JP730
Q702
2SC3052
US_Commercial
Q701
2SC3052
OPT
R735
100K
US_Commercial
BCM_SPDIF_OUT
US_Commercial
GND
JP732
R739
3.3K
US_Commercial
+5.0V_ST
R703
100
JP718
R764
1K
D711
ADUC30S03010L
30V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
5:J4
C767
100pF
220pF
R776
100
Fiber Optic
R770
470K
1uF
25V
VINPUT
RIN2
C766
100pF
C764
D730
ADMC5M03200L
5.6V
C702
DOUT2
3:T14
5:J4
R775
100
KCN-DS-1-0088
R743
220
C717
220pF
DIN1
R769
470K
1uF
25V
PC_L_IN
JK705
TxD
OPT
R719
100 OPT
ROUT1
T_TERMINAL2
14:X8
14:X7
RxD
R718
100
C704
B_TERMINAL2
6B
8
RS232C_RxD
0.1uF
V+
7B
D729
ADMC5M03200L
5.6V
C1+
R717
0
C706
0.1uF
PC_INCM
C763
PC_R_IN
R_SPRING
IC701
MAX3232CDR
R713
4.7K
R716
0
5.1
R709
4.7K
R767
11:W20
D728
ADUC30S03010L
30V
OPT
C762
0.1uF
FIX_POLE
C701
0.1uF
L701
BLM18PG121SN1D
E_SPRING
JP720
R726
100
1uF
25V
R722
470K
+3.3V_ST
0.1uF
GAS5
SIDE_L_IN
R721
470K
0.1uF
GAS4
COMPOSITE2_SW
9:H6
1K
R720
C713
100pF
D705
ADMC5M03200L
5.6V
GAS3
R712
2.7K
3B
C705
MDS61887701
5A
2A
D3.3V
MDS61887701
[YL]O_SPRING
[YL]CONTACT
3:T19
MDS61887701
4A
5:G4
SIDE_CVBS_INCM
TP6
GAS2
SIDE_CVBS_IN
C716
47pF
50V
OPT
R701
75
MDS61887701
D706
ADLC 5S 03 015
5.5V
JP721
R715
JK704
PPJ218-01
MDS61887701
15
SIDE_AV
GAS1
MDS61887701
BRAZIL DVR DV
VIDEO EXT.INPUT
2009.01.20
1
17
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
* HDMI CEC
29
+3.3V_ST
17
16
15
26
14
13
12
25
11
10
9
8
24
7
6
5
23
4
3
2
22
AH19
HPD4
HPD
Q601
SSM6N15FU
DRAIN1
+5V_POWER
DDC/CEC_GND
R642
JP605
JP606
SDA
SCL
R639
NC
R643
R14;AG19
DDC_SDA_4
R13;AG19
DDC_SCL_4
CEC_REMOTE
GATE2
H8;H17;W27;AL11
CEC_REMOTE
AG19
CK-_HDMI4
CEC
CLK-
CLK+
SOURCE2
12:F6
SOURCE1
HDMI_CEC
GATE1
DRAIN2
C612
0.1uF
R664
GND
AG19
CK+_HDMI4
AF19
D0-_HDMI4
CLK_SHIELD
C629
0.1uF
C623
0.1uF
R658
H8;H17;R26;AL11
AVRL161A1R1NT
VR607
18
27
68K
+3.3V_HDMI
L602
BLM18PG121SN1D
R666
9.1K
R641
0
19
D3.3V
L601
BLM18PG121SN1D
R667
20
MMBD301LT1G
D601
Q16;AH18
5V_HDMI_4
JACK_GND
28
+1.8V_HDMI
+1.8V_AMP
OPT
GND
DATA0AF19
D0+_HDMI4
AF19
D1-_HDMI4
DATA0_SHIELD
DATA0+
DATA1-
AF19
D1+_HDMI4
AE19
D2-_HDMI4
DATA1_SHIELD
DATA1+
+3.3V_HDMI
DATA2AE19
D2+_HDMI4
DATA2_SHIELD
R665
0
DATA2+
AL11
HPD2
19
18
JP603
R616
0
JP604
16
R617
DDC_SDA_2
DDC_SCL_2
47K
C607
0.1uF
DDC_SDA_4
DDC_SCL_4
HPD1
21
DDC_SDA_1
DDC_SCL_1
12
HPD4
DDC_SDA_4
CK+_HDMI4
CK-_HDMI4
DDC_SCL_4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2-_HDMI4
D2+_HDMI4
C615
C614
0.1uF
C613
0.1uF
RXD_HPD
RXD_5V
77
78
76
RXD_DDC_DAT
RXD_DC-
RXD_DDC_CLK
79
80
81
RXD_DC+
RXD_D0-
VDDH[3V3]_7
82
83
84
RXD_D0+
RXD_D1-
RXD_D1+
VSS_10
85
86
87
RXD_D2-
RXD_D2+
VDDC[1V8]_3
VSS_11
VDDH[3V3]_8
88
89
90
91
92
93
OUT_D2+
OUT_D294
95
VDDO[1V8]
OUT_D1-
OUT_D1+
96
RXC_C+
62
RXC_C-
15
61
RXC_DDC_CLK
RXA_D0-
16
60
RXC_DDCC_DAT
D0-_HDMI1
RXA_D0+
17
59
RXC_5V
D0+_HDMI1
VSS_3
18
58
RXC_HPD
RXA_D1-
57
CEC
D1-_HDMI1
19
RXA_D1+
20
56
VSS_7
D1+_HDMI1
VDDH[3V3]_2
21
55
VDDS[3V3]
RXA_D2-
22
54
CDEC_STBY
50
49
48
C617
0.1uF
C608
0.1uF
R678
0
OPT
C618
5.6nF
+3.3V_HDMI
R672
4.7K OPT
R669
R673
4.7K
OPT
4.7K
R674
OPT
Y10
D2+_HDMI1
CEC_REMOTE
OPT
C606
0.1uF
5:G5;16:G14
DDC_SDA_2
HPD2
0
R675
+1.8V_HDMI
CEC_REMOTE
Y12
CK-_HDMI1
Y11
D1+_HDMI1
Y10
D2-_HDMI1
DDC_SCL_2
SCL/SEL0
SDA/SEL1
46
45
47
PD
0 MODE
VDDC[3V3]
R668
44
42
43
VSS_6
CDEC_DDC
VDDC[1V8]_2
RXB_D2+
40
39
41
RXB_D2-
38
XTAL_IN
37
XTAL_OUT
51
36
INT/HP_CTRL
52
25
35
53
24
34
23
NC
RXB_D1+
DDC_SDA_1
M17;X12
DDC_SCL_1
CK+_HDMI2
CK-_HDMI2
RXA_D2+
VDDH[3V3]_4
M18;X13
D0+_HDMI2
D0-_HDMI2
R677
VDDH[1V8]_1
33
R663
C605
0.1uF
Y11
D0+_HDMI1
Y11
D1-_HDMI1
97
63
14
R671
10
VDDH[3V3]_5
Y12
CK+_HDMI1
Y12
D0-_HDMI1
RXC_D0-
64
D1+_HDMI2
D1-_HDMI2
20
SCL1_3.3V
5:G5;16:G14
65
12
13
C604
0.1uF
11
11
D2-_HDMI2
13
RXC_D0+
10
RXA_DDC_CLK
RXA_C+
+5.0V
H17;R26;W27;AL11
0
66
RXA_5V
RXA_DDC_DAT
D2+_HDMI2
R607
VSS_8
R670
14
RXC_D1-
67
SDA1_3.3V
68
RXB_D1-
JP602
15
RXA_HPD
VSS_5
R606
16
VDDC[1V8]_1
RXB_D0+
RXC_D1+
RXB_D0-
R605
69
VDDH[3V3]_3
JP601
17
RXA_C-
18
VSS_2
VDDH[3V3]_1
Y13
HPD1
19
VDDH[3V3]_6
26
R627
0
RXC_D2-
70
CK+_HDMI1
D2-_HDMI1
D2+_HDMI1
L19;Z14
5V_HDMI_1
22
RXC_D2+
71
VSS_4
10
72
CK-_HDMI1
GND
11
32
EDID Pull-up
VDDO[3V3]
OUT_DDC_DAT
IC601
TDA9996HL
C621
0.1uF
12K
OUT_DDC_CLK
RXB_C+
UI_HW_PORT2
VSS_9
RXB_C-
20
VDDH[1V8]_2
R676
R12K
73
75
31
R657
74
30
AL14
D2+_HDMI2
R655
47K
29
OUT_C-
28
VSS_1
OUT_C+
RXB_5V
AL13
D1+_HDMI2
AL14
D2-_HDMI2
C628
0.1uF
5V_HDMI_2
C619
0.1uF
5V_HDMI_1
RXB_DDC_CLK
98
AL13
D0+_HDMI2
AL13
D1-_HDMI2
C622
0.1uF
C620
0.1uF
5V_HDMI_4
RXB_DDC_DAT
QJ41193-CFEE1-7F
JK501
C611
0.1uF
+1.8V_HDMI
VSS_12
12
C610
0.1uF
C616
0.1uF
OUT_D0+
AL12
CK+_HDMI2
AL13
D0-_HDMI2
10
13
DDC_SDA_1
DDC_SCL_1
OUT_D0-
11
14
0.1uF
5V_HDMI_4
R661
1.8K
CEC_REMOTE
AL12
CK-_HDMI2
12
15
0.1uF
C626
H8;R26;W27;AL11
0
13
16
47K
99
R618
47K
100
14
17
DDC_SDA_2
R17;AL12
DDC_SCL_2
C624
0.1uF
C625
0.1uF
C627
27
15
R18;AL12
R656
R653
47K
TEST
17
R635
RXB_HPD
18
R662
1.8K
R634
47K
HDMI0_RX2-_BCM 11:W16
HDMI0_RX2+_BCM 11:W16
R628
0
HDMI0_RX1-_BCM 11:W16
HDMI0_RX1+_BCM 11:W16
22
HDMI0_RX0-_BCM 11:W17
HDMI0_RX0+_BCM 11:W17
19
HDMI_SCL
HDMI_SDA
+5.0V
5V_HDMI_2
5V_HDMI_1
P19;AJ15
5V_HDMI_2
HDMI0_RXC+_BCM 11:W17
20
SIDE_HDMI_PORT4
HDMI0_RXC-_BCM 11:W17
GND
0.1uF
JK503
21
C609
0.1uF
KJA-ET-0-0032
21
3
2
1
QJ41193-CFEE1-7F
JK500
GND
UI_HW_PORT1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
HDMI INPUT
2009.01.20
2
17
AP
IC504
D3.3V
AZ1117H-1.8TRE1(EH13A)
+20.0V
C505
10uF
ADJ/GND
C506
0.1uF
R525
3.3
+1.8V_AMP
GND
C517
C513
330uF 0.1uF
C514
0.1uF
C518
0.1uF
OUTPUT
C532
0.1uF
C520
0.01uF
INPUT
MLB-201209-0120P-N2
L508
C533
10uF
C512
22000pF
L502
BLM18PG121SN1D
C536
1000pF
2F
22uH
R536
4.7K
C543
0.47uF
1F
2S
R531
5.6
C547
0.01uF
C539
0.1uF
DA-8580
C535
1000pF 1S
D502
1N4148W
OPT
100V
D3.3V
L504
R530
5.6
D501
1N4148W
100V
OPT
.
R534
4.7K
C540
0.1uF
R538
3.3
JP503
0.01uF
C545
5
L509
SPK_L+
MLB-201209-0120P-N2JP504
C515
22000pF
0.1uF
C567
R540
3.3
SPK_L-
C507
0.1uF
JP505
MCLK : 12.288MHz
JP506
100
C509
1uF
10V
BLM18PG121SN1D
L500
C500
100pF
R527
0
3.3K
R521
1000pF
C501
C503
0.1uF
+1.8V_AMP
C534
10uF
L501
BLM18PG121SN1D
BST1B
VDR1B
43
44
OUT1B_1
PGND1B_1
45
OUT1B_2
PVDD1B_1
PVDD1B_2
PVDD1A_1
PVDD1A_2
OUT1A_1
PGND1B_2
46
47
48
49
51
50
OUT1A_2
42
NC
41
VDR2A
RESET
40
BST2A
AD
39
PGND2A_2
DVSS_1
38
PGND2A_1
VSS_IO
CLK_I
7
8
DGND_PLL
AGND_PLL
10
37
IC500
NTP-3100L
IIC CH4
0x54
C525
1uF
D504
1N4148W
OPT
100V
C524
22000pF
2S
C538
1000pF
R533
5.6
C541
0.1uF
DA-8580
C537
1000pF 1S
2F
22uH
R537
4.7K
C544
0.47uF
1F
C542
0.1uF
C548
0.01uF
L506
R535
4.7K
SMAW250-04Q
P500
R541
3.3
R539
3.3
C546
0.01uF
L511
MLB-201209-0120P-N2
OUT2A_2
36
OUT2A_1
35
PVDD2A_2
34
PVDD2A_1
33
LFM
11
32
PVDD2B_2
PVDD2B_1
AVDD_PLL
12
31
OUT2B_2
DVDD_PLL
13
30
OUT2B_1
TEST0
14
29
PGND2B_2
C564
0.01uF
C526
0.1uF
C527
330uF
C529
0.1uF
C530
0.01uF
28
27
26
R501
3.3
C528
0.1uF
PGND2B_1
BST2B
VDR2B
25
FAULT
23
24
MONITOR_2
MONITOR_1
22
MONITOR_0
21
SCL
20
SDA
19
BCK
17
15
18
WCK
DVDD
16
+20.0V
C552
10uF
DVSS_2
C504
0.1uF
D503
1N4148W
100V
OPT
VDR1A
VDD_IO
R532
5.6
2
SPK_R-
MLB-201209-0120P-N2
L510
BST1A
SDATA
52
56
+1.8V_AMP
53
PGND1A_2
BCM_AUD_MCLK
9:H6
54
R556
0
55
C531
1000pF
PGND1A_1
C522
1uF
12:I4
3
SPK_R+
R526
MICOM_RESET
+1.8V_AMP
C521
1uF
L503
BLM18PG121SN1D
C523
22000pF
C516
0.1uF
C519
10uF
R522
100
100
R528
BCM_I2S_LRCLK_OUT
100
R529
BCM_I2S_SCLK_OUT
100
R542
11:V25
BCM_I2S_DATA_OUT
11:V25
11:V26
5:G5;16:G14
SDA1_3.3V
5:G5;16:G14
SCL1_3.3V
100
R523
100
R524
MUTE1
12:G3
C508
33pF
C565
33pF
C566
33pF
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
AUDIO
2009.01.20
3
17
+5.0V
C818
10uF
10V
+3.3V_ST
R852
3.3K
100
R848
E
Q802
2SC3875S(ALY)
E
OPT
OPT
R826
10K
R834
0
R855
5%
OPT
C823
6800pF
R830
10K
OPT
R822
B10K
C
Q808
2SC3052
GND_1
1%
R813
4.7K
OPT
10K
OPT
OPC_NON
R861
INV_ON/OFF
R857
10K
OPT
C881
1uF
25V
OPT
R860
OPC_OUT
R850
0
OPT
L809
MLB-201209-0120P-N2
C879
0.1uF
16V
OPT
R853
0
0
OPC_EN
+12.0V
10uF
6.3V
D7
OCS
COMP
S3
G
D6
13
12
FB
11
OPT
LDOG
LDFB
10
C803
0.068uF
R805
1.8K
A2.5V
VOUT : 2.533V
VO
EN
IC804
SC4215ISTRT
L827
MLB-201209-0120P-N2
NC_1
ADJ
2
NC_1
1%
R840
39K
GND
C858
33uF
10V
C850
1%
SC4215ISTRT
IC803
C864
33uF
10V
R841
18K
10uF
6.3V
C851
C840
33uF
10V
10uF
6.3V
R816
10K
R846
1K
R820
10K
DL
DRV
G1
S2
NC
VCC
C809
1uF
NC_2
SAM2333
6
5
D2_2
D2_1
10uF
16V
C811
1uF
470pF
R811
C831
C842
C828
10uF
10V
10uF 10uF
16V
16V
10uF
16V
C822
C820
3.3nF
L822
MLB-201209-0120P-N2
VIN
AGND
0.1uF
1000pF
C846
50V
C854
10uF
FB
C830
0.1uF
16V
L830
MLB-201209-0120P-N2
C859
10uF
10V
C865
10uF
10V
MLB-201209-0120P-N2
L816
LDFB
C802
2200pF
R804
15K
1%
C894
10uF OPT
10V
C889
330uF
4V
COMP
D1.8V
SANYO
L831
MLB-201209-0120P-N2
R832
20K
1%
C892
0.1uF
16V
R831
15K
1%
50V
C895
10uF
10V
12
11
L803
MLB-201209-0120P-N2
L801
R824
1.2K
2.2uH
GND_2
DL
10
DRV
G1
S2
NC
VCC
C810
1uF
C808
1uF
R814
2K
D1_1
D2_1
10uF
16V
R810
R815
200
C825
470pF
C821
10uF
6.3V
330uF
4V
0.01uF
C836
10uF
6.3V
SANYO
C897
R864
47K
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
D1_2
G1
D1_1
S2
D2_2
C849
4.7uF
G2
D2_1
C898
1uF
1uF
C899
100uF
LH35_LH50_ONLY
OPT
R842
10K
C
R843
12:I5
LVDS_PANEL_CTRL
GND
OPT
must be placed with pin#8,#10 as close as possible.
LDO BLOCK
S1
+12.0V_LCD
C837
0.1uF
C819
3.3nF
Q809
SI4925BDY
C829
C833
D1_2
D2_2
A1.2V
+12.0V
PN
G2
GND_1
R801
4.7K
C891
0.1uF
16V
10uF
LDOG
LH50_90_ONLY
OPT
EN
CB3216PA501E
L833
13
DH
S1
R800
13K
OPT
C885
0.1uF
R865
47K
14
D1.2V
L819
D800
1N4148W
100V
IC809
SI4804BDY
FB
D5
C893
10uF
10V
10K B
Q803
2SC3052
Q805
2SC3052
22K
R858
OCS
D6
C806
220pF
LH50_90_ONLY
10uF
C800
LH50_90_ONLY
C890
0.1uF
16V
+1.8V
LX_1
22K
R845
BST
COMP
S3
NC_3 R818
22K
+5.0V_ST
IC800
SC2621ASTRT
1%
D7
VO
C812
1uF
1%
D8
L825
3.6uH
LX_2
1.5K
1%
+1.8V_MEMC
IC805
AOZ1073AIL
PGND
R819
1/10W
C816
R808
390K
0.1uF
S2
ADJ
0.01uF
C856
330pF
C814
S1
LH50_90_ONLY LH50_90_ONLY
Q800
Si4800BDY
C804
BG2012B121F
L811
LH50_90_ONLY
LH50_90_ONLY
+5.0V
+5.0V
R806
6.8K
GND
D805
BG2012B121F
L813
C835
D1_2
D1_1
C826 C841
LDO BLOCK
+1.8V_MEMC
EN
VIN
GND_2
+1.26V_MEMC
+1.8V
5
C852
1K
R839
NC_3
4
VIN
R825
300
2.2uH
C853
0.1uF
R803
1.1K
C807
2200pF
OPT
GND_1
OPT
C862
3.3nF
L802
PN
G2
C801
10uF
10V
10uF
16V
C870
0.1uF
DIMMING_1.8V
S1
1%
R802
10K
D2_1
LH90_ONLY
L829
MLB-201209-0120P-N2
IC808
SI4804BDY
D5
D2_2
C839
1uF
1.1K
D8
DH
R823
14
C817
+5.0V
0.1uF
D801
1N4148W
100V
C815
S2
BST
L818
10uF
OPT
S1
C805
Q801
Si4800BDY
IC801
SC2621ASTRT
C869
33uF
0.01uF
+12.0V
C813
1uF
25V
OPT
10V
OPT
MLB-201209-0120P-N2
L812
OPT
CHATTERING_120
1/10W
VCC
D2.5V
NC_2
L817-*1
120
R809
150K
C887
22uF
16V
C843
R807
3.3K
C838
1uF
R835
MLB-201209-0120P-N2
L814
S2
NC
C863
470pF
CHATTERING_BEAD
MLB-201209-0120P-N2
L817
R837
D3.3V
LDO BLOCK
(For ENC / ENC DDR)
ERROR_OUT
BCMPWM_VBR_B
G2
C8001
0.1uF
50V
OPT
10uF
LDFB
D1_1
16V
C884
1uF
35V
0.1uF
C882
330uF
35V
C878
0.1uF
50V
JP1321
LH90_ONLY
C875
16V
0.1uF
OPT
001:AF12
OPC_OUT2
JP1320
G1
6.3V
PWM DIM
DRV
C868
C844
Err Out
24
10
C867
C848
10uF
C834
22
23
10uF
C847
10uF
10uF
21
JP1319
LDOG
1%
R812
20K
JP1318
D1_2
100uF
INV ON
R817
12.4K
1%
20
C845
6.3V
C873
1uF
25V
S1
C866
10uF
10uF
R847
11
DL
1%
19
L805
MLB-201209-0120P-N2
4.7K
FB
D5
R838
5.6K
C832
18
NC
NC
IC807
SI4804BDY
LH90_ONLY
17
20V
A.DIM
R844
620
2.2uH
GND_2
L808
CB4532UK121E
20V
JP1322
BCMPWM_VBR_A
JP1317
12
1%
GND
1%
12V
16
D6
C861
14
15
D7
0.1uF
C876
0.1uF
50V
OPT
L815
MLB-201209-0120P-N2
L810
PN
10K
C874
330uF
35V
13
GND
S3
+20.0V
13
R821
C872
0.1uF
50V
12V
R849
6.8K
C871
22uF
16V
COMP
C883
22uF
16V
C880
220uF
16V
14
A3.3V
D3.3V
Well change SI4804 to KECs Product
R829
11K
12
S2
L807
CB4532UK121E
JP1316
D803
1N4148W
100V
DH
C855
0.1uF
5.2V
GND
OCS
SANYO
5.2V
11
D8
100uF
20V
8
10
BST
C827
470pF
7
9
GND
MLB-201209-0120P-N2
L824
5.2V
5.2V
L804
CB4532UK121E
OPT
+12.0V
S1
JP1315
GND
GND
+5.0V_ST
JP1314
OPT
Q804
Si4800BDY
C860
PWR ON
GND
IC802
SC2621ASTRT
C896
10uF
+12.0V
ENG
A2[GN]
2
4
R863
C857
1uF
1
3
OPT
120K
C886
1uF
25V
OPT
CHATTERING_120
1/10W
C824
OPT
L832
MLB-201209-0120P-N2
L823-*1
120
L823
R828
330K
MLB-201209-0120P-N2
L821
OPT
OPT
OPT
NC
RL_ON
10V
R862
B 10K
MLB-201209-0120P-N2
L820
OPT
P800
FW20020-24S
GND
R827
3.3K
RT1P141C-T112
OPT
Q807
2SC3875S(ALY)
CHATTERING_BEAD
MLB-201209-0120P-N2
D3.3V
L826
R856
1K R859
A1[RD]
OPT
R854
33K
Q806
ENG
C877
15pF
50V
R851
33K
+3.3V_MEMC
+12.0V
+3.3V_ST
+5.0V_ST
L806
MLB-201209-0120P-N2
GND
GND GND
BRAZIL DVR DV
POWER
2009.01.20
4
17
D3.3V
C1116-*1
0.1uF
50V
TU_LGIT
OPT
R1119
4.7K
TUNER
7
@netLa
RF_SW
C1116
2200pF
50V
+5.0V_TU
R1118
RF_GAIN1
RF_GAIN1
3
4
TU_LGIT
5
6
TU1101
TDYR-H071F
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
CTR
RF-GAIN_SW
C1108
0.1uF
50V
TU_LGIT
10V
10uF
C1106
TU_LGIT
B0[+5V]
VTU
C1125
C1126C1130
0.01uF
10uF 0.1uF
+5.0V_TU
TU1102
VA1G5BF8005
RF_AGC
B1[+5V]
RF_SW
NC_1
GAIN_SW
SIF
BB
VIDEO_OUT
NC_3
11
SDA
12
SCL
SRCK
SHIELD
C1109
22pF
50V
TU_LGIT TU_LGIT
22
R1109
SDA
22
R1110
22
R1111
22
C1135
0.1uF
10uF
A1[RD]
SDA0_3.3V
3:T26
SCL0_3.3V
3:T26
C1136
C1133
0.1uF
TUNER_RESETb 3:T26
10uF
R1112
22
R1116
R1113
TU_SYNC
3:T27
TU_SDATA
3:T27
22
R1114
TU_SCLK
3:T27
R1130
330
LD1101
SAM2333
ENG
C1138
0.1uF
SAM2333
LD1102
ENG
A1[RD]
C
A2[GN]
R1128
1K
D3.3V
+5.0V_TU
SRCK
18
C1107
22pF
50V
RESET
SRDT
17
24
C1132
A2[GN]
SPBVAL
16
SRDT
C1127
0.1uF
D1.2V
SBYTE
15
SPBVAL
C1124
0.1uF
RSEORF
14
SBYTE
C1121
C1123
0.1uF10uF
L1110
SCL
13
RSEORF
R1108
B4
10
RESET[SYRSTN]
SIF
B3
B4[1.2V]
B2
B3[3.3V]
L1105
AFT
VIDEO
B2[2.5V]
22uF 0.1uF
D2.5V
L1108
AIF
C1131C1134
B1
NC_2
C1128
0.01uF
L1111
19
SHIELD
TU_SHARP
R1127
0
R1129
470
+5.0V_TU
L1107
R1124
12K
L1101
TU_LGIT
R1117
C1118
2200pF
50V
2012
C1139
0.01uF
TU_SIF
OPT
E
C1137
0.01uF
Q1101
2SA1504S
C
OPT
TU_CVBS_IN
R1123
56
OPT
L1103
TU_LGIT
R1122
56
10uF C1122
3:T25
TU_CVBS_INCM
3:T25
TP8
GND
C1110
91pF
T U_LGIT
50V
GND2
10uH
CM3216F100KE
R1106
82
16V
R1125
10K
3:T25
TU_SIF_INCM
3:T25
TP9
IC1101
KIA78R05F
6
+5.0V_TU
5
L1102
MLB-201209-0120P-N2
GND1
4
NC
VC
VIN
3
VOUT
+12.0V
C1114
0.1uF
16V
IC1100
AS7809DTRE1
L1100
MLB-201209-0120P-N2
INPUT
1K
R1100
C1115
4.7uF
10V
OPT
C1120
100uF
16V
OUTPUT
2
GND
C1100
0.1uF
16V
C1101
100uF
16V
C1102
0.1uF
50V
C1103
100uF
16V
C1104
0.33uF
16V
C1105
0.1uF
50V
C1111
47uF
16V
C1112
0.1uF
50V
C1113
0.01uF
50V
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
TUNER
2009.01.20
5
17
DDR_COMP
DDR01_ODT
DDR_EXT_CLK
DDR0_CLK
DDR0_CLKB
DDR1_CLK
DDR1_CLKB
DDR01_A00
DDR01_A01
DDR01_A02
DDR01_A03
DDR0_A04
DDR0_A05
DDR0_A06
DDR01_A07
DDR01_A08
DDR01_A09
DDR01_A10
DDR01_A11
DDR01_A12
DDR01_A13
DDR1_A04
DDR1_A05
DDR1_A06
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASB
DDR0_DQ00
DDR0_DQ01
DDR0_DQ02
DDR0_DQ03
DDR0_DQ04
DDR0_DQ05
DDR0_DQ06
DDR0_DQ07
DDR0_DQ08
DDR0_DQ09
DDR0_DQ10
DDR0_DQ11
DDR0_DQ12
DDR0_DQ13
DDR0_DQ14
DDR0_DQ15
DDR1_DQ00
DDR1_DQ01
DDR1_DQ02
DDR1_DQ03
DDR1_DQ04
DDR1_DQ05
DDR1_DQ06
DDR1_DQ07
DDR1_DQ08
DDR1_DQ09
DDR1_DQ10
DDR1_DQ11
DDR1_DQ12
DDR1_DQ13
DDR1_DQ14
DDR1_DQ15
DDR0_DM0
DDR0_DM1
DDR1_DM0
DDR1_DM1
DDR0_DQS0
DDR0_DQS0B
DDR0_DQS1
DDR0_DQS1B
DDR1_DQS0
DDR1_DQS0B
DDR1_DQS1
DDR1_DQS1B
DDR01_RASB
DDR_VREF0
DDR_VREF1
DDR01_WEB
DDR_VDDP1P8_1
C354
0.1uF
C353
0.1uF
C352
0.1uF
C335
470pF
C334
2700pF
C333
0.047uF
C332
0.01uF
C331
0.1uF
C330
10uF
C329
470pF
C328
2700pF
C327
0.047uF
C326
0.01uF
C325
0.1uF
C324
10uF
C323
100uF
C351
0.1uF
C350
0.1uF
C349
0.1uF
C317
470pF
C316
2700pF
C315
0.047uF
C314
0.01uF
C313
0.1uF
C312
10uF
C311
470pF
C310
2700pF
C309
0.047uF
F20
B23
C22
R312
0
OPT
R313
E16
1% 240
B17
DDR0_VREF0
R325
DDR1_VREF0
DDR01_CKE
ELPIDA
22
DDR01_ODT
B12
DDR0_CLK
C12
C300
DDR0_CLKb
A13
DDR1_CLK
A12
DDR1_CLKb
B15
IC301
EDE1116ACBG-1J-E
C301
DDR01_A[1]
A15
DDR01_A[2]
D15
DDR01_A[3]
E13
DDR0_A[4]
E12
DDR0_A[5]
F13
DDR0_A[6]
C14
DDR01_A[7]
F14
DDR01_A[8]
B14
DDR01_A[9]
470pF 0.1uF
DDR01_A[0-3]
DDR0_A[4-6]
DDR0_A[4-6]
DDR01_A[7-13]
J2
DDR01_A[0]
A0
M8
DDR01_A[1]
A1
M3
DDR01_A[2]
A2
M7
DDR01_A[3]
DDR0_A[4]
A3
N2
A4
N8
DDR0_A[5]
A5
N3
DDR0_A[6]
A6
N7
DDR01_A[7]
A7
P2
A8
P8
A9
P3
D14
DDR01_A[10]
C13
DDR01_A[11]
DDR01_A[9]
DDR01_A[12]
B13
DDR01_A[13]
F15
DDR1_A[4]
C15
DDR1_A[5]
D16
DDR1_A[6]
DDR1_A[4-6]
DDR01_A[10]
A10
M2
DDR01_A[11]
A11
P7
DDR01_A[12]
A12
R2
DDR01_BA0
BA0
L2
F16
DDR01_BA0
DDR01_BA1
BA1
L3
B16
DDR01_BA1
DDR01_BA2
BA2
L1
DDR01_BA2
DDR0_CLK
CK
J8
E15
A17
DDR01_CASb
R300
100
DDR0_DQ[0]
A8
B11
DDR0_DQ[1]
DDR0_CLKb
CK
B8
DDR0_DQ[2]
DDR01_CKE
CKE
K2
D11
DDR0_DQ[3]
E11
DDR0_DQ[4]
C8
DDR0_DQ[5]
C11
DDR0_DQ[6]
C9
DDR0_DQ[7]
D8
DDR0_DQ[8]
E10
DDR0_DQ[9]
E9
DDR0_DQ[10]
F11
DDR0_DQ[11]
F12
DDR0_DQ[12]
E8
DDR0_DQ[13]
D10
DDR0_DQ[14]
DDR0_DQ[0-15]
DDR0_DQ[15]
F8
C18
DDR1_DQ[0]
C20
DDR1_DQ[1]
B21
DDR1_DQ[3]
C21
DDR1_DQ[4]
B20
DDR1_DQ[6]
D18
DDR1_DQ[7]
E18
DDR1_DQ[8]
D21
DDR1_DQ[9]
F18
DDR1_DQ[12]
F17
DDR1_DQ[13]
DDR1_DM0
DDR1_DM1
DDR0_DQS0
B9
DDR0_DQ[6]
NC_6
E2
J7
VDDL
J1
D19
DDR1_DQS1b
C16
DDR1_DQ[10]
D3
DQ11
DDR1_DQ[11]
D1
DQ12
DDR1_DQ[12]
D9
DQ13
DDR1_DQ[13]
B1
DQ14
DDR1_DQ[14]
B9
DQ15
DDR1_DQ[15]
A1
VDD_5
E1
VDD_4
VDD_5
DDR01_BA1
BA1
L3
DDR01_BA2
BA2
E1
VDD_4
L1
J9
VDD_3
DDR1_CLK
J9
VDD_3
M9
VDD_2
CK
J8
M9
VDD_2
R1
VDD_1
DDR1_CLKb
CK
K8
R1
VDD_1
DDR01_CKE
CKE
K2
G3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
A3
VSS_5
E3
VSS_4
VSS_2
P9
VSS_1
B2
VSSQ_10
B8
VSSQ_9
A7
VSSQ_8
D2
VSSQ_7
D8
VSSQ_6
E7
VSSQ_5
F2
VSSQ_4
F8
VSSQ_3
VSSQ_2
H8
VSSQ_1
DDR01_A[8]
P8
DDR01_A[9]
A9
P3
DDR01_A[10]
A10
M2
DDR01_A[11]
A11
P7
DDR01_A[12]
A12
R2
BA0
HYNIX
ODT
K9
A9
VDDQ_10
CS
L8
C1
VDDQ_9
RAS
K7
C3
VDDQ_8
DDR01_CASb
CAS
L7
C7
VDDQ_7
WE
K3
C9
VDDQ_6
E9
VDDQ_5
G1
VDDQ_4
G3
IC300-*1
H5PS1G63EFR-20L
VDDQ_3
G7
VDDQ_2
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
A8
P8
A9
P3
A10/AP
M2
A11
P7
A12
R2
BA0
L2
BA1
L3
NC_4/BA2
L1
G8
DQ0
G9
VDDQ_1
G2
DQ1
H7
DQ2
H3
DQ3
H1
DQ4
H9
DQ5
F1
DQ6
F9
DQ7
C8
DQ8
C2
DQ9
D7
DQ10
D3
DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
A1
VDD_5
E1
VDD_4
J9
VDD_3
CK
J8
M9
VDD_2
CK
K8
R1
VDD_1
CKE
K2
LDQS
DDR1_DQS1
UDQS
K9
A9
VDDQ_10
CS
L8
C1
VDDQ_9
K7
C3
VDDQ_8
CAS
L7
C7
VDDQ_7
WE
K3
C9
VDDQ_6
E9
VDDQ_5
G1
VDDQ_4
G3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
RAS
UDQS
F7
B7
LDM
F3
UDM
B3
LDQS
F3
DDR1_DM1
UDM
B3
DDR1_DQS0b
DDR1_DQS1b
UDQS
NC_5
NC_6
NC_1
NC_2
VSS_5
E8
E3
VSS_4
UDQS
A8
J3
VSS_3
N1
VSS_2
NC_5/A14
P9
VSS_1
R3
NC_6/A15
R7
NC_1
A2
NC_2
E2
VSSDL
VDDL
VSSDL
VDDL
A3
R8
J7
J1
B2
VSSQ_10
B8
VSSQ_9
A7
VSSQ_8
D2
VSSQ_7
D8
VSSQ_6
E7
VSSQ_5
F2
VSSQ_4
F8
H2
H8
VSSQ_1
B7
LDM
NC_3
ODT
F7
DDR1_DM0
LDQS
DDR1_DQ[1]
DDR1_DQ[8]
DDR1_DQ[9]
D1.8V
DDR01_ODT
DDR1_DQS0
DDR1_DQ[0]
L2
DDR01_RASb
DDR01_WEb
LDQS
H2
P2
R303
100
VSS_3
N1
N7
A7
A8
DDR01_BA0
DDR1_DQS0b
DDR1_DQS1
DQ10
A1
DDR1_DQS0
E19
DQ9
D7
B9
NC_3/A13
C19
DQ8
C2
DDR0_DQ[14]
DDR0_DQS1b
B19
C8
DDR0_DQ[15]
J3
R8
DDR1_DQ[7]
DDR0_DQ[13]
N3
A6
DDR01_A[7]
DDR1_A[6]
DDR0_DQ[9]
R7
A2
DQ7
DQ15
DDR0_DQ[8]
DDR0_DQ[10]
B3
NC_2
DDR1_DQ[6]
F9
DQ14
DDR0_DQ[7]
F3
NC_1
DDR1_DQ[5]
DQ6
DQ13
VDDQ_4
R3
DDR1_DQ[4]
DQ5
F1
B1
G1
A8
DQ4
H9
D9
VDDQ_5
UDQS
H1
D1
E9
E8
A5
DDR1_DQ[3]
DDR0_DQ[11]
VDDQ_6
LDQS
DDR1_A[5]
M7
DDR1_DQ[2]
DQ3
DDR0_DQ[12]
C9
UDM
N2
N8
DQ2
H3
DQ12
K3
DDR0_DM1
A2
A3
A4
DQ1
H7
DQ11
WE
LDM
DDR01_A[2]
DDR01_A[3]
DDR1_A[4]
G2
D3
VDDQ_7
DDR0_DM0
M3
DQ10
C7
B7
A1
DQ9
L7
DDR0_DQS1
DDR01_A[1]
G8
DQ8
CAS
UDQS
M8
D7
DDR01_CASb
F7
A0
C2
VDDQ_8
LDQS
J2
DDR01_A[0]
C8
VDDQ_9
DDR0_DQS0
DDR1_A[4-6]
DQ0
DQ7
DDR0_DQS1
F9
DDR1_DQ[0-15]
VREF
DDR01_A[0-3,7-13]
DDR0_DQS0b
F10
C322
F9
VDDQ_10
DDR0_DM0
B10
DDR0_DQ[5]
DQ6
C3
VSSDL
F19
DDR0_DQ[4]
DQ5
F1
C1
NC_3
A20
DQ4
H9
A9
DDR1_DQ[0-15]
DDR0_DM1
H1
K7
NC_5
C10
H3
DDR0_DQ[3]
L8
DDR0_DQS1b
A10
DDR0_DQ[2]
DQ3
D1.8V
DDR1_DQ[15]
E17
DDR0_DQ[1]
DQ2
K9
DDR1_DQ[14]
B22
DQ1
H7
CS
DDR1_DQ[11]
A22
G2
RAS
DDR1_DQ[10]
E20
DDR0_DQ[0]
ODT
DDR1_DQ[5]
B18
DQ0
DDR01_ODT
DDR0_DQS0b
DDR1_DQ[2]
A18
K8
G8
DDR01_RASb
DDR01_WEb
EDE1116ACBG-1J-E
470pF 0.1uF
VREF
DDR01_A[0-3,7-13]
DDR01_A[8]
D13
C321
DDR0_DQ[0-15]
DDR01_A[0]
E14
ELPIDA
IC300
C23
E8
A8
R3
A3
VSS_5
E3
VSS_4
J3
VSS_3
N1
P9
HYNIX
IC301-*1
H5PS1G63EFR-20L
VREF
J2
A0
M8
A1
M3
A2
M7
A3
N2
A4
N8
A5
N3
A6
N7
A7
P2
VSS_2
A8
P8
A9
P3
VSS_1
A10/AP
M2
A11
P7
A12
R2
G8
DQ0
G2
DQ1
H7
DQ2
H3
DQ3
H1
DQ4
H9
DQ5
F1
DQ6
F9
DQ7
C8
DQ8
C2
DQ9
D7
DQ10
D3
DQ11
D1
DQ12
D9
DQ13
B1
DQ14
B9
DQ15
A1
VDD_5
E1
VDD_4
R7
A2
E2
R8
J7
J1
B2
VSSQ_10
B8
VSSQ_9
A7
VSSQ_8
D2
VSSQ_7
D8
VSSQ_6
E7
VSSQ_5
F2
VSSQ_4
F8
VSSQ_3
H2
VSSQ_2
H8
VSSQ_1
BA0
L2
BA1
L3
NC_4/BA2
L1
J9
VDD_3
CK
J8
M9
VDD_2
CK
K8
R1
VDD_1
CKE
K2
ODT
K9
A9
VDDQ_10
CS
L8
C1
VDDQ_9
K7
C3
VDDQ_8
CAS
L7
C7
VDDQ_7
WE
K3
C9
VDDQ_6
E9
VDDQ_5
G1
VDDQ_4
G3
VDDQ_3
G7
VDDQ_2
G9
VDDQ_1
A3
VSS_5
RAS
LDQS
UDQS
F7
B7
LDM
F3
UDM
B3
LDQS
E8
E3
VSS_4
UDQS
A8
J3
VSS_3
N1
VSS_2
NC_5/A14
P9
VSS_1
R3
NC_6/A15
R7
NC_1
B2
VSSQ_10
A2
NC_2
E2
NC_3/A13
VSSQ_9
B8
VSSQ_8
A7
R8
VSSQ_7
D2
VSSQ_6
D8
E7
VSSQ_5
F2
VSSQ_4
VSSQ_3
F8
VSSQ_3
VSSQ_2
H2
VSSQ_2
H8
VSSQ_1
VSSDL
VDDL
J7
J1
DDR0_VREF0
DDR01_RASb
A7
DDR1_VREF0
A23
C17
D1.8V
DDR01_WEb
C7
D22
DDR_VDDP1P8_2
C355
0.1uF
C361
DDR01_CKE
C360
DDR_PLL_LDO
C346
B24
C342
DDR_PLL_TEST
C345
0.1uF
B7
C343
DDR_BVSS1
0.1uF
A24
C358
DDR_BVSS0
A6
C344
DDR_BVDD1
C359
DDR_BVDD0
C308
0.01uF
IC100
BCM3556
C347
C307
0.1uF
A1.2V
D1.8V
C306
10uF
C305
100uF
D1.8V
DDR_VTT
1uF
1uF
DDR01_A[0-3,7-13]
DDR_VTT
DDR VTT
DDR1_A[4]
AR304
DDR01_A[0]
75
DDR01_A[1]
DDR0_A[4-6]
AR305
75
C337
0.01uF
DDR01_A[3]
AR306
C338
0.01uF
DDR01_A[7]
75
DDR0_A[4]
D3.3V
DDR0_A[5]
DDR0_A[6]
IC302
BD35331F-E2
DDR01_A[8]
C339
0.01uF
DDR01_A[9]
DDR1_VREF0
GND
R302
0
EN
VTT
VTTS
R301
0
1M
R323
C303
C302
0.01uF
0.1uF
C356
0.1uF
VREF
C304
0.1uF
DDR01_A[10]
AR307
DDR01_A[11]
75
DDR01_A[12]
VTT_IN
D1.8V
DDR0_VREF0
C357
0.1uF
C336
0.01uF
DDR01_A[2]
VCC
C320
220uF
C348
1uF
DDR01_CKE
OPT
DDR1_A[5]
75
DDR1_A[6]
VDDQ
DDR1_A[4-6]
C318
100uF
C363
C319
0.1uF 1uF
C340
0.01uF
DDR01_A[13]
R310
AR308
C341
0.01uF
75
DDR01_BA1
C362
0.1uF
DDR01_BA2
DDR01_RASb
AR309
DDR01_BA0
75
DDR01_CASb
DDR01_WEb
DDR01_ODT
75
R311
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
DDR
2009.01.20
6
17
0 OPT
0 OPT
L2704
C2710
10uF
10V
10uF
C2712
BLM18PG121SN1D
C2714 C2716
0.1uF 0.1uF
16V
16V
PI Result
+1.8V_MEMC
C2732
BLM18PG121SN1D
AVDD_PLL
L2707
REXT
D12
LVB1P
LVB1M
C14
C13
LVB0M
LVB0P
B13
A13
GPIO_4
D7
LVA4M
LVA4P
GPIO_6
D9
B12
A12
LVA3M
C12
LVACKM
LVACKP
LVA3P
C11
A11
B11
LVA2P
LVA1M
LVA2M
B10
A10
C10
LVA0M
LVA1P
C9
A9
LVA0P
B9
GPIO_8
GND_2
G8
F10
D11
GPIO_12
GPIO[25]
SCLM
SDAM
GPIO_1
GPIO_9
D13
E11
N7
D6
D5
A14
XIN
XOUT
GPIO_14
GPIO_2
B14
D3
D4
K16
D10
GPIO_7
E10
GPIO_11
E3
GPIO_10
GND_14
K8
[E1]
D2
GPIO_3
VDDC_1
E5
C15
LVB2P
URSA_B+[2]
[D1]
GPIO[10]
E2
B15
LVB2M
URSA_B-[2]
GPIO[11]
F2
A15
LVBCKP
GPIO[12]
F3
A16
LVBCKM
URSA_B+[3]
URSA_B-[3]
GPIO[13]
G2
B16
LVB3P
GPIO[22]
M4
C16
LVB3M
GPIO[23]
M5
D15
LVB4P
LVB4M
F9
GPIO[16]
F4
G10
GND_4
GPIO[17]
G4
E15
LVC0P
URSA_C+[0]
GPIO[18]
H4
E16
LVC0M
URSA_C-[0]
GPIO[19]
J4
E14
LVC1P
URSA_C+[1]
GPIO[20]
K4
F14
LVC1M
URSA_C-[1]
GPIO[21]
L4
F16
LVC2P
URSA_C+[2]
VDDP_2
J6
F15
LVC2M
URSA_C-[2]
G15
LVCCKP
G16
LVCCKM
URSA_C+[3]
LVC4P
URSA_C+[4]
H15
LVC4M
URSA_C-[4]
J15
LVD0P
URSA_D+[0]
J16
LVD0M
URSA_D-[0]
J14
LVD1P
URSA_D+[1]
K14
LVD1M
URSA_D-[1]
J3
MDATA[25]
K1
AVDD_DDR_2
DQM[3]
L1
GND_10
J8
DQS[2]
L2
N15
LVD4M
L8
H6
VDDC_5
DQS[3]
M1
N6
GPIO[24]
DQSB[3]
M2
E12
GPIO[7]
L7
D14
GPIO[6]
M3
F12
GPIO[5]
N1
E13
GPIO[4]
GND_11
J9
F13
GPIO[3]
MDATA[26]
N2
G13
GPIO[2]
MDATA[29]
N3
H13
GPIO[1]
L10
J13
GPIO[0]
K12
PWM0
[N13]
L12
PWM1
K13
CSZ
[N12]
M12
SDO
M13
SDI
AVDD_DDR_5
MDATA[31]
MDATA[24]
H10
URSA_DQ[16]
P1
MDATA[16]
R1
MDATA[18]
T1
R2
MCLKZ[0]
P2
L13
SCK
GND_1
G7
N14
GPIO[30]
L9
N13
N5
N12
URSA_D+[3]
URSA_D-[3]
URSA_D+[4]
URSA_D-[4]
C2748
008:AL17
+3.3V_MEMC
0.1uF
URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK-
GPIO[29]
GPIO[28]
G6
M11
N11
N10
N9
P16
R16
T16
P15
R15
T15
P14
R14
T14
P13
R13
T13
J7
H11
P12
R12
N4
T12
C2722
T3
0.1uF
P11
ODT
J11
009:Q15;009:Y15
URSA_ODT
R11
MVREF
T11
AVDD_MEMPLL
[N4]
P10
C2726
MCLK[0]
[N5]
R10
URSA_MCLKZ
009:Q15
T2
K11
0.1uF
MDATA[21]
T10
009:Q16
URSA_MCLK
[L9]
P9
BLM18PG121SN1D
10uF
N16
L6
MDATA[23]
URSA_DQ[21]
C2702
L3
LVD4P
URSA_DQ[23]
URSA_DQ[18]
0.1uF
C2701
L2701
LVD3M
VDDP_3
AVDD_DDR_6
+3.3V_MEMC
LVD3P
M14
AVDD_DDR_4
URSA_D+[2]
URSA_D-[2]
0.1uF
AVDD_33_1
M15
K7
URSA_DQ[29]
F8
LH50_90_ONLY
R9
URSA_DQ[26]
URSA_DCK-
T9
C2721
LVDCKM
F7
0.1uF
M16
K10
URSA_DQ[31]
URSA_DQ[24]
URSA_DCK+
K3
N8
B6
ISP_TXD_TR
LVDCKP
P8
URSA_DQSB3
L16
R8
URSA_DQS3
009:Q12
L15
K6
T8
009:Q13
K2
LVD2M
P7
C2729
B6
LVD2P
R7
GND_3
DQSB[2]
GND_8
C2753
G9
L14
DQM[2]
ISP_RXD_TR
LGE7329A
L11
0.1uF
MDATA[28]
T7
J2
P6
0.1uF
J1
MDATA[27]
MDATA[30]
IC2701
R6
URSA_DQSB2
H16
H2
T6
009:Q12
H1
MDATA[19]
P5
URSA_DQM2
URSA_DQS2
MDATA[20]
R5
009:Q13
009:Q13
C2720
2.2K
R2702
ENG
ENG
2.2K
R2701
ENG
URSA_C-[3]
T5
URSA_DQM3
009:Q13
URSA_CCK-
LVC3M
H3
URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK-
URSA_CCK+
H14
P4
+5.0V
P2701
TJC2508-4A
0.1uF
G14
J10
008:AE17
F6
R4
C2719
URSA_DQ[30]
C2752
VDDC_2
MDATA[22]
URSA_DQ[25]
AVDD_33_2
LVC3P
URSA_DQ[22]
0.1uF
URSA_B-[4]
D16
E4
MDATA[17]
URSA_DQ[28]
URSA_B+[4]
G3
URSA_DQ[17]
URSA_DQ[27]
URSA_BCK+
URSA_BCK-
GPIO[15]
T4
URSA_DQ[19]
0.1uF
GPIO[14]
P3
URSA_DQ[20]
0.1uF
C2750
G1
H9
GND_15 K9
C2728
GPIO_5
D1
F1
R3
0.1uF
C2706
C2707
0.1uF
0.1uF
C2749
D8
GPIO[9]
0.1uF 0.1uF
URSA_DQ[0-31]
10uF
C2705
C2703
22uF
16V
10uF
10V
C2751
GPIO[8]
GND_7
L2702
BLM18PG121SN1D
URSA_B-[1]
URSA_B+[0]
URSA_A-[4]
URSA_A+[4]
URSA_ACK-
URSA_A-[3]
URSA_ACK+
URSA_A+[3]
URSA_A-[1]
URSA_A-[2]
1uF
URSA_B+[1]
008:AM24
008:AF25
C2743
0.1uF
C2744
0.1uF
C2742
AVDD_LVDS_2
GND_5
H7
G11
RO0P
RO0N
B8
A8
C8
RO1N
RO2N
RO1P
C7
A7
B7
RO2P
ROCKN
B6
ROCKP
A6
RO3N
C6
GPIO_13
0.1uF
RO3P
C5
RO4P
GND_6
RO4N
A5
B5
H8
RE0P
RE0N
B4
A4
F11
C4
RE1N
RE2N
RE1P
C3
A3
RECKN
RECKP
RE2P
B3
B2
A2
C2
RE3N
RE3P
RE4N
C2755
820
1K
R2722
C2754 10uF
R2736
1K
OPT
R2721
LVDS_SEL
C2756
10uF
10V
1K
R2740
1K OPT
R2708
BIT_SEL
0.1uF
+3.3V_MEMC
1K
1K OPT
1K
R2709
LVDS
Mini LVDS
Mini LVDS
Mini LVDS
R2706
M+S
42"
47"
37"
R2707
Non
M+S
M+S
M+S
C2731
E1
AVDD_LVDS_1
C2740
SCLS
1K
C1
RE4P
0.1uF
C2733
0.1uF
C2734
SDAS
A1
100
100
B1
R2716
R2717
10uF
C2727
0
100
R2738
SCL3_3.3V
R2715
R2734
100
1K
R2741
9:I4
R2728
OPT
R2739
SDA3_3.3V
100
K15
BLM18PG121SN1D
L2705
9:I4
R2714
VDDC_4
C2747
R2735
URSA_DQ[5]
URSA_DQ[2]
URSA_DQ[0]
URSA_DQ[7]
URSA_DQ[13]
URSA_DQ[8]
URSA_DQ[10]
URSA_DQ[15]
009:Y16URSA_MCLK1
009:Y15
URSA_MCLKZ1
009:Y13 URSA_DQS1
009:Y12URSA_DQSB1
001:AB21
C2746
0.1uF
0.1uF
C2745
URSA_DQ[14]
URSA_DQ[9]
URSA_DQ[12]
URSA_DQ[11]
URSA_DQ[6]
URSA_DQ[1]
URSA_DQ[3]
008:AK5
008:AK5
0.1uF
RESET
GND_17
GPIO[27]
GPIO[26]
MCLKZ[1]
MCLK[1]
MDATA[5]
MDATA[2]
MDATA[0]
MDATA[7]
MDATA[13]
MDATA[8]
MDATA[10]
MDATA[15]
DQSB[1]
DQS[1]
GND_9
VDDP_1
DQSB[0]
DQS[0]
DQM[0]
DQM[1]
AVDD_DDR_1
MDATA[14]
MDATA[9]
MDATA[12]
MDATA[6]
MDATA[11]
AVDD_DDR_3
GND_13
MDATA[1]
MDATA[3]
VDDC_3
0.1uF
008:AF6
M_SPI_CK
+3.3V_ST
MEMC_RESET
URSA_DQ[0-31]
009:Y13 URSA_DQS0
009:Y12URSA_DQSB0
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
M_SPI_DI
008:Y11
009:Y13 URSA_DQM1
009:Y13 URSA_DQM0
M_SPI_CK
008:Y10
008:AF6
M_SPI_DI
10K
URSA_A[3]
URSA_A[7]
URSA_A[12]
URSA_A[9]
URSA_A[5]
URSA_A[10]
URSA_A[1]
URSA_A[11]
URSA_A[8]
URSA_A[4]
URSA_A[2]
URSA_DQ[4]
56
URSA_A[0-12]
56
R2711
009:U20
R2710
DIO
URSA_MCLKE
CLK
009:T10;009:V11
URSA_BA0
HOLD
009:T10;009:V11
VCC
URSA_BA1
WP
GND
009:T10;009:V11
10K
URSA_WEZ
R2705
009:T10;009:V11
DO
URSA_RASZ
CS
56
URSA_CASZ
56
R2704
009:S17;009:W17
R2703
009:S17;009:W17
008:Y11M_SPI_DO
M_SPI_DO
R2737
0.1uF
W25X20AVSNIG
008:Y11M_SPI_CZ
MDATA[4]
MCLKE
GND_16
C2739
C2738
URSA_A[0]
C2718
C2725
1uF
0.1uF
IC2702
10K
R2719
C2704
0.1uF
URSA_A[6]
SPI FLASH
C2737
+3.3V_MEMC
C2736
10K
R2718
C2735
C2741
MADR[3]
MADR[7]
MADR[12]
MADR[9]
MADR[5]
AVDD_DDR_7
MADR[1]
BADR[0]
MADR[10]
BADR[1]
WEZ
MADR[11]
GND_12
MADR[8]
MADR[6]
MADR[4]
MADR[2]
CASZ
RASZ
C2723
MADR[0]
M_SPI_CZ
0.1uF
R2733
100
+3.3V_MEMC
GPIO14
LOW
HIGH
LOW
HIGH
100
R2727
10uF 10V
C2730
C2715 0.1uF
C2713 0.1uF
C2709 10uF
C2711 0.1uF
C2708
22uF
16V
L2703
LH50_90_ONLY
TX_0_DATA0_P
TX_0_DATA1_P
TX_0_DATA1_N
TX_0_DATA0_N
TX_0_DATA2_P
TX_0_CLK_P
TX_0_CLK_N
TX_0_DATA2_N
LH50_90_ONLY
AR2706
0
1/16W
LH50_90_ONLY
AR2705
0
1/16W
TX_0_DATA3_P
TX_0_DATA4_P
TX_0_DATA3_N
TX_0_DATA4_N
LH50_90_ONLY
AR2704
0
1/16W
TX_1_DATA0_P
TX_1_DATA0_N
TX_1_DATA1_P
TX_1_DATA1_N
TX_1_DATA2_P
TX_1_CLK_N
TX_1_CLK_P
TX_1_DATA2_N
LH50_90_ONLY
AR2703
0
1/16W
LH50_90_ONLY
AR2702
0
1/16W
TX_1_DATA3_P
TX_1_DATA3_N
TX_1_DATA4_P
TX_1_DATA4_N
AR2701
0
1/16W
001:L5 ISP_RXD_TR
+3.3V_MEMC 001:L5 ISP_TXD_TR
GPIO12
LOW
LOW
HIGH
HIGH
+3.3V_MEMC
+3.3V_MEMC
PI Result
R2713
OPT
R2732
100
URSA_A+[2]
BLM18PG121SN1D
R2726
URSA_A+[0]
100
100
1K
008:AF11
R2731
R2725
L2706
BLM18PG121SN1D
100
URSA_A+[1]
R2730
100
R2712
M_XTALO
R2724
M_XTALI
100
100
URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
URSA_B-[0]
TX_0_DATA0_N
TX_0_DATA1_P
TX_0_DATA0_P
TX_0_DATA1_N
TX_0_DATA2_N
TX_0_DATA2_P
TX_0_CLK_N
TX_0_CLK_P
TX_0_DATA3_N
TX_0_DATA3_P
TX_0_DATA4_P
TX_1_DATA0_P
TX_1_DATA0_N
TX_1_DATA2_N
TX_1_DATA1_N
TX_1_DATA1_P
TX_1_DATA2_P
TX_0_DATA4_N
R2729
R2723
20pF
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK+3.3V_MEMC
C2724
20pF
+1.26V_MEMC
URSA_A-[0]
12MHz
008:AJ11
C2717
TX_1_CLK_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA2_P
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA2_N
LVDS_TX_0_CLK_P
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA4_P
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_CLK_P
LVDS_TX_1_CLK_N
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA4_N
0 08:P27
M_XTALI
TX_1_CLK_P
1M
X2701
008:P27M_XTALO
TX_1_DATA4_N
R2720
TX_1_DATA3_N
XTAL
TX_1_DATA3_P
TX_1_DATA4_P
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:E7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
7:D7
GPIO8
PWM1
PWM0
I2C
HIGH
LOW
HIGH
EEPROM
HIGH
HIGH
LOW
SPI
HIGH
HIGH
HIGH
009:D21;009:AL21
2008.10.15
15
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
29
28
DDR2 1.8V By CAP - Place these Caps near Memory
+1.8V_FRC_DDR
+1.8V_MEMC
27
+1.8V_FRC_DDR
+1.8V_FRC_DDR
C941
0.1uF
0.1uF
0.1uF
C940
0.1uF
C939
0.1uF
C938
C936
0.1uF
0.1uF
C937
0.1uF
C935
0.1uF
C933
0.1uF
C934
1000pF
10uF
C929
0.1uF
C931
0.1uF
C928
0.1uF
C932
0.1uF
C926
0.1uF
C927
0.1uF
C925
10V
10uF
C924
C923
C922
10uF
C921
0.1uF
0.1uF
0.1uF
C920
0.1uF
C919
0.1uF
C918
0.1uF
C917
0.1uF
C916
0.1uF
C915
10uF
C914
0.1uF
C913
0.1uF
C912
0.1uF
C911
0.1uF
C909
0.1uF
C907
0.1uF
C906
0.1uF
C905
0.1uF
C904
10uF
C903
10V
C902
C901
10uF
0.1uF
C900
0.1uF
0.1uF
C944
C942
26
0.1uF
C943
BLM18PG121SN1D
L900
PI Result
25
008:N4
24
URSA_DQ[26]
DDR_DQ[24]
56
DDR_DQ[26]
URSA_DQ[29]
DDR_DQ[29]
AR903
URSA_DQ[23]
18
URSA_DQ[21]
DDR_DQ[23]
DDR_DQ[16]
URSA_DQ[16]
URSA_DQ[18]
56
DDR_DQ[18]
DDR_DQ[21]
G2
DQ2
H7
DQ3
H3
DDR_DQ[20]
DQ4
H1
DDR_DQ[21]
DQ5
H9
DDR_DQ[22]
DQ6
F1
DDR_DQ[23]
DQ7
F9
DDR_DQ[24]
DQ8
C8
DDR_DQ[25]
DQ9
C2
DDR_DQ[26]
DQ10
D7
DDR_DQ[27]
DQ11
D3
DDR_DQ[28]
DQ12
D1
DDR_DQ[29]
DQ13
D9
DDR_DQ[30]
DQ14
B1
DDR_DQ[31]
DQ15
B9
+1.8V_FRC_DDR
17
VDD5
16
15
14
13
12
11
10
A1
J2
M8
A0
DDRB_A[0]
M3
A1
DDRB_A[1]
DDRB_A[2]
J2
DDRA_A[0]
A0
M8
DDRA_A[1]
A1
M3
R921
1K 1%
R922
1K 1%
C930
1K 1%
URSA_A[0-12]
R901
1K 1%
LH50_90_ONLY
LH50_90_ONLY
M7
A2
N2
A3
DDRB_A[3]
N8
A4
DDRB_A[4]
A5
DDRB_A[5]
N7
A6
DDRB_A[6]
P2
A7
DDRB_A[7]
P8
A8
DDRB_A[8]
N3
P3
A9
A10/AP
DDRB_A[10]
A11
DDRB_A[11]
R2
A12
BA0
L3
BA1
VDD4
E1
VDD3
J9
J8
CK
VDD2
M9
K8
CK
K2
CKE
VDD1
R1
K9
ODT
VDDQ10
A9
L8
CS
VDDQ9
C1
K7
RAS
VDDQ8
C3
L7
CAS
VDDQ7
C7
K3
WE
DDRB_A[1]
22
DDRB_A[12]
AR905
DDRB_A[7]
URSA_A[10]
22
URSA_A[3]
AR911
DDRA_A[3]
URSA_A[1]
22
DDRA_A[1]
URSA_A[1]
URSA_A[10]
URSA_A[3]
URSA_A[9]
URSA_A[9]
URSA_A[12]
URSA_A[12]
URSA_A[7]
URSA_A[5]
DDRA_A[5]
URSA_A[2]
DDRA_A[2]
URSA_A[2]
URSA_A[0]
URSA_A[4]
URSA_A[6]
URSA_A[6]
URSA_A[4]
AR906
22
AR907
R904
URSA_RASZ
URSA_RASZ
008:I4;009:S17
008:I4;009:W17
URSA_CASZ
URSA_CASZ
008:J4;009:W17
008:J4;009:S17
URSA_A[8]
URSA_A[11]
B_URSA_CASZ
DDRB_A[11]
URSA_A[8]
DDRB_A[8]
009:T11
22
22
22
AR913
DDRA_A[0]
22
DDRA_A[6]
A_URSA_CASZ
DDRA_A[8]
008:C11
URSA_MCLKZ
URSA_ODT
008:U4
URSA_MCLKZ1
008:C10;009:Q15
009:R17
A_URSA_RASZ
B_URSA_CASZ
009:R17
009:X17
A_URSA_CASZ
B_URSA_WEZ
009:T11
009:V10
A_URSA_WEZ
N8
N7
P2
DDRA_A[8]
A8
P8
A9
P3
DDRA_A[10]
A10/AP
M2
DDRA_A[11]
A11
P7
009:Y14DDRA_A[12]
A12
R2
BA0
L2
BA1
L3
009:Y14
22
A_URSA_MCLKE
R914
N3
A6
A7
A_URSA_BA1
22
R913
A5
DDRA_A[6]
DDRA_A[7]
009:V10
R912
URSA_ODT
009:X17
N2
A4
A_URSA_BA0
009:V10
008:C10;009:Y15
B_URSA_RASZ
008:U4
URSA_MCLK1
M7
A3
DDRA_A[4]
DDRA_A[11]
009:V10
22
009:T11
URSA_MCLK
A2
DDRA_A[3]
DDRA_A[9]
A_URSA_RASZ
22
DDRA_A[2]
DDRA_A[5]
DDRA_A[4]
AR910
URSA_A[11]
008:C10
B_URSA_MCLKE
009:T11
R905
DDRA_A[7]
22
URSA_A[7]
URSA_A[0]
DDRB_A[4]
B_URSA_BA1
R903
DDRA_A[12]
URSA_A[5]
B_URSA_RASZ
B_URSA_BA0
DDRA_A[9]
AR912
DDRB_A[0]
DDRB_A[6]
DDRB_A[12]
009:Q14
DDRA_A[10]
DDRB_A[5]
DDRB_A[2]
009:Q14
L2
AR904
DDRB_A[3]
DDRB_A[9]
DDRB_A[9]
M2
P7
DDRB_A[10]
22
G8
G2
DQ1
DDR_DQ[1]
H7
DQ2
DDR_DQ[2]
H3
DQ3
DDR_DQ[3]
H1
DQ4
DDR_DQ[4]
H9
DQ5
DDR_DQ[5]
F1
DQ6
DDR_DQ[6]
F9
DQ7
DDR_DQ[7]
C8
DQ8
DDR_DQ[8]
C2
DQ9
DDR_DQ[9]
D7
DQ10
DDR_DQ[10]
D3
DQ11
DDR_DQ[11]
D1
DQ12
D9
DQ13
DDR_DQ[13]
B1
DQ14
DDR_DQ[14]
B9
DQ15
DDR_DQ[15]
A1
VDD5
E1
CK
J8
J9
VDD3
CK
K8
M9
VDD2
CKE
K2
R1
VDD1
ODT
K9
CS
L8
A9
VDDQ10
RAS
K7
C1
VDDQ9
CAS
L7
C3
VDDQ8
WE
K3
C7
VDDQ7
C9
VDDQ6
VDDQ5
E9
E9
VDDQ5
VDDQ4
G1
G1
VDDQ4
G3
VDDQ3
G7
VDDQ2
G9
VDDQ1
VDDQ3
G3
VDDQ2
G7
VDDQ1
G9
LDQS
R906
56
UDQS
R907
56
F3
LDM
B3
UDM
R908
R909
56
56
URSA_DQS2
URSA_DQS3
008:C14
008:C13
008:Q4
URSA_DQS0
008:R4
URSA_DQS1
URSA_DQM2
008:C15
008:Q4
URSA_DQM0
URSA_DQM3
008:C15
008:P4
URSA_DQM1
URSA_DQSB2
008:C14
008:Q4
URSA_DQSB0
URSA_DQSB3
008:C13
008:R4
URSA_DQSB1
R915
56
LDQS
F7
R916
56
UDQS
B7
R917
56
LDM
F3
R918
56
UDM
B3
R919
56
LDQS
E8
A3
VSS5
R920
56
UDQS
A8
VSS5
A3
E8
LDQS
R910
56
VSS4
E3
A8
UDQS
R911
56
E3
VSS4
VSS3
J3
J3
VSS3
VSS2
N1
N1
VSS2
VSS1
P9
P9
VSS1
B2
VSSQ10
B8
VSSQ9
A7
VSSQ8
D2
VSSQ7
D8
VSSQ6
E7
VSSQ5
F2
VSSQ4
VSSQ10
B2
VSSQ9
B8
VSSQ8
A7
VSSQ7
D2
VSSQ6
D8
L1
NC4
NC4
L1
R3
NC5
009:O16
B_URSA_BA0
URSA_BA0
008:L4;009:T10
NC5
R3
R7
NC6
009:O16
009:Q15
B_URSA_BA1
URSA_BA1
008:K4;009:T10
NC6
R7
B_URSA_MCLKE
URSA_MCLKE
008:M4;009:T10
009:Q14
B_URSA_WEZ
URSA_WEZ
NC1
008:K4;009:T10
A2
NC1
A2
E2
NC2
NC2
E2
R8
NC3
AR908
22
AR909
008:L4;009:V11
+1.8V_FRC_DDR
008:K4;009:V11
008:M4;009:V11
A_URSA_BA0
URSA_BA0
URSA_BA1
009:AA16
A_URSA_BA1
009:AA16
A_URSA_MCLKE
URSA_MCLKE
NC3
+1.8V_FRC_DDR
R8
009:Z15
VSSQ5
E7
VSSQ4
F2
VSSQ3
F8
F8
VSSQ2
H2
H2
VSSQ2
H8
VSSQ1
VSSQ1
H8
J7
J1
VSSDL
008:K4;009:V11
A_URSA_WEZ
URSA_WEZ
009:Y14
22
VDDL
VSSDL
VDDL
J7
J1
DDR_DQ[12]
56
URSA_DQ[8]
DDR_DQ[10]
URSA_DQ[10]
DDR_DQ[13]
URSA_DQ[13]
DDR_DQ[7]
AR915
DDR_DQ[0]
URSA_DQ[7]
56
URSA_DQ[5]
DDR_DQ[5]
DDR_DQ[11]
AR916
URSA_DQ[11]
56
DDR_DQ[12]
DDR_DQ[9]
URSA_DQ[12]
URSA_DQ[9]
DDR_DQ[14]
DDR_DQ[6]
URSA_DQ[0]
URSA_DQ[2]
DDR_DQ[2]
URSA_DQ[14]
AR917
DDR_DQ[1]
URSA_DQ[6]
56
URSA_DQ[1]
DDR_DQ[3]
URSA_DQ[3]
DDR_DQ[4]
URSA_DQ[4]
+1.8V_FRC_DDR
VDD4
C9
B7
DDR_DQ[0]
DQ0
VDDQ6
F7
URSA_DQ[15]
DDR_DQ[8]
DDR_DQ[0-15]
URSA_DQ[24]
DDR_DQ[31]
DQ1
DDR_DQ[19]
VREF
150
DDR_DQ[20]
AR902
URSA_DQ[31]
G8
DDR_DQ[17]
DDR_DQ[18]
VREF
R923
OPT
DDR_DQ[19]
56
URSA_DQ[20]
19
DDR_DQ[22]
DDR_DQ[17]
DQ0
DDRA_A[0-12]
AR901
URSA_DQ[17]
DDR_DQ[16]
008:U4;009:D21
AR914
DDR_DQ[15]
H5PS5162FFR-S6C
DDRB_A[0-12]
DDR_DQ[30]
URSA_DQ[22]
URSA_DQ[19]
H5PS5162FFR-S6C
DDR_DQ[28]
URSA_DQ[0-31]
IC901
DDR_DQ[25]
56
DDR_DQ[16-31]
URSA_DQ[25]
URSA_DQ[30]
20
R902
DDR_DQ[27]
URSA_DQ[28]
0.1uF
AR900
URSA_DQ[27]
21
C908
IC900
1000pF
C910
URSA_DQ[0-31]
150
008:U4;009:AL21
OPT
R900
22
+1.8V_FRC_DDR
+1.8V_FRC_DDR
23
VSSQ3
9
8
resonance Compensation
7
+1.8V_MEMC
+1.8V_FRC_DDR
C952
0.1uF
0.1uF
0.1uF
C951
0.1uF
C950
C948
0.1uF
C949
0.1uF
C947
0.1uF
C946
0.1uF
C945
6
5
4
3
2
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
08.10.15
15
AP
H24
H23
J25
O
D3.3V
SYS_RESETb
H28
J26
C414
10uF
2.7K
H27
R116
F26
G26
J27
J28
F27
G24
R117
33
H26
G27
G28
K23
G25
NAND_IO[0-7]
EBI_ADDR0
GPIO_04
EBI_ADDR5
GPIO_05
EBI_ADDR6
GPIO_06
EBI_ADDR8
GPIO_07
EBI_ADDR9
GPIO_08
EBI_ADDR13
GPIO_09
EBI_ADDR12
GPIO_10
EBI_ADDR11
GPIO_11
EBI_ADDR10
GPIO_12
EBI_ADDR7
GPIO_13
EBI_TAB
GPIO_14
EBI_WE1B
GPIO_15
EBI_CLK_IN
GPIO_16
EBI_CLK_OUT
GPIO_17
EBI_RWB
GPIO_18
EBI_CS0B
GPIO_19
GPIO_20
D3.3V
4.7K
IC403
AT24C512BW-SH-T
4.7K
R419
R422
C2
2.7K
2.7K
C2
R192
R194
D3.3V
D3.3V
R193
NVRAM
2.7K
NAND_IO[0]
U24
NAND_IO[1]
T26
NAND_IO[2]
T27
NAND_IO[3]
U26
NAND_IO[4]
U27
NAND_IO[5]
V26
NAND_IO[6]
V27
NAND_IO[7]
V28
NAND_CEb
T24
NAND_ALE
R23
C3
NAND_REb
T23
C2
NAND_CLE
T25
C2
C3
NAND_WEb
R24
NAND_RBb
U25
GPIO_21
NAND_DATA0
GPIO_22
NAND_DATA1
GPIO_23
NAND_DATA2
GPIO_24
NAND_DATA3
GPIO_25
NAND_DATA4
GPIO_26
NAND_DATA5
GPIO_27
NAND_DATA6
GPIO_28
NAND_DATA7
GPIO_29
NAND_CS0B
GPIO_30
NAND_ALE
GPIO_31
NAND_REB
GPIO_32
NAND_CLE
GPIO_33
NAND_WEB
GPIO_34
NAND_RBB
GPIO_35
GPIO_36
GPIO_37
W24
A0
A1
VCC
U23
C416
0.1uF
WP
C420
4700pF
V23
V24
SF_MISO
GPIO_38
SF_MOSI
GPIO_39
SF_SCK
GPIO_40
SF_CSB
GPIO_41
GPIO_42
A2
GND
R411
22
SCL
I4;2:AH5;14:C5;3:B4
GPIO_43
SCL2_3.3V
R412
22
SDA
GPIO_44
GPIO_45
I4;2:AH5;14:C6;3:B4
GPIO_46
SDA2_3.3V
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
SGPIO_00
SGPIO_01
SGPIO_02
SGPIO_03
SGPIO_04
SGPIO_05
SGPIO_06
TUNER_RESETb
N25
5:B6
L25
K27
K28
K24
K26
K25
VREG_CTRL
AA27
BCMPWM_VBR_B
AA28
AA26
RF_GAIN1
L1
0
L3
4:A5;7:C2
5:B7
RGB_SW
R138
1:J5
L2
Y25
BCM_RX
Y26
14:R8
14:X7
BCM_TX
M27
AA25
R25
N28
N27
RF_SW
5:B7
COMPOSITE2_SW
1:B4
R105
22
AH18
P23
M23
AD19
BCM_AUD_MCLK
3:B6
BCMPWM_VBR_A
4:A6
BIT_SEL
7:E3
LVDS_SEL
7:E2
AE19
M4
M5
L23
Y28
Y27
G2
SF_SCK
R198
G3
SF_MISO
R196
G5
SF_MOSI
R197
G6
SF_CSB
R109
D3.3V
OPT
R120
2.7K
G4
L24
COMPOSITE1_SW
1:B7
MEMC_RESET
17:A7;17:C6
BLUETOOTH_RESET
I3;14:I3
P25
L5
K4
R135
K1
L27
M26
N23
R28
R27
R26
DIMMING_RESET
P28
3:C2;3:E2;3:H3
P27
K6
K5
22
R137
P26
22
R143
M3
22
R178
M2
M1
L4
L6
W27
DDC_SCL
DDC_SDA
HDMI_HTPLG_IN
COMP1_SW
1:D7
COMP2_SW
1:E7
12:E5
D3.3V
12:E4
11:AH18
SCL0_3.3V
W28
W26
W25
J2
5:B3;5:B6
SDA0_3.3V
5:B3;5:B6
SCL1_3.3V
5:G5;16:G14
SDA1_3.3V
5:G5;16:G14
B5;2:AH5;14:C5;3:B4
SCL2_3.3V
J1
SDA2_3.3V
K3
K2
I2C
I2C
I2C
I2C
D3.3V
D3.3V
L26
SGPIO_07
Boot Strap
D3.3V
2.7K
GPIO_03
2.7K
GPIO_02
EBI_ADDR1
R164
EBI_ADDR2
R163
GPIO_01
2.7K
GPIO_00
EBI_ADDR4
4.7K
R170
IC400
KIA7029AF
EBI_ADDR3
4.7K
R171
J24
H25
R408
330
N26
J23
4.7K OPT
R176
R409
910
SW400
SKHMPWE010
1
R410
10K
10:G2
JTAG_RESETb
ENG
IC100
BCM3556
D3.3V
R131
RESET
D3.3V
D3.3V
D3.3V
R4011
12:B3;12:I4 330
POWER_DET
4.7K
OPT
R177
4.7K
R180
4.7K
R183
4.7K
R184
4.7K
R187
0
1
2
3
:
:
:
:
B5;2:AH5;14:C6;3:B4
SCL3_3.3V
12:F3
SDA3_3.3V
12:F3
TUNER
TDA9996,NTP3100
NVRAM, MICOM
FRC, DIMMING IC
D3.3V
2.7K
2.7K
NC_2
NC_3
R191
NC_4
NC_5
NC_6
NAND_IO[4]
E5
D3.3V
D3.3V
2.7K
R315
E3;E6
E5
NAND_REb
NAND_CEb
NC_7
C116
4700pF
C114
0.1uF
2.7K
OPT
R324
2.7K
RB
R
2.7K
OPT
R322
2.7K
Open Drain
NAND_IO[5]
E3;E6
OPT
R319
E3;E6
NAND_IO[6]
R321
E6
NAND_RBb
NC_8
VDD_1
VSS_1
NC_9
NC_10
E5
E5
CL
NAND_CLE
AL
NAND_ALE
D3.3V
E5
NAND_WEb
W
WP
NC_11
R136
4.7K
NC_12
NC_13
C
FLASH_WP_1
Q101
KRC103S
NC_14
NC_15
48
47
46
45
44
43
42
8
9
41
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
NC_29
NC_28
NC_27
NAND_IO[0-7]
NC_26
I/O7
NAND_IO[7]
I/O6
NAND_IO[6]
I/O5
NAND_IO[5]
I/O4
NAND_IO[4]
NC_25
NC_24
NC_23
C101
4700pF
VDD_2
VSS_2
C115
0.1uF
NC_22
NAND_IO[0-7]
2.7K
OPT
R320
R316
2.7K
R317
NC_1
NAND_IO[2]
E3;E6
2.7K
E3;E6
NAND_IO[3]
OPT
R318
2.7K
E3;E6
NAND_IO[0]
R314
IC101
NAND01GW3A2CN6E
NC_21
NC_20
I/O3
NAND_IO[3]
I/O2
NAND_IO[2]
I/O1
NAND_IO[1]
I/O0
NAND_IO[0]
NC_19
NC_18
NC_17
NC_16
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
BCM3556 & NAND
2009.01.20
9
17
K
D1.2V
D1.2V
C243
0.1uF
54MHz X-TAL
C250
0.1uF
C249
4.7uF
C251
0.1uF
C252
0.1uF
C253
0.1uF
C254
0.1uF
C286
33uF
C287
33uF
C244
0.1uF
C246
0.1uF
C256
0.1uF
C258
0.1uF
C259
0.1uF
C262
0.1uF
C265
0.1uF
C288
0.1uF
C266
0.1uF
C290
0.1uF
1
IC100
BCM3556
B25
A26
LVDS_TX_0_DATA0_P
PKT0_DATA
LVDS_TX_0_DATA0_N
PKT0_SYNC
LVDS_TX_0_DATA1_P
RMX0_CLK
LVDS_TX_0_DATA1_N
RMX0_DATA
LVDS_TX_0_DATA2_P
RMX0_SYNC
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA3_N
G23
12pF
C298
R205
22
D24
E27
E26
1%
1008LS-272XJLC R208
604
C25
X201
54MHz
D25
D28
D27
54MHz_XTAL_P
D3
54MHz_XTAL_N
D3
D26
L206
E23
E24
F25
C27
C26
C296
33pF
B28
B27
12pF
C299
A27
R211
22
F24
F23
E25
C28
A28
POD2CHIP_MCLKI
LVDS_TX_0_DATA4_P
POD2CHIP_MDI0
LVDS_TX_0_DATA4_N
POD2CHIP_MDI1
LVDS_TX_0_CLK_P
POD2CHIP_MDI2
LVDS_TX_0_CLK_N
POD2CHIP_MDI3
LVDS_TX_1_DATA0_P
POD2CHIP_MDI4
LVDS_TX_1_DATA0_N
POD2CHIP_MDI5
LVDS_TX_1_DATA1_P
POD2CHIP_MDI6
LVDS_TX_1_DATA1_N
POD2CHIP_MDI7
LVDS_TX_1_DATA2_P
POD2CHIP_MISTRT
LVDS_TX_1_DATA2_N
POD2CHIP_MIVAL
LVDS_TX_1_DATA3_P
CHIP2POD_MCLKO
LVDS_TX_1_DATA3_N
CHIP2POD_MDO0
LVDS_TX_1_DATA4_P
CHIP2POD_MDO1
LVDS_TX_1_DATA4_N
CHIP2POD_MDO2
LVDS_TX_1_CLK_P
CHIP2POD_MDO3
LVDS_TX_1_CLK_N
LVDS_PLL_VREG
CHIP2POD_MDO4
CHIP2POD_MDO5
LVDS_TX_AVDDC1P2
CHIP2POD_MDO6
LVDS_TX_AVDD2P5_1
CHIP2POD_MDO7
LVDS_TX_AVDD2P5_2
CHIP2POD_MOSTRT
LVDS_TX_AVSS_1
CHIP2POD_MOVAL
LVDS_TX_AVSS_2
LVDS_TX_AVSS_3
L202
BLM18PG121SN1D
AC18
AF20
3
0.1uF
AG21
C223
C219
0.1uF
0.1uF
C214
4.7uF
AG20
C212
LVDS_TX_AVSS_4
VDAC_AVDD2P5
LVDS_TX_AVSS_5
VDAC_AVDD1P2
LVDS_TX_AVSS_6
VDAC_AVDD3P3_1
LVDS_TX_AVSS_7
VDAC_AVDD3P3_2
LVDS_TX_AVSS_8
LVDS_TX_AVSS_9
LVDS_TX_AVSS_10
AF19
D3.3V
ENG
JTAG
D3.3V
AD20
AE20
P200
AH22
TJC2508-4A
C215
0.1uF
E5
BCM3549_JTAG_TDI
E5
E5
BCM3549_JTAG_TMS
E4
BCM3549_JTAG_TCK
R200
1.5K
R201
1.5K
C200
4.7uF
1K R235
1K R234
JP202
CLK54_AVDD1P2
VDAC_1
CLK54_AVDD2P5
VDAC_2
CLK54_AVSS
CLK54_XTAL_N
CLK54_XTAL_P
M24
OPT
JTAG_RESETb
R237
BSC_S_SDA
A3.3V
T6
R7
BBS DEBUG
T7
1K
A2.5V
T8
U3
L200
BLM18PG121SN1D
T4
T3
R4
4.7uF
0.1uF
0.1uF
0.1uF
R209
3.9K
1%
V1
USB_DM1
V2
USB_DP1
USB_DM2
D3.3V
U1
U2
T5
C209
C208
C207
R210
120
C203
USB_DP2
C202
C201
100pF
0.1uF
U4
R5
2.7K R215
R2
USB_PWRFLT2
14:AI20
T2
T1
USB_PWRON2
14:AH21
R1
USB_AVSS_1
VCXO_AGND_3
USB_AVSS_2
VCXO_AVDD1P2
USB_AVSS_3
VCXO_PLL_AUDIO_TESTOUT
INCM
INCM
P5
P3
P2
A1.2V
A2.5V
N3
N2
P1
14:A6
14:A5
14:A4
Example)
N1
AV1_INCM
C2007
0.15uF
COMP1_INCM
C2008
0.15uF
COMP2_INCM
C2009
0.15uF
P7
14:A5
AV1_L_IN
14:A5
AV1_R_IN
14:A6
COMP1_L_IN
14:A6
COMP1_R_IN
14:A5
COMP2_L_IN
14:A5
COMP2_R_IN
14:A4
SIDE_L_IN
14:A4
SIDE_R_IN
14:A3
PC_L_IN
14:A3
PC_R_IN
R202
R203
51
51
C204
USB_AVDD1P2PLL
USB_AVDD2P5
RESET_OUTB
RESETB
NMIB
USB_AVDD2P5REF
TMODE_0
USB_AVDD3P3
TMODE_1
USB_RREF
TMODE_2
USB_DM1
TMODE_3
USB_DP1
SPI_S_MISO
USB_DM2
POR_OTP_VDD2P5
USB_DP2
POR_VDD1P2
USB_MONCDR
C205
AD7
15nF
AF6
R204
51
C206
15nF
AH4
R206
51
C222
15nF
AG5
AG4
R207
51
C210
15nF
AG6
R212
51
C211
15nF
AF7
AE7
R213
R214
51
51
C217
C218
AH5
15nF
AG7
15nF
AH6
R216
R217
51
51
C220
C221
AD8
15nF
AF8
15nF
AE8
PC_INCM
AH7
C2015
0.15uF
AH8
AB10
47nF
C269
47nF
47nF
47nF
C268
C260
C232
47nF
47nF
47nF
C230
C229
C227
47nF
C226
47nF
A2.5V
47nF
0.47uF C2014
0.47uF C2016
0.47uF C2012
AB9
AA10
C225
<<--
AF5
C224
0.47uF C2013
0.47uF C2011
AG8
AA11
AB11
C273
0.1uF
AC8
AE5
B1
B2
C2
C3
7:D7
7:D7
LVDS_TX_1_DATA0_P
7:D7
LVDS_TX_1_CLK_N
7:D7
LVDS_TX_1_CLK_P
7:D7
LVDS_TX_0_DATA4_N
7:E7
LVDS_TX_0_DATA4_P
7:E7
LVDS_TX_0_DATA3_N
7:E7
D2
E1
LVDS_TX_0_DATA2_N
7:E7
LVDS_TX_0_DATA2_P
7:E7
E3
E4
LVDS_TX_0_DATA1_P
7:E7
LVDS_TX_0_DATA0_N
7:E7
D4
OPT
C228
10uF
C267
0.01uF
C289
0.1uF
D3.3V
C216
0.1uF
C292
0.1uF
C270
0.1uF
C294
0.1uF
D1.8V
LVDS_TX_0_CLK_N
7:E7 A1.2V
LVDS_TX_0_CLK_P
7:E7
A2.5V
F4
C247
0.1uF
F2
C272
0.1uF
C275
0.1uF
C278
4.7uF
C276
0.1uF
C280
4.7uF
C297
4.7uF
C2004
33uF
C1
F3
C4
A5
E5
E6
D7
D1.8V
E7
F7
G7
A1.2V
H7
C248
1000pF
A2.5V
C281
1000pF
C282
1000pF
C283
1000pF
C284
0.01uF
C2005
0.01uF
C285
0.01uF
C2006
0.01uF
AD28
AD26
AC26
54MHz_XTAL_N
AC27
54MHz_XTAL_P
AE25
H4
H4
Y23
A1.2V
AB24
AC24
L203
BLM18PG121SN1D
AF25
AF24
C233
0.1uF
D1.2V
C235
4.7uF
AD5
USB_MONPLL
EJTAG_TCK
USB_PWRFLT_1
EJTAG_TDI
USB_PWRFLT_2
EJTAG_TDO
USB_PWRON_1
EJTAG_TMS
USB_PWRON_2
EJTAG_TRSTB
2.7K
J8
K8
J4
J6
L8
A2.5V
J3
V25
AH3
AB8
M8
A1.2V
D3.3V
N8
L201
BLM18PG121SN1D
C231
10uF
P8
C234 R224
0.1uF 4.7K
R8
OPT
R225
4.7K
AA8
H9
BCM3549_JTAG_TCK
H3
BCM3549_JTAG_TDI
H2
BCM3549_JTAG_TDO
H1
BCM3549_JTAG_TMS
G1
OPT
EPHY_RDP
PLL_MAIN_AGND
EPHY_TDN
PLL_MAIN_MIPS_EREF_TESTOUT
EPHY_TDP
PLL_RAP_AVD_TESTOUT
EPHY_AVDD1P2
PLL_RAP_AVD_AVDD1P2
EPHY_AVDD2P5
PLL_RAP_AVD_AGND
G2
H11
G2
G2
H12
H13
G2
H14
G2
1K
R226
H15
H5
1K
R227
H16
L204
BLM18PG121SN1D
AB26
PLL_MAIN_AVDD1P2
BCM3549_JTAG_TRSTb
H10
H6
EPHY_VREF
EPHY_RDN
H8
R221
J5
EJTAG_CE1
EPHY_RDAC
AD6
9:B7;14:I27
SYS_RESETb
F6
N24
AC25
AB27
M6
L207
BLM18PG121SN1D
N6
N7
H17
A1.2V
H18
H19
H21
C240
4.7uF
C237
0.1uF
C238
0.1uF
J21
A1.2V
K21
L21
M21
C241
4.7uF
N21
EPHY_PLL_VDD1P2
P21
EPHY_AGND_1
AA24
EPHY_AGND_2
BYP_CPU_CLK
EPHY_AGND_3
BYP_DS_CLK
BYP_SYS175_CLK
AUDMX_LEFT1
IC100
BCM3556
IC100
BCM3556
R21
Y24
T21
AE24
1K
R222
U21
AD25
1K
R223
V21
W21
A3.3V
Y21
AUDMX_RIGHT1
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VDDC_33
J7
K7
L7
M7
AB7
AC7
G8
D9
AA9
G10
A11
L11
M11
N11
P11
R11
T11
U11
V11
D12
G12
L12
M12
N12
P12
R12
T12
U12
V12
L13
M13
N13
P13
AUDMX_INCM1
R13
AUDMX_LEFT2
T13
AH27
AUDMX_RIGHT2
AUDMX_INCM2
AUDMX_LEFT3
AUDMX_RIGHT3
C2003
0.1uF
V13
AA12
AA13
AA18
AUDMX_LEFT4
AA19
AUDMX_RIGHT4
E28
AUDMX_INCM4
L28
AUDMX_LEFT5
U28
AUDMX_RIGHT5
AB28
AUDMX_INCM5
VDDO_1
VDDO_2
VDDO_3
VDDO_4
VDDO_5
VDDO_6
VDDO_7
VDDO_8
D1.8V
AUDMX_AVSS_1
AUDMX_AVSS_2
AUDMX_AVSS_3
AUDMX_AVSS_4
AUDMX_AVSS_5
AUDMX_AVSS_6
AUDMX_LDO_CAP
AUDMX_AVDD2P5
L14
M14
N14
P14
R14
T14
U14
V14
L15
M15
AUDMX_RIGHT6
AUDMX_INCM6
U13
G14
AUDMX_INCM3
AUDMX_LEFT6
AGC_VDDO
D3.3V
A9
G9
G11
G13
A14
G15
G17
A19
G19
DDRV_1
DDRV_2
DDRV_3
DDRV_4
DDRV_5
DDRV_6
DDRV_7
DDRV_8
DDRV_9
N15
P15
R15
T15
U15
V15
A16
G16
L16
M16
N16
C271
10uF
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
C264
0.1uF
7:E7
LVDS_TX_0_DATA0_P
D3
C263
4.7uF
7:E7
LVDS_TX_0_DATA1_N
E2
C261
0.1uF
7:E7
LVDS_TX_0_DATA3_P
D1
H4
AE6
15nF
B5
C257
0.01uF
7:D7
LVDS_TX_1_DATA1_P
LVDS_TX_1_DATA0_N
P24
USB_AVDD1P2
BYP_SYS216_CLK
SIDE_INCM
C2010
0.15uF
14:A3
N5
50V
N4
14:A5
P4
C5
C255
0.1uF
D3.3V
USB_AVSS_5
P6
1K R219
D6
C245
4.7uF
USB_AVSS_4
EJTAG_CE0
R218
240
D5
F1
7:D7
7:D7
LVDS_TX_1_DATA1_N
A2
F5
LVDS_TX_1_DATA3_P
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA2_P
AA23
VCXO_AGND_2
R6
A1.2V
A1
7:D7
BSC_S_SCL
VCXO_AGND_1
4
1K
A3
7:D7
PM_OVERRIDE
M25
MNT_VOUT
JP203
B3
7:D7
7:D7
LVDS_TX_1_DATA3_N
AD27
VDAC_RBIAS
CLK54_MONITOR
R3
VDAC_AVSS_3
VDAC_VREG
1K
R236
R232
AG19
B6
LVDS_TX_1_DATA4_N
LVDS_TX_1_DATA4_P
LVDS_TX_AVSS_11
AH21
OPT
BCM3549_JTAG_TDO
AH20
C6
VDAC_AVSS_2
OPT
9:A7
JP201
C213
0.01uF
OPT
BCM3549_JTAG_TRSTb
R220
560
R228
1% 75
E5
1K R233
10K R229
JP200
VDAC_AVSS_1
A4
C2002
0.1uF
A25
PKT0_CLK
C2001
0.1uF
B26
C239
0.1uF
C242
4.7uF
C295
0.1uF
C2000
4.7uF
C24
TU_SYNC
C236
0.1uF
5:B6
B4
D23
TU_SCLK
TU_SDATA
5:B6
5:B6
D3.3V
P16
DVSS_1
DVSS_62
DVSS_2
DVSS_63
DVSS_3
DVSS_64
DVSS_4
DVSS_65
DVSS_5
DVSS_66
DVSS_6
DVSS_67
DVSS_7
DVSS_68
DVSS_8
DVSS_69
DVSS_9
DVSS_70
DVSS_10
DVSS_71
DVSS_11
DVSS_72
DVSS_12
DVSS_73
DVSS_13
DVSS_74
DVSS_14
DVSS_75
DVSS_15
DVSS_76
DVSS_16
DVSS_77
DVSS_17
DVSS_78
DVSS_18
DVSS_79
DVSS_19
DVSS_80
DVSS_20
DVSS_81
DVSS_21
DVSS_82
DVSS_22
DVSS_83
DVSS_23
DVSS_84
DVSS_24
DVSS_85
DVSS_25
DVSS_86
DVSS_26
DVSS_87
DVSS_27
DVSS_88
DVSS_28
DVSS_89
DVSS_29
DVSS_90
DVSS_30
DVSS_91
DVSS_31
DVSS_92
DVSS_32
DVSS_93
DVSS_33
DVSS_94
DVSS_34
DVSS_95
DVSS_35
DVSS_96
DVSS_36
DVSS_97
DVSS_37
DVSS_98
DVSS_38
DVSS_99
DVSS_39
DVSS_100
DVSS_40
DVSS_101
DVSS_41
DVSS_102
DVSS_42
DVSS_103
DVSS_43
DVSS_104
DVSS_44
DVSS_105
DVSS_45
DVSS_106
DVSS_46
DVSS_107
DVSS_47
DVSS_108
DVSS_48
DVSS_109
DVSS_49
DVSS_110
DVSS_50
DVSS_111
DVSS_51
DVSS_112
DVSS_52
DVSS_113
DVSS_53
DVSS_114
DVSS_54
DVSS_115
DVSS_55
DVSS_116
DVSS_56
DVSS_117
R16
T16
U16
V16
AA16
D17
L17
M17
N17
P17
R17
T17
U17
V17
AA17
AC19
G18
L18
M18
N18
P18
R18
T18
U18
V18
D20
G20
H20
A21
E21
F21
G21
E22
F22
G22
H22
J22
K22
L22
M22
N22
P22
R22
T22
U22
V22
W22
Y22
AA22
W23
AB23
F28
M28
T28
AC28
DVSS_57
DVSS_58
DVSS_59
DVSS_60
DVSS_61
BRAZIL DVR DV
BCM3556_AUDIO_XTAL
2009.01.20
10
17
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
29
28
27
IC100
BCM3556
AE18
AB22
A2.5V
AF26
25
A1.2V
BLM18PG121SN1D
L102
AF27
AF28
AG27
AE26
AE28
24
C113
0.1uF
A1.2V
L103
A1.2V
AD24
AB19
AB25
C119
0.1uF
BLM18PG121SN1D
23
AE27
C144
0.1uF
DS_AGCI_CTL
I2S_CLK_IN
DS_AGCT_CTL
I2S_CLK_OUT
EDSAFE_AVSS_1
I2S_DATA_IN
EDSAFE_AVSS_2
I2S_DATA_OUT
EDSAFE_AVSS_4
I2S_LR_OUT
EDSAFE_AVSS_5
AUD_LEFT0_N
EDSAFE_AVDD2P5
AUD_LEFT0_P
EDSAFE_DVDD1P2
AUD_AVDD2P5_0
EDSAFE_IF_N
AUD_AVSS_0_1
EDSAFE_IF_P
AUD_AVSS_0_2
PLL_DS_AGND
AUD_AVSS_0_3
PLL_DS_AVDD1P2
AUD_AVSS_0_4
PLL_DS_TESTOUT
AUD_AVSS_0_5
AUD_RIGHT0_N
A2.5V
AUD_RIGHT0_P
AB18
C111
0.1uF
BLM18PG121SN1D
C112
0.1uF
AC17
L104 C120
1000pF
BLM18PG121SN1D
22
C123
0.01uF
AB17
AD14
AD16
AB15
L105
AC15
AD13
C118
0.1uF
21
AE13
AC13
AB14
AC14
75 1%
R147
75 1%
R119
INCM
INCM
75 1%
R140
AC12
20
AD12
AB13
AA14
AC11
AD11
AB12
0.1uF
RGB_B
0.1uF
C126
0.1uF
AE9
AF9
AH9
AG9
COMP1_Y
COMP1_Pr
COMP1_Pb
C127
0.1uF
5% 91
R114
C128
COMP2_Y
COMP2_Pr
COMP2_Pb
AG15
0.1uF
AE15
C129
0.1uF
AF15
C130
0.1uF
AH15
C117
1:E7
1:E6
1:E6
C125
AG16
C131
0.1uF
AF16
C132
0.1uF
AH17
AH16
5% 91
R142
16
1:G6
1:D7
1:D6
1:D6
0.1uF
COMP1_VID_INCM
1:G5
5% 91
R141
0.1uF
C107
AD10
AC10
5% 91
R130
1:F2
C106
RGB_G
0.1uF
C124
RGB_R
5% 91
R115
B_VID_INCM
R190
34
G_VID_INCM
1:F2
1:G5
0.1uF
R181
34
17
1:F2
R104
34
18
C105
R_VID_INCM
R199
34
1:F3
5% 91
R129
19
AG14
AE14
AF14
1:F2
0.1uF
COMP2_VID_INCM
C122
AH14
ADLC 5S 03 015
D1101
5.5V
R110
R122
34
15
AE10
0.1uF
TU_CVBS_INCM
14:A6
TU_CVBS_IN
14:A5
14:A5
AV1_CVBS_IN
AE11
AF11
AH11
91
OPT
R118
C108
13
AG10
D1102
ADLC 5S 03 015
5.5V
14
14:A6
AH10
91
OPT
R111
AH13
AE12
75
OPT
AF12
C102
SIDE_CVBS_IN
0.1uF
AD9
C103
0.1uF
AG11
C104
0.1uF
AG12
AF13
AC9
14:A6
C110
TU_SIF
0.1uF
34
R121
34
11
R195
SIDE_CVBS_INCM
R106
34
14:A5
AF10
A2.5V
10K
R112
AV1_CVBS_INCM
12
R113
0
AH12
AG13
C141
240
R128
14:A5
0.1uF
0.1uF
AF17
12K
R127
C109
AG17
A1.2V
AD15
L106
BLM18PG121SN1D
AE16
AE17
C121
0.1uF
AB16
AA15
AC16
AG3
AF4
10
10K
R133
A2.5V
1:G6 RGB_HS
1:G7 RGB_VS
SD_V5_AVDD1P2
SD_V5_AVDD2P5
AUD_LEFT1_N
AUD_LEFT1_P
SD_V5_AVSS
AUD_RIGHT1_N
SD_V1_AVDD1P2
AUD_RIGHT1_P
SD_V1_AVDD2P5
AUD_AVDD2P5_1
SD_V1_AVSS_1
AUD_AVSS_1_1
SD_V1_AVSS_2
AUD_AVSS_1_2
SD_V2_AVDD1P2
AUD_AVSS_1_3
SD_V2_AVDD2P5
AUD_LEFT2_N
SD_V2_AVSS_1
AUD_LEFT2_P
SD_V2_AVSS_2
AUD_RIGHT2_N
SD_V2_AVSS_3
AUD_RIGHT2_P
SD_V3_AVDD1P2
AUD_AVDD2P5_2
SD_V3_AVDD2P5
AUD_AVSS_2_1
SD_V3_AVSS_1
AUD_AVSS_2_2
SD_V3_AVSS_2
AUD_SPDIF
SD_V4_AVDD1P2
SPDIF_AVDD2P5
SD_V4_AVDD2P5
SPDIF_AVSS
SD_V4_AVSS
SPDIF_IN_N
SD_R
SPDIF_IN_P
C133
SD_G
HDMI_RX_0_HTPLG_IN
SD_B
HDMI_RX_0_HTPLG_OUT
SD_INCM_B
SD_Y1
HDMI_RX_0_DDC_SCL
SD_PR1
HDMI_RX_0_DDC_SDA
SD_PB1
HDMI_RX_0_RESREF
SD_INCM_COMP1
HDMI_RX_0_CLK_N
SD_Y2
HDMI_RX_0_CLK_P
SD_PR2
HDMI_RX_0_DATA0_N
SD_PB2
HDMI_RX_0_DATA0_P
SD_INCM_COMP2
HDMI_RX_0_DATA1_N
SD_Y3
HDMI_RX_0_DATA1_P
SD_PR3
HDMI_RX_0_DATA2_N
SD_PB3
HDMI_RX_0_DATA2_P
SD_INCM_COMP3
HDMI_RX_0_VDD3P3
SD_L1
HDMI_RX_0_VDD1P2
SD_C1
HDMI_RX_0_VDD2P5
SD_INCM_LC1
HDMI_RX_0_AVSS_1
SD_L2
HDMI_RX_0_AVSS_2
SD_C2
HDMI_RX_0_AVSS_3
SD_INCM_LC2
HDMI_RX_0_AVSS_4
SD_L3
HDMI_RX_0_AVSS_5
HDMI_RX_0_AVSS_6
SD_C3
SD_INCM_LC3
HDMI_RX_0_PLL_AVSS
SD_CVBS1
HDMI_RX_0_PLL_DVDD1P2
SD_CVBS2
HDMI_RX_0_PLL_DVSS
R182
BCM_I2S_SCLK_OUT
BCM_I2S_DATA_OUT
AD18
22
AG18
R150
BCM_I2S_LRCLK_OUT
AG26
3:B4
3:B4
3:B4
A2.5V
AH26
AF23
AA20
C147
0.01uF
AB21
C155
0.1uF
C162
10uF
+5.0V
AC22
AC23
AD23
AH25
AG25
AH23
X18
AG23
HDMI_HTPLG_IN_5MA
AG24
AH24
ISA1530AC1
Q100
OPT
AE22
AB20
AC21
C148
0.01uF
C156
0.1uF
C163
10uF
C149
0.01uF
C157
0.1uF
C164
10uF
HDMI_HTPLG_IN
9:H4
B
C
AE23
AF21
AE21
AF22
AG22
AD21
AC20
AD22
AH2
BCM_SPDIF_OUT
1:H1
AC6
AE4
C150 +5.0V
0.1uF
AF3
AH1
R103 1K
AA6
AA5
HDMI_HTPLG_IN_5MA
R102
10K
A2.5V
AB3
R101
Y6
R107
499
0
R152
AC4
HDMI_SCL
HDMI_SDA
1%
AC1
AC2
AD1
AD2
AE1
AE2
AF1
AF2
AD3
HDMI0_RXC-_BCM
2:AA18
HDMI0_RXC+_BCM
2:AA18
HDMI0_RX0-_BCM
2:AA18
HDMI0_RX0+_BCM
2:AB18
HDMI0_RX1-_BCM
2:AB18
HDMI0_RX1+_BCM
2:AB18
HDMI0_RX2-_BCM
2:AC18
HDMI0_RX2+_BCM
2:AC18
A3.3V
BLM18PG121SN1D
L109
A1.2V
AE3
A2.5V
AC3
AD4
AB5
C153
0.1uF
C145
0.1uF
AB6
C160
0.1uF
BLM18PG121SN1D
L107
AG2
AB4
AA7
Y8
AC5
C158
0.1uF
W8
A2.5V
+5.0V
SD_CVBS4
AA3
SD_INCM_CVBS1
HDMI_RX_1_CEC_DAT
SD_INCM_CVBS2 HDMI_RX_1_HTPLG_IN
SD_INCM_CVBS3 HDMI_RX_1_HTPLG_OUT
SD_INCM_CVBS4
HDMI_RX_1_DDC_SCL
SD_SIF1
HDMI_RX_1_DDC_SDA
SD_INCM_SIF1
HDMI_RX_1_RESREF
SD_FB
HDMI_RX_1_CLK_N
SD_FS
SD_FS2
HDMI_RX_1_CLK_P
HDMI_RX_1_DATA0_N
HDMI_RX_1_DATA0_P
PLL_VAFE_AVDD1P2
PLL_VAFE_AVSS HDMI_RX_1_DATA1_N
HDMI_RX_1_DATA1_P
PLL_VAFE_TESTOUT
RGB_HSYNC
HDMI_RX_1_DATA2_N
RGB_VSYNC
HDMI_RX_1_DATA2_P
HDMI_RX_1_VDD3P3
HDMI_RX_1_VDD1P2
HDMI_RX_1_VDD2P5
HDMI_RX_1_AVSS_3
HDMI_RX_1_AVSS_4
HDMI_RX_1_AVSS_6
HDMI_RX_1_AVSS_7
HDMI_RX_1_AVSS_8
HDMI_RX_1_AVSS_9
HDMI_RX_1_PLL_AVSS
HDMI_RX_1_PLL_DVDD1P2
R149
R148
SD_CVBS3
HDMI_RX_1_AVSS_5
AH19
AG1
HDMI_RX_0_CEC_DAT
SD_INCM_G
HDMI_RX_1_AVSS_2
TU_SIF_INCM
12K
R139
14:A6
0.1uF
22
22
AD17
SD_INCM_R
HDMI_RX_1_AVSS_1
120
I2S_LR_IN
EDSAFE_AVSS_3
AF18
470
AA21
OPT
R125
AH28
R108
AG28
26
V4
10K
R134
R146
U6
10K
V5
V3
10K
10K
R155
R156
W4
499
R153
W2
OPT
1%
W3
Y1
Y2
AA2
A3.3V
AA1
AB2
A1.2V
A2.5V
AB1
Y3
Y4
W5
W1
U5
W6
U7
V7
W7
U8
V8
Y5
V6
AA4
Y7
HDMI_RX_1_PLL_DVSS
6
5
4
3
2
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
BCM VID_In/Front INT
2009.01.20
11
17
AP
ERROR_OUT
4:C5
C405
C417
0.1uF
22uF
R443
33K
GND
0.1uF
4.7K
ADJ/GND
OUTPUT
R442
EYEQ_SCL_3.3V
3
2
C404
10uF
EYEQ_SDA_3.3V
INPUT
C415
D3.3V
100
R441
+3.3V_ST
AZ1117H-3.3
LED_POWER_ON
IC404
+5.0V_ST
LED_WARM_STBY
3.3V_VDDP_ST , MICOM
+3.3V_ST
HDMI_CEC
R464
2K
R439
100
+3.3V_ST
R463
2K
R440
100
2:AD27
R461
100
R462
100
+3.3V_ST
100
R436
R415
P1.2/DA1
P1.1/DA0
P1.0/ET2
P4.2/AD2
VDD
P5.0
41
40
39
38
37
P5.3
26
P6.7
10
25
24
11
23
P6.5
/W_PROTECT
Q401
RT1N141C-T112-1
P6.4
P6.3
R448
R452
4.7K
4.7K
4.7K
4.7K
R451
22
R401
100
R402
100
C
R469
R480
15K
C
R467
Q460
2SC3052
OPT
OPT
R481
7.5K
R420
22
Q461
2SC3052
OPT
OPT
R474
1K
R450
C429
0.1uF
C430
0.1uF
GND
GND
R421
22
14:AA25
KEY1
GND
6
SCL2_3.3V
OPT
R477
OPT
B5;2:AH5;14:C5;3:B4
POWER_DET
14:AA25
KEY2
SDA2_3.3V
R471
R468
OPT
C428
22pF
7:E2
OPC_EN
C427
22pF
R438
22
3:D4
MUTE1
X400
24MHz
B5;2:AH5;14:C6;3:B4
R472
10K
+12.0V
4.7K
R435
1:I7
C
+3.3V_ST
GND
R437
22
C426
0.1uF
4.7K
R460
P6.6
OPT
R449
+3.3V_ST
100
R400
HSDA2/P7.4
0.1uF
IC406
M24C16-WMN6T
+5.0V_ST
3:A6
+5.0V
R407
4.7K
R475
30K
1/10W
1%
POWER_DET
MICOM_RESET
+3.3V_ST
+3.3V_ST
1K
22
21
R4006
4.7K
+5.0V
4:C6
4:D7;14:X19
+20.0V
9:C1
9:A7;B3
R4005
R434
15K
GND
POWER DETECT
FLASH_WP_1
33K
R456
P3.3/INT1
12
R428
4.7K
22
INV_ON/OFF
P7.2/HCLAMP
C425
4.7K
4.7K
R426
MTV416GMF
OPT
RL_ON
P3.2/INT0
ISCL/P7.5
R425
34
27
P7.1/VBLANK
ISDA/P3.4/T0
+3.3V_ST
P5.2
P4.1/AD1
R432
220
35
P7.0/HBLANK
28
P4.3/AD3
4.7K
P5.1
29
HSCL1/P3.0/RXD
R424
220
36
R454 1K
IC407
4:G1
LVDS_PANEL_CTRL
R459
100
R404
UCOM_TX
R455 1K
P5.7/CLKO2
20
14:X6
IR
UCOM_RX
P5.6
30
P6.2
14:R8
31
P6.1
1:C1;14:U23
RST
R403
R431
P1.7/SOGI
HSDA1/P3.1/TXD
22
R430
P5.5
P6.0/CLKO1
4.7K
1:J7
DDC_SDA
32
19
R418
18
22
R429
VSYNC/P1.6
17
1:J7
DDC_SCL
R453
68K
0.1uF
C431
P5.4
P4.0/AD0
+5.0V_ST
GND
33
16
C418
0.1uF
15
GND
GND
C422
0.1uF
HSYNC/P1.5
X1
1K
GND
VSS
R414
OPT
R416
R413
AI_ON/OFF
POD
GND
X2
LCD :
42
PDP :
14
R433
C424
0.1uF
P1.3/DA2
P1.4/DA3
43
Q400
2SC3052
R417
44
C
B
13
C423
0.1uF
4.7K
HSCL2/P7.3
R423
47K
KIA7029AF
I
R427
10K
100
IC405
33K
OPT
R470
OPT
GND
IC460
NCP803SN293
RESET
OPT
VCC
R4009
0
1
R473
OPT
R4010
0
GND
R476
5.1K
1/10W
5%
GND
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
MICOM, POWER_DET
2009.01.20
12
17
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BCM3556_POWER_GND
BRAZIL DVR DV
BCM3556_POWER
2009.01.20
13
17
AP
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
29
P1401
CONTROL / IR / LED
USB JACK
JP1409
1
27
SCL
R1406
USB_POWER_OUT_2
EYEQ_SCL_3.3V
26
25
D1402
5.6V
ADMC5M03200L
C1404
1000pF
OPT
EYEQ_SDA_3.3V
C1407
1000pF
OPT
D1401
5.6V
ADMC5M03200L
GND
JP1407
BLM18PG121SN1D
L1404
JP1408
BLM18PG121SN1D
L1405
KEY1
KEY1
KEY2
KEY2
JP1402
24
USB_DP2 10:C4
0.1uF
C1405
C1409
1000pF
50V
0.1uF
C1408
L1406 CB3216PA501E
0.1uF
C1411
+5.0V
JP1403
L1402
3.3V
JP1406
12
USB_POWER_OUT_2
R1413
R1401
10K
C
C1401
0.1uF
GND
OPT
OPT
R1402
0
R1408
0
R1403
4.7K
R1409
0
C1414
10uF
ENABLE
USB_PWRON2
10:C5
R1414
20
19
FAULT/
+5.0V_ST
VIN
130
+3.3V_ST
Q1401
2SC3052
VOUT
ILIMIT
C1413
0.1uF
JP1401
2.7K
MIC2009YM6-TR
13
GND
R1416
2.7K
IC1402
CB3216PA501E
C1406
0.1uF
C1403
1000pF
50V
PWR_ON
R1417
C1419
22uF
16V
L1410
USB_ST5V
MLB-201209-0120P-N2
11
D3.3V
BCM Tolerance
+3.3V_ST
JP1405
22
C1412
0.1uF
L1409
C1402 BLM18PG121SN1D
100pF
5.6V
IR
GND
MLB-201209-0120P-N2
10
ZD1402
5.6B
23
L1401
IR
LED_WARM_STBY
USB_5V
WARM_ST
D1405
ADMC5M03200L
JP1404
21
C1415
330uF
35V
5
GND
ZD1403
5.6B
+5.0V_ST
USB_DM2 10:C4
5V_ST
ZD1401
5.6B
L1407
MLB-201209-0120P-N2
R1407
JK1403
KJA-UB-4-0004
JP1410
SDA
12507WS-12L
WAFER-STRAIGHT
28
C1417
0.1uF
47
USB_PWRFLT2
10:C5
RL_ON
LED_POWER_ON
18
* Blue Tooth
L1403
CB3216PA501E
11
15
LH90_ONLY
10
LH90_ONLY
C1410
100uF
16V
14
13
LH90_ONLY
R1410
27
IC1401
USB_DM1
D1403
CDS3C05GTA
5.6V
OPT
BCM_RX
9:H6
USB_DP1
D1404
CDS3C05GTA
5.6V
OPT
R1412
0
LH90_ONLY
R1411
27
10:D4
UCOM_RX
12:D4
C1416
MC14053BDR2G
0ISTL00024A
10:D4
16V
Y1 1
16 VDD
Y0 2
15 Y
Z1 3
14 X
R1405
0
12
BLUETOOTH_RESET
LH90_ONLY
13 X1
Z0 5
12 X0
11
2
LH90_ONLY
1
10
12507WR-10L
INH 6
11 A
VEE 7
10 B
VSS 8
0.1uF
C1418
10uF
10V
RS232C_RxD
1:B2
RS232C_TxD
R1418
0
9:H6
BCM_TX
12:D4
UCOM_TX
R1404
0
VREG_CTRL
+5.0V_ST
L1408
RS-232C S/W
D3.3V
16
MLB-201209-0120P-N2
17
+5.0V
R1421
2.7K
R1420
4.7K
P1402
LH90_ONLY
9
8
7
6
5
4
3
2
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
USB/USB2SATA/Etc
2009.01.20
14
17
AP
A
DIMMING_1.8V
DIMMING_RX_1.8V
L3501
BLM18PG121SN1D
C3501
22uF
16V
C3508
0.1uF
16V
DIMMING_PLL_1.8V
D3.3V
DIMMING_3.3V
C3513
22uF
16V
C3511
0.1uF
16V
C3510
22uF
16V
DIMMING_TX_3.3V
L3503
BLM18PG121SN1D
L3502
BLM18PG121SN1D
C3509
0.1uF
16V
L3505
BLM18PG121SN1D
C3514
22uF
16V
C3525
0.1uF
16V
C3521
0.1uF
16V
C3528
22uF
16V
C3520
20pF
50V
7
R3563
0
DIMMING_3.3V
DIMMING_RESET
R3546
4.7K
22
R3529
C3519
20pF
50V
X3500
25MHz
URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
R3528
1M
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK-
IC3505
AZ7027RTRE1
OUT
VCC
C3529
0.1uF
16V
DIMMING_WP
DIMMING_SCL
SDA3_3.3V
DIMMING_SDA
SCL3_3.3V
URSA_A-[0]
URSA_A+[0]
URSA_A+[1]
URSA_A+[2]
URSA_A-[2]
AR3511URSA_A-[1]
0
URSA_A-[3]
URSA_A+[3]
AR3510 URSA_ACK0
URSA_ACK+
URSA_A+[4]
URSA_B+[0]
URSA_B-[0]
AR3509URSA_A-[4]
0
URSA_B+[1]
URSA_B-[2]
URSA_B+[2]
AR3508
URSA_B-[1]
0
URSA_B-[3]
URSA_B+[3]
AR3507 URSA_BCK0
URSA_BCK+
URSA_B+[4]
AR3506
URSA_B-[4]
0
R4240
0
GND
R4223
100
R4222
100
R4221
100
R4220
100
R4219
100
R4218
100
R4217
100
R4216
100
R4215
100
R4214
100
R4213
100
R4212
100
DIMMING_3.3V
R3537
4.7K
L3504
BLM18PG121SN1D
DIMMING_3.3V
IC3504
24LC32AT-I/SNG
R3536
100
DIMMING_RX_1.8V
DIMMING_WP
DIMMING_SCL
A0
A1
R3566
0
R3549
22
SCL
DIMMING_SDA
SDA
R3561
4.7K
OPT
EEPROM_A1
R3562
4.7K
A2
LED_M_SCLK
R3532
2K
R3531
100
C3524
C3523
C3517
C3512
DIMMING_3.3V
R3547
0
LED_M_MOSI
R3534
100
DIMMING_1.8V
VCC
WP
R3533
100
OPT
R3530
100
0.1uF
16V
DIMMING_3.3V
0.1uF
16V
0.1uF
16V
0.1uF
16V
LED_M_VS
R3552
10K
C3540
0.1uF
16V
R3554
10K
R3535
0
R3565
0
OPT
VSS
R3550
22
URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK-
URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK-
C3507
16V
DIG1.8_1
GND_1
M_SCLK
133
134
M_MOSI
EEPROM_NA
EEPROM_WP
M_SCL
M_VS
135
136
137
138
S_SDA
S_SCL
PORES_N
XTALI
M_SDA
139
140
141
142
143
XTALO
144
GND_4
DIG3.3_4
RXANAGND_4
DIG1.8_4
145
146
147
148
R1A1P
R1A1M
149
150
151
R1B1M
R1B1P
152
R1C1M
153
RXANA1.8_3
R1CLK1M
R1C1P
154
155
156
157
R1CLK1P
R1D1P
R1E1M
R1D1M
158
159
160
161
R1E1P
RXANAGND_5
162
163
R1A2M
R1B2M
R1A2P
164
165
166
R1B2P
R1C2P
R1C2M
167
168
R1CLK2M
R1CLK2P
RXANA1.8_4
169
170
171
172
R1D2M
R1D2P
173
R1E2P
R1E2M
174
DIG3.3_1
LH90_Slave_Inverter
132
PLL1.8
131
PLLGND
130
M_MOSIP
C3539
P3503
0.1uF
16V
12507WS-10L
R3541 OPT
100
OPT
RXANAGND_1
129
M_MOSIN
R2A1M
128
M_SCLKP
R2A1P
127
M_SCLKN
R2B1M
126
T1A1N
URSA_C-[1]
R4225
100
R2B1P
125
T1A1P
LVDS_CH1_A_P
URSA_C+[2]AR3503
0
URSA_C-[2]
R2C1M
124
T1B1N
LVDS_CH1_B_N
R4226
100
LVDS_CH1_B_P
C3505
0.1uF
16V
10
123
11
122
TXANA3.3_13
R2CLK1M
12
121
TXANAGND_9
120
T1C1N
119
T1C1P
118
T1CLK1N
117
T1CLK1P
116
TXANA3.3_12
115
T1D1N
114
T1D1P
LVDS_CH1_D_P
LVDS_CH1_E_N
R4227
100
URSA_C+[3]AR3504
0
URSA_C-[3]
R2CLK1P
13
R4228
100
R2D1M
14
R2D1P
15
R4229
100
R2E1M
16
R2E1P
17
113
T1E1N
21
112
T1E1P
22
111
TXANA3.3_11
R2C2M
23
110
TXANAGND_8
R2C2P
24
109
T1A2N
LVDS_CH2_A_P
R4232
100
25
108
26
107
T1B2N
LVDS_CH2_B_N
R2CLK2P
27
106
T1B2P
LVDS_CH2_B_P
R4234
100
R2D2M
28
105
TXANA3.3_10
R2D2P
29
104
T1C2N
R4235
100
R2E2M
30
103
T1C2P
R2E2P
31
102
T1CLK2N
LVDS_CH2_CLK_N
RXANAGND_3
32
101
T1CLK2P
LVDS_CH2_CLK_P
DIG3.3_2
33
100
TXANA3.3_9
DIG1.8_2
34
99
TXANAGND_7
GND_2
35
98
T1D2N
TDO
36
97
T1D2P
TRST_N
37
96
T1E2N
LVDS_CH2_E_N
EEPROM_A1_TDI
38
95
T1E2P
LVDS_CH2_E_P
R3510 0
R3576
0
RESERVED
R3575
0
VSYNC
R3578
GND
0
R3567
0
SCLK
LED_S_SCLK
R3579
GND
0
4
R3569
0
MOSI
R3568
0
RESERVED
R3571
0
RESERVED
R3570
0
VSYNC
LVDS_CH2_C_N
LED_S_MOSI
LED_S_VS
9
10
11
GND
LVDS_CH2_D_N
47K
C3532
0.1uF
16V
C3533
0.1uF
16V
DIMMING_3.3V
88
87
86
85
84
83
82
81
80
79
78
77
76
DIG3.3_3
75
TXANAGND_5
89
74
90
44
73
43
SCLKO
72
TMODE[2]
R3506 0
71
R3505 0
70
TXANA3.3_7
69
TXANAGND_6
91
68
TXANA3.3_8
92
42
67
93
41
66
94
40
TMODE[1]
65
39
TCK
TMODE[0]
64
RESERVED
GND
0.1uF
16V
AR3517
0
R3538
R3502 0
63
C3534
LVDS_CH2_D_P
R3503 0
45
LED_M_VS
AR3516
0
R3573
0
LVDS_CH2_C_P
R3504 0
62
R4237
0
TMS
TCK
0.1uF
16V
REXT
TMS
C3535
MOSI
NC
@xrefL
R3508 4.7K
OPT R4236
0
61
TDI
EEPROM_A1
R3507 0
60
TDO
C3502
0.1uF 16V
59
C3503
0.1uF
16V
58
URSA_D-[4]
LVDS_CH2_A_N
R2CLK2M
57
AR3500
0
URSA_D+[4]
AR3515
0
R3574
0
LED_M_MOSI
LVDS_CH1_E_P
T1A2P
16V
R3577
GND
0
0.1uF
16V
RXANA1.8_2
C3504
0.1uF
56
URSA_D+[3]
20
R2B2P
C3536
SCLK
LVDS_CH1_D_N
R2B2M
R4233
100
URSA_D-[3]
AR3514
0
R2A2P
55
URSA_DCK+
URSA_DCK-
0.1uF
16V
R4231
100
54
AR3501
0
R3572
0
LED_M_SCLK
LVDS_CH1_CLK_P
C3537
19
53
URSA_D+[2]
URSA_D-[2]
LVDS_CH1_C_N
LVDS_CH1_C_P
LVDS_CH1_CLK_N
18
52
URSA_D-[1]
AR3513
0
R2A2M
51
URSA_D+[1]
R3564
GND
0
RXANAGND_2
LG5110
GND
0.1uF
16V
R4230
100
50
AR3502
0
URSA_D-[0]
49
URSA_D+[0]
IC3502
48
URSA_C-[4]
LH90_ONLY
C3538
NC
P3501
12507WS-08L
LVDS_CH1_A_N
RXANA1.8_1
URSA_CCK-
URSA_C+[4]
LH90_Master_Inverter
AR3512
0
T1B1P
47
URSA_CCK+
R3542
R3539 OPT 100
100
R3540
OPT 100
R2C1P
46
URSA_C+[1]
0.1uF
16V
R4224
100
URSA_C+[0]AR3505
0
URSA_C-[0]
0.1uF
175
C3506
176
RXANAGND_6
DIMMING_PLL_1.8V
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
DIG1.8_3
GND_3
TXANAGND_4
16V
T2A1N
T2A1P
TXANA3.3_6
C3527
DIMMING_TX_3.3V
AR3523
0
LVDS_CH3_A_N
LVDS_CH3_A_P
LVDS_CH3_B_N
LVDS_CH3_B_P
AR3522
0
LVDS_CH3_C_N
LVDS_CH3_C_P
0.1uF
T2B1N
T2B1P
C3526
16V
T2C1N
TXANA3.3_5
TXANAGND_3
0.1uF
T2C1P
T2CLK1N
T2D1N
T2CLK1P
TXANA3.3_4
0.1uF
C3522
LVDS_CH3_D_N
LVDS_CH3_D_P
LVDS_CH3_E_N
AR3521
LVDS_CH3_CLK_P0
LVDS_CH3_CLK_N
C3518
LVDS_CH3_E_P
AR3520
0
LVDS_CH4_A_N
LVDS_CH4_A_P
LVDS_CH4_B_N
16V
T2D1P
T2E1N
T2E1P
TXANA3.3_3
0.1uF
16V
TXANAGND_2
T2A2N
T2A2P
T2B2N
T2B2P
16V
T2C2N
T2C2P
TXANA3.3_2
0.1uF
T2CLK2P
T2D2N
TXANA3.3_1
T2CLK2N
C3516
LVDS_CH4_B_P
AR3519
0
TDI
11
LVDS_CH4_C_N
R3544
0
10
TXANAGND_1
T2D2P
T2E2N
T2E2P
S_MOSIP
S_MOSIN
S_SCLKP
R3516
0
OPT
R3511
0
OPT
LVDS_CH4_C_P
R3512
4.7K
R3501
4.7K
C3515
S1
0.1uF
16V
CLK1
LVDS_CH4_CLK_N
AR3518
0
LVDS_CH4_CLK_P
R3548
0
LVDS_CH4_D_N
1K
R3509
TMS
R3500
0
OPT
VDD
LVDS_CH4_D_P
S0
TDO
R3543
0
R3517
0
CLK2
LVDS_CH4_E_N
LVDS_CH4_E_P
GND
S_VS
TCK
LED_S_VS
ICLK
LED_S_MOSI
FBIN
S_SCLKN
R3520 100
IC3501
MK2302S-01LFTR
DIMMING_3.3V
LED_S_SCLK
R3515
10K
OPT
R3514
10K
OPT
P3504
12507WS-10L
R3513
10K
DIMMING_3.3V
S_MOSI
SCLKI
S_SCLK
R3519 100
DIMMING_3.3V
R3518 100
DIMMING_1.8V
JTAG
@xrefL
2009.01.20
15
16
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
29
URSA_B+[0-4],URSA_B-[0-4],URSA_BCK+,URSA_BCK-
26
LVDS_CH2_E_N
7:D7
LVDS_TX_1_DATA4_N
LVDS_CH2_E_N
URSA_B-[3]
LVDS_CH2_D_P
7:D7
LVDS_TX_1_DATA4_P
LVDS_CH2_D_P
URSA_B+[3]
LVDS_CH2_D_N
7:D7
LVDS_TX_1_DATA3_N
LVDS_CH2_D_N
7:D7
LVDS_TX_1_DATA3_P
URSA_BCK-
LH50_ONLY
AR3602
0
1/16W
LH35_ONLYLH35_ONLY
AR3614
AR3620
0
0
1/16W
1/16W
LVDS_CH2_CLK_P
LVDS_CH2_CLK_N
URSA_BCK+
7:D7
LVDS_TX_1_CLK_N
LVDS_CH2_C_P
7:D7
LVDS_TX_1_CLK_P
LVDS_CH2_C_P
LVDS_CH2_C_N
7:D7
LVDS_TX_1_DATA2_N
LVDS_CH2_C_N
7:D7
LVDS_TX_1_DATA2_P
LH50_ONLY
AR3603
0
1/16W
LVDS_CH2_B_P
GND
7:D7
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA1_N
LH50_ONLY
LH35_ONLYLH35_ONLY
AR3616
AR3622
0
0
1/16W
1/16W
7:E7
LVDS_TX_0_DATA4_P
LVDS_CH1_D_P
LVDS_TX_0_DATA3_N
LVDS_CH1_D_N
LVDS_CH1_E_N
7:E7
LVDS_TX_0_DATA3_P
LVDS_CH1_D_P
LVDS_CH1_D_N
LVDS_TX_0_CLK_P
LVDS_CH1_C_P
LVDS_TX_0_DATA2_N
LVDS_CH1_C_N
LVDS_CH1_CLK_N
7:E7
LVDS_TX_0_DATA2_P
URSA_A+[1]
7:E7
LVDS_TX_0_DATA0_N
LVDS_CH1_B_N
7:E7
LVDS_TX_0_DATA0_P
LVDS_CH1_A_P
LVDS_CH1_A_N
LVDS_CH2_E-
LVDS_CH2_D_P
LVDS_CH2_D+
LVDS_CH2_D_N
LVDS_CH2_D-
LVDS_CH2_CLK_P
LVDS_CH2_CLK+
LVDS_CH2_CLK_N
LVDS_CH2_CLK-
LVDS_CH2_C_P
LVDS_CH2_C+
LVDS_CH2_C_N
LVDS_CH2_C-
LVDS_CH2_B_P
LVDS_CH2_B+
LVDS_CH2_B_N
LVDS_CH2_B-
LVDS_CH2_A_P
LVDS_CH2_A+
LVDS_CH2_A_N
R3601
0
LVDS_CH2_ABIT_SEL
BIT_SEL
GND
OPT
LH35_ONLYLH35_ONLY
LVDS_CH1_E_P
LVDS_CH1_E+
LVDS_CH1_E_N
LVDS_CH1_E-
LVDS_CH1_D_P
LVDS_CH1_D+
LVDS_CH1_D_N
LVDS_CH1_D-
FROM BCM
GND
AR3607
0
1/16W
LVDS_CH4_E_P
URSA_D-[3]
LVDS_CH4_D_P
URSA_D+[3]
LVDS_CH4_D_N
LH50_ONLY
AR3608
0
1/16W
URSA_DCK+
LVDS_CH1_CLK+
LVDS_CH1_CLK_N
LVDS_CH1_CLKGND
LVDS_CH4_CLK_P
LVDS_CH4_CLK_N
URSA_D-[2]
LVDS_CH4_C_P
URSA_D+[2]
LVDS_CH4_C_N
URSA_D-[1]
LVDS_CH1_CLK_P
LVDS_CH4_E_N
URSA_D+[4]
URSA_DCK-
14
LVDS_CH1_A_N
URSA_D+[0-4],URSA_D-[0-4],URSA_DCK+,URSA_DCK-
16
15
LVDS_CH1_A_P
LVDS_TX_0_DATA1_P
7:E7
URSA_A+[0]
URSA_D-[4]
17
LVDS_CH1_B_N
7:E7
URSA_A-[0]
LVDS_CH1_B_P
LVDS_TX_0_DATA1_N
LVDS_CH1_B_P
LH50_ONLY
18
LH35_ONLYLH35_ONLY
AR3618
AR3624
0
0
1/16W
1/16W
LVDS_CH2_E_N
GND
LVDS_CH1_CLK_N
7:E7
LVDS_CH1_C_N
LVDS_CH2_E+
GND
7:E7
LVDS_CH1_C_P
URSA_A-[1]
LVDS_TX_0_CLK_N
LVDS_CH2_E_P
LVDS_CH1_CLK_P
LVDS_CH1_CLK_P
URSA_A-[2]
LH50_ONLY
AR3606
0
1/16W
LH35_ONLYLH35_ONLY
AR3617
AR3623
0
0
1/16W
1/16W
7:E7
URSA_A+[2]
20
LVDS_CH1_E_N
7:E7
URSA_A+[3]
URSA_ACK+
LVDS_TX_0_DATA4_N
LVDS_CH1_E_P
LVDS_CH1_E_P
URSA_A-[3]
URSA_ACK-
GND
LVDS_CH2_B_P
LVDS_CH2_A_P
7:D7
LH50_ONLY
AR3605
0
1/16W
GND
LVDS_CH2_A_N
7:D7
URSA_A+[4]
NC
LVDS_TX_1_DATA0_N
LVDS_CH2_A_P
LVDS_CH2_A_N
URSA_A-[4]
R3607
0
VCC
LVDS_TX_1_DATA1_P
URSA_B-[0]
URSA_B+[0]
7:E7
VCC
GND
7:D7
AR3604
0
1/16W
VCC
OPT
LH50_ONLY
AR3609
0
1/16W
OPC_OUT
URSA_D-[0]
LVDS_CH4_A_P
URSA_D+[0]
LVDS_CH4_A_N
LVDS_CH1_C_N
LVDS_CH1_C-
LVDS_CH1_B_P
LVDS_CH1_B+
LVDS_CH1_B_N
LVDS_CH1_B-
LVDS_CH1_A_P
LVDS_CH1_A+
LVDS_CH1_A_N
R3602
0 LH50_ONLY
LVDS_CH1_A-
R3605
0 37/42LH35_LH50_ONLY
LVDS_CH4_B_N
URSA_D+[1]
LVDS_CH1_C+
R3603
0
R3604
0 37/42LH35_LH50_ONLY
OPC_EN
LVDS_CH4_B_P
LVDS_CH1_C_P
GND
R3608
0
LH35_LH90_ONLYOPC_EN
OPC_OUT2
BCMPWM_VBR_B
R3606
OPT
0
LVDS_SEL
OPC_OUT
PWM_IN
LVDS_SEL
NC
LH50_ONLY
R3609
0 LH35_ONLY
13
NC
NC
NC
URSA_C-[4]
11
AR3610
0
1/16W
@xrefL
URSA_C+[0-4],URSA_C-[0-4],URSA_CCK+,URSA_CCK-
12
NC
GND
TF05-41S
1
2
GND
GND
LVDS_CH4_E_P
LVDS_CH4_E+
LVDS_CH4_E_N
LVDS_CH4_E-
LVDS_CH4_D_P
LVDS_CH4_D+
LVDS_CH4_D_N
LVDS_CH4_D-
GND
LVDS_CH4_CLK_P
LVDS_CH4_CLK+
10
LVDS_CH4_CLK_N
LVDS_CH4_CLK-
11
GND
12
LVDS_CH4_C_P
LVDS_CH4_C+
13
LVDS_CH4_C_N
LVDS_CH4_C-
14
LVDS_CH4_B_P
LVDS_CH4_B+
15
LVDS_CH4_B_N
LVDS_CH4_B-
16
LVDS_CH4_A_P
LVDS_CH4_A+
17
LVDS_CH4_A_N
LVDS_CH4_A-
18
GND
19
GND
20
LVDS_CH3_E_P
LVDS_CH3_E+
21
LVDS_CH3_E_N
LVDS_CH3_E-
22
LVDS_CH3_D_P
LVDS_CH3_D+
23
LVDS_CH3_D_N
LVDS_CH3_D-
24
GND
25
LVDS_CH3_CLK_P
LVDS_CH3_CLK+
26
LVDS_CH3_CLK_N
LVDS_CH3_CLK-
27
GND
28
LVDS_CH3_C_P
LVDS_CH3_C+
29
LVDS_CH3_C_N
LVDS_CH3_C-
30
LVDS_CH3_B_P
LVDS_CH3_B+
31
LVDS_CH3_B_N
LVDS_CH3_B-
32
LVDS_CH3_A_P
LVDS_CH3_A+
33
LVDS_CH3_A_N
LVDS_CH3_A-
34
GND
35
NC
36
NC
37
NC
38
NC
39
NC
40
NC
41
NC
42
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
43
42
44
GND
45
46
47
48
49
50
51
LVDS_CH3_E_P
URSA_C+[4]
LVDS_CH3_E_N
URSA_C-[3]
LVDS_CH3_D_P
LVDS_CH3_D_N
URSA_C+[3]
LH50_90_ONLY
P3602
VCC
LVDS_CH2_B_N
LVDS_CH2_B_N
23
P3601
TF05-51S
GND
LH35_ONLYLH35_ONLY
AR3615
AR3621
0
0
1/16W
1/16W
URSA_A+[0-4],URSA_A-[0-4],URSA_ACK+,URSA_ACK-
19
LVDS_CH2_CLK_N
URSA_B+[2]
URSA_B+[1]
21
LVDS_CH2_CLK_P
URSA_B-[2]
URSA_B-[1]
22
LVDS_CH2_E_P
URSA_B+[4]
25
24
LVDS_CH2_E_P
AR3613
0
1/16W
C3602 C3601
1000pF 10uF
50V
16V
27
AR3619
0
1/16W
C3603
0.1uF
16V
URSA_B-[4]
AR3601
0
1/16W
CB3216PA501E
L3601
+12.0V_LCD
28
52
GND
LH50_ONLY
10
URSA_CCK-
AR3611
0
1/16W
URSA_CCK+
LVDS_CH3_C_P
URSA_C+[2]
9
URSA_C-[1]
LVDS_CH3_CLK_P
LVDS_CH3_CLK_N
URSA_C-[2]
LVDS_CH3_C_N
LH50_ONLY
AR3612
0
1/16W
LVDS_CH3_B_P
URSA_C+[1]
LVDS_CH3_B_N
URSA_C-[0]
LVDS_CH3_A_P
LVDS_CH3_A_N
URSA_C+[0]
LH50_ONLY
FROM MTSRT-FRC
6
@xrefL
5
4
3
2
1
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
BRAZIL DVR DV
LVDS
2009.01.20
16
17
AP