1.

Susunan Inverter
Tabel Kebenaran
Input (a)
1
0

Output (y)
0
1

Layout

Hasil Simulasi

Tabel Delay
Input (a) ke Output (y) Delay time
1
0
34,90 ps
0 1
34,90 ps

2. Susunan Nand 2 Input

Tabel Kebenaran
Input (a)
0
0
1
1

Input (b)
0
1
0
1

Layout

Hasil Simulasi

Output (y)
1
1
1
0

Tabel Delay
Input (a) ke Output (y) Delay time
1
0
17,452 ps
0 1
35,026 ps

3. Susunan Nor 2 input

Tabel Kebenaran
Input (a)
0
0
1
1

Layout

Input (b)
0
1
0
1

Output (y)
1
0
0
0

Hasil Simulasi

Tabel Delay
Input (a) ke Output (y) Delay time
1
0
69.808 ps
0 1
17,452 ps

4. Susunan Inverter dibebani 1 inverter

Tabel Kebenaran
Input (a)
1
0

Layout

Output (y)
0
1

Hasil Simulasi

Tabel Delay
Input (a) ke Output
(a_1)
1
0
0 1
Input (a) ke Output
(y_1)
1
0
0 1

Delay time
87.26 ps
34.904ps

0.122ns
87.26 ps

5. Susunan Inverter dibebani 4 inverter

Tabel Kebenaran
Input (a)
1
0

Layout

Output (y)
0
1

Hasil Simulasi

Tabel Delay
Input (a) ke Output
(a_1)
1
0
0 1
Input (a) ke Output
(y_1)
1
0
0 1

Delay time
0.244ns
0.122ns

0.297ns
0.175ns