D e p t , of E C E , C E G C a m p u s , A n n a U n i v e r s i t y

End Semester Examinations Apr-May 2011

B.E.(ECE) VIII S e m e s t e r (FT, Regular)
EC525 - RF S y s t e m Design
A n s w e r Ail Questions
Part A (10x2=20

-\

Marks)

Q l . It is required t o deliver 2 5 0 m W to a 50 o h m load at 1GHz. But the driving power amplifier can only support a
m a x i m u m of 2Volts at its o u t p u t . . Design any o n e L matching network t o be inserted between power amplifier
and the 50 o h m load.
Q2.
Q3.

Explain h o w you would.distinguish between h o m o d y n e and f i e t e r o d y n e receiver architectures.

Explain w h e n you w o u l d prefer a pi matching n e t w o r k over an L matching n e t w o r k .

Q4. W h a t is the origin of drain current noise in a MOSFET, and

circuit).

h o w is it modeled (give e q u a t i o n and equivalent

Q5.
Given an amplifier w i t h its equivalent input noise specified in terms Vn and In, w h a t is t h e o p t i m u m source
impedance for this case (to o b t a i n a m i n i m u m Noise f i g u r e ) .
Q6.
The VCO is modeled in terms o f K o- Give t h e appropriate equation connecting t h e input and o u t p u t ,
explain w h a t each t e r m represents,, arid give t h e units for K . .
Q7.
Using a suitable sketch, indicate all the possible leakage paths in a mixer and name thern appropriately.
Q8. Fig.l shows a ring oscillator. Indicate the phase of the oscillating signal at the o u t p u t o f each stage. The bubble
indicates 180 phase difference between input and o u t p u t of the corresponding buffer.
VC

vco

Q9. Fig.2 illustrates one problem associated w i t h the down-conversion o f an RF signal using a non ideal {.O signal.
Explain in brief w h a t this problem is.
Q10.Fig.3 below represents t h e root locus plot of a cross coupled LC oscillator. W h a t do t h e small, crosses, arrows
and circle represent in this diagram.
Part B (16x5 = SOMarks)
Q l l . Consider the GPS receiver RF f r o n t shown below in Fig. 4.You may note t h a t the data pertaining t o each
stage is given either above or below each stage. In F i g . l , 'IL' means insertion loss, and 'conversion g a i n ' refers to
the gain of the mixer.
' (a) W h a t is t h e tbtarNois'e' Figure of this system (only upto the input of the VGA stage) (4)
:

(b) Assuming t h a t the signal power picked up the antenna is -130dBm, w h a t is the p o w e r level at each stage o f the
chain (upto input of VGA). (6)
. (c) Assuming 50 o h m antenna impedance, w h a t is the Noise power (dBm) at each stage o f t h e chain (upto V<3A
input). Give the answers t o part (b) and (c) in the f o r m of a table. (6)
(Fig.4 is taken from a paper from German Space Agency DLR, published in the April 2011 issue of IEEE MTT)
Q12a. Consider the Colpitts oscillator and its equivalent circuit shown below in Fig.5a and Fig.Sb respectively.
(i) Unlike the usual case, w h y is the current source pointing upwards in this case. (3)
(ii) V out" is shown .across ^

or value of this resistor<(3)

(Hi) Obtain an expression for.the

transohdcutance ' g m ' so t h a t the/system is capable of oscillating.(lO)

OR

Q12b. For a nonlinear amplifier, consider the input o u t p u t r e l a t i o n between i/jand v . as given below
0

v = c + ^ v , + c vf + c vf + ...
Q

(i) Give the expression for IM3, t h e t h i r d order inter-modulation ratio. (3)
(ii) Deduce the relation between I M 3 , IIP3 and

Pin and indicate the units o f these quantities

equation. (4)
(Hi) Show t h a t ' t h e Input voltage corresponding;'tb t h e II.P3 p o i n t is given by (3)

-10log(l)
V

(iv) What is the corresponding relation between the V ,tP3 and the coefficients -Ci,c etc.(5)
0

in the resulting

(v) Deduce t h e f o l l o w i n g relation b e t w e e n l d B compression and t h e t h i r d order intercept p o i n t . State whether the
variables

in this e q u a t i o n refer t o t h e values at t h e i n p u t . o r at t h e o u t p u t / C o m m e n t o n w h e t h e r the units

indicated in this e q u a t i o n are correct. (5)

V\m=m-9.6dB

Q13a. (i) Fig 6. b e l o w shows part of t h e RF f r o n t end of a receiver. T h e ' I ' c h a n n e l mixer alone for is shown in the
figure, w i t h a -similar diagram t o be used for t h e Q channel mixer. Explain t h e principle o f o p e r a t i o n of t h e mixer
used in this circ.uit(6). (Fig.6 is taken from a MIMO receiver

paper by Razavi, appearing

in IEEE JSSC2007)

(ii) Explain h o w t h e circuit shown in Fig. 7 works like a mixer. Explain t h e main drawback o f this mixer.{6)
(Hi) The inductors and t h e tank circuit in t h e Gilbert cell mixers shown in Fig.8 are i n t r o d u c e d t o overcome {or
atleast reduce)

certain

drawbacks.

Explain h o w w h a t

these drawbacks are and h o w they overcome(or

reduced).(4)
OR
Q13b. An LC oscillator along w i t h an equivalent circuit are s h o w n b e l o w in Fig:9a and Fig.9b.
(i) W r i t e d o w n t h e expression for Z(s) s h o w n in t h e equivalent circuit.{4)
(ii) Draw the circuit corresponding t o t h e V t o I block shown in t h e equivalent circuit. W h a t is t h e transfer function
of this block.<4)
(iii) W r i t e d o w n t h e expression for t h e loop gain

and obtain

the; expression for t h e poles of t h e transfer

function,(8)
Q14a. (i) Derive t h e expression for t h e transfer function of a multiplier used as a Phase Oetector(PD). If this is
used as part of a PLL, under locked condition, comment, w i t h justification,, on t h e phase relation between the t w o
inputs of the PD.(4)
(ii)

For t h e phase frequency detector shown in Fig.10, sketch t h e waveforms for t h e U and D signals for any

assumed input (V) and reference (R) signals. How does this scheme g e t used as phase d e t e c t o r and obtain an
expression for Kpd, t h e conversion gain of t h e phase detector. Draw t h e circuit of t h e charge p u m p t o be used
. w i t h this circuit and give t h e expression for t h e cdhversibri'g'ain of t h e charge pump.(4+4)
OR
Q14 b.

Consider t h e equivalent block

diagram of

/ .

a PLL shown in F i g . l l . W r i t e d o w n t h e expressions for the

transfer function <t> (s)/6i(s). Give t h e corresponding (transfer function) expression involving frequencies.
0

Consider different cases of Z(s) t o show t h a t t h e system can be (i) unconditionally stable, (ii) unconditionally
unstable and (iii) conditionally stable. (3+3+10).
Q15.a(i). Consider t h e Class D power amplifier shown in Fig.12. Sketch t h e

D S

and l w a v e f o r m s for M l . Also

0

show the corresponding waveforms across t h e load resistor R . Whatman be t h e m a x i m u m possible efficiency for
L

this scheme and h b w can this be o b t a i n e d (or approached) iri pra'ctice.' (3*3'+2)
!

(ii) For the Class F p o w e r amplifier shown in Fig. 13, sketch the waveforms for

D S

and l

o f t h e MOSFET. Explain

t h e need.for the quarter wave transmission line in this scheme. (3+5)

OR
Q15b (i). In this question, you have t o calculate t h e Phase Noise specification for t h e LO. For GSM standard, the
receiver sensitivity is -99dBm, required SNR is 9dB, BW is 2Q0KHz. Consider

a -43dBm blocker at a located at

600KHz offset f r o m t h e required RX signal. Fig.l4a . below (left depicts) t h e spectrum o f t h e required signal(small
delta function), blocker (bigger delta function) and LO spectrum w i t h its phase noise. F i g . l 4 b shows t h e spectrum
after d o w n conversion.

In order t o meet t h e required; SNfi .calculate t h e permissible phase noise of t h e LO at

600KHz offset f r o m t h e carrier. Your answer must be in units of dBC/Hz @600KHz. For your-calculation, you can
assume that the LO phase noise at 600Khz offset is approximately flat over a 200Khz b a n d .

{8)

(ii) Fig.15 below is part of a 3G RF f r o n t end stage. Sketch the possible waveforms for <D1, (D2,<D3,<D4 (exact t i m e
axis units not required, but relative phasing amongst t h e m needed to show t h e concept involved). You need t o
consider only the mixer, and here, the mixer is labeled as HB (High Band) mixer, w i t h an identical LB (Low Band)
mixer not shown. (8) (Fig.15 is from a paper from Sony-Ericcson, published

in 2011ISSCC

Conf.

Digest).

/ L O

2/

Active Antenna
|BW=2(Mt*
IL=2,S(1B

directional
i
RF
,
,
LNAI
LNAII
coupler
filter
T

T V J A

/
lL-a2d8
0-IS4B

4 /

NP-WdB
0.1448.

FPGA Baseband

Front End

BW=24Mlfc
tL=ldB
r x i J

3/

Fig.2

Fig.l

NP-0.<i<!B
0-I4O9

BW-2CMHs
JI.fl.Jdll

BW=l*tIk
1L=1<IB

RF R F - ^ ^
LP
filter amp I
filter

|%H>

IF- IF- BP
amp I amp II filter

VGA

ADC

KP-.9,6dB
C - 2 1 dft

G-2I<W

AOC
Fig.4
UNA

i.
To Q Mixer

-VIX.T +

vr

Fig.7

Fig.8

3"

Vfrtex-4

IfiSfc'T

i>

Kp

rase-

LOCfc'l'

Z(s)

1
M

"9
Fig.ll

f ig.10

Fig.9b

Z()

Fig.12

Fig.13

Interference
Fig.l4b

Fig.l4a

to L B mixer

4-phase L O

baseband
<X>

RF h
LNA ground
L B with s h a r e d inductor

H B with shared inductor

Fig.15

HB mixer