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Submitted by
VANDANA JAT
(0121EE13MT20)
ACKNOWLEDGEMENT
This Dissertation Part I is the result of guidance and support of various people at
SCOPE COLLEGE OF ENGINEERING without whom all my effort would have been
directionless and fruitless. I sincerely thank all of them, for assisting me in completing the
dissertation. I express my ardent and earnest gratitude to my guide Mr. Ajit Verma Department
of Electrical and Electronics Engineering, SCOPE COLLEGE OF ENGINEERING BHOPAL
for their help and encouragement at all the stages of my dissertation improves. Their guidance
and motivation helped me to be fruitful in my effort.
I would like to extend my deepest gratitude to Mr. Balram Yadav HOD, Electrical and
Electronics department, SCOPE COLLEGE OF ENGINEERING BHOPAL for providing all the
necessary facilities, encouragement and inspirational environment to bring out the best of my
endeavors.
I also express my heartfelt and profound gratitude to our Principal, Dr. D. S. RAGHAV
for his valuable suggestion and ample resources at all stages of the research work.
Finally, I would like to say that I am indebted to my parents for everything that they have done
for me. All of this would have been impossible without their constant support. I also thank God
for being kind to me and blessing me through this journey.
VANDANA JAT
(0121EE13MT20)
CERTIFICATE OF APPROVAL
endorse
any
conclusion
drawn
or
opinion
expressed therein, but approve the thesis for the purpose for
which it is submitted.
(Internal Examiner)
(External Examiner)
Name:
Date :
Name:
Date:
CERTIFICATE
This is to certify that the work embodied in this Dissertation partI
entitled
Parallel
Computing
for
Real
Time
State
Mr. Ajit
Mr. Balram
Prof. Bharti
Verma
Guide (E.E.)
Yadav
H.O.D. (EE)
Chourasiya
PG Coordinator(EE, SCE,
SCE, Bhopal
SCE, BHOPAL
Bhopal)