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Chapter_1 DTT 210

Chapter_1 DTT 210

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Published by: Michael Ariff Schweinsteiger on Dec 08, 2010
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DTT 201: Computer Architecture Lecture 01 Subject Outline

Name: HASLIZA HASHIM Email: hasliza@kliuc.edu.my HP No: 019-3426312

Content & Learning Objectives ‡ Content
²Historical development of the computer architecture ²Computer internal organisation, data representation methods and operation of a microprocessor-based system, including specification of hardware

‡ Learning Objectives
²Able to relate computer organisation & architecture to contemporary computer design issues

Assessment ‡ This subject has the following assessment components.
Assessment Items Percentage of Final Mark Test Assignment Quiz Examination 10% 30% 20% 40%

Textbook and other Resources ‡ William Stallings, Computer Organisation and Architecture: Designing for Performance. Prentice Hall, 2000 ‡ Englander, Irv, The Architecture of Computer Hardware and System Software. Wiley, 2000 ‡ K.F. Ibrahim, PC Operation and Repair, Prentice Hall, 2002 ‡ www.intel.com ‡ www.ibm.com ‡ www.pcguide.com

DTT 201: Computer Architecture Chapter 1 Introduction

g. will instruction be implemented by a multiply unit or is it done by repeated addition? . ²e. I/O mechanisms.g. addressing techniques. will computer have a multiply instruction? ‡ Organization is how features are implemented ²Control signals. memory technology. interfaces.Architecture & Organization 1 ‡ Architecture is those attributes visible to the programmer ²Instruction set. number of bits used for data representation. ²e.

Microprocessor .

. or microchip).Function of Microprocessor ? ‡ A microprocessor incorporates most or all of the functions of a computer's central processing unit (CPU) on a single integrated circuit (IC.

Architecture & Organization 2 ‡ All Intel x86 family share the same basic architecture ‡ The IBM System/370 family share the same basic architecture ‡ This gives code compatibility ²At least backwards ‡ Organization differs between different versions .

Structure & Function ‡ Structure is the way in which components relate to each other ‡ Function is the operation of individual components as part of the structure .

Function ‡ All computer functions are: ²Data processing ²Data storage ‡ All computer must has the capability of a storage device for the external environment eitherbeing written to or had from ‡ Move data between itself & outside world ‡ Computer act either as some/destination ²Data movement ²Control .

Functional View .

Operations (a) Data movement .

Operations (b) Storage .

Operation (c) Processing from/to storage .

Operation (d) Processing from storage to I/O .

Structure ² Top Level Peripherals Computer Central Processing Unit Main Memory Computer Systems Interconnection Input Output Communication lines .

Structure ² The CPU CPU Computer I/O System Bus Memory CPU Registers Arithmetic and Logic Unit Internal CPU Interconnection Control Unit .

The Control Unit Control Unit CPU ALU Internal Bus Registers Control Unit Sequencing Logic Control Unit Registers and Decoders Control Memory .Structure .

ENIAC .background ‡ Electronic Numerical Integrator And Computer ‡ Eckert and Mauchly ‡ University of Pennsylvania ‡ Trajectory tables for weapons ‡ Started 1943 ‡ Finished 1946 ²Too late for war effort ‡ Used until 1955 .

000 square feet 140 kW power consumption 5.000 additions per second .details ‡ ‡ ‡ ‡ ‡ ‡ ‡ ‡ Decimal (not binary) 20 accumulators of 10 digits Programmed manually by switches 18.000 vacuum tubes 30 tons 15.ENIAC .

cont Vacuum tubes .ENIAC .

von Neumann/Turing ‡ ‡ ‡ ‡ Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing ‡ Input and output equipment operated by control unit ‡ Princeton Institute for Advanced Studies ²IAS ‡ Completed 1952 .

Structure of von Neumann machine .

IAS .details ‡ Memory -> 1000 storage x 40 bit words ² Binary number ² Number word -> a sign bit & 39 bit value ² Instruction word -> 2 x 20 bit instructions ‡ Set of registers (storage in CPU) ² Memory Buffer Register ² Memory Address Register ² Instruction Register ² Instruction Buffer Register ² Program Counter ² Accumulator ² Multiplier Quotient .

Structure of IAS ² detail .

Commercial Computers ‡ 1947 .UNIVAC II ²Faster ²More memory .Eckert-Mauchly Computer Corporation ‡ UNIVAC I (Universal Automatic Computer) ‡ US Bureau of Census 1950 calculations ‡ Became part of Sperry-Rand Corporation ‡ Late 1950s .

the 701 ²IBM¶s first stored program computer ²Scientific calculations ‡ 1955 .the 702 ²Business applications ‡ Lead to 700/7000 series .IBM ‡ Punched-card processing equipment ‡ 1953 .

Transistors ‡ ‡ ‡ ‡ ‡ ‡ ‡ Replaced vacuum tubes Smaller Cheaper Less heat dissipation Solid State device Made from Silicon (Sand) Invented 1947 at Bell Labs ‡ William Shockley et al. .

1957 ²Produced PDP-1 .Transistor Based Computers ‡ Second generation machines ‡ NCR & RCA produced small transistor machines ‡ IBM 7000 ‡ DEC .

³small electronics´ ‡ A computer is made up of gates. silicon wafer .Microelectronics ‡ Literally .g. memory cells and interconnections ‡ These can be manufactured on a semiconductor ‡ e.

to 1971 ²100-3.100.000 devices on a chip .Generations of Computer ‡ Vacuum tube .1958-1964 ‡ Small scale integration .1978 -1991 ²100.100.000 devices on a chip ‡ Very large scale integration .1971-1977 ²3.1946-1957 ‡ Transistor .000.000 .000.000 .000 devices on a chip ‡ Ultra large scale integration ± 1991 ²Over 100.1965 on ²Up to 100 devices on a chip ‡ Medium scale integration .000 devices on a chip ‡ Large scale integration .

Moore·s Law ‡ Increased density of components on chip ‡ Gordon Moore ± co-founder of Intel ‡ Number of transistors on a chip will double every year ‡ Since 1970¶s development has slowed a little ² Number of transistors doubles every 18 months ‡ Cost of a chip has remained almost unchanged ‡ Higher packing density means shorter electrical paths. giving higher performance ‡ Smaller size gives increased flexibility ‡ Reduced power and cooling requirements ‡ Fewer interconnections increases reliability .

Growth in CPU Transistor Count .

more size .e.IBM 360 series ‡ 1964 ‡ Replaced (& not compatible with) 7000 series ‡ First planned ³family´ of computers ²Similar or identical ²Similar or identical ²Increasing speed ²Increasing number terminals) ²Increased memory ²Increased cost instruction sets O/S of I/O ports (i.

DEC PDP-8 ‡ ‡ ‡ ‡ ‡ 1964 First minicomputer (after miniskirt!) Did not need air conditioned room Small enough to sit on a lab bench $16. address and data signals) .000 ²$100k+ for IBM 360 ‡ Embedded applications & OEM ‡ BUS STRUCTURE ± Omnibus (96 separate signal paths to carry control.

PDP-8 Bus Structure .DEC .

8080 ²Intel¶s first general purpose microprocessor .4004 ²First microprocessor ²All CPU components on a single chip ²4 bit ‡ Followed in 1972 by 8008 ²8 bit ²Both designed for specific applications ‡ 1974 .Intel ‡ 1971 .

Techniques built into processor ‡ Branch prediction ²Predicts which branches of instructions are likely to be processed ²Buffer pre-fetched instructions ‡ Data flow analysis ²Create an optimised schedule of instructions which are dependant on other¶s results ²Prevent delay ‡ Speculative execution ²Execute instructions in advance and holds the results in temporary locations ²Keep execution engines busy by executing needed instructions .

Performance Balance ‡ Processor speed increased ‡ Memory capacity increased ‡ Memory speed lags behind processor speed .

Logic and Memory Performance Gap .

Solutions ‡ Increase number of bits retrieved at one time ²Make DRAM ³wider´ rather than ³deeper´ ‡ Change DRAM interface ²Include cache ‡ Reduce frequency of memory access ²More complex cache and cache on chip ‡ Increase interconnection bandwidth ²High speed buses ²Hierarchy of buses .

increasing clock rate ± Propagation time for signals reduced ‡ Increase size and speed of caches ²Dedicating part of processor chip ± Cache access times drop significantly ‡ Change processor organization and architecture ²Increase effective speed of execution ²Parallelism .Approaches to increase processor speed ‡ Increase hardware speed of processor ²Fundamentally due to shrinking logic gate size ± More gates. packed more tightly.

Problems from Clock Speed and Logic Density ‡ Power ² Power density increases with density of logic and clock speed ² Dissipating heat ‡ RC delay ² Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them ² Delay increases as RC product increases ² Wire interconnects thinner. increasing resistance ² Wires closer together. increasing capacitance ‡ Memory latency ² Memory speeds lag processor speeds ‡ Solution: ² More emphasis on organizational and architectural approaches to improve performance .

Intel Microprocessor Performance .

Strategies to increase performance ‡ Strategy 1: Increased Cache Capacity ²Typically two or three levels of cache between processor and main memory ²Chip density increased ± More cache memory on chip +Faster cache access ²Pentium chip devoted about 10% of chip area to cache ²Pentium 4 devotes about 50% .

Strategies to increase performance .cont ‡ Strategy 2: More Complex Execution Logic ²Enable parallel execution of instructions ²Pipeline works like assembly line ± Different stages of execution of different instructions at same time along pipeline ²Superscalar allows multiple pipelines within single processor ± Instructions that do not depend on one another can be executed in parallel .

Diminishing Returns ‡ Internal organization of processors is exceedingly complex ²Further increases in this direction is small ‡ Benefits from cache are reaching limit ‡ Increasing clock rate runs into power dissipation problem ²Some fundamental physical limits are being reached .

increase in performance proportional to square root of increase in complexity ‡ If software can use multiple processors. doubling number of processors almost doubles performance ‡ So. use two simpler processors on the chip rather than one more complex processor ‡ With two processors. larger caches are justified ² Power consumption of memory logic less than processing logic ‡ Example: IBM POWER4 ² Two cores based on PowerPC .New Approach ² Multiple Cores ‡ Multiple processors on single chip ² With large shared cache ‡ Within a processor.

prefetch few instructions ² 8088 (8 bit external bus) used in first IBM PC ‡ 80286 ² 16 Mbyte memory addressable ² up from 1Mb ‡ 80386 ² 32 bit ² Support for multitasking .Pentium Evolution (1) ‡ 8080 ² first general purpose microprocessor ² 8 bit data path ² Used in first personal computer ± Altair ‡ 8086 ² much more powerful ² 16 bit ² instruction cache.

Pentium Evolution (2) ‡ 80486 ²sophisticated powerful cache and instruction pipelining ²built in maths co-processor ‡ Pentium ²Superscalar ²Multiple instructions executed in parallel ‡ Pentium Pro ²Increased superscalar organization ²Aggressive register renaming ²branch prediction ²data flow analysis ²speculative execution .

video & audio processing ‡ Pentium III ² Additional floating point instructions for 3D graphics ‡ Pentium 4 ² Note Arabic rather than Roman numerals ² Further floating point and multimedia enhancements ‡ Itanium ² 64 bit ² see chapter 15 ‡ Itanium 2 ² Hardware enhancements to increase speed ‡ See Intel web pages for detailed information on processors .Pentium Evolution (3) ‡ Pentium II ² MMX technology ² graphics.

IBM RISC System/6000 ² RISC-like superscalar machine ² POWER architecture ‡ IBM alliance with Motorola and Apple ² Resulted in implementing PowerPC architecture ‡ PowerPC architecture derived from POWER architecture ‡ Result from PowerPC architecture ² Superscalar RISC ² Apple Macintosh ² Embedded chip applications .PowerPC ‡ 1975. RT PC. 801 minicomputer project (IBM) RISC ‡ Berkeley RISC I processor ‡ 1986. ² Not commercial success ² Many rivals with comparable or better performance ‡ 1990. IBM commercial RISC workstation product.

PowerPC Family (1) ‡ 601: ² Quickly to market. 32-bit machine ‡ 603: ² Low-end desktop and portable ² 32-bit ² Comparable performance with 601 ² Lower cost and more efficient implementation ‡ 604: ² Desktop and low-end servers ² 32-bit machine ² Much more advanced superscalar design ² Greater performance ‡ 620: ² High-end servers ² 64-bit architecture .

PowerPC Family (2) ‡ 740/750: ²Also known as G3 ²Two levels of cache on chip ‡ G4: ²Increases parallelism and internal speed ‡ G5: ²Improvements in parallelism and internal speed ²64-bit organization .

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