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  • Abidi Cascode

    Enviado por

    Sanjayan Vinayagamoorthy
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    abidi_cascode

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    9 visualizações4 páginas

    Abidi Cascode

    Enviado por

    Sanjayan Vinayagamoorthy

    Direitos autorais:

    Attribution Non-Commercial (BY-NC)
    Baixe no formato PDF ou leia online no Scribd
    Sinalizar o conteúdo como inadequado
    de 4
    tas Regular Correspondence ‘On the Operation of Cascade Gain Stages ASAD A. ABIDI, sre, er Aburact The action of ese crt poviding pin ean ‘meni quately expine Te esta the net eine of {he combon gate deve ect td te peda td rors ‘espns a the cet nodes tre deine Th acon pin eancoent [Silsrated in other botstaped cel ‘Although cascode amplifiers derive ther name from vacuum tube terminology, being the cascade ofa common cathde and a ‘common grid tube sage (1) 2} they are ubiquitous in transistor iret. Their primary advantage is thatthe effective capacitance appearing atthe inpt ofthe fist stage is reduced thus, cascodes ‘fe often associated with high-frequency cireits More rece, cascodes have been used often as active loads in operational amplificr circuits (3), 8}, because thy provide « gain-enhance- ment function allowing the product ofthe inuiascgain of 640 stages 10 be developed in one. This bas an advantage in the attainable bandwidth in the op amp: for example, an op amp driving a capacitive load may be designed with large de gain that is developed atone cascode stage, wher the load itself acts 1s the compensation capacitor o ensure stable cosed-oop opera tion, so rendering internal compensation unnecessary [3 This note examines some properties of cascodes used in this context, followed by a qualtatve development of the result. Some misinterpretations tht these crete are lable to are also Clanified, withthe objective of giving a beter insight into how they work TL Gnncurr turepances A. Oupue Impedance A virtue of the cascode circuit often cited is its high output resistance. Although this may be analyzed realy by solving 2 ‘small-signal equivalent cet (8, the results become more appar tif the circuits weated as negative fedback loop. Trans {ors appearing in the circuit diagrams inthe fllowing discussion are decomposed into Iwo symbols: the transistor itself, through Which the transconductance portion of the ouput eurtent flows, and an output resistance, through which the channel-length mod lation (for FET) or base-width modulation (for BIT) porson flows. These two components together constitute the fta current appearing atthe device terminals In a FET cascode (Fig), the output resistance of the com- ‘mon gate stage M2 is the feedback path between the output node 3 and the intermediate node A ofthe circuit. The feedback is "imteral” tothe device, nd x perhaps more propery refered 10 wat tppaned by TAT Bll Labatt Sst of Clos as bootrapping. Consider the aeton of the citeat in respoase to 4 test current f, applied at node B This will initially flow through ve, and raise the voltage 1. Inthe absence of an input to Ml, ogy. However, 8a driving fore for M2, and wll ‘produce ‘a Wansconductance current (M2) =~ gaat This ‘urret is forced to culate in, i adition to the externally ‘ppliedf,. Ths eaeg opt Ut Bante which implies that tO asta dn a “This means that a large voltage swing e, appears ia response to f.. implying large output resistance, Phystaly, the wanscon- tietanoe excitation of M2 due to the presence of fy caused 2 large current to be fored trough ri, du to the constrain of the ideal current source at the dain, ths bootstrapping the voltage at node B. The fedback lop is actualy internal to M2, and isin fact produced by the channel-lngth modulation within the de vce Tedoes not extend outside M2 because KCL demands that the carent into MI must always equa 1. iespective of 2 1 Input Impedance ot Inermediae Node ‘The other desirable property of cascades often cited is thatthe impedance at the intermediate node ss low Normally, is impedance is thought to be 1/gq2. Thus, when wed as an amplifier, the voltage swing v, wil be low, reducing the Miler ‘mulipication experienced by C., (Mi), However, as shown be: low, this assumption does not hold for high-gain stages, when ‘cascades are used as ative load ‘Consider the common gate FET alone (M2 of the cascode), driven by a test current at sts Souree. 4, wil appear at the ‘rain and produce a vole sR, atthe load. The voltage sng 2, produced at the source will ete a transcondvctance current in M2, which may be calculated as follows ~iRi to, Ret, el, 0018-9200 /88/1200-1434501.00 £1988 IEEE hich implies that @ 11s epparent, then, thatthe sual impedance atthe intermediate rode due 1 the common-ate stage in the cascode ison valid hea Ry 3. In particular, the impedance may be consider ably higher than 1/gqa if Ri ite a cascode-based active load, a is common in’ CMOS operaonal amplifier (3) Indeed, Stig is the ease, then using (2), when Ry — 7 (1+ ga the Impedance at node is ~ "Thi fact hasbeen observed before [31 IS} although i has tended to get nepleced in sobsoquent “scourses on the cascode cui, IL Gas asp Feequescy Restonst oF CascoDe Stacts A. Means of Gain Enhancement Iisa common practice to use a cascode stage to obtain a ain that equals the product of the intrinsic goim of two inverter sages. The increased gain has been explained to acct because “the voltage gain is simply the product ofthe transconductance of the input transistors and the impedance atthe output aoe” (6), Although this explanation hasan intuitive appeal, it yields a Slightly diferent expresin fr the gain than the correct one. For ‘rom (1) above, this argument means thatthe voltage gain af the cexscode would be gulty +(L Rata York whereas 8 complete analsis wil readily show that the exact expression gayral+ ‘aafa), Still speaking, the output resistance is what Is er lived by a grounded current soure driving the output node, ‘while the gai is produced by a transconductance CUTER, fai.

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