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A

Compal confidential

Schematics Document
AMD K8 with
ATI RS480M+ATI SB400

2005-01-04
REV:0.6

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Cover Sheet
Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

of

56

Compal confidential
File Name : LA-2421
Thermal Sensor
ADM1032

Memory BUS(DDR)
DDR-SO-DIMM-0

2. 5V DDR- 200

939-pin

Fan Control

BANK 0, 1, 2, 3 page 8,10

AMD K8

page 6

page 4

DDR-SO-DIMM-1

page 4, 5, 6, 7
2. 5V DDR- 200

Clock Generator
ICS 951412

BANK 0, 1, 2, 3 page 9,10

page 16

HT 16x16 1000MHZ
1 x PCIE

LVDS Panel
Interface
page

page 26

17

705 BGA

USB conn X4

page 11, 12, 13, 14

CRT & TV OUT

New Card
Connector

ATI-RS480M

page 18

page 33

page 31

VGA DDR X2

USB2.0

page 15

IDSEL:AD16
(PIRQE#,GNT#0,REQ#0)

page 29

page 27

ATI-SB400
PCI BUS

3.3V 33 MHz
IDSEL:AD22
(PIRQG#,GNT#1,REQ#1)

Mini PCI
socket

TSB43AB22
IEEE 1394

LAN
RTL 8100CL

page 31

BT Conn

2 x PCIE

IDSEL:AD18
(PIRQF#,GNT#3,REQ#3)

ATA-100
Primary IDE

page 19, 20, 21, 22

page 31

HDD
Connector

ATA-100
Secondary IDE

AMP & Audio Jack


page 32

page 34

CardBus Controller
TI PCI6411

page 28

MO DEM

page 30

564 BGA

IDSEL:AD20
(PIRQE#/F#/G#/H#,GNT#2,REQ#2)

Audio CKT

AC-LINK

CDROM
Connector

LPC BUS

page 24

SPR CONN.
page 41

page 34

*RJ45 CONN
*MIC IN JACK
*LINE OUT JACK
*1394 CONN
*SPDIF CONN
*DC JACK
*TVOUT CONN
*USB CONN x1

RTC CKT.
RJ45 CONN

page 19

page 28

Slot 0

Card reader

page 25

ENE KB910(L)

page 25

page 37, 38

Power OK CKT.
page 40

Power On/Off CKT.

page 36

EC I/O Buffer

page 36

Int.KBD

Touch Pad
page 36

RJ45 CONN

A-Link Express

BIOS
page 39

page 39

DC/DC Interface CKT.

page 42

Compal Electronics, Inc.

Power Circuit DC/DC

Title

page 43~49

Block Diagram
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

of

56

Voltage Rails
+5VS
+3VS

power
plane

State

+12VALW

+5V

+5VALW

+2.5V

+3VALW

+1.25V

+1.8VALW

+2.5VS
+1.8VS
+1.5VS
+2.5VDDA
+CPU_CORE
+1.2V_HT

S0

S1

S3

S5 S4/AC

S5 S4/AC don't exist

O MEANS ON
X MEANS OFF

PCI Devices
1

INTERNAL
DEVICE

IDSEL #

REQ/GNT #

PIRQ

SMBUS
IDE

LPC I/F
PCI to PCI
AC97 AUDIO

AC97 MODEM

OHCI#1 USB

OHCI#1 USB

EHCI USB

SATA#1

SATA#2

EXTERNAL
1394

AD16

Wireless LAN

AD18

L AN

AD22

3
1

CARD BUS

AD20

E,F,G,H

Mini-PCI (no use)

AD19

Compal Electronics, Inc.


Title

Notes List
Size

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Date:
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Document Number

Rev
0.6

LA-2421
Wednesday, January 05, 2005

Sheet

of

56

ZZZ

Fan Control Circuit 1


<11> H_CADIP[0..15]
<11> H_CADIN[0..15]

H_CADIP[0..15]

H_CADOP[0..15]

H_CADIN[0..15]

H_CADON[0..15]

+5VS

+12VS_FAN

LA-242 1 REV 0

H_CADOP[0..15] <11>

R150
0_0805_5%

H_CADON[0..15] <11>
2

C251
+12VALW

+1.2V_HT

C11

C14

AG4
AG3
AG1
AG2

150 mil 1

2
4.7U_0805_6.3V6K

<37,38> EN_FAN1

2
2
2
0.22U_0603_10V7K
0.22U_0603_10V7K

+1.2V_HT
R23
2

H_CLKIP1
H_CLKIN1

<11>
<11>

H_CLKIP0
H_CLKIN0

<11>
<11>

H_CTLIP0
H_CTLIN0

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8
H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

L5
M5

L0_CLKIN_H1
L0_CLKIN_L1

L0_CLKOUT_H1
L0_CLKOUT_L1

AB4
AB3

H_CLKOP1
H_CLKON1

H_CLKIP0
H_CLKIN0

L3
L2

L0_CLKIN_H0
L0_CLKIN_L0

L0_CLKOUT_H0
L0_CLKOUT_L0

AB1
AA1

H_CLKOP0
H_CLKON0

H_CTLIP0
H_CTLIN0

R1
T1

L0_CTLIN_H0
L0_CTLIN_L0

L0_CTLOUT_H0
L0_CTLOUT_L0

U2
U3

H_CTLOP0
H_CTLON0

D1
C1

L0_REF1
L0_REF0

SI3456DV-T1_TSOP6

JP24
1
R433

FAN1

2
100K_0402_5%
1

1
2
3

R432
150K_0402_5%

D29
1N4148_SOT23

R1151
1

2
0_0603_5%

R437
1

+3VS

ACES_85205-0300

C68
10U_0805_10V4Z
2 C61 2
1000P_0402_50V7K

10K_0402_5%
<37,38> FAN_SPEED1
3

1
C618
1000P_0402_50V7K

H_CLKOP1 <11>
H_CLKON1 <11>
H_CLKOP0 <11>
H_CLKON0 <11>

+5VS

Fan Control Circuit 2

+12VS_FAN

H_CTLOP0 <11>
H_CTLON0 <11>

R147
FAN2@ 0_0805_5%
C269
1

FAN2@ 10U_1206_16V4Z

1
1

C22

U37A
LM358A_SO8

FOX_PZ93903-3146-03

LVREF0

1000P_0402_50V7K

-IN

V4
V3
Y5
W5
Y4
Y3
AB5
AA5
AD5
AC5
AD4
AD3
AF5
AE5
AF4
AF3
V1
U1
W2
W3
Y1
W1
AA2
AA3
AC2
AC3
AD1
AC1
AE2
AE3
AF1
AE1

H_CLKIP1
H_CLKIN1

44.2_0603_1%
LVREF1
1

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

FAN1_ON

OUT

<11>
<11>

R5
T5
P3
P4
N5
P5
M3
M4
K3
K4
J5
K5
H3
H4
G5
H5
R3
R2
N1
P1
N3
N2
L1
M1
J1
K1
J3
J2
G1
H1
G3
G2

D Q14
G

+IN

2
H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8
H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

0.1U_0402_16V4Z

1
2
5
6

VLDT
VLDT
VLDT
VLDT

C10

VLDT
VLDT
VLDT
VLDT

R25

C23

1
2
5
6

C9

E2
E1
F1
F2

C18

2
100U_6.3V_M

0.22U_0603_10V7K
250 mil/20 mil

10U_1206_16V4Z

0.22U_0603_10V7K
1

C614
2
1

C17

HT Interface

U2 2A

U37B

D Q16
2

1000P_0402_50V7K

<37,38> EN_FAN2

OUT

FAN2_ON

-IN

FAN2@
SI3456DV-T1_TSOP6

+IN

44.2_0603_1%

LM358A_SO8
JP29
FAN2

1
2
3

1
2
R139 FAN2@ 100K_0402_5%
1

1
ACES_85205-0300
C241
FAN2@
1000P_0402_50V7K
2 C268 2
FAN2@ 10U_0805_10V4Z

R137
FAN2@ 150K_0402_5%
2

D17

FAN2@ 1N4148_SOT23
R1152
1

R138
+3VS

FAN2@ 0_0603_5%

10K_0402_5%
<37,38> FAN_SPEED2

1
C240
1000P_0402_50V7K
FAN2@ 2

Compal Electronics, Inc.


Title

Claw Harmmer CPU (Host Bus)


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


E

of

56

<8,9> DDR_SDQ[0..63]

+1.25V

+1.25V

2
0.22U_0603_10V7K

DDR_CLK_1L_H2
DDR_CLK_1L_L2
DDR_CLK_1L_H1
DDR_CLK_1L_L1

<8> DDR_CLK_1L_H2
<8> DDR_CLK_1L_L2
<8> DDR_CLK_1L_H1
<8> DDR_CLK_1L_L1

DDR_CKEB
DDR_CKEA

<9> DDR_CKEB
<8> DDR_CKEA
<8,9> DDR_SMAA[0..13]

VTT
VTT
VTT
VTT
VTT

AL22
AL23
A22
A23
R31
R30
AH23
AG23
D23
E23
R27
R26

MEMCLK_1H_H2
MEMCLK_1H_L2
MEMCLK_1H_H1
MEMCLK_1H_L1
MEMCLK_1H_H0
MEMCLK_1H_L0
MEMCLK_1L_H2
MEMCLK_1L_L2
MEMCLK_1L_H1
MEMCLK_1L_L1
MEMCLK_1L_H0
MEMCLK_1L_L0

E25
G24

MEMCLK_2H_H2
MEMCLK_2H_L2
MEMCLK_2H_H1
MEMCLK_2H_L1
MEMCLK_2H_H0
MEMCLK_2H_L0
MEMCLK_2L_H2
MEMCLK_2L_L2
MEMCLK_2L_H1
MEMCLK_2L_L1
MEMCLK_2L_H0
MEMCLK_2L_L0

MEMCKEB
MEMCKEA

DDR_SMAA13
DDR_SMAA12
DDR_SMAA11
DDR_SMAA10
DDR_SMAA9
DDR_SMAA8
DDR_SMAA7
DDR_SMAA6
DDR_SMAA5
DDR_SMAA4
DDR_SMAA3
DDR_SMAA2
DDR_SMAA1
DDR_SMAA0

AF23
C26
E28
V27
F29
H25
G28
J26
J25
L27
L28
N26
P25
U25

MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10
MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0

DDRA_SCS#1
DDRA_SCS#0

AL29
AJ29
AG28
AF29

MEMCS_1H_L1
MEMCS_1H_L0
MEMCS_1L_L1
MEMCS_1L_L0

<8> DDRA_SCS#1
<8> DDRA_SCS#0

VTT
VTT
VTT
VTT
VTT

MEMCKED
MEMCKEC

B Channel

4.7U_0805_6.3V6K2

U2 2B

AG14
AK14
AJ14
AH14
AL14

A Channel

250 mil width


0.22U_0603_10V7K
1
1
1
C496
C505
C498

E14
D14
C14
B14
A14
AJ21
AH21
C21
D21
T31
U31
AF21
AE21
G21
G22
T27
U27

MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10
MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0

AK23
A26
A29
W30
C29
E29
D31
G29
F31
J31
K31
N28
N30
U29

MEMCS_2H_L1
MEMCS_2H_L0
MEMCS_2L_L1
MEMCS_2L_L0

AL28
AJ30
AG27
AE26

<8,9> DDR_BSA1
<8,9> DDR_BSA0

MEMBANKA1
MEMBANKA0

MEMBANKB1
MEMBANKB0

Y31
AE30

<8,9> DDR_RASA_L
<8,9> DDR_CASA_L
<8,9> DDR_WEA_L

AD27
AF27
AE28

MEMRASA_L
MEMCASA_L
MEMWEA_L

MEMRASB_L
MEMCASB_L
MEMWEB_L

AG30
AK29
AH31

R46
R47

1 34.8_0603_1% MEMZP AE15


1 34.8_0603_1% MEMZN AF15

2
2

F15

+1.25VREF_CPU

MEMZP
MEMZN

MEMRESET_L

C495

2
2
0.22U_0603_10V7K

DDR_CLK_2L_H2
DDR_CLK_2L_L2
DDR_CLK_2L_H1
DDR_CLK_2L_L1

C493
4.7U_0805_6.3V6K

DDR_CLK_2L_H2 <9>
DDR_CLK_2L_L2 <9>
DDR_CLK_2L_H1 <9>
DDR_CLK_2L_L1 <9>

C25
B25

W25
AC27

+2.5V

DDRB_SCS#1
DDRB_SCS#0

DDRB_SCS#1 <9>
DDRB_SCS#0 <9>

D19

MEMVREF

15 mil width/20 mil space


FOX_PZ93903-3146-03

U22C

DDR_SDQ63
DDR_SDQ62
DDR_SDQ61
DDR_SDQ60
DDR_SDQ59
DDR_SDQ58
DDR_SDQ57
DDR_SDQ56
DDR_SDQ55
DDR_SDQ54
DDR_SDQ53
DDR_SDQ52
DDR_SDQ51
DDR_SDQ50
DDR_SDQ49
DDR_SDQ48
DDR_SDQ47
DDR_SDQ46
DDR_SDQ45
DDR_SDQ44
DDR_SDQ43
DDR_SDQ42
DDR_SDQ41
DDR_SDQ40
DDR_SDQ39
DDR_SDQ38
DDR_SDQ37
DDR_SDQ36
DDR_SDQ35
DDR_SDQ34
DDR_SDQ33
DDR_SDQ32
DDR_SDQ31
DDR_SDQ30
DDR_SDQ29
DDR_SDQ28
DDR_SDQ27
DDR_SDQ26
DDR_SDQ25
DDR_SDQ24
DDR_SDQ23
DDR_SDQ22
DDR_SDQ21
DDR_SDQ20
DDR_SDQ19
DDR_SDQ18
DDR_SDQ17
DDR_SDQ16
DDR_SDQ15
DDR_SDQ14
DDR_SDQ13
DDR_SDQ12
DDR_SDQ11
DDR_SDQ10
DDR_SDQ9
DDR_SDQ8
DDR_SDQ7
DDR_SDQ6
DDR_SDQ5
DDR_SDQ4
DDR_SDQ3
DDR_SDQ2
DDR_SDQ1
DDR_SDQ0

+2.5V
R286
3

15_0402_1%
2

+1.25VREF_CPU
DDR_CLK_1L_L2

R290

C506

C502

15_0402_1%
2

DDR_CLK_1L_H2

R68
DDR_CLK_1L_L1 1

120_0402_5%
2 DDR_CLK_1L_H1

DDR_CLK_2L_L2

R66
1

120_0402_5%
2 DDR_CLK_2L_H2

DDR_CLK_2L_L1

R332
1

120_0402_5%
2 DDR_CLK_2L_H1

R333

120_0402_5%

1000P_0402_50V7K

0.1U_0402_16V4Z

<8,9> DDR_SDM_L[0..7]

<8,9> DDR_SDQS_L[0..7]

AE16
AG17
AG18
AE18
AJ16
AG16
AE17
AJ18
AJ20
AE20
AE23
AG24
AG19
AE19
AJ24
AE24
AG25
AE25
AD25
AC25
AF25
AJ26
AE27
AD29
AB25
AB27
AA28
Y25
AC26
AB29
AA27
Y27
N25
M25
K27
K25
M29
M27
K29
J27
H27
G27
D27
F25
H29
G26
E26
G25
G23
F23
C20
F19
E24
C24
G19
E19
E18
G17
E16
E15
G18
C18
G16
C16

MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0

Y29
W27
P27
R25
W26
V25
R28
P29
V29
AF17
AG21
AH27
AA25
L26
F27
G20
E17
U26
DDR_SDQS_L7 AH17
DDR_SDQS_L6 AG20
DDR_SDQS_L5 AG26
DDR_SDQS_L4 AA26
DDR_SDQS_L3 L25
DDR_SDQS_L2 E27
DDR_SDQS_L1 E20
DDR_SDQS_L0 F17
DDR_SDM_L7
DDR_SDM_L6
DDR_SDM_L5
DDR_SDM_L4
DDR_SDM_L3
DDR_SDM_L2
DDR_SDM_L1
DDR_SDM_L0

MEMDATA127
MEMDATA126
MEMDATA125
MEMDATA124
MEMDATA123
MEMDATA122
MEMDATA121
MEMDATA120
MEMDATA119
MEMDATA118
MEMDATA117
MEMDATA116
MEMDATA115
MEMDATA114
MEMDATA113
MEMDATA112
MEMDATA111
MEMDATA110
MEMDATA109
MEMDATA108
MEMDATA107
MEMDATA106
MEMDATA105
MEMDATA104
MEMDATA103
MEMDATA102
MEMDATA101
MEMDATA100
MEMDATA99
MEMDATA98
MEMDATA97
MEMDATA96
MEMDATA95
MEMDATA94
MEMDATA93
MEMDATA92
MEMDATA91
MEMDATA90
MEMDATA89
MEMDATA88
MEMDATA87
MEMDATA86
MEMDATA85
MEMDATA84
MEMDATA83
MEMDATA82
MEMDATA81
MEMDATA80
MEMDATA79
MEMDATA78
MEMDATA77
MEMDATA76
MEMDATA75
MEMDATA74
MEMDATA73
MEMDATA72
MEMDATA71
MEMDATA70
MEMDATA69
MEMDATA68
MEMDATA67
MEMDATA66
MEMDATA65
MEMDATA64

AJ15
AL16
AL18
AL19
AL15
AK15
AK17
AJ17
AH19
AL21
AJ23
AL25
AK19
AJ19
AL24
AK25
AJ25
AL26
AG29
AF31
AH25
AL27
AJ31
AG31
AE31
AD31
AB31
AA29
AE29
AC28
AC31
AA30
M31
L30
H31
G31
L31
L29
J28
G30
E30
C31
C27
D25
E31
C30
B27
A27
C23
B23
A20
B19
A25
A24
C19
A19
D17
B17
C15
A15
A18
C17
D15
B15

MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0

MEMCHECK15
MEMCHECK14
MEMCHECK13
MEMCHECK12
MEMCHECK11
MEMCHECK10
MEMCHECK9
MEMCHECK8

AA31
W29
N31
N29
W28
W31
R29
P31

MEMDM_LO8
MEMDM_LO7
MEMDM_LO6
MEMDM_LO5
MEMDM_LO4
MEMDM_LO3
MEMDM_LO2
MEMDM_LO1
MEMDM_LO0
MEMDQS_LO8
MEMDQS_LO7
MEMDQS_LO6
MEMDQS_LO5
MEMDQS_LO4
MEMDQS_LO3
MEMDQS_LO2
MEMDQS_LO1
MEMDQS_LO0

MEMDM_UP8
MEMDM_UP7
MEMDM_UP6
MEMDM_UP5
MEMDM_UP4
MEMDM_UP3
MEMDM_UP2
MEMDM_UP1
MEMDM_UP0
MEMDQS_UP8
MEMDQS_UP7
MEMDQS_UP6
MEMDQS_UP5
MEMDQS_UP4
MEMDQS_UP3
MEMDQS_UP2
MEMDQS_UP1
MEMDQS_UP0

V31
AL17
AK21
AK27
AC29
J30
B29
B21
A16
U30
AH15
AL20
AJ27
AC30
J29
A28
A21
A17

B Channel

A Channel

FOX_PZ93903-3146-03

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


Claw Harmmer (MEMORY BUS)

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


E

of

56

L2
LQG21F4R7N00_0805
3300P_0402_50V7K +VDDA
1
2
1
1
1
1
+ C28
C483
C478
C477

+2.5VDDA

100U_6.3V_M

C3
B3
A3

<50> CPU_COREFB
<50> CPU_COREFB#

VDDA3
VDDA2
VDDA1

H_RST_CPU# F8
H_PWRGD E8
LDTSTOP# B6
CPU_COREFB
CPU_COREFB#

THERMTRIP_L

E5
E6
E7

AG10 H_THERMTRIP_S#

THERMDA
THERMDC

AJ2
AJ1

THERMDA_CPU
THERMDC_CPU

VID4
VID3
VID2
VID1
VID0

A13
A12
C12
A11
A10

VID4
VID3
VID2
VID1
VID0

RESET_L
PWROK
LDTSTOP_L
COREFB_H
COREFB_L
CORESENSE

VDDIO_SENSE

R267
169_0402_1%
1

<16> CPUCLK0_L

Y24
AA24
AE13

VDDIOFB_H
VDDIOFB_L
VDDIOSENSE

CLKIN
A8
CLKIN#
B8
Place within 0.5" from CPU
Route as 80 Ohm DIFF impedence 8/5/20

Place 169 Ohm within 0.5" from CPU


Route as DIF 5/5/5/20
C484
3900P_0402_50V7K
2
1
<16> CPUCLK0_H

VTT_SENSE

CLKIN_H
CLKIN_L

Clock

FBCLKOUT_H
FBCLKOUT_L

DBREQ_L

+3VS
W =15mil

VID4
VID3
VID2
VID1
VID0

<50>
<50>
<50>
<50>
<50>

U19

AF13

<37,38> EC_SMC_2

SCLK

<37,38> EC_SMD_2

SDATA

Miscellaneous
Route as DIFF pair 10 /5/10

Thermal Sensor
ADM1032

U22D

50 mil/20 mil

2
2 <19> H_PWRGD
<13,19> LDTSTOP#
0.22U_0603_10V7K

2
4.7U_0805_6.3V6K

ALERT#

GND

VDD

D+

THERMDA_CPU

D-

THERMDC_CPU

THERM#

VTT_SENSE

C472

C474
1

0.1U_0402_16V4Z

2200P_0402_50V7K

R247 @ 10K_0402_5%
ADM1032AR_SOP8

F13
E13

FBCLKOUT
1
FBCLKOUT# 80.6_0402_1%

A6

DBREQ#

2
R45

DBRDY

B11

DBRDY

Debug

TMS
TCK
TRST#
TDI
TDO

AG6
AG7
AF8
AJ9
AG8

TMS
TCK
TRST_L
TDI
TDO

JTAG

A4
D4
B4
C4
C7
C6
AL8
AL7
V5
U5
C13
E9
C5
A5

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

STRAP_HI
STRAP_HI
STRAP_HI
STRAP_HI

AJ12
AF12
T3
E11

STRAP_HI_AJ12
STRAP_HI_AF12
STRAP_HI_T3
STRAP_HI_E11

R265
R263
R18
R42

1
1
1
1

2
2
2
2

680_0402_5%
680_0402_5%
49.9_0402_1%
820_0402_5%

STRAP_LO
STRAP_LO
STRAP_LO
STRAP_LO
STRAP_LO
STRAP_LO
STRAP_LO
STRAP_LO
STRAP_LO

AG9
AH6
AF10
AH10
AJ10
B13
C10
T4
F11

STRAP_LO_AG9
STRAP_LO_AH6
STRAP_LO_AF10
STRAP_LO_AH10
STRAP_LO_AJ10
STRAP_LO_B13
STRAP_LO_C10
STRAP_LO_T4
STRAP_LO_F11

R255
R253
R258
R264
R266
R43
R39
R19
R40

1
1
1
1
1
1
1
1
1

2
2
2
2
2
2
2
2
2

680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
680_0402_5%
49.9_0402_1%
820_0402_5%

AE22
AG22
AH8
AH29
AJ4
AJ5
AJ6
AJ7
AJ8
AJ22
AJ28
AK3
AK4
AK6
AK8
AK10
AK12
AL3
AL4
AL5
AL6

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC

AL9
AL10
AL11
AL12
C22
C28
D8
D11
D12
D29
E21
E22
G15
N27
T25
T29
U28
C11
AG15
AH12

C482 3900P_0402_50V7K

+2.5VS

H_RST#

1 R31
2
0_0402_5%

H_RST_CPU#
1

C27
0.001U_0402_50V7M
@

H_RST#
R38

J1
JOPEN
3

2 2

@ 100_0402_5%

R254

+1.2V_HT
+2.5V

680_0402_5%

1
R252
10K_0402_5%

+2.5VS

1 LDTSTOP#
680_0402_5%
1 H_RST#
680_0402_5%
1 H_PWRGD
680_0402_5%

2
R259
2
R35
2
R34

<19>

+3VALW
R257
1K_0402_5%

+2.5VS

+2.5VS

Q27

H_THERMTRIP_S#

3
1H_THERMTRIP#
MMBT3904_SOT23

H_THERMTRIP# <20>

U2
+3VS
C33
1U_0603_10V4Z

VIN

GND

SD#

VOUT

BP

+2.5VDDA

C40

SI9183_SOT23-5
2

<37,38> VDDA_EN

0.01U_0402_16V7K

FOX_PZ93903-3146-03

R12

R11

R10

R9

R8

R7

@ 560_0402_5%
2
1

@ 560_0402_5%
2
1

@ 560_0402_5%
2
1

@ 560_0402_5%
2
1

@ 560_0402_5%
2
1

@ 560_0402_5%
2
1

@ 560_0402_5%
2
1

+2.5VS
R13

DBREQ#
DBRDY
TCK
TMS
TDI
TRST#
TDO

+2.5VS
JP1
1
3
5
7
9
11
13
15
17
19
21
23

2
4
6
8
10
12
14
16
18
20
22
24
26

@ SAMTEC_ASP-68200-07
4

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


ClawHarmmer ( MISC )

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


E

of

56

+CPU_CORE

+CPU_CORE

+CPU_CORE

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90

FOX_PZ93903-3146-03

VSS270
VSS269
VSS268
VSS267
VSS266
VSS265
VSS264
VSS263
VSS262
VSS261
VSS260
VSS259
VSS258
VSS257
VSS256
VSS255
VSS254
VSS253
VSS252
VSS251
VSS250
VSS249
VSS248
VSS247
VSS246
VSS245
VSS244
VSS243
VSS242
VSS241
VSS240
VSS239
VSS238
VSS237
VSS236
VSS235
VSS234
VSS233
VSS232
VSS231
VSS230
VSS229
VSS228
VSS227
VSS226

A7
A9
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AB2
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AB28
AC4
AC6
AC10
AC12
AC14
AC16
AC18
AC20
AC22
AC24
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD21
AD23
AD26
AD28
AE6
AE8
AE10
AE12
AE14
AF2
AF6
AF7
AF9
AF11
AF14
AF16
AF20
AF22
AF24
AF26
AF28
AG5
AG11
AG13
AG12
AH1
AH2
AH3
AH4
AH5
AH7
AH9
AH11
AH13
AH16
AH18
AH20
AH22
AH24
AH26
AH28
AJ3
AJ13
AK13
AL13
B7
B9
C2
C8
C9

VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS135
VSS134
VSS133
VSS132
VSS131

D2
D3
D5
D6
D7
D9
D13
D16
D18
D20
D22
D24
D26
D28
E3
E4
E10
E12
G12
F5
F6
F7
F9
F10
F12
F14
F16
F18
F22
F24
F26
F28
G4
G6
G8
G10
G14
H7
H9
H11
H21
H19
H17
H15
H13

U22F

Y28
Y26
Y23
Y21
Y19
Y17
Y15
Y13
Y11
Y9
Y7
W24
W22
W20
W18
W16
W14
W12
W10
W8
W6
W4
V28
V26
V23
V21
V19
V17
V15
V13
V11
V9
V7
V2
U24
U22
U20
U18
U16
U14
U12
U10
U8
U6
T28

U2 2E

VSS225
VSS224
VSS223
VSS222
VSS221
VSS220
VSS219
VSS218
VSS217
VSS216
VSS215
VSS214
VSS213
VSS212
VSS211
VSS210
VSS209
VSS208
VSS207
VSS206
VSS205
VSS204
VSS203
VSS202
VSS201
VSS200
VSS199
VSS198
VSS197
VSS196
VSS195
VSS194
VSS193
VSS192
VSS191
VSS190
VSS189
VSS188
VSS187
VSS186
VSS185
VSS184
VSS183
VSS182
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136

T26
T23
T21
T19
T17
T15
T13
T11
T9
T7
R24
R22
R20
R18
R16
R14
R12
R10
R8
R6
R4
P28
P26
P23
P21
P19
P17
P15
P13
P11
P9
P7
P2
N24
N22
N20
N18
N16
N14
N12
N10
N8
N6
M28
M26
M23
M21
M19
M17
M15
M13
M11
M9
M7
L24
L22
L20
L18
L16
L14
L12
L10
L8
L6
L4
K28
K26
K23
K21
K19
K17
K15
K13
K11
K9
K7
K2
J24
J22
J20
J18
J16
J14
J12
J10
J8
J6
H28
H26
H23

AA4
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AC9
AC11
AC13
AC15
AC17
AC19
AD2
AD6
AD8
AD10
AD12
AD14
AD16
AD18
AE4
AE7
AE9
AE11
AJ11
AK5
AK7
AK9
AK11
B5
B10
B12
D10
G7
G9
G11
G13
H2
H6
H8
H10
H12
H14
H16
H18
J4
J7
J9
J11
J13
J15
J17
J19
K6
K8
K10
K12
K14
K16
K18
K20
L7
L9
L11
L13
L15
L17
L19
L21
M2
M6
M8
M10
M12
M14
M16
M18
M20
N4
N7
N9
N11
N13
N15
N17
N19
N21
P6
P8
P10
P12
P14
P16
P18
P20
R7
R9

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD74
VDD75
VDD76
VDD77
VDD78
VDD79
VDD80
VDD81
VDD82
VDD83
VDD84
VDD85
VDD86
VDD87
VDD88
VDD89
VDD90
VDD91
VDD92
VDD93
VDD94
VDD95
VDD96
VDD97
VDD98
VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108

VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133
VDD134
VDD135
VDD136
VDD137
VDD138
VDD139
VDD140
VDD141
VDD142
VDD143
VDD144
VDD145
VDD146
VDD147
VDD148
VDD149
VDD150
VDD151
VDD152
VDD153
VDD154
VDD155
VDD156
VDD157

R11
R13
R15
R17
R19
R21
T2
T6
T8
T10
T12
T14
T16
T18
T20
U4
U7
U9
U11
U13
U15
U17
U19
U21
V6
V8
V10
V12
V14
V16
V18
V20
W7
W9
W11
W13
W15
W17
W19
W21
Y2
Y6
Y8
Y10
Y12
Y14
Y16
Y18
Y20

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50
VDDIO51
VDDIO52
VDDIO53
VDDIO54
VDDIO55
VDDIO56
VDDIO57
VDDIO58

AA23
AB22
AB24
AB30
AC21
AC23
AD20
AD22
AD24
AD30
AF30
AH30
AK16
AK18
AK20
AK22
AK24
AK26
AK28
AK30
B16
B18
B20
B22
B24
B26
B28
B30
D30
F30
H20
H22
H24
H30
J21
J23
K22
K24
K30
L23
M22
M24
M30
N23
P22
P24
P30
R23
T22
T24
T30
U23
V22
V24
V30
W23
Y22
Y30

@ 330U_D_2VM_R15
1

+ C12

2
@ 330U_D_2VM_R15

C13

330U_D_2VM_R15
1

1
+

C15

2
@ 330U_D_2VM_R15

C16

330U_D_2VM_R15
1

C530

2
330U_D_2VM_R15

+
2

@ 330U_D_2VM_R15
1
1

1
+

C549

C569

2
@ 330U_D_2VM_R15

C568

C26

2
330U_D_2VM_R15

+CPU_CORE
1

1
+

1
C462
@820U_E9_2_5V_M_R7

C461
820U_E9_2_5V_M_R7

1
C481
820U_E9_2_5V_M_R7

C480
@820U_E9_2_5V_M_R7

+CPU_CORE

+CPU_CORE

10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
1
1
1
1
1
1
C34
C35
C36
C50
C51
C52
2
2
10U_0805_10V4Z

2
2
10U_0805_10V4Z

2
2
10U_0805_10V4Z

C43
1000P_0402_50V7K

C41
0.1U_0402_16V4Z

On backside under socket


+CPU_CORE

C37

0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
1
1
1
1
1
C38
C39
C47
C48
C49

2
2
0.22U_0603_10V7K

2
2
2
2
0.22U_0603_10V7K 0.22U_0603_10V7K

On backside under socket

For EMI require

+CPU_CORE
+CPU_CORE
+2.5V
1

0.01U_0402_16V7K 0.01U_0402_16V7K
1
1
1
C5

C19

C30

1000P_0402_50V7K
1000P_0402_50V7K
1
1
1
C1184
C1185
C1186

C1183

C42
2
2
1000P_0402_50V7K

2
2
2
2
0.01U_0402_16V7K 0.01U_0402_16V7K

2
2
1000P_0402_50V7K

+1.2V_HT

CPU Decouping Capacitor


Loop Bandwidth Bulk Cappacitance
KHz
uF

Total
ESR
2.5m ohm
(AMD)

20

23000

50

9000

0.9m ohm

* 300

1500

2.5m ohm
3

+2.5V

+2.5V
4.7U_0805_6.3V6K
1
C104

C173

2
2
4.7U_0805_6.3V6K

0.22U_0603_10V7K
0.22U_0603_10V7K
0.22U_0603_10V7K
1
1
1
1
1
C141
C144
C55
C143
C56

C142

2
2
0.22U_0603_10V7K

2
2
2
2
0.22U_0603_10V7K 0.22U_0603_10V7K

Near Socket

FOX_PZ93903-3146-03

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


Claw Harmmer (Power & Ground)

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


E

of

56

+2.5V
+2.5V
+1.25V

JP11

RP17
DDR_SDQ63
DDR_SDQ62
DDR_SDQ59
DDR_SDQ58

1
2
3
4

1
2
3
4

8
7
6
5

DDR_CKEA
DDR_SMAA11
DDR_SMAA12
DDR_SMAA8

DDR_SDM_L7 1
DDR_SDQS_L72
DDR_SDQ61 3
DDR_SDQ60 4

1
2
3
4

47_0804_8P4R_5%
RP26
8 DDR_SMAA9
7 DDR_SMAA6
6 DDR_SMAA4
5 DDR_SMAA7

DDR_SDQ57
DDR_SDQ56
DDR_SDQ55
DDR_SDQ51

1
2
3
4

68_0804_8P4R_5%
RP15
8
7
6
5

1
2
3
4

47_0804_8P4R_5%
RP27
8 DDR_SMAA5
7 DDR_SMAA2
6 DDR_SMAA0
5 DDR_SMAA3

DDR_SDQ50 1
DDR_SDM_L6 2
DDR_SDQS_L63
DDR_SDQ54 4

68_0804_8P4R_5%
RP14
8
7
6
5

1
2
3
4

47_0804_8P4R_5%
RP28
8 DDR_SMAA1
7 DDR_BSA1
6 DDR_RASA_L
5 DDR_SMAA10

DDR_SDQ53
DDR_SDQ52
DDR_SDQ49
DDR_SDQ48

1
2
3
4

68_0804_8P4R_5%
RP13
8
7
6
5

1
2
3
4

47_0804_8P4R_5%
RP30
8 DDR_CASA_L
7 DDRA_SCS#1
6 DDRA_SCS#0
5 DDR_SMAA13

DDR_SDQ47
DDR_SDQ43
DDR_SDQ42
DDR_SDQ46

1
2
3
4

68_0804_8P4R_5%
RP12
8
7
6
5

1
2

47_0804_8P4R_5%
RP29
4 DDR_BSA0
3 DDR_WEA_L

DDR_SDM_L5 1
DDR_SDQS_L52
DDR_SDQ45 3
DDR_SDQ44 4

68_0804_8P4R_5%
RP11
8
7
6
5

1
2
3
4

DDR_SDQ41
DDR_SDQ40
DDR_SDQ39
DDR_SDQ38

1
2
3
4

68_0804_8P4R_5%
RP10
8
7
6
5

1
2
3
4

68_0804_8P4R_5%
RP21
8 DDR_SDQ12
7 DDR_SDQ13
6 DDR_SDM_L1
5 DDR_SDQS_L1

DDR_SDQ35 1
DDR_SDQ34 2
DDR_SDM_L4 3
DDR_SDQS_L44

68_0804_8P4R_5%
RP9
8
7
6
5

1
2
3
4

68_0804_8P4R_5%
RP20
8 DDR_SDQ3
7 DDR_SDQ7
6 DDR_SDQ8
5 DDR_SDQ9

DDR_SDQ37
DDR_SDQ36
DDR_SDQ33
DDR_SDQ32

1
2
3
4

68_0804_8P4R_5%
RP8
8
7
6
5

1
2
3
4

68_0804_8P4R_5%
RP19
8 DDR_SDQ6
7 DDR_SDQS_L0
6 DDR_SDM_L0
5 DDR_SDQ2

1
2
3
4

68_0804_8P4R_5%
RP7
8
7
6
5

1
2
3
4

68_0804_8P4R_5%
RP18
8 DDR_SDQ0
7 DDR_SDQ1
6 DDR_SDQ4
5 DDR_SDQ5

DDR_SDM_L3 1
DDR_SDQS_L32
DDR_SDQ29 3
DDR_SDQ28 4

68_0804_8P4R_5%
RP6
8
7
6
5

1
2
3
4

68_0804_8P4R_5%
RP24
8 DDR_SDQS_L2
7 DDR_SDM_L2
6 DDR_SDQ18
5 DDR_SDQ19

DDR_SDQ25
DDR_SDQ24
DDR_SDQ23
DDR_SDQ22

68_0804_8P4R_5%
RP5
8
7
6
5

1
2
3
4

68_0804_8P4R_5%
RP23
8 DDR_SDQ16
7 DDR_SDQ17
6 DDR_SDQ20
5 DDR_SDQ21

DDR_SDQ31
DDR_SDQ30
DDR_SDQ27
DDR_SDQ26

8
7
6
5
68_0804_8P4R_5%
RP16
8
7
6
5

1
2
3
4

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

RP25
DDR_SDQ0
DDR_SDQ1
DDR_SDQS_L0
DDR_SDQ2
DDR_SDQ3
DDR_SDQ8
DDR_SDQ9
DDR_SDQS_L1
DDR_SDQ10
DDR_SDQ11
<5> DDR_CLK_1L_H1
<5> DDR_CLK_1L_L1

DDR_SDQ16
DDR_SDQ17

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DDR_SDQS_L2
DDR_SDQ18
DDR_SDQ19
DDR_SDQ24
DDR_SDQ25
DDR_SDQS_L3
DDR_SDQ26
DDR_SDQ27

47_0404_4P2R_5%
RP22

68_0804_8P4R_5%

8
7
6
5

DDR_SDQ10
DDR_SDQ11
DDR_SDQ14
DDR_SDQ15
<5> DDR_CKEA

DDR_CKEA
DDR_SMAA12
DDR_SMAA9

Note:
DDR_SMAA13 Recommend for AMD
<5,9> DDR_BSA0
<5,9> DDR_WEA_L
<5> DDRA_SCS#0

DDR_SMAA7
DDR_SMAA5
DDR_SMAA3
DDR_SMAA1
DDR_SMAA10
DDR_BSA0
DDR_WEA_L
DDRA_SCS#0
DDR_SMAA13
DDR_SDQ32
DDR_SDQ33
DDR_SDQS_L4
DDR_SDQ34
DDR_SDQ35
DDR_SDQ40
DDR_SDQ41
DDR_SDQS_L5
DDR_SDQ42
DDR_SDQ43

DDR_SDQ48
DDR_SDQ49
DDR_SDQS_L6
DDR_SDQ50
DDR_SDQ51
DDR_SDQ56

68_0804_8P4R_5%
DDR_SDQ57
DDR_SDQS_L7
DDR_SDQ58
DDR_SDQ59
<9,16,20,26> SB_SDAT
<9,16,20,26> SB_SCLK
+3VS

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

20mil

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_SDQ20
DDR_SDQ21

DDR_SDQ4
DDR_SDQ5
DDR_SDM_L0
DDR_SDQ6

+1.25VREF_MEM

C291
0.1U_0402_16V4Z

DDR_SDQ7
DDR_SDQ12
1

DDR_SDQ13
DDR_SDM_L1
DDR_SDQ14
DDR_SDQ15

DDR_SDM_L2
DDR_SDQ22
DDR_SDQ23
DDR_SDQ28
DDR_SDQ29
DDR_SDM_L3
DDR_SDQ30
DDR_SDQ31

DDR_CKEA
DDR_SMAA11
DDR_SMAA8
DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_BSA1
DDR_RASA_L
DDR_CASA_L
DDRA_SCS#1

DDR_BSA1 <5,9>
DDR_RASA_L <5,9>
DDR_CASA_L <5,9>
DDRA_SCS#1 <5>

DDR_SDQ36
DDR_SDQ37
DDR_SDM_L4
DDR_SDQ38
DDR_SDQ39
DDR_SDQ44
DDR_SDQ45
DDR_SDM_L5

DDR_SDQ46
DDR_SDQ47
DDR_CLK_1L_L2 <5>
DDR_CLK_1L_H2 <5>
DDR_SDQ52
DDR_SDQ53
DDR_SDM_L6
DDR_SDQ54
DDR_SDQ55
DDR_SDQ60
DDR_SDQ61
DDR_SDM_L7
DDR_SDQ62
DDR_SDQ63

AMP_1565917-1

SO-DIMM0

Top Side

<5,9> DDR_SDQ[0..63]
<5,9> DDR_SDQS_L[0..7]
<5,9> DDR_SDM_L[0..7]
<5,9> DDR_SMAA[0..13]

DDR_SDQ[0..63]
DDR_SDQS_L[0..7]
DDR_SDM_L[0..7]
DDR_SMAA[0..13]
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Compal Electronics, Inc.


DDR-SODIMM SLOT0

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Wednesday, January 05, 2005


G

Sheet

8
H

of

56

+2.5V

+2.5V

+1.25VREF_MEM
JP30

DDR_SDQ7
DDR_SDQ12
1

DDR_SDQ13
DDR_SDQS_L1
DDR_SDQ14
DDR_SDQ15
<5> DDR_CLK_2L_H1
<5> DDR_CLK_2L_L1

+1.25V

DDR_CLK_2L_H1
DDR_CLK_2L_L1

RP43
8
7
6
5

DDR_SDQ20
DDR_SDQ21

DDRB_SCS#0
DDR_CKEB

DDR_SDQS_L2
DDR_SDQ22
DDR_SDQ23
DDR_SDQ28
DDR_SDQ29
DDR_SDQS_L3
DDR_SDQ30
DDR_SDQ31

Layout note

<5> DDR_CKEB

Note:
DDR_SMAA13 Recommend
for AMD.

<5,8> DDR_BSA0
<5,8> DDR_WEA_L
<5> DDRB_SCS#0

DDR_CKEB
DDR_SMAA12
DDR_SMAA9
DDR_SMAA7
DDR_SMAA5
DDR_SMAA3
DDR_SMAA1
DDR_SMAA10
DDR_BSA0
DDR_WEA_L
DDRB_SCS#0
DDR_SMAA13
DDR_SDQ36
DDR_SDQ37
DDR_SDQS_L4
DDR_SDQ38
DDR_SDQ39
DDR_SDQ44
DDR_SDQ45
DDR_SDQS_L5

DDR_SDQ46
DDR_SDQ47

DDR_SDQ52
DDR_SDQ53
DDR_SDQS_L6
DDR_SDQ54
DDR_SDQ55
DDR_SDQ60
DDR_SDQ61
DDR_SDQS_L7

<5,8> DDR_SDM_L[0..7]
<5,8> DDR_SMAA[0..13]
<5,8> DDR_SDQ[0..63]

DDR_SDQ0
DDR_SDQ1
DDR_SDM_L0
DDR_SDQ2

C648
0.1U_0402_16V4Z

DDR_SDQ3
DDR_SDQ8
1

DDR_SDQ9
DDR_SDM_L1
+2.5V
DDR_SDQ10
DDR_SDQ11
R473
15_0402_1%
+1.25VREF_MEM

DDRB_SCS#1

47_0804_8P4R_5%

<5,8> DDR_SDQS_L[0..7]

50 mil width

DDR_SDQ62
DDR_SDQ63

DDR_SDQS_L[0..7]
DDR_SDM_L[0..7]

<8,16,20,26> SB_SDAT
<8,16,20,26> SB_SCLK

DDR_SMAA[0..13]

+3VS
DDR_SDQ[0..63]

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199

DQ16
DQ17
VDD
DQS2
DQ18
VSS
DQ19
DQ24
VDD
DQ25
DQS3
VSS
DQ26
DQ27
VDD
CB0
CB1
VSS
DQS8
CB2
VDD
CB3
DU
VSS
CK2
CK2#
VDD
CKE1
DU/A13
A12
A9
VSS
A7
A5
A3
A1
VDD
A10/AP
BA0
WE#
S0#
DU
VSS
DQ32
DQ33
VDD
DQS4
DQ34
VSS
DQ35
DQ40
VDD
DQ41
DQS5
VSS
DQ42
DQ43
VDD
VDD
VSS
VSS
DQ48
DQ49
VDD
DQS6
DQ50
VSS
DQ51
DQ56
VDD
DQ57
DQS7
VSS
DQ58
DQ59
VDD
SDA
SCL
VDD_SPD
VDD_ID

DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
A11
A8
VSS
A6
A4
A2
A0
VDD
BA1
RAS#
CAS#
S1#
DU
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
DU

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_SDQ16
DDR_SDQ17

R486

C638

C640

15_0402_1%
DDR_SDM_L2
DDR_SDQ18

1000P_0402_50V7K

1
2
3
4

VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS

DDR_SDQS_L0
DDR_SDQ6

VREF
VSS
DQ0
DQ1
VDD
DQS0
DQ2
VSS
DQ3
DQ8
VDD
DQ9
DQS1
VSS
DQ10
DQ11
VDD
CK0
CK0#
VSS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

1 2

DDR_SDQ4
DDR_SDQ5

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

DDR_SDQ19
DDR_SDQ24

0.1U_0402_16V4Z

DDR_SDQ25
DDR_SDM_L3
DDR_SDQ26
DDR_SDQ27

DDR_CKEB
DDR_SMAA11
DDR_SMAA8
DDR_SMAA6
DDR_SMAA4
DDR_SMAA2
DDR_SMAA0
DDR_BSA1
DDR_RASA_L
DDR_CASA_L
DDRB_SCS#1

DDR_BSA1 <5,8>
DDR_RASA_L <5,8>
DDR_CASA_L <5,8>
DDRB_SCS#1 <5>

DDR_SDQ32
DDR_SDQ33
DDR_SDM_L4
DDR_SDQ34
DDR_SDQ35
DDR_SDQ40
DDR_SDQ41
DDR_SDM_L5

DDR_SDQ42
DDR_SDQ43
DDR_CLK_2L_L2
DDR_CLK_2L_H2

DDR_CLK_2L_L2 <5>
DDR_CLK_2L_H2 <5>

DDR_SDQ48
DDR_SDQ49
DDR_SDM_L6
DDR_SDQ50
DDR_SDQ51
DDR_SDQ56
DDR_SDQ57
DDR_SDM_L7
DDR_SDQ58
DDR_SDQ59
+3VS

TYCO_1470804-2

DIMM1
Bottom Side

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


DDR-SODIMM SLOT1

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


E

of

56

+2.5V

+1.25V

470U_6.3V_M
1
+

C612

@ 220U_D2_4VM
1
+

C294

4.7U_0805_6.3V6K
1
1

C296

C274

C275

+1.25V

Near Power Supply


@ 470U_D_4VM
1
C367

C325

330U_6.3V_M
1
C411

4.7U_0805_10V4Z
1

C318

C324

C323

2
470U_D_4VM

2
4.7U_0805_6.3V6K

2
2
330U_D_2VM_R15

Near DIMMs

2
470U_6.3V_M

2
4.7U_0805_10V4Z

At either end of VTT island (=250 mil)

Layout note :

For EMI require

Place one cap close to every 2 pull up resistors termination to


+1.25VS
+1.25V

+2.5V
0.1U_0402_16V4Z
1

1
C401

C400

0.1U_0402_16V4Z
1
C399

0.1U_0402_16V4Z

C398
2

0.1U_0402_16V4Z
1
C397

0.1U_0402_16V4Z

C396
2

0.1U_0402_16V4Z
1
C395

0.1U_0402_16V4Z

C394
2

0.1U_0402_16V4Z
1
C393

0.1U_0402_16V4Z

C392
2

0.1U_0402_16V4Z
1
C391

0.1U_0402_16V4Z

1000P_0402_50V7K

C1188

1000P_0402_50V7K

C1189

1000P_0402_50V7K

C1190
1000P_0402_50V7K

0.1U_0402_16V4Z

+1.25V

C1187

C390

+2.5V
0.1U_0402_16V4Z
1

1
C389

C388

0.1U_0402_16V4Z
1

1
C387
2

0.1U_0402_16V4Z

C386
2

0.1U_0402_16V4Z
1

1
C385
2

0.1U_0402_16V4Z

C384
2

0.1U_0402_16V4Z
1

1
C383
2

0.1U_0402_16V4Z

C382
2

0.1U_0402_16V4Z
1

1
C381
2

0.1U_0402_16V4Z

C380
2

0.1U_0402_16V4Z
1

1
C379
2

0.1U_0402_16V4Z

C1191

C1192

C1193

C1194

C378
2

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

0.1U_0402_16V4Z

+1.25V

+1.25V
0.1U_0402_16V4Z
1

1
C377

C376

0.1U_0402_16V4Z

C1195

C1196

C1197

C1198

C375
2

220P_0402_25V8K

220P_0402_25V8K

220P_0402_25V8K

220P_0402_25V8K

0.1U_0402_16V4Z

+1.25V

+1.25V
0.1U_0402_16V4Z
1

1
C363

C362

0.1U_0402_16V4Z
1
C361

0.1U_0402_16V4Z

C360
2

0.1U_0402_16V4Z
1
C359

0.1U_0402_16V4Z

C358
2

0.1U_0402_16V4Z
1
C357

0.1U_0402_16V4Z

C356
2

0.1U_0402_16V4Z
1
C355

0.1U_0402_16V4Z

C354
2

0.1U_0402_16V4Z
1
C353

0.1U_0402_16V4Z

C1199

C1200

220P_0402_25V8K

220P_0402_25V8K

220P_0402_25V8K

+2.5V

+1.25V
0.1U_0402_16V4Z
1
C351
2

0.1U_0402_16V4Z
1

C350

C349
2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

C348

C347
2

0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

C346

C345
2
0.1U_0402_16V4Z

0.1U_0402_16V4Z
1

C344

C343
2

C1202
220P_0402_25V8K

C341
2

+2.5V

0.1U_0402_16V4Z
1

C342
2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1201

C352
2

+1.25V

C340
2

C1203

C1204

0.1U_0402_16V4Z
2

+2.5V

220P_0402_25V8K

220P_0402_25V8K

+1.25V
0.1U_0402_16V4Z
1

1
C339

C338

0.1U_0402_16V4Z

C337
2
0.1U_0402_16V4Z
+2.5V

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


DDR SODIMM Decoupling

Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


E

10

of

56

<15> NMAA[0..14]
<15> NMDA[0..63]
<4> H_CADIP[0..15]
<4> H_CADIN[0..15]
<4> H_CADOP[0..15]
<4> H_CADON[0..15]

H_CADIP[0..15]

<15> NDQMA[0..7]

NMAA[0..14]
NMDA[0..63]
NDQMA[0..7]

H_CADIN[0..15]
<15> NDQSA[0..7]

H_CADOP[0..15]

NDQSA[0..7]

H_CADON[0..15]

U27B

<4>
<4>

H_CLKOP1
H_CLKON1

<4>
<4>

H_CLKOP0
H_CLKON0

<4>
<4>
+1.2V_HT

H_CTLOP0
H_CTLON0
R49
R48

1
1

T26
R26
U25
U24
V26
U26
W25
W24
AA25
AA24
AB26
AA26
AC25
AC24
AD26
AC26

HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N

H_CADOP7
H_CADON7
H_CADOP6
H_CADON6
H_CADOP5
H_CADON5
H_CADOP4
H_CADON4
H_CADOP3
H_CADON3
H_CADOP2
H_CADON2
H_CADOP1
H_CADON1
H_CADOP0
H_CADON0

R29
R28
T30
R30
T28
T29
V29
U29
Y30
W30
Y28
Y29
AB29
AA29
AC29
AC28

HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N

H_CLKOP1
H_CLKON1

Y26
W26

HT_RXCLK1P
HT_RXCLK1N

H_CLKOP0
H_CLKON0

W29
W28

HT_RXCLK0P
HT_RXCLK0N

H_CTLOP0
H_CTLON0

P29
N29

2 49.9_0402_1%
2 49.9_0402_1%

D27
E27

HYPER TRANSPORT CPU


I/F

H_CADOP15
H_CADON15
H_CADOP14
H_CADON14
H_CADOP13
H_CADON13
H_CADOP12
H_CADON12
H_CADOP11
H_CADON11
H_CADOP10
H_CADON10
H_CADOP9
H_CADON9
H_CADOP8
H_CADON8

HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N

R24
R25
N26
P26
N24
N25
L26
M26
J26
K26
J24
J25
G26
H26
G24
G25

H_CADIP15
H_CADIN15
H_CADIP14
H_CADIN14
H_CADIP13
H_CADIN13
H_CADIP12
H_CADIN12
H_CADIP11
H_CADIN11
H_CADIP10
H_CADIN10
H_CADIP9
H_CADIN9
H_CADIP8
H_CADIN8

HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N

L30
M30
L28
L29
J29
K29
H30
H29
E29
E28
D30
E30
D28
D29
B29
C29

H_CADIP7
H_CADIN7
H_CADIP6
H_CADIN6
H_CADIP5
H_CADIN5
H_CADIP4
H_CADIN4
H_CADIP3
H_CADIN3
H_CADIP2
H_CADIN2
H_CADIP1
H_CADIN1
H_CADIP0
H_CADIN0

HT_TXCLK1P
HT_TXCLK1N

L24
L25

H_CLKIP1
H_CLKIN1

HT_TXCLK0P
HT_TXCLK0N

F29
G29

H_CLKIP0
H_CLKIN0

HT_TXCTLP
HT_TXCTLN

M29
M28

H_CTLIP0
H_CTLIN0

HT_RXCTLP
HT_RXCTLN
HT_RXCALN
HT_RXCALP

HT_TXCALP
HT_TXCALN

B28
A28

R53

AF17
AK17
AH16
AF16
AJ22
AJ21
AH20
AH21
AK19
AH19
AJ17
AG16
AG17
AH17
AJ18

NDQMA0 AG26
NDQMA1 AJ29
NDQMA2 AE21
NDQMA3 AH24
NDQMA4 AH12
NDQMA5 AG13
NDQMA6
AH8
NDQMA7
AE8
NDQSA0
NDQSA1
NDQSA2
NDQSA3
NDQSA4
NDQSA5
NDQSA6
NDQSA7

H_CLKIP1 <4>
H_CLKIN1 <4>
H_CLKIP0 <4>
H_CLKIN0 <4>
H_CTLIP0 <4>
H_CTLIN0 <4>
2 91_0402_5%

216RS480M_BGA706

NMRASA#
NMCASA#
NMWEA#
NMCSA0#
NMCKEA

<15>
<15>
<15>
<15>
<15>

NMRASA#
NMCASA#
NMWEA#
NMCSA0#
NMCKEA

<15>
<15>

NMCLKA0
NMCLKA0#

NMCLKA0
NMCLKA0#

MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_A14
MEM_DM0
MEM_DM1
MEM_DM2
MEM_DM3
MEM_DM4
MEM_DM5
MEM_DM6
MEM_DM7

AF25
AH30
AG20
AJ25
AH13
AF14
AJ7
AG8

MEM_DQS0P
MEM_DQS1P
MEM_DQS2P
MEM_DQS3P
MEM_DQS4P
MEM_DQS5P
MEM_DQS6P
MEM_DQS7P

AG25
AH29
AF21
AK25
AJ12
AF13
AK7
AF9

MEM_DQS0N
MEM_DQS1N
MEM_DQS2N
MEM_DQS3N
MEM_DQS4N
MEM_DQS5N
MEM_DQS6N
MEM_DQS7N

AE17
AH18
AE18
AJ19
AF18

MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE

AK16
AJ16

MEM_CKP
MEM_CKN

AE28
AJ4

MEM_CAP1
MEM_CAP2

AJ20

MEM_VMODE

AK20

MEM_VREF

MEM_A I/F

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12
NMAA13
NMAA14

U27A

+2.5VS
2 0.47U_0603_16V7K
2 0.47U_0603_16V7K

C69 1
C183 1
C124

R62

R55
1K_0402_1%

2
2

0.1U_0402_16V4Z

2 1K_0402_5%

AF28
AF27
AG28
AF26
AE25
AE24
AF24
AG23
AE29
AF29
AG30
AG29
AH28
AJ28
AH27
AJ27
AE23
AG22
AF23
AF22
AE20
AG19
AF20
AF19
AH26
AJ26
AK26
AH25
AJ24
AH23
AJ23
AH22
AK14
AH14
AK13
AJ13
AJ11
AH11
AJ10
AH10
AE15
AF15
AG14
AE14
AE12
AF12
AG11
AE11
AJ9
AH9
AJ8
AK8
AH7
AJ6
AH6
AJ5
AG10
AF11
AF10
AE9
AG7
AF8
AF7
AE7

MEM_COMPP
MEM_COMPN

AH5
AD30

MEM_VREF

MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQ16
MEM_DQ17
MEM_DQ18
MEM_DQ19
MEM_DQ20
MEM_DQ21
MEM_DQ22
MEM_DQ23
MEM_DQ24
MEM_DQ25
MEM_DQ26
MEM_DQ27
MEM_DQ28
MEM_DQ29
MEM_DQ30
MEM_DQ31
MEM_DQ32
MEM_DQ33
MEM_DQ34
MEM_DQ35
MEM_DQ36
MEM_DQ37
MEM_DQ38
MEM_DQ39
MEM_DQ40
MEM_DQ41
MEM_DQ42
MEM_DQ43
MEM_DQ44
MEM_DQ45
MEM_DQ46
MEM_DQ47
MEM_DQ48
MEM_DQ49
MEM_DQ50
MEM_DQ51
MEM_DQ52
MEM_DQ53
MEM_DQ54
MEM_DQ55
MEM_DQ56
MEM_DQ57
MEM_DQ58
MEM_DQ59
MEM_DQ60
MEM_DQ61
MEM_DQ62
MEM_DQ63

C110
0.1U_0402_16V4Z

R59
1K_0402_1%
2

AJ15
AJ14

+1.8VS
C140
1
2

MPVDD
MPVSS

NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63
1 R77
1 R51

2 61.9_0402_1%
2 61.9_0402_1%

+2.5VS

216RS480M_BGA706

1U_0603_10V4Z

Compal Electronics, Inc.


Title

RS480M HT/MEM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

11

of

56

U27C

GPP_RX0P
GPP_RX0N

<26> GPP_RX0P
<26> GPP_RX0N

<19>
<19>
<19>
<19>

SB_RX0P
SB_RX0N

SB_RX0P
SB_RX0N

SB_RX1P
SB_RX1N

SB_RX1P
SB_RX1N
R88 1
R87 1

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

A7
B7
B6
B5
A5
A4
B3
B2
C1
D1
D2
E2
F2
F1
H2
J2
J1
K1
K2
L2
M2
M1
N1
N2
R1
T1
T2
U2
V2
V1
Y2
AA2

AE1
AE2

GPP_RX0P
GPP_RX0N

GPP_TX0P
GPP_TX0N

AD2
AD1

AB2
AC2

GPP_RX1P
GPP_RX1N

GPP_TX1P
GPP_TX1N

AA1
AB1

AB5
AB4

GPP_RX2P
GPP_RX2N

GPP_TX2P
GPP_TX2N

Y5
Y6

Y4
AA4

GPP_RX3P
GPP_RX3N

GPP_TX3P
GPP_TX3N

W5
W4

AG1
AH1

SB_RX0P
SB_RX0N

AC5
AC6

2 10K_0402_5% AH3
2 8.06K_0402_1% AJ3

PCIE I/F TO VIDEO

D8
D7
D5
D4
E4
F4
G5
G4
H4
J4
H5
H6
G1
G2
K5
K4
L4
M4
N5
N4
P4
R4
P5
P6
P2
R2
T5
T4
U4
V4
W1
W2

PCIE I/F TO SLOT

PCIE I/F TO SB

SB_RX1P
SB_RX1N
PCE_ISET
PCE_TXISET

GPP_TX0P
GPP_TX0N

C558 1
C559 1

2 0.1U_0402_16V4Z PCIE_TX0P
2 0.1U_0402_16V4Z PCIE_TX0N

PCIE_TX0P <26>
PCIE_TX0N <26>

AF2
AG2

SB_TX0P_C C560 1
SB_TX0N_C C561 1

2 0.1U_0402_16V4Z SB_TX0P
2 0.1U_0402_16V4Z SB_TX0N

SB_TX0P <19>
SB_TX0N <19>

SB_TX1P
SB_TX1N

AC4
AD4

SB_TX1P_C C556 1
SB_TX1N_C C557 1

2 0.1U_0402_16V4Z SB_TX1P
2 0.1U_0402_16V4Z SB_TX1N

SB_TX1P <19>
SB_TX1N <19>

PCE_PCAL
PCE_NCAL

AH2
AJ2

R344 1
R345 1

SB_TX0P
SB_TX0N

2 150_0402_1%
2 100_0402_1%

+1.2V_HT

216RS480M_BGA706

Compal Electronics, Inc.


Title

PCIE
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

12

of

56

+3VS
L3
1
2
FBML10160808121LMT_0603

AVDD
1

C70
0.1U_0402_16V4Z

+1.8VS

C25
A26
B26

RED
GREEN
BLUE

<18> CRT_VSYNC
<18> CRT_HSYNC

A11
B11
2 715_0402_1% C26
E11
F11

2
AVDDQ

<18,41> TV_CRMA
<18,41> TV_LUMA
<18,41> TV_COMPS
<18>
<18>
<18>

R50 1

<18> 3VDDCCL
<18> 3VDDCDA

+1.8VS

L9
1
2
FBML10160808121LMT_06031

1
C134 C131

+NB_PLLVDD

10U_0805_10V4Z
1U_0603_10V4Z
2
2
L6
1
2
FBML10160808121LMT_06031
1
C83 C94

+1.8VS

+NB_HTPVDD

<19,26,34> NB_RST#
1U_0603_10V4Z
<40> NB_PWRGD
2
<6,19> LDTSTOP#
R85
<19> ALLOW_LDTSTOP
2
1SUS_STAT#
2.2K_0402_5%
1
2
L10
R1141
5.6K_0402_5%
+NB_VDDR3
1
2
C1501
FBML10160808121LMT_0603
2
1U_0603_10V4Z

10U_0805_10V4Z
2
+2.5VS
+3VS

<16> NB_REFCLK
<16,20> SB_OSC_INT

R321 2

1 @ 22_0402_5%

DAC_VSYNC
DAC_HSYNC
RSET
DAC_SCL
DAC_SDA

A14
B14

PLLVDD
PLLVSS

M23
L23

HTPVDD
HTPVSS

D14
B15
B12
C12
AH4

SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
SUS_STAT#

H13
H12

VDDR3_1
VDDR3_2

A13
B13

OSCIN
OSCOUT

CLOCKs
R75

1 10K_0402_5% B9

<23> SPMEM_EN#
<23> LOAD_ROM#

<19>
BMREQ#
<17> EDID_CLK_LCD
+3VS

EDID_CLK_LCD

LVDSB0+
LVDSB0LVDSB1+
LVDSB1LVDSB2+
LVDSB2-

TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N

B16
A16
D16
C16
B17
A17
E17
D17

LVDSA0+
LVDSA0LVDSA1+
LVDSA1LVDSA2+
LVDSA2-

TXCLK_UP
TXCLK_UN
TXCLK_LP
TXCLK_LN

B20
A20
B18
C17

LVDSBC+
LVDSBCLVDSAC+
LVDSAC-

LPVDD
LPVSS
LVDDR18D
LVDDR18A_1
LVDDR18A_2

E18
F17
E19
G20
H20

LVSSR1
LVSSR2
LVSSR3
LVSSR4
LVSSR5
LVSSR6
LVSSR7
LVSSR8

G19
E20
F20
H18
G18
F19
H19
F18

LVDS_DIGON
LVDS_BLON
LVDS_BLEN

E14
F14
F13

GFX_CLKP
GFX_CLKN

B8
A8

HTTSTCLK
HTREFCLK

P23
N23

SB_CLKP
SB_CLKN

TVCLKIN

F12
E13
D13

DFT_GPIO0/RSV
DFT_GPIO1/RSV
DFT_GPIO2/RSV

F10
C10
C11
AF4
AE4

BMREQb
I2C_CLK
I2C_DATA
THERMALDIODE_P
THERMALDIODE_N

MIS.

C13
C14
C15

TMDS_HPD

A10

STRP_DATA

E10

<17>
<17>
<17>
<17>
<17>
<17>

LVDSA0+
LVDSA0LVDSA1+
LVDSA1LVDSA2+
LVDSA2-

<17>
<17>
<17>
<17>
<17>
<17>
1

+1.8VS
L8
1
2
FBML10160808121LMT_0603
1

LPVDD
LVDSBC+
LVDSBCLVDSAC+
LVDSAC-

<17>
<17>
<17>
<17>

C116
0.1U_0402_16V4Z

L5
LVDDR18A
C103
0.1U_0402_16V4Z

1
2
FBML10160808121LMT_0603
1

C72
1U_0603_10V4Z

C118
1U_0603_10V4Z

L7
1
2
FBML10160808121LMT_0603

LVDDR18D
+1.8VS

C102
0.1U_0402_16V4Z

+1.8VS

C117
1U_0603_10V4Z

ENVDD
ENABLT

<17>
<17,37,38>

R1132

NBSRCCLK <16>
NBSRCCLK# <16>
R56 1

E8
E7

DFT_GPIO3/RSV
DFT_GPIO4/RSV
DFT_GPIO5/RSV

LVDSB0+
LVDSB0LVDSB1+
LVDSB1LVDSB2+
LVDSB2-

CRT_R
CRT_G
CRT_B

C77

D18
C18
B19
A19
D19
C19
D20
C20

2 10K_0402_5%
HTREFCLK <16>

1K_0402_5%
2

C
Y
COMP

1U_0603_10V4Z
2

TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N

LVDS

AVDDQ
AVSSQ

B25
A25
A24

C74

10U_0805_10V4Z
2

C81
0.1U_0402_16V4Z

PLL PWR

E24
D24

1
2
FBML10160808121LMT_06031

PM

AVDD1
AVDD2
AVSSN1
AVSSN2
AVDDDI
AVSSDI

L4

CRT/TVOUT

U27D
B27
C27
D26
D25
C24
B24

+1.8VS

SBLINKCLK <16>
SBLINKCLK# <16>

STRP_DATA

DDC_DATA

B10 EDID_DAT_LCD

TESTMODE

E12

R74 1

1
2
+3VS
R1074 ROM@2.2K_0402_5%
1
2
R1075 @ 2.2K_0402_5%
EDID_DAT_LCD <17>
2 4.7K_0402_5%

216RS480M_BGA706
C1074

+3VS
R325
4.7K_0402_5%

R1076
ROM@1K_0402_5%
U43

EDID_DAT_LCD

8
7
6
5

1
EDID_CLK_LCD

ROM@0.1U_0402_16V4Z

R324
4.7K_0402_5%

EDID_CLK_LCD
STRP_DATA

VCC
WP
SCL
SDA

NC
A1
A2
VSS

1
2
3
4

ROM@AT24C04N-10SI-2.7_SO8~D

Compal Electronics, Inc.


Title

Power/GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet

13

of

56

U27F

VSS89

VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106

T27
R27
AD28
F24
F27
G28

VSS107
VSS108
VSS109
VSS110
VSS111
VSS112

M27
H24
N28
P25
P28
E26
K25
U28
V25
V28
R23

C86
C87
C88
C89
C90
C96
C91
C67
C62
C63
C65
C64
C82

N27
U27
V27
G27
V24
H27
K24
AB24
P27
J27
AA27
K27
P24
AB27
AB23
V23
G23
E23
W23
K23
J23
H23
U23
AA23
D23
F23
C23
B23
A23
VDDHT30 A29
VDDHT31 AC30

+2.5VS

22U_1206_10V4Z 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+1.8VS

VSSA59

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

C175

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

C66
C85
C151
C177
C128
C60
C95
C100
C106
C115
C133
C148
C152
C159
C105
C125
C132
C158

L11
1
2 VDD18
FBML10160808121LMT_0603
1U_0603_10V4Z 2

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

1C179
1C119
1C126
1C130
1C129

2
2
2
2

VDDA12_13
1

C178
D33A
BAV99DW-7_SOT363

4.7U_0805_6.3V6K

VSSA22

VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
VDD_HT6
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
VDD_HT16
VDD_HT17
VDD_HT18
VDD_HT19
VDD_HT20
VDD_HT21
VDD_HT22
VDD_HT23
VDD_HT24
VDD_HT25
VDD_HT26
VDD_HT27
VDD_HT28
VDD_HT29
VDD_HT30
VDD_HT31

AK23
AK28
AK11
AK4
AE30
AC14
AD12
AC18
AC20
AD10
AD14
AD15
AD20
AC10
AD18
AC12
AD22
AC22
AH15

VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDD_MEM7
VDD_MEM8
VDD_MEM9
VDD_MEM10
VDD_MEM11
VDD_MEM12
VDD_MEM13
VDD_MEM14
VDD_MEM15
VDD_MEM16
VDD_MEM17
VDD_MEM18
VDD_MEMCK

H15
AC17
AC15

VDD18_1
VDD18_2
VDD18_3

B21
C21
A22
B22
C22
F21
F22
E21
G21

D33B

VDD_CORE47
VDD_CORE46
VDD_CORE45
VDD_CORE44
VDD_CORE43
VDD_CORE42
VDD_CORE41
VDD_CORE40
VDD_CORE39

VDDA12_14
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12
VDDA12_13
VDDA18_1
VDDA18_2
VDDA18_3
VDDA18_4
VDDA18_5
VDDA18_6
VDDA18_7
VDDA18_8
VDDA18_9
VDDA18_10
VDDA18_11
VDDA18_12
VDDA18_13
VDD_CORE1
VDD_CORE2
VDD_CORE3
VDD_CORE4
VDD_CORE5
VDD_CORE6
VDD_CORE7
VDD_CORE8
VDD_CORE9
VDD_CORE10
VDD_CORE11
VDD_CORE12
VDD_CORE13
VDD_CORE14
VDD_CORE15
VDD_CORE16
VDD_CORE17
VDD_CORE18
VDD_CORE19
VDD_CORE20
VDD_CORE21
VDD_CORE22
VDD_CORE23
VDD_CORE24
VDD_CORE25
VDD_CORE26
VDD_CORE27
VDD_CORE28
VDD_CORE29
VDD_CORE30
VDD_CORE31
VDD_CORE32
VDD_CORE33
VDD_CORE34
VDD_CORE35
VDD_CORE36
VDD_CORE37
VDD_CORE38

H9
AA7
G9
U8
N7
N8
U7
F9
AA8
G8
G7
J8
J7
B1
AG4
R8
AC8
AC7
AF6
AE6
L8
W8
W7
L7
R7
AF5
AK2
N16
M13
M15
W16
N18
P19
N12
P15
N14
M17
T19
G22
R12
P13
R14
V19
R18
U16
U12
T13
U14
T17
U18
E22
R16
V13
T15
P17
W18
D22
W12
V15
W14
V17
M19
H22
H21
D21

C54

2 22U_1206_10V4Z

C92

2 1U_0603_10V4Z

C161
C162
C163
C164

1
1
1
1

2
2
2
2

1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

2
2
2
2
2

1U_0603_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

VDDA12_13

+1.8VS
C187
C167
C168
C169
C170

1
1
1
1
1

VDDA18_13

+1.2V_HT

C1182 1

2@ 100U_D2_6.3M_R45

VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132

C53

1
1
1
1
1
1
1
1
1
1
1
1
1

POWER

F28
H28
M24
J28
N19
K28
T23
L27

U19
AC16
AG18
AC23
AD8
AD11
AD13
AD16
AD19
AD23
AG5
AG6
AG21
AD17
AG15
AG12
AF30
AG24
AG9
AC19
AG27
AC11
AD7
AJ30
AC21
AK5
AK10
AC13
AD21
AK22
AK29
W19
AE26
AE27

VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120

VSSA22

2
2
2
2
2
2
2
2
2
2
2
2
2

VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72

22U_1206_10V4Z 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

U27E

U15
V14
R15
T14
N15
V12
N13
P14
U17
T16
R17
P12
T12
R13
W13
W17
P18
V18
M18
U13
N17
W15
V16
T18
M14
M12
M16
P16

+1.2V_HT
+1.2V_HT

R5
AE5
V5
N3
F7
F5
R3
AA6
T3
M6
C5
F8
M8
Y8
V3
C3
W3
K8
D3
C6
AA3
A2
AB3
P8
J6
C8
AD3
V8
F3
AE3
AF3
M5
AB7
G3
B4
P7
AA5
C9
C7
J5
R6
J3
AD5
D6
C4
K3
AB8
T7
Y7
AD6
K7
H7
M3
V6
H8
C2
AG3
L6
AJ1
M7
V7
F6
E6
U5
U6
E5
L5
T8

VSS30

VSSA1
VSSA2
VSSA3
VSSA4
VSSA5
VSSA6
VSSA7
VSSA8
VSSA9
VSSA10
VSSA11
VSSA12
VSSA13
VSSA14
VSSA15
VSSA16
VSSA17
VSSA18
VSSA19
VSSA20
VSSA21
VSSA22
VSSA23
VSSA24
VSSA25
VSSA26
VSSA27
VSSA28
VSSA29
VSSA30
VSSA31
VSSA32
VSSA33
VSSA34
VSSA35
VSSA36
VSSA37
VSSA38
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSSA45
VSSA46
VSSA47
VSSA48
VSSA49
VSSA50
VSSA51
VSSA52
VSSA53
VSSA54
VSSA55
VSSA56
VSSA57
VSSA58
VSSA59
VSSA60
VSSA61
VSSA62
VSSA63
VSSA64
VSSA65
VSSA66
VSSA67
VSSA68

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44

GROUND

G10
G12
AD29
AD27
AC27
G15
G14
Y24
G13
E9
D15
D9
AD9
G11
F16
G30
AB28
AB25
D12
AD24
AA28
G17
Y23
AC9
R19
Y27
C28
G16
F25
B30
T24
F26
W27
D11
H11
AD25
H17
H10
H16
H14
E16
D10
E15
F15

C108 1
C97 1

2 22U_1206_10V4Z
2 22U_1206_10V4Z

C111
C112
C113
C114
C107
C120
C121
C139
C122
C123
C127
C135
C136
C137
C138
C155
C153
C154
C156
C157

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z

216RS480M_BGA706

+3VS
BAV99DW-7_SOT363
B

VDDA18_13
1

C180
4.7U_0805_6.3V6K

For EMI require

VSSA59

+1.2V_HT
VDDHT30
1

C59
4.7U_0805_6.3V6K

C1209
1000P_0402_50V7K

C1210
1000P_0402_50V7K

C1211
1000P_0402_50V7K

VSS30
VDDHT31
+1.2V_HT
1

C58
1

4.7U_0805_6.3V6K

VSS89

C1212
220P_0402_25V8K

C1213
220P_0402_25V8K

C1214
220P_0402_25V8K

Compal Electronics, Inc.


Title

RS480M Power/GND

216RS480M_BGA706

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

14

of

56

+2.5VS

+2.5VS
VRAM@ 0.1U_0402_16V4Z

C80
D

VRAM@
10U_0805_10V4Z

C510

C500
2

VRAM@ 0.1U_0402_16V4Z
1

C93

VRAM@ 0.1U_0402_16V4Z

VRAM@ 0.1U_0402_16V4Z
1

C508
2

VRAM@ 10U_0805_10V4Z

VRAM@ 0.1U_0402_16V4Z

1
C44

C78

C45

VRAM@ 0.1U_0402_16V4Z

C523

VRAM@ 0.1U_0402_16V4Z

VRAM@ 0.1U_0402_16V4Z

C181

C524
2

VRAM@ 0.1U_0402_16V4Z

VRAM@ 0.1U_0402_16V4Z

C563

1
C182

VRAM@ 0.1U_0402_16V4Z

VRAM@ 0.1U_0402_16V4Z
1

C186

C145

1
C537

1
C536

VRAM@ 10U_0805_10V4Z

VRAM@ 0.1U_0402_16V4Z

C565

VRAM@ 0.1U_0402_16V4Z

2
VRAM@ 0.1U_0402_16V4Z

NMAA[0..14]

NDQSA[0..7]

+2.5VS

R284
VRAM@

1K_0402_1%

(25mil)
1

R287

VRAM@

C46
1K_0402_1%
VRAM@ 0.1U_0402_16V4Z 2

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

+2.5VS

NDQSA2
NDQMA2
NMDA16
NMDA17
NMDA18
NMDA19
NMDA20
NMDA21
NMDA22
NMDA23

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VREF_1

49

VREF

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

NMCLKA0
NMCLKA0#
NMCKEA

BA0
BA1

26
27

NMAA13
NMAA14

CS#
RAS#
CAS#
WE#

24
23
22
21

NMCSA0#
NMRASA#
NMCASA#
NMWEA#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

+2.5VS

R91
VRAM@
NMCKEA <11>

1K_0402_1%

(25mil)
NMCSA0#
NMRASA#
NMCASA#
NMWEA#

<11>
<11>
<11>
<11>

R89
VRAM@

1K_0402_1%

VRAM@ C566
0.1U_0402_16V4Z

NDQSA5
NDQMA5
NMDA40
NMDA41
NMDA42
NMDA43
NMDA44
NMDA45
NMDA46
NMDA47

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

NDQSA4
NDQMA4
NMDA32
NMDA33
NMDA34
NMDA35
NMDA36
NMDA37
NMDA38
NMDA39

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VREF_2

49

VREF

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

VRAM@ HY5DU561622CT-4_TSOPII66

C522
VRAM@ 0.1U_0402_16V4Z

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VREF_1

49

VREF

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

BA0
BA1

26
27

NMAA13
NMAA14

CS#
RAS#
CAS#
WE#

24
23
22
21

NMCSA0#
NMRASA#
NMCASA#
NMWEA#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

NMCLKA0
NMCLKA0#
NMCKEA

NMCLKA0

NMCLKA0 <11>

51
47
54
56
57
59
60
62
63
65

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

NMCLKA0
NMCLKA0#
NMCKEA

BA0
BA1

26
27

NMAA13
NMAA14

CS#
RAS#
CAS#
WE#

24
23
22
21

NMCSA0#
NMRASA#
NMCASA#
NMWEA#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

For EMI require


+2.5VS

C1221
1000P_0402_50V7K

C1222
1000P_0402_50V7K

C1223
1000P_0402_50V7K

+2.5VS

C1224
220P_0402_25V8K

C1225
220P_0402_25V8K

C1226
220P_0402_25V8K

+2.5VS

U7

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

R317
VRAM@ 56_0402_5%

C147
VRAM@ 0.1U_0402_16V4Z

C533

NDQSA0
NDQMA0
NMDA0
NMDA1
NMDA2
NMDA3
NMDA4
NMDA5
NMDA6
NMDA7

1
18
33
3
9
15
55
61

+2.5VS

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

VRAM@ 0.01U_0402_16V7K

16
20
2
4
5
7
8
10
11
13

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

VRAM@ HY5DU561622CT-4_TSOPII66

U4
NDQSA1
NDQMA1
NMDA8
NMDA9
NMDA10
NMDA11
NMDA12
NMDA13
NMDA14
NMDA15

+2.5VS

U28

NDQMA[0..7]

NDQSA3
NDQMA3
NMDA24
NMDA25
NMDA26
NMDA27
NMDA28
NMDA29
NMDA30
NMDA31

NMDA[0..63]

<11> NDQSA[0..7]

<11> NDQMA[0..7]

VRAM@ 0.1U_0402_16V4Z

C546

As close as ppossible to related pin

U23
<11> NMDA[0..63]

1
C146

VRAM@ 10U_0805_10V4Z

As close as ppossible to related pin

<11> NMAA[0..14]

R315
VRAM@ 56_0402_5%

VRAM@ HY5DU561622CT-4_TSOPII66

NDQSA6
NDQMA6
NMDA48
NMDA49
NMDA50
NMDA51
NMDA52
NMDA53
NMDA54
NMDA55

16
20
2
4
5
7
8
10
11
13

LDQS0
LDM1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7

NDQSA7
NDQMA7
NMDA56
NMDA57
NMDA58
NMDA59
NMDA60
NMDA61
NMDA62
NMDA63

51
47
54
56
57
59
60
62
63
65

UDQS0
UDM1
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15

VREF_2

49

VREF

NMAA0
NMAA1
NMAA2
NMAA3
NMAA4
NMAA5
NMAA6
NMAA7
NMAA8
NMAA9
NMAA10
NMAA11
NMAA12

29
30
31
32
35
36
37
38
39
40
28
41
42

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
AP/A10
A11
A12

VDD0
VDD1
VDD2
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4

1
18
33
3
9
15
55
61

NC0
NC1
NC2
NC3
NC4
NC5
NC6

14
17
19
25
43
50
53

CK
CK#
CKE

45
46
44

NMCLKA0
NMCLKA0#
NMCKEA

BA0
BA1

26
27

NMAA13
NMAA14

CS#
RAS#
CAS#
WE#

24
23
22
21

NMCSA0#
NMRASA#
NMCASA#
NMWEA#

VSSQ0
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSS0
VSS1
VSS2

6
12
52
58
64
34
48
66

VRAM@ HY5DU561622CT-4_TSOPII66
A

NMCLKA0#

NMCLKA0# <11>

Compal Electronics, Inc.


Title

VGADDR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

15

of

56

For EMI require


+3V_VDD
+3VS

+3VS

+3V_CLK

L12
CHB2012U121_0805
2
1

L13
2 Width=40 mils

1
1

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CHB2012U121_0805
C583

C573

2
10U_0805_10V4Z

C571

C570

2
0.1U_0402_16V4Z

43
14
21
35
32
51
48
56

L14
CHB2012U121_0805
2

C592
2.2U_0805_10V4Z
1
2

1
2

VDDCPU
VDDSRC
VDDSRC
VDDSRC
VDDATI
VDD_PCI
VDDHTT
VDDREF
VDD48
X1
X2

NC

SB_SCLK
SB_SDAT

7
8

SCLK
SDATA

2 33_0402_5%

52

14.31818MHz_20P_1BX14318BE1A

<8,9,20,26> SB_SCLK
<8,9,20,26> SB_SDAT
R358 1

<13> NB_REFCLK

C603

C602

2
2
0.1U_0402_16V4Z

1
2

Y3

C605
22P_0402_50V8J

C192

XTALIN_CLK
XTALOUT_CLK
CLK_STOP

C572

2
0.1U_0402_16V4Z

+3V_CLK

C1215

C1216

C195

2
0.1U_0402_16V4Z

1000P_0402_50V7K

1000P_0402_50V7K

10U_0805_10V4Z

U35

+3VS

C601
22P_0402_50V8J
1
2

+3V_VDD

0.1U_0402_16V4Z

R359 1

2 475_0402_1%

NC_CLKSEL1#
NC_CLKSEL0#

IREF

11
10

CLKREQB#
CLKREQA#

5
55
36
26
20
15
31
49
46
42

GND
GND
GNDSRC
GNDSRC
GNDSRC
GNDSRC
GNDATI
GNDPCI
GNDHTT
GNDCPU

39
38

CPUCLK8T0
CPUCLK8C0
CPUCLK8T1
CPUCLK8C1

45
44
41
40

CPUCLK0H
CPUCLK0L

SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT5
SRCCLKC5
SRCCLKT4
SRCCLKC4
SRCCLKT3
SRCCLKC3
ATIGCLKT1
ATIGCLKC1
ATIGCLKT0
ATIGCLKC0
SRCCLKT0
SRCCLKC0

12
13
16
17
18
19
22
23
24
25
27
28
30
29
34
33

PCIECLK0_R R407 1
PCIECLK0#_R R408 1

2 33_0402_5%
2 33_0402_5%

PCIECLK0
PCIECLK0#

R416 1
R417 1

2 49.9_0402_1%
2 49.9_0402_1%

PCIECLK0
PCIECLK0#

PCIECLK0 <26>
PCIECLK0# <26>

SBSRCCLK_R R409 1
SBSRCCLK#_R R410 1

2 33_0402_5%
2 33_0402_5%

SBSRCCLK
SBSRCCLK#

R418 1
R419 1

2 49.9_0402_1%
2 49.9_0402_1%

SBSRCCLK
SBSRCCLK#

SBSRCCLK <19>
SBSRCCLK# <19>

NBSRCCLK_R R541
NBSRCCLK#_RR543
SBLINKCLK_R R368
SBLINKCLK#_RR369

2
2
2
2

NBSRCCLK
NBSRCCLK#
SBLINKCLK
SBLINKCLK#

R542
R544
R354
R355

2 @ 49.9_0402_1%
2 @49.9_0402_1%
2 49.9_0402_1%
2 49.9_0402_1%

PCICLK0

50

FS0/REF0
FS1/REF1
FS2

54
53
9

USB_48MHz
HTTCLK0

4
47

R366 1
R367 1

FS0 R375 1
FS1
FS2

2 15_0402_1%
2 15_0402_1%

1
1
1
1

@ 33_0402_5%
@ 33_0402_5%
33_0402_5%
33_0402_5%

33_0402_5%

CPUCLK0_H <6>
CPUCLK0_L <6>

1
1
1
1

NBSRCCLK
NBSRCCLK#

NBSRCCLK <13>
NBSRCCLK# <13>

SBLINKCLK
SBLINKCLK#

SBLINKCLK <13>
SBLINKCLK# <13>

SB_OSC_INT <13,20>

R411 1

2 33_0402_5%

CLK_48M <24>

R406 1
R365 1

2 @ 33_0402_5%
2 33_0402_5%

USBCLK_EXT <20>
HTREFCLK <13>

R412 1
2@ 10K_0402_5%
<26> NC_CLKSEL0#

37

REF2

VDDA
GNDA

R352
51.1_0402_1%
2

ICS951412AGLFT_TSSOP56

+3VS
3

R1136
@ 10K_0402_5%

1
3

2
G

+3V_CLK

1
R99

R130

10K_0402_5%

10K_0402_5%

10K_0402_5%

R362

Q43
@ 2N7002_SOT23
1

<37,38,50> VR_ON

CLK_STOP
D

EXT CLK FREQUENCY SELECT TABLE(MHZ)

R364
@ 8.2K_0402_5%

@ 8.2K_0402_5%

R131
@ 8.2K_0402_5%

FS2 FS1 FS0

CPU

Hi-Z

1
1

SRCCLK
[2:1]

COMMENT

PCI

USB

100.00 Hi-Z

Hi-Z

48.00

Reserved

100.00 X/3

X/6

48.00

Reserved

180.00 100.00 60.00

30.00

48.00

Reserved

220.00 100.00 36.56

73.12

48.00

Reserved

100.00 100.00 66.66

33.33

48.00

Reserved

133.33 100.00 66.66

33.33

48.00

Reserved

200.00 100.00 66.66

33.33

48.00

Normal HAMMER operation

HTT

R363

FS0
FS1
FS2

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Clock Generator
Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005


G

Sheet

16
H

of

56

LCD Panel Connector

+3VS

The cap.'s colsely to LCD CONN.

JP3
LVDSA2+
LVDSA2-

<13>
<13>

LVDSA1+
LVDSA1-

<13>
<13>

LVDSB2+
LVDSB2-

<13>
<13>

LVDSA0+
LVDSA0-

<13>
<13>

LVDSAC+
LVDSAC-

<13>
<13>

LVDSB1+
LVDSB1-

LVDSA1+
LVDSA1LVDSB2+
LVDSB2LVDSA0+
LVDSA0LVDSAC+
LVDSACLVDSB1+
LVDSB1+3VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

R29
+LCDVDD

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

1
LVDSB0+
LVDSB0-

LVDSB0+ <13>
LVDSB0- <13>

LVDSBC+
LVDSBC-

LVDSBC+
LVDSBC-

<13>
<13>

C463

4.7K_0402_5%

<13>
<13>

LVDSA2+
LVDSA2-

C467

<37,38> BKOFF#

0.01U_0402_16V7K

DISPOFF#

D9

RB751V_SOD323

@ 10U_0805_10V4Z

<13,37,38> ENABLT

DISPOFF#

D10

INVT_PWM <37,38>
DAC_BRIG <37,38>
EDID_CLK_LCD
EDID_DAT_LCD

RB751V_SOD323

EDID_CLK_LCD <13>
EDID_DAT_LCD <13>

B+

C1227

C1228

EMI require

@ 10P_0402_50V8K @ 10P_0402_50V8K
2
2

ACES_88107-4000G

B+
2

C20
0.001U_0402_50V7M

C21
0.001U_0402_50V7M

+3VS

4.7U_0805_10V4Z

+12VALW

C444

R5

Q26
SI2302DS_SOT23

+LCDVDD

+12VALW

R240

1K_0402_5%

R3

0.1U_0402_16V4Z
2 0.047U_0402_16V4Z
2

C451

C452

C458

R6

4.7U_0805_10V4Z

1 2

150K_0402_5%
100K_0402_5%

100K_0402_5%

+LCDVDD

Q4
2N7002_SOT23

2
G

2
G
Q3
2N7002_SOT23

<13>

ENVDD

Q5
DTC124EK_SC59

SI2302DS: N CHANNEL
VGS: 4.5V, RDS: 85 mOHM
VGS: 2.5V, RDS: 115mOHM
Id(MAX): 2.8A
VGS(MAX): +-8V

ENVDD

Compal Electronics, Inc.


Title

LVDS Connector
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005


G

Sheet

17

of
H

56

+5VS

+CRTVDD
D6

CRT CONNECTOR
<13>

3VDDCDA

<13>

3VDDCCL

RB411D_SOT23

+R_CRT_VCC
F1
1
1

W=40mils

1.1A_6VDC_FUSE
C8
0.1U_0402_16V4Z

3VDDCDA

3VDDCCL

JP19

CRTL_B
+CRTVDD

R248

C468
10P_0402_50V8K

C457
22P_0402_25V8K

C456

C455
R14

22P_0402_25V8K

CRT_HSYNCRFL

CRT_VSYNCRFL

R244 20_0402_5%

P
CRT_VSYNC

A
3

C6
1

10P_0402_50V8K
2

U20

SUYIN_7849S-15G2T-HC
Q6
3VDDCDA
3
2N7002_SOT23

Q7
3
2N7002_SOT23

C453
C7

R21

3VDDCCL
R20

2
4.7K_0402_5%

4.7K_0402_5%
2

10P_0402_50V8K
220P_0402_25V8K
220P_0402_25V8K

<13> CRT_VSYNC

OE#

C454

220P_0402_25V8K
1
C450

L17
1
2
FBM-L11-160808-800LMT_0603

R4

4.7K_0402_5%
4.7K_0402_5%

22P_0402_25V8K

C469

74AHCT1G125GW_SOT353-5

CRTL_G

2 FCM2012C-800_0805

5
P
A

2 FCM2012C-800_0805

L20 1

75_0402_5%
10P_0402_50V8K 75_0402_5%
R245 20_0402_5%
L18
1
2
1
2
FBM-L11-160808-800LMT_0603

U18

OE#

CRT_HSYNC

75_0402_5%

0.1U_0402_16V4Z

L21 1

2
G

C475
1
2

C470 R249

+5VS

<13> CRT_HSYNC

R250

CRTL_R

CRT_B

10P_0402_50V8K

CRT_B
2

<13>

CRT_G

2 FCM2012C-800_0805

2
G

CRT_G

L22 1

<13>

M_SEN#
CRT_R

M_SEN#
CRT_R

<37,38>
<13>

6
11
1
7
12
2
8
13
3
9
14
4
10
15
5

+3VS

74AHCT1G125GW_SOT353-5

TV-Out Connector
S-Video
<13,41> TV_LUMA

L24 1
2
FLM1608081R8K_0603

LUMA_CL

<13,41> TV_CRMA

L19 1
2
FLM1608081R8K_0603

CRMA_CL

<13,41> TV_COMPS

L23 1
2
FLM1608081R8K_0603

COMPS_CL

R37

2
1

2
2

TVGND

C476
330P_0402_50V7K

1
2
3
4
5
6
7
C466
330P_0402_50V7K

C471
330P_0402_50V7K

C479
270P_0402_50V7K

C465
270P_0402_50V7K

C473
270P_0402_50V7K

R261
75_0402_1%
2
1

R246
75_0402_1%
2
1

R251
75_0402_1%
2
1

JP21

SUYIN_33007SR-07T1-C

0_0805_5%
4

Compal Electronics, Inc.


Title

CRT & TVout Connector


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

18

of

56

+3VS
PCI_AD[0..31]

<23,24,27,28,29> PCI_AD[0..31]
RP60

2 8.2K_0402_5%
U38A

RP3

C613 1

2 10U_0805_10V4Z

C257 1

2 0.1U_0402_16V4Z

PCI_SERR#
PCI_PAR
PCI_DEVSEL#
LOCK#

8
7
6
5

FBM-L11-321611-260-LMT_1206
C627 1
C250
C255
C259
C260
C272
C263
C248
C264

RP1
PCI_REQ#4
PCI_GNT#4
PCI_REQ#5
PCI_GNT#5

8
7
6
5

L28
2

+1.9VS

8.2K_0804_8P4R_5%

1
2
3
4

8.2K_0804_8P4R_5%

1
1
1
1
1
1
1
1

2 22U_1206_10V4Z
2
2
2
2
2
2
2
2

PCIE_VDDR

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

1 R110
2 PCI_REQ#6
8.2K_0402_5%
1 R111
2 PCI_GNT#6
8.2K_0402_5%
R4531
R4501
R4541
R4511

2
2
2
2

49.9_0402_1%
49.9_0402_1%
49.9_0402_1%
49.9_0402_1%

SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

<24,27>
<24,29>
<24,28>
<24>

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

F26
R29
G26
P26
K26
L26
P28
N26
P27

PCIE_VDDR_1
PCIE_VDDR_2
PCIE_VDDR_3
PCIE_VDDR_4
PCIE_VDDR_5
PCIE_VDDR_6
PCIE_VDDR_7
PCIE_VDDR_8
PCIE_VDDR_9

H28
F29
H29
H26
F27
G29
L29
J26
L28
J27
N27
M26
K27
P29
P30

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15

AJ8
AK7
AG5
AH5
AJ5
AH6
AJ6
AK6
AG7
AH7

CPU_STP#/DPSLP#
PCI_STP#
INTA#
INTB#
INTC#
INTD#
INTE#/GPIO33
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36

PJP13
2MM
B

+1.8VS

SB_32KHI

B2

X1

SB_32KH0

B1

X2

+3VS

IN

GND

SHDN

OUT

+1.9VS
R1139

SET

@ 10K_0402_1%

@ G913C_SOT23-5
R1140
@ 19.1K_0402_1%
<6,13> LDTSTOP#

<13> ALLOW_LDTSTOP
<6> H_PWRGD
<13>
<6>

BMREQ#
H_RST#

ALLOW_LDTSTOP

H_RST#

C29
A28
C28
B29
D29
E4
B30
F28
E28
E29
D25
E27
D27
D28

CPU_PG/LDT_PG
INTR/LINT0
NMI/LINT1
INIT#
SMI#
SLP#/LDT_STP#
IGNNE#
A20M#
FERR#
STPCLK#/ALLOW_LDTSTP
LDT_PG/SSMUXSEL/GPIO0
DPRSLPVR
BMREQ#
LDT_RST#

Y6
SB_32KHI 4

CHS-215SB400-02_BGA564

PCICLK9_R R145 1
PCICLKFB

33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%
33_0402_5%

CLK_PCI_PCM <24>
CLK_PCI_1394 <27>
CLK_PCI_LAN <23,28>
CLK_PCI_MINI <23,29>
CLK_PCI_EC <23,37,38>
CLK_PCI_SIO_R <23,36>
CLK_PCI6 <23>
CLK_PCI7 <23>
CLK_PCI8 <23>

2 22_0402_5%

C245 1

2 @ 0.1U_0402_16V4Z

C184 1

0.1U_0402_16V4Z

14
P

U33A
R96

2 33_0402_5%

PCI_RST#

SN74LVC125APWLE_TSSOP14

+3VS

SIRQ
R124 1
PCI_PERR# R134 1

A_RST#

U33B
O

R95

1
2
33_0402_5%

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

PCI_CBE#0 <24,27,28,29>
PCI_CBE#1 <24,27,28,29>
PCI_CBE#2 <24,27,28,29>
PCI_CBE#3 <24,27,28,29>
PCI_FRAME# <24,27,28,29>
PCI_DEVSEL# <24,27,28,29>
PCI_IRDY# <24,27,28,29>
PCI_TRDY# <24,27,28,29>
PCI_PAR <24,27,28,29>
PCI_STOP# <24,27,28,29>
PCI_PERR# <24,27,28,29>
PCI_SERR# <24,27,28,29>
PCI_REQ#0 <27>
PCI_REQ#1 <28>
PCI_REQ#2 <24>
PCI_REQ#3 <29>
PCI_REQ#4 <29>

PCI_PERR#

PCI_REQ#5
PCI_REQ#6

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3
PCI_GNT#4

PCI_GNT#5
PCI_GNT#6
PCI_CLKRUN#
LOCK#

AG25
AH25
AJ25
AH24
AG24
AH26
AG26

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LDRQ0#
LDRQ1#

SERIRQ

AK27

SIRQ

RTCCLK
RTC_IRQ#/ACPWR_STRAP

C2
F3

RTC_CLK

VBAT
RTC_GND

A2
A1

+3VS

C646
18P_0402_50V8J

0.1U_0402_16V4Z

2 10K_0402_5%
2 10K_0402_5%
2 10K_0402_5%

R107
R121
R122
R120

2
2
2
2

1
1
1
1

100K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%

R389
@ 1K_0402_5%
U32
8
7
6
5

PCI_GNT#5
PCI_REQ#5

VCC
WP
SCL
SDA

1
2
3
4

NC
A1
A2
VSS

LPC_AD0 <36,37,38>
LPC_AD1 <36,37,38>
LPC_AD2 <36,37,38>
LPC_AD3 <36,37,38>
LPC_FRAME# <36,37,38>
LDRQ0# <36>
SIRQ

BATT1

<24,36,37,38>

CR2025 RTC BATTERY


RTC_CLK <23>
AUTO_ON# <23>
JP37
+RTCVCC

BATT1.1
C309
1U_0603_10V4Z

close any door

W=20mils

R170 1

2 1K_0402_5%

JOPEN

W=20mils

+
1

J3

SUYIN_060003FA002TX00NL~D

R128 1
R123 1
R108 1

C584
2

<27>
<28>
<24>
<29>
<29>

2 10K_0402_5%
2 8.2K_0402_5%

@ 0.1U_0402_16V4Z

+RTCVCC
C265

20M_0603_5%

PCI_CLKRUN#
LDRQ0#
LDRQ1#

NB_RST# <13,26,34>

SN74LVC125APWLE_TSSOP14

LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#

32.768KHZ_12.5P
R479 1
2
1

PCI_RST# <24,25,27,28,29,36,37,38>

OE#

R100
8.2K_0402_5%
2

R478
20M_0603_5%

+3VALW

PCIRST#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

1 SB_32KH0

2
2
2
2
2

@ AT24C04N-10SI-2.7_SO8~D

XTAL

U47

AJ7
W3
Y2
W4
Y3
V1
Y4
V2
W2
AA4
V4
AA3
U1
AA2
U2
AA1
U3
T4
AC1
R2
AD4
R3
AD3
R4
AD2
P2
AE3
P3
AE2
P4
AF2
N1
AF1
V3
AB4
AC2
AE4
T3
AC4
AC3
T2
U4
T1
AB2
AB3
AF4
AF3
AG2
AG3
AH1
AH2
AH3
AJ2
AK2
AJ3
AK3
AG4
AH4
AJ4
AG1
AB1

1
1
1
1
1

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N

PCIRST#
AD0/ROMA18
AD1/ROMA17
AD2/ROMA16
AD3/ROMA15
AD4/ROMA14
AD5/ROMA13
AD6/ROMA12
AD7/ROMA11
AD8/ROMA9
AD9/ROMA8
AD10/ROMA7
AD11/ROMA6
AD12/ROMA5
AD13/ROMA4
AD14/ROMA3
AD15/ROMA2
AD16/ROMD0
AD17/ROMD1
AD18/ROMD2
AD19/ROMD3
AD20/ROMD4
AD21/ROMD5
AD22/ROMD6
AD23/ROMD7
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#/ROMA10
CBE1#/ROMA1
CBE2#/ROMWE#
CBE3#
FRAME#
DEVSEL#/ROMA0
IRDY#
TRDY#/ROMOE#
PAR/ROMA19
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
REQ3#/PDMA_REQ0#
REQ4#/PLL_BP33/PDMA_REQ1#
REQ5#/GPIO13
REQ6#/GPIO31
GNT0#
GNT1#
GNT2#
GNT3#/PLL_BP66/PDMA_GNT0#
GNT4#/PLL_BP50/PDMA_GNT1#
GNT5#/GPIO14
GNT6#/GPIO32
CLKRUN#
LOCK#

R448
R155
R162
R444
R441

PCI_FRAME#
PCI _IRDY#
PCI_TRDY#
PCI_STOP#

8.2K_0804_8P4R_5%

1
2
3
4

PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N

PCICLK0_R
PCICLK1_R
PCICLK2_R
PCICLK3_R
PCICLK4_R

RP4
8
7
6
5

PCIE_RCLKP
PCIE_RCLKN

SB_RX0P_C M30
SB_RX0N_C N30
SB_RX1P_C K30
SB_RX1N_C L30
H30
J30
F30
G30

L4
L3
L2
L1
M4
M3
M2
M1
N4
N3
N2

PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#3

8
7
6
5

8.2K_0804_8P4R_5%

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

SB_TX0P
M29 PCIE_RX0P
SB_TX0N
N29 PCIE_RX0N
SB_TX1P
M28 PCIE_RX1P
SB_TX1N
N28 PCIE_RX1N
SB_TX2P
J29 PCIE_RX2P
SB_TX2N
K29 PCIE_RX2N
SB_TX3P
J28 PCIE_RX3P
SB_TX3N
K28 PCIE_RX3N
L29
150_0402_1%
R171
G27
2
1
2
1
+1.9VS
PCIE_CALRP
PCIE_VDDR
R164 2
H27 PCIE_CALRN
1
150_0402_1%
FBM-L11-321611-260-LMT_1206
G28 PCIE_CALI
2
1
R176
4.12K_0402_1%
C246 1
PCIE_PVDD
R30 PCIE_PVDD
2 1U_0603_10V4Z
<12>
<12>
<12>
<12>

8.2K_0804_8P4R_5%
RP61

1
2
3
4

2
2
2
2

PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#3

8
7
6
5

1
2
3
4

1
1
1
1

PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
PCICLK6
PCICLK7
PCICLK8
PCICLK9
PCICLK_FB

OE#

RP2
1
2
3
4

C621
C619
C628
C625

SB400

8.2K_0804_8P4R_5%

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N

A_RST#

L27
M27

<16> SBSRCCLK
<16> SBSRCCLK#
<12>
<12>
<12>
<12>

AH8

PCI EXPRESS INTERFACE

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

8
7
6
5

PCI CLKS

RP59
1
2
3
4

L PC

A_RST#

PCI INTERFACE

R115 1

8.2K_0804_8P4R_5%

CPU

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

8
7
6
5

RTC

1
2
3
4

C655
18P_0402_50V8J

Compal Electronics, Inc.


Title

MuTIOL/CPU/PM/RTC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

19

of

56

+3VALW

2 10K_0402_5%

NC_CP#

R484 1

2 4.7K_0402_5%

SLP_S3#

R188 1

2 4.7K_0402_5%

SLP_S5#

R195 1

2 4.7K_0402_5%

PCIE_PME#

2 10K_0402_5%

S3_STATE

<37,38> EC_GA20
<37,38> KB_RST#
<6> H_THERMTRIP#
<29>
WL_ON
+3VS
<26> PCIE_PME#
R482 1

2 2.2K_0402_5%

SB_SCLK

R489 1

2 2.2K_0402_5%

SB_SDAT

R483 1

2 10K_0402_5%

LPC_SMI#

R198 1

2 10K_0402_5%

AGP_STP#

R197 1

2 10K_0402_5%

AGP_BUSY#

SB_SUSSTAT#
R463 1
R467 1

WL_ON
2
LPC_SMI#
S3_STATE
D35
SYS_RESET#
PCIE_PME#

<37,38> EC_RSMRST#

D1

<13,16> SB_OSC_INT

A23

14M_X1/OSC

B23

14M_X2

14M_X2

AK24
R492 1
R202 1
GPIO7
AGP_STP#
AGP_BUSY#
R481 1

AC97_RST#

SB_SCLK
SB_SDAT
R491 1
R200 1
R204 1
R199 1

2 10K_0402_5% B25
2 10K_0402_5% C25
C23
D24
D23
2 10K_0402_5% A27
C24
A26
B26
2 10K_0402_5% B27
10K_0402_5%
2
C26
2@ 10K_0402_5% C27
2 10K_0402_5% D26

R1071 1
R1072 1

10K_0402_5%
2
2 @ 10K_0402_5%

<30>
SB_SPKR
<8,9,16,26> SB_SCLK
<8,9,16,26> SB_SDAT

+3VALW

2 10K_0402_5%

R458 1

2 10K_0402_5%

AC97_BITCLK

R180 1

2 10K_0402_5%

AC97_SDIN0

R185 1

2 10K_0402_5%

AC97_SDIN1

R184 1

2 8.2K_0402_5%

R203 1

+3VS

2 10K_0402_5%

<30> AC97_SYNC
<30> AC97_RST#
<23,41> SB_SPDIFO

SB_OSC_INT

1 R459
2 33_0402_5%
AC97_SDIN0
AC97_SDIN1
AC97_SDIN2
R177 2 33_0402_5%
1

G1
G2
H4
G3
G4
H1
H3
H2

AC_BITCLK
AC_SDOUT
AC_SDIN0
AC_SDIN1
AC_SDIN2
AC_SYNC
AC_RST#
SPDIF_OUT

R494
@ 1M_0402_5%

C651 1

2@ 20P_0402_50V8J

HYNIX 128MB
A

@ 14.31818MHz_20P_1BX14318BE1A

NC1
NC4
NC3
NC2

1
Y5

ROM_CS#/GPIO1
GHI#/GPIO6
VGATE/GPIO7
AGP_STP#/GPIO4
AGP_BUSY#/GPIO5
FANOUT0/GPIO3
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
DDC2_SCL/GPIO11
DDC2_SDA/GPIO12

GPIO7
<30> AC97_BITCLK
<23,30> AC97_SDOUT
<30> AC97_SDIN0

2@ 20P_0402_50V8J

SIO_CLK

AC97_SDIN2

C657 1

J2
K3
J3
K2

RSMRST#

14M_X2

GPIO12
0

GPIO11
1

SAMSUMG 128MB

No VRAM

Reserved

C310 1

2
@ 20P_0402_50V8J

OVCUR#0 <33>
BT_DET# <33>
OVCUR#2 <33>
LID_OUT# <37,38>
OVCUR#4 <33>
EC_SCI# <37,38>
BT_ON# <33>
EC_SMI# <37,38>

OVCUR#4
EC_SCI#
BT_ON#
EC_SMI#

Y4
@ 48MHZ_12PF_7A48000047

USBCLK_X2
R182 1
2 11.8K_0603_1%
USB_VREFOUT
OVCUR#0
BT_DET#
OVCUR#2

2
@ 20P_0402_50V8J

R1133 1

A15
B15
C15
D16
C16
D15
B8
C8
C7
B7
B6
A6
B5
A5

BT_DET#

USB INTERFACE

BT_ON#

2 10K_0402_5%

SB400

48M_X1/USBCLK
TALERT#/TEMP_ALERT#/GPIO10
48M_X2
BLINK/GPM6#
USB_RCOMP
PCI_PME#/GEVENT4#
USB_VREFOUT
RI#/EXTEVNT0#
USB_ATEST1
SLP_S3#
USB_ATEST0
SLP_S5#
USB_OC0#/GPM0#
PWR_BTN#
USB_OC1#/GPM1#
PWR_GOOD
USB_OC2#/FANOUT1/GPM2#
SUS_STAT#
USB_OC3#/GPM3#
TEST1
USB_OC4#/GPM4#
TEST0
USB_OC5#/GPM5#
GA20IN
USB_OC6#/FAN_ALERT#/GEVENT6#
KBRST#
USB_OC7#/CASE_ALERT#/GEVENT7#
SMBALERT#/THRMTRIP#/GEVENT2#
LPC_PME#/GEVENT3#
USB_HSDP7+
LPC_SMI#/EXTEVNT1#
USB_HSDM7VOLT_ALERT#/S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
USB_HSDP6+
WAKE#/GEVENT8#
USB_HSDM6-

USB PWR

2 10K_0402_5%

R1128 1

NC_CP#
SLP_S3#
SLP_S5#
PWRBTN_OUT#

C6
D5
C4
D3
B4
E3
B3
C3
D4
2 10K_0402_5%
F2
2 10K_0402_5% E2
AJ26
AJ27
D6
1
C5
A25
RB751V_SOD323 D8
D7
D2

ACPI/WAKE UP EVENTS

R196 1

<37,38> EC_THERM#
<39> EC_FLASH#
<37,38> EC_SWI#
<26> NC_CP#
<37,38> SLP_S3#
<37,38> SLP_S5#
<37,38> PWRBTN_OUT#
<40> SB_PWRGD

CLK / RST

SYS_RESET#

GPIO

EC_FLASH#

2 10K_0402_5%

(NOT USED)

2 4.7K_0402_5%

R191 1

R181 1

R477
@ 1M_0402_5%

U38B

R194 1

C654 1

USBCLK_EXT

A C97

USBCLK_EXT <16>

R189 1

A11
B11

USBP7+
USBP7-

<33>
<33>

A10
B10

USBP6+
USBP6-

<33>
<33>

USB_HSDP5+
USB_HSDM5-

A14
B14

USBP5+
USBP5-

<26>
<26>

USB_HSDP4+
USB_HSDM4-

A13
B13

USBP4+
USBP4-

<33>
<33>

USB_HSDP3+
USB_HSDM3-

A18
B18

USBP3+
USBP3-

<33>
<33>

USB_HSDP2+
USB_HSDM2-

A17
B17

USBP2+
USBP2-

<33>
<33>

USB_HSDP1+
USB_HSDM1-

A21
B21

USBP1+
USBP1-

<41>
<41>

USB_HSDP0+
USB_HSDM0-

A20
B20

USBP0+
USBP0-

<33>
<33>

AVDDTX_0
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDRX_0
AVDDRX_1
AVDDRX_2
AVDDRX_3

C21
C18
D13
D10
D20
D17
C14
C11

AVDDTX

AVDDC

A16

AVDDC

AVSSC

B16

AVSS_USB_1
AVSS_USB_2
AVSS_USB_3
AVSS_USB_4
AVSS_USB_5
AVSS_USB_6
AVSS_USB_7
AVSS_USB_8
AVSS_USB_9
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
AVSS_USB_14
AVSS_USB_15
AVSS_USB_16
AVSS_USB_17
AVSS_USB_18
AVSS_USB_19
AVSS_USB_20
AVSS_USB_21
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24

A9
A12
A19
A22
B9
B12
B19
B22
C9
C10
C12
C13
C17
C19
C20
C22
D9
D11
D12
D14
D18
D19
D21
D22

If Y4 is not populated, C654 and


C310 change to 10K_0402_5%.

L32 FBM-L11-321611-260-LMT_1206
2
1
+3VALW

AVDDRX
AVDDTX

C644 1

2 10U_0805_10V4Z

C312 1

2 1U_0603_10V4Z

C299 1
C301 1
C304 1

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

L33 FBM-L11-321611-260-LMT_1206
2
1
+3VALW
AVDDRX

C647 1

2 10U_0805_10V4Z

C314 1

2 1U_0603_10V4Z

C300 1
C302 1
C303 1

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

L30 FBM-L11-321611-260-LMT_1206
2
1
+3VALW

AVDDC

C649 1

2 10U_0805_10V4Z

C317 1

2 1U_0603_10V4Z

C308 1

2 0.1U_0402_16V4Z

CHS-215SB400-02_BGA564

Compal Electronics, Inc.


Title

USB/LPC/AC97/MAC
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet
1

20

of

56

<34> PD_D[0..15]
<34> SD_D[0..15]

PD_D[0..15]
SD_D[0..15]

U38C

AK19
AJ19

SATA_TX1+
SATA_TX1-

AK18
AJ18

SATA_RX1SATA_RX1+

AK14
AJ14

SATA_TX2+
SATA_TX2-

AK13
AJ13

SATA_RX2SATA_RX2+

AK11
AJ11

SATA_TX3+
SATA_TX3-

AK10
AJ10

SATA_RX3SATA_RX3+

AJ15

SATA_CAL

AJ16

SATA_X1

AK16

SATA_X2

SATA_ACT#

AH15

PLLVDD_SATA

AH16

XTLVDD_SATA

AG10
AG14
AH12
AG12
AG18
AG21
AH18
AG20

AVDD_SATA_1
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_4
AVDD_SATA_5
AVDD_SATA_6
AVDD_SATA_7
AVDD_SATA_8

AG9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AH9
AG11
AG15
AG17
AG19
AG22
AG23
AF9
AH17
AH23
AH13
AH20
AK9
AJ12
AK17
AK23
AH10
AJ23

AVSS_SATA_1
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_5
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8
AVSS_SATA_9
AVSS_SATA_10
AVSS_SATA_11
AVSS_SATA_12
AVSS_SATA_13
AVSS_SATA_14
AVSS_SATA_15
AVSS_SATA_16
AVSS_SATA_17
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_20
AVSS_SATA_21
AVSS_SATA_22
AVSS_SATA_23
AVSS_SATA_24
AVSS_SATA_25
AVSS_SATA_26
AVSS_SATA_27
AVSS_SATA_28
AVSS_SATA_29
AVSS_SATA_30
AVSS_SATA_31
AVSS_SATA_32

PIDE_IORDY
PIDE_IRQ
PIDE_A0
PIDE_A1
PIDE_A2
PIDE_DACK#
PIDE_DRQ
PIDE_IOR#
PIDE_IOW#
PIDE_CS1#
PIDE_CS3#

AD30
AE28
AD27
AC27
AD28
AD29
AE27
AE30
AE29
AC28
AC29

PD _IORDY
PD_IRQA
PD_A0
PD_A1
PD_A2
PD_DACK#
PD_DREQ#
PD_IOR#
PD_IOW#
PD_CS#1
PD_CS#3

PIDE_D0
PIDE_D1
PIDE_D2
PIDE_D3
PIDE_D4
PIDE_D5
PIDE_D6
PIDE_D7
PIDE_D8
PIDE_D9
PIDE_D10
PIDE_D11
PIDE_D12
PIDE_D13
PIDE_D14
PIDE_D15

AF29
AF27
AG29
AH30
AH28
AK29
AK28
AH27
AG27
AJ28
AJ29
AH29
AG28
AG30
AF30
AF28

PD_D0
PD_D1
PD_D2
PD_D3
PD_D4
PD_D5
PD_D6
PD_D7
PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

V29
T27
T28
U29
T29
V30
U28
W29
W30
R27
R28

SD _IORDY
SD_IRQA
SD_SBA0
SD_SBA1
SD_SBA2
SD_DACK#
SD_DREQ#
SD_SIOR#
SD_SIOW#
SD_SCS1#
SD_SCS3#

SIDE_D0/GPIO15
SIDE_D1/GPIO16
SIDE_D2/GPIO17
SIDE_D3/GPIO18
SIDE_D4/GPIO19
SIDE_D5/GPIO20
SIDE_D6/GPIO21
SIDE_D7/GPIO22
SIDE_D8/GPIO23
SIDE_D9/GPIO24
SIDE_D10/GPIO25
SIDE_D11/GPIO26
SIDE_D12/GPIO27
SIDE_D13/GPIO28
SIDE_D14/GPIO29
SIDE_D15/GPIO30

V28
W28
Y30
AA30
Y28
AA28
AB28
AB27
AB29
AA27
Y27
AA29
W27
Y29
V27
U27

SD_D0
SD_D1
SD_D2
SD_D3
SD_D4
SD_D5
SD_D6
SD_D7
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15

AVSS_SATA_33
AVSS_SATA_34
AVSS_SATA_35
AVSS_SATA_36
AVSS_SATA_37
AVSS_SATA_38
AVSS_SATA_39
AVSS_SATA_40
AVSS_SATA_41
AVSS_SATA_42
AVSS_SATA_43
AVSS_SATA_44
AVSS_SATA_45

AG13
AH22
AK12
AH11
AJ17
AH14
AH19
AJ20
AH21
AJ9
AG16
AK15
AK20

SIDE_IORDY
SIDE_IRQ
SIDE_A0
SIDE_A1
SIDE_A2
SIDE_DACK#
SIDE_DRQ
SIDE_IOR#
SIDE_IOW#
SIDE_CS1#
SIDE_CS3#

SECONDARY ATA 66/100

AK8

SB400

PRIMARY ATA 66/100

SATA_RX0SATA_RX0+

SERIAL ATA

SATA_TX0+
SATA_TX0-

AK21
AJ21

SERIAL ATA POWER

AK22
AJ22

PD_IORDY <34>
PD_IRQA <34>
PD_A0
<34>
PD_A1
<34>
PD_A2
<34>
PD_DACK# <23,34>
PD_DREQ# <34>
PD_IOR# <34>
PD_IOW# <34>
PD_CS#1 <34>
PD_CS#3 <34>

SD_IORDY <34>
SD_IRQA <34>
SD_SBA0 <34>
SD_SBA1 <34>
SD_SBA2 <34>
SD_DACK# <34>
SD_DREQ# <34>
SD_SIOR# <34>
SD_SIOW# <34>
SD_SCS1# <34>
SD_SCS3# <34>

CHS-215SB400-02_BGA564

Compal Electronics, Inc.


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

IDE/SATA
Size
Document Number
Custom

Rev
0.6

LA-2421

Date:

Sheet

Wednesday, January 05, 2005


1

21

of

56

+3VS
U38D

+3VS
1000P_0402_50V7K
1000P_0402_50V7K
1
1
1
C1218
C1219
C1220

C1217

2
2
1000P_0402_50V7K

C217
C221
C223
C226
C230
C233
C290
C271
C276
C210
C220
C222
C225
C227
C231
C238
C289

2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1

A30
D30
E24
E25
J5
K1
K5
N5
P5
R1
U5
U26
U30
V5
V26
Y1
Y26
AA5
AA26
AB5
AC30
AD5
AD26
AE1
AE5
AE26
AF6
AF7
AF24
AF25
AK1
AK4
AK26
AK30

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

+1.8VS

C591 1
C620 1

2 22U_1206_10V4Z
2 22U_1206_10V4Z

C212
C204
C213
C205
C214
C206
C216
C215
C228
C261
C229
C262

2
2
2
2
2
2
2
2
2
2
2
2

1
1
1
1
1
1
1
1
1
1
1
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

M12
M13
M18
M19
N12
N13
N18
N19
V12
V13
V18
V19
W12
W13
W18
W19

+3VALW

C652 1

2 22U_1206_10V4Z

C287
C288
C286
C305
C306

2
2
2
2
2

1
1
1
1
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+1.8VALW

C636 1

2 10U_0805_10V4Z

C278 1
C279 1
C280 1

2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z
2 0.1U_0402_16V4Z

C281
C282
C283
C284

2
2
2
2

C632 2
1
1
1
1

0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z

AVDD_CK

+1.8VS
+5VS

R1051

V5_VREF

2 1K_0402_5%
2
D14

+3VS

C198
1U_0603_10V4Z
1
1

C209
0.1U_0402_16V4Z

RB751V_SOD323

1 0.1U_0402_16V4Z

+1.2V_HT

2
2
1000P_0402_50V7K

2 22U_1206_10V4Z

L31
FBM-L11-321611-260-LMT_1206
2

C590 1

C656 1

2 10U_0805_10V4Z

C320 1

2 1U_0603_10V4Z

C650 1

2 0.1U_0402_16V4Z

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9
VDDQ_10
VDDQ_11
VDDQ_12
VDDQ_13
VDDQ_14
VDDQ_15
VDDQ_16
VDDQ_17
VDDQ_18
VDDQ_19
VDDQ_20
VDDQ_21
VDDQ_22
VDDQ_23
VDDQ_24
VDDQ_25
VDDQ_26
VDDQ_27
VDDQ_28
VDDQ_29
VDDQ_30
VDDQ_31
VDDQ_32
VDDQ_33
VDDQ_34

SB400

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16

A3
A7
E6
E7
E1
F5

S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4
S5_3.3V_5
S5_3.3V_6

E9
E10
E20
E21

S5_1.8V_1
S5_1.8V_2
S5_1.8V_3
S5_1.8V_4

E13
E14
E16
E17

USB_PHY_1.8V_1
USB_PHY_1.8V_2
USB_PHY_1.8V_3
USB_PHY_1.8V_4

C30

CPU_PWR

AG6

V5_VREF

A24
B24

AVDDCK
AVSSCK

A4
A8
A29
B28
C1
E5
E8
E11
E12
E15
E18

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11

POWER

For EMI require

VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

E19
E22
E23
E26
E30
F1
F4
G5
H5
J1
J4
K4
L5
M5
P1
R5
R26
T5
T26
T30
W1
W5
W26
Y5
AB26
AB30
AC5
AC26
AD1
AF5
AF8
AF23
AF26
AG8
AJ1
AJ24
AJ30
AK5
AK25
M14
M15
M16
M17
N14
N15
N16
N17
P12
P13
P14
P15
P16
P17
P18
P19
R12
R13
R14
R15
R16
R17
R18
R19
T12
T13
T14
T15
T16
T17
T18
T19
U12
U13
U14
U15
U16
U17
U18
U19
V14
V15
V16
V17
W14
W15
W16
W17

CHS-215SB400-02_BGA564

Compal Electronics, Inc.


Title

Power/GND
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet

22

of

56

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VALW

+3VS

+3VALW

NB STRAPS
R427
@ 10K_0402_5%

R428

<13> LOAD_ROM#
R72
ROM@3K_0402_5%

10K_0402_5% @ 10K_0402_5%
2

10K_0402_5%

R1077

R438

10K_0402_5%
2

R154
10K_0402_5%

R153

R449
10K_0402_5%

@ 10K_0402_5%

@ 10K_0402_5%

R456

R474
10K_0402_5%

R460

R187
10K_0402_5%

<19> AUTO_ON#
<20,30> AC97_SDOUT
<19> RTC_CLK
<20,41> SB_SPDIFO
<19,29> CLK_PCI_MINI
<19,37,38> CLK_PCI_EC
<19,36> CLK_PCI_SIO_R
<19> CLK_PCI6
<19> CLK_PCI7
<19> CLK_PCI8
<19,28> CLK_PCI_LAN

R435

R431

R1078
<13> SPMEM_EN#

@ 10K_0402_5% @ 10K_0402_5%

1
R430
10K_0402_5%

@ 10K_0402_5%

R161
@ 10K_0402_5%

R160
@ 10K_0402_5%

R445
@ 10K_0402_5%

1
10K_0402_5%
2

R455

10K_0402_5%
2

R464

R468
@ 0_0402_5%

R76
3K_0402_5%
2

REQUIRED STRAPS
ACPWRON

AUTO_ON#

AC97_SDOUT

RTC_CLK

SB_SPDIFO

MANUAL
PWR ON

USE
DEBUG
STRAPS

INTERNAL
RTC

SIO 24MHz

CLK_PCI_LAN

CLK_PCI_MINI

CLK_PCI_EC

CLK_PCI_SIO

CLK_PCI6

USB PHY
PWRDOWN
DISABLE

INTERNAL
48MHz

14MHz OSC
MODE

CPU I/F = K8

DE FAULT

DE FAULT

DE FAULT

DE FAULT

CLK_PCI7

PCI_CLK8
LOAD_ROM#:LOAD ROM STRAP ENABLE strap

PULL
HIGH
C

DE FAULT

48MHz XTAL
MODE

DE FAULT

ROM TYPE

High, LOAD ROM STRAP DISABLE

H,H = PCI ROM

PULL
LOW

AUTO
PWR
ON

IGNORE
DEBUG
STRAPS
DE FAULT

EXTERNAL
RTC (NOT
SUPPORTED
W/ IT8712 )

SIO 48MHz

48MHz OSC
MODE

DE FAULT

DE FAULT

USB PHY
PWRDOWN
ENABLE

EXTERNAL
48MHz

14MHz XTAL
MODE

CPU I/F = P4

Low, LOAD ROM STRAP ENABLE

H,L = PMC LPC ROM

SPMEM_EN#:SIDE PORT MEMORY ENABLE strap

L,H = NORMAL LPC ROM

DE FAULT

High, SIDE PORT MEMORY DISABLE

L,L = FWH ROM

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

Low, SIDE PORT MEMORY ENABLE


+3VS

R142
@ 10K_0402_5%

R413

R425
@ 10K_0402_5%

R421

@ 10K_0402_5%

10K_0402_5%
2

R401
@ 10K_0402_5%

PD_DACK#
PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23

R415

1
R424
10K_0402_5%

10K_0402_5%

1
R143
10K_0402_5%

10K_0402_5%

R420
@ 10K_0402_5%

R405

R146
@ 10K_0402_5%

1
R396

@ 10K_0402_5%

R429
@ 10K_0402_5%

R398
@ 10K_0402_5%

R133
@ 1K_0402_5%

2
<21,34>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>
<19,24,27,28,29>

R149
10K_0402_5%

10K_0402_5%

R395

R426
10K_0402_5%

10K_0402_5%

R399

R132
10K_0402_5%

DEBUG STRAPS
PD_DACK#
PULL
HIGH

USE
LONG
RESET

PULL
LOW

USE
SHORT
RESET

PCI_AD31

PCI_AD30

PCI_AD29

PCI_AD28

PCI_AD27

PCI_AD26

PCI_AD24

PCI_AD23

RESERVED

RESERVED

RESERVED

RESERVED

BYPASS
PCI PLL

BYPASS
ACPI
BCLK

BYPASS IDE
PLL

PCI_AD25

USE EEPROM
PCIE STRAPS

RESERVED

USE PCI
PLL

USE
ACPI
BCLK

USE IDE
PLL

USE DEFAULT
PCIE STRAPS

DE FAULT

DE FAULT

DE FAULT

DE FAULT

DE FAULT

Compal Electronics, Inc.


Title

Hardware Trap
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

23

of

56

+3VS

+VCC_5IN1

Q41
AO3413_SOT23

6411@

1
1

V17
R14
R13

SD_CD#
MS_CD#
SM_CD#

E3
F5
F6

SD_CD#
MS_CD#
SM_CD#

CARD_LED
2 10K_0402_5%

MFUNC0
MFUNC1
MFUNC2
MFUNC3
MFUNC4
MFUNC5
MFUNC6

R1095 1
R1096 1

2 220_0402_5%
2 220_0402_5%

M3
M2

SCL
SDA

R1097 1

2 220_0402_5%

H2

VR_EN#

Q44
2N7002_SOT23
6411@

MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#
MS_DATA3/SD_DAT3/SM_D3
MS_DATA2/SD_DAT2/SM_D2
MS_DATA1/SD_DAT1/SM_D1
MS_SDIO(DATA0)/SD_DAT0/SM_D0

G5
F3
H5
G3
G2
G1

SD_CLK/SM_RE#/SC_GPIO1
SD_CMD/SM_ALE/SC_GPIO2
SD_DAT0/SM_D4/SC_GPIO6
SD_DAT1/SM_D5/SC_GPIO5
SD_DAT2/SM_D6/SC_GPIO4
SD_DAT3/SM_D7/SC_GPIO3
SD_WP/SM_CE#

J5
J3
H3
J6
J1
J2
H7

SD_CLK/SM_RE#
SD_CMD/SM_ALE
SD_D0/SM_D4
SD_D1/SM_D5
SD_D2/SM_D6
SD_D3/SM_D7
SD_WP/SM_CE#

SM_CLE/SC_GPIO0
SM_R#/SC_RFU
SM_PHYS_WP#/SC_FCB

J7
K1
K2

SM_CLE
SM_R/B#
SM_PHYS_WP#

SC_CD#
SC_CLK
SC_RST
SC_VCC_5V
SC_DATA
SC_OC#
SC_PWR_CTRL

L2
K5
K3
K7
L1
L3
L5

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

6411@ 33_0402_5%
+VCC_5IN1
2 MS_CLK/SD_CLK/SM_EL_WP#
2 22_0402_5% MS_BS/SD_CMD/SM_WE#
2 22_0402_5% MS_D3/SD_D3/SM_D3
2 22_0402_5% MS_D2/SD_D2/SM_D2
2 22_0402_5% MS_D1/SD_D1/SM_D1
2 22_0402_5% MS_D0/SD_D0/SM_D0

R1121
1

6411@ 0_0402_5%
2
+3VS

VCCD#1

VCCD#1

M1

CLK_48M

R17

2
R1086

VSS_MS(P1)
VSS_MS (P10)
VCC_MS(P3)
VCC_MS(P9)

MS_D2/SD_D2/SM_D2
MS_D3/SD_D3/SM_D3

35
37

RSVD_MS(P5)
RSVD_MS(P7)

MS_D0/SD_D0/SM_D0
34
MS_CLK/SD_CLK/SM_EL_WP#
38
MS_CD#
36
MS_BS/SD_CMD/SM_WE# 32

SDIO_MS(P4)
SCLK_MS(P8)
INS_MS(P6)
BS_MS(P2)

MS_D0/SD_D0/SM_D0
MS_D1/SD_D1/SM_D1
MS_D2/SD_D2/SM_D2
MS_D3/SD_D3/SM_D3
SD_D0/SM_D4
SD_D1/SM_D5
SD_D2/SM_D6
SD_D3/SM_D7
SM_R/B#
SD_CLK/SM_RE#
SD_WP/SM_CE#
MS_BS/SD_CMD/SM_WE#
SM_EL_WP#
SM_CLE
SD_CMD/SM_ALE

<25>

P12
W17
T19

U18
U19
U15
V15
W15
V14
W14
U17
V18
W18
V16
W16
M11
P15
R19
R18
R12
U13
V13

D39

6411@ RB751V_SOD323

+VCC_5IN1
CLK_48M <16>

1
6411@ 4.7K_0402_5%

+3VS

10
11
12
13
14
15
16
17

D0_XD(P10)
D1_XD(P11)
D2_XD(P12)
D3_XD(P13)
D4_XD(P14)
D5_XD(P15)
D6_XD(P16)
D7_XD(P17)

2
3
4
7
8
5
6

R/B#_XD(P2)
RE#_XD(P3)
CE#_XD(P4)
WE#_XD(P7)
WP#_XD(P8)
CLE_XD(P5)
ALE_XD(P6)

18
70

VCC_XD(P18)
VCC_XD

1
69
9

CD/GND_XD(P1)
GND_XD
VSS_XD(P9)

67
68

SM INTERFACE

R1120
1
R1153 1
R1154 1
R1155 1
R1156 1
R1157 1

MS_D1/SD_D1/SM_D1

XD_CD#
PHY_TEST_MA

6411@RB751V_SOD323
SM_CD#
1

SD INTERFACE

CLK_48

SD_CD#

D38
2

JP13
31
40
33
39

GND0
GND1

IO 1_SM(P6)
IO 2_SM(P7)
IO 3_SM(P8)
IO 4_SM(P9)
IO 5_SM(P13)
IO 6_SM(P14)
IO 7_SM(P15)
IO 8_SM(P16)

60
64
54
49
45
50
52
56

MS_D0/SD_D0/SM_D0
MS_D1/SD_D1/SM_D1
MS_D2/SD_D2/SM_D2
MS_D3/SD_D3/SM_D3
SD_D0/SM_D4
SD_D1/SM_D5
SD_D2/SM_D6
SD_D3/SM_D7

CLE_SM(P2)
ALE_SM(P3)
CE_SM(P21)
RE_SM(P20)
WE_SM(P4)
WP_SM(P5)
R/B_SM(P19)
CD/VSS_SM(P11)
LVD_SM(P17)

53
59
51
61
63
66
65
47
62

SM_CLE
SD_CMD/SM_ALE
2
SD_WP/SM_CE#
SD_CLK/SM_RE#
MS_BS/SD_CMD/SM_WE#
SM_EL_WP# 1
MS_CLK/SD_CLK/SM_EL_WP#
2
SM_R/B#R1082 6411@ 3.3K_0402_5%
1
2 SM_CD#
R1083
@ 0_0402_5%

VCC_SM(P12)
VCC_SM(P22)
VSS_SM(P1)
VSS_SM(P10)
GND_SM(P18)

46
55
57
48
58

WP1_SM
WP2_SM
CD1_SM
CD2_SM

41
42
43
44

DAT0_SD(P7)
DAT1_SD(P8)
DAT2_SD(P9)
CD/DAT3_SD(P1)

23
22
30
29

CLK_SD(P5)
CMD_SD(P2)

25
28

VDD_SD(P4)
VSS1_SD(P6)
VSS2_SD(P3)

26
27
24

WP_SD
GND_SD
CD_SD

+VCC_5IN1

SM_EL_WP#

MS_D0/SD_D0/SM_D0
MS_D1/SD_D1/SM_D1
MS_D2/SD_D2/SM_D2
MS_D3/SD_D3/SM_D3
MS_CLK/SD_CLK/SM_EL_WP#
MS_BS/SD_CMD/SM_WE#

+VCC_5IN1
3

SD_WP/SM_CE#

19
20
21

SD_CD#

CLK_48M
6411@

W3
W10

T18
V19

MC_PWR_CTRL#

AGND
AGND
AGND

SPKROUT

N3
M5
P1
P2
P3
N5
R1

PRO_FIT068-20-3100

R1089
10_0402_5%
2

+VCC_5IN1
C1086
10P_0402_50V8J
C1087
0.1U_0402_16V4Z
6411@

SD_CD#
PCI6411ZHK_PBGA288

D36
2

C1088
0.1U_0402_16V4Z
6411@

C1089
0.1U_0402_16V4Z
6411@

C1090
0.1U_0402_16V4Z
6411@

+VCC_5IN1

@ RB751V_SOD323

CLK_PCI_PCM

F1
F2

U16
U14
N12

SUSPEND#

L7

PCM_SPK

MC_PWR_CTRL_0
MC_PWR_CTRL_1

PCICLK
PCIRST#
GRST#
RI_OUT#/PME#

R2

6411@ 100K_0402_5%

TEST0
NC
RSVD

VSSPLL
VSSPLL

R1088
43K_0402_5%

PAR
FRAME#
TRDY#
IRDY#
STOP#
DEVSEL#
IDSEL
PERR#
SERR#
REQ#
GNT#

T17
P14

P9
V7
R8
U7
W8
N8
W5
V8
U8
U1
T2

R1137
1

2
G

C/BE3#
C/BE2#
C/BE1#
C/BE0#

2
1

CARD_LED
2

C1084
10U_1206_16V4Z

C1083
1U_0603_10V4Z

C1082
0.01U_0402_16V7K

C1081
0.1U_0402_16V4Z

C1078
1U_0603_10V4Z
C1085
H1 1U_0603_10V4Z
M19

AVDD
AVDD
AVDD

W4
W7
W9
W11

VDPLL_15
VDPLL_33

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0

CLK_PCI_PCM P5
R3
T1
T3

+3VS

+3VS

PCI6611/6411

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

VR_PORT
VR_PORT

U2
V1
V2
U3
W2
V3
U4
V4
V5
U5
R6
P6
W6
V6
U6
R7
V9
U9
R9
N9
V10
U10
R10
N10
V11
U11
R11
W12
V12
U12
N11
W13

C1077

100K_0402_5%
10U_0805_10V4Z
2 6411@
6411@

MC_PWR_CTRL#

XD INTERFACE

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

2 R1085
100_0402_1%

<19> CLK_PCI_PCM
<19,25,27,28,29,36,37,38> PCI_RST#

MS INTERFACE

<19,27,28,29> PCI_PAR
<19,27,28,29> PCI_FRAME#
<19,27,28,29> PCI_TRDY#
<19,27,28,29> PCI_IRDY#
<19,27,28,29> PCI_STOP#
<19,27,28,29> PCI_DEVSEL#
PCI_AD20
1
<19,27,28,29> PCI_PERR#
<19,27,28,29> PCI_SERR#
<19> PCI_REQ#2
<19> PCI_GNT#2

<19,27> PCI_PIRQE#
<19,29> PCI_PIRQF#
<19,28> PCI_PIRQG#
<19,36,37,38> SIRQ
<19> PCI_PIRQH#
<35> CARD_LED
R1122 1
+3VS

VCCP
VCCP

U44B

R1081
10K_0402_5%
6411@

+3VS

PCI_CBE#[0..3]

<19,27,28,29> PCI_CBE#[0..3]

<30>

PCI_AD[0..31]

<19,23,27,28,29> PCI_AD[0..31]

C1080
0.1U_0402_16V4Z

+3VS
1

C1079
0.1U_0402_16V4Z

6411@ 1U_0603_10V4Z

R1119

C1075

SM_CD#

R1098

D37
2

@ RB751V_SOD323

C1091

1
R1127

XD_CD#

R1099

6411@22K_0402_5%

R1100

6411@ 43K_0402_5%

SM_R/B#
SD_WP/SM_CE#

@ 10_0402_5%
4

2
0_0402_5%
6411@

@ 15P_0402_50V8J

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


TI PCI6411 PCI/SD

Size
Document Number
Custom LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

24

Rev
0.6
of

56

GND

3.3V
3.3V

S1_D10
S1_D9
S1_D1
S1_D8
S1_D0
S1_A0
S1_A1
S1_A2
S1_A3
S1_A4
S1_A5
S1_A6
S1_A25
S1_A7
S1_A24
S1_A17
S1_IOWR#
S1_A9
S1_IORD#
S1_A11
S1_OE#
S1_CE2#
S1_A10
S1_D15
S1_D7
S1_D13
S1_D6
S1_D12
S1_D5
S1_D11
S1_D4
S1_D3

A_CC/BE3#/A_REG#
A_CC/BE2#/A_A12
A_CC/BE1#/A_A8
A_CC/BE0#/A_CE1#

C5
F9
B10
G12

S1_REG#
S1_A12
S1_A8
S1_CE1#

A_CPAR/A_A13
A_CFRAME#/A_A23
A_CTRDY#/A_A22
A_CIRDY#/A_A15
A_CSTOP#/A_A20
A_CDEVSEL#/A_A21
A_CBLOCK#/A_A19
A_CPERR#/A_A14
A_CSERR#/A_WAIT#
A_CREQ#/A_INPACK#
A_CGNT#/A_WE#
A_CSTSCHG/A_BVD1(STSCHG/RI)
A_CCLKRUN#/A_WP(IOIS16)
A_CCLK/A_A16
A_CINT#/A_READY(IREQ)

G10
C8
A8
B8
A9
C9
E10
F10
B3
E7
B9
B2
C3
E9
C4

S1_A13
S1_A23
S1_A22
S1_A15
S1_A20
S1_A21
S1_A19
S1_A14
S1_WAIT#
S1_INPACK#
S1_WE#
S1_BVD1
S1_WP
S1_A16
S1_RDY#

PCI 6611/6411

A_CRST#/A_RESET

A6

S1_RST

A_CAUDIO/A_BVD2(SPKR#)

A2

S1_BVD2

A_CCD1#/A_CD1#
A_CCD2#/A_CD2#
A_CVS1/A_VS1#
A_CVS2/A_VS2#

C15
E5
A3
E8

S1_CD1#
S1_CD2#
S1_VS1
S1_VS2

A_CRSVD/A_D14
A_CRSVD/A_D2
A_CRSVD/A_A18

B13
D2
C10

S1_D14
S1_D2
S1_A18

A_USB_EN#
B_USB_EN#

M8
L12
L11
L10
L9
L8
K11
K10
K9
J11
J10
J9
H13
G13
G8
G7

16

0.1U_0402_16V4Z

0.1U_0402_16V4Z
C1101

C1100
VCCA
VCCA

D1
C1
D3
C2
B1
B4
A4
E6
B5
C6
B6
G9
C7
B7
A7
A10
E11
G11
C11
B11
C12
B12
A12
E12
C13
F12
A13
C14
E13
A14
B14
E14

VPP

10

S1_VPP

VCCD0
VCCD1
VPPD0
VPPD1

1
2
15
14

OC

CB_CLK
VCCD#1
CB_LATCH
CB_DAT

VCCD#1

<24>

1510@ TPS2211AIDBR_SSOP16

U45

<19,24,27,28,29,36,37,38> PCI_RST#

CB_DAT
CB_CLK
CB_LATCH
PCI_RST#

3
4
5
12
15
21

DATA
CLOCK
LATCH
RESET#
OC#
SHDN#

12V
12V

20
7

NC3
3.3V

14
13

S1_VPP

8
19

AVPP
NC0

NC4
5V
5V

24
2
1

S1_VCC

9
10

AVCC
AVCC

GND

11

17
18

NC1
NC2

NC5
NC6
NC7
NC8

+3VS

+5VS

23
22
16
6

6411@ TPS2220ADBR_SSOP24
JP26
S1_D3
S1_D4
S1_D5
S1_D6
S1_D7
S1_CE1#
S1_A10
S1_OE#
S1_A11
S1_A9
S1_A8
S1_A13
S1_A14
S1_WE#
S1_RDY#
S1_VCC
S1_VPP

E2
E1

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

A_CAD31/A_D10
A_CAD30/A_D9
A_CAD29/A_D1
A_CAD28/A_D8
A_CAD27/A_D0
A_CAD26/A_A0
A_CAD25/A_A1
A_CAD24/A_A2
A_CAD23/A_A3
A_CAD22/A_A4
A_CAD21/A_A5
A_CAD20/A_A6
A_CAD19/A_A25
A_CAD18/A_A7
A_CAD17/A_A24
A_CAD16/A_A17
A_CAD15/A_IOWR#
A_CAD14/A_A9
A_CAD13/A_IORD#
A_CAD12/A_A11
A_CAD11/A_OE#
A_CAD10/A_CE2#
A_CAD9/A_A10
A_CAD8/A_D15
A_CAD7/A_D7
A_CAD6/A_D13
A_CAD5/A_D6
A_CAD4/A_D12
A_CAD3/A_D5
A_CAD2/A_D11
A_CAD1/A_D4
A_CAD0/A_D3

DATA
CLOCK
LATCH

RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD

3
4

S1_VCC

0.1U_0402_16V4Z

B15
A16
B16
A17
C16
D17
C19
D18
E17
E19
G15
F18
H14
H15
G17
K17
L13
K18
L15
L17
L18
L19
M17
M14
M15
N19
N18
N15
M13
P18
P17
P19
F15
G18
K14
M18
K13
G19
H17
J13
J17
H19
J19
J18
B18
E18
J15
F14
A18
H18
B19
F17
C17
N13
B17
C18
F19
N17
A15
K15

+3VS

5V
5V

13
12
11

0.1U_0402_16V4Z
C1102

N1
L6
N2

5
6

VCC
VCC
VCC

C1103

CB_DAT
CB_CLK
CB_LATCH

S1_VCC

12V

A11
A5

N7
K12
K8
M12
M10
M9
J12
M7
J8
H12
H11
H10
H9
H8

VCCB
VCCB

U44A

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

0.1U_0402_16V4Z

K19
D19

0.1U_0402_16V4Z
C1099

0.1U_0402_16V4Z
C1098

0.1U_0402_16V4Z
C1097

0.1U_0402_16V4Z
C1096

0.1U_0402_16V4Z
C1095

0.1U_0402_16V4Z
C1094

C1093

+3VS

C1092
10U_1206_16V4Z

+5VS

SHDN

U48

PCI6411ZHK_PBGA288

S1_A16
S1_A15
S1_A12
S1_A7
S1_A6
S1_A5
S1_A4
S1_A3
S1_A2
S1_A1
S1_A0
S1_D0
S1_D1
S1_D2
S1_WP

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
69
71
73
75
77
79
81
83

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
GND
GND
GND
GND
GND
GND
GND
GND

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
70
72
74
76
78
80
82
84

35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
GND
GND
GND
GND
GND
GND
GND
GND

S1_CD1#
S1_D11
S1_D12
S1_D13
S1_D14
S1_D15
S1_CE2#
S1_VS1
S1_IORD#
S1_IOWR#
S1_A17
S1_A18
S1_A19
S1_A20
S1_A21
S1_A22
S1_A23
S1_A24
S1_A25
S1_VS2
S1_RST
S1_WAIT#
S1_INPACK#
S1_REG#
S1_BVD2
S1_BVD1
S1_D8
S1_D9
S1_D10
S1_CD2#

Near to PCMCIA slot.


S1_VCC

C1104
10U_1206_16V4Z

C1105
0.1U_0402_16V4Z

S1_VCC
S1_VPP
3

S1_VPP

C1106
10U_1206_16V4Z

S1_CD1#

C1107
0.1U_0402_16V4Z

C1108
1
2
100P_0402_50V8J

FOX_WZ21131-G2-HR_LB
S1_CD2#

C1109
1
2
100P_0402_50V8J

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TI PCI6411 CB socket

Size
Document Number
Custom LA-2421
Date:

Compal Electronics, Inc.

Sheet

Wednesday, January 05, 2005


E

25

Rev
0.6
of

56

+3VS

+3VS

+3VALW

U21
C485 2

1 4.7U_0805_10V4Z
NCARD@

+3VALW

5
6

3.3Vin1
3.3Vin2

3.3Vout1
3.3Vout2

7
8

Aux_out

20

1.5Vout1
1.5Vout2

16
17

OC#

23

RCLKEN
PERST#

22
9

+3VS_PEC

R300
NCARD@ 10K_0402_5%

+3VALW

NC_CP#

2 4.7U_0805_10V4Z
NCARD@
+1.5VS

21

3.3Vaux_in

C487 2

1 4.7U_0805_10V4Z
NCARD@

18
19

1.5Vin1
1.5Vin2

14
15
4
3
2

CPUSB#
CPPE#
STBY#
SHDN#
SYSRST#

+3V_PEC
NC_CLKSEL0# <16>
+1.5VS_PEC
PCIEC_CLKREQ

NC_CP#

D
Q40
S NCARD@ 2N7002_SOT23

2
G

1
2
R1073 @ 0_0402_5%
PCIEC_CLKREQ
PERST#

NC1
NC2
NC3
NC4
NC5

GND

<37,38,39,42> SUSP#
<37,38,42,46> SYSON
<13,19,34> NB_RST#

C492 1

<20>

R289
@
100K_0402_5%

R288
@
100K_0402_5%

11

1
10
12
13
24

NCARD@ TPS2231PWPR_PWP24

SYSON
R1135

10K_0402_5%

JP5

<20>
<20>

<20>

USBP5USBP5+

USBP5USBP5+
NC_CP#

<8,9,16,20> SB_SCLK
<8,9,16,20> SB_SDAT
+1.5VS_PEC
+1.5VS_PEC
PCIE_PME#
+3V_PEC
PERST#
+3VS_PEC

<16> PCIECLK0#
<16> PCIECLK0
<12> GPP_RX0N
<12> GPP_RX0P

<12>
<12>

PCIE_TX0N
PCIE_TX0P

NC_CP#
PCIECLK0#
PCIECLK0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28

GND
USB_DUSB_D+
CPUSB#
RSV
RSV
SMB_CLK
SMB_DATA
+1.5V
+1.5V
WAKE#
+3.3VAUX
PERST#
+3.3V
+3.3V
CLKREQ#
CPPE#
REFCLKREFCLK+
GND
PERn0
PERp0
GND
PETn0
PETp0
GND

Near to Express Card slot.


+3VS_PEC

C511

+3V_PEC

C503

C57

C486

0.1U_0402_16V4Z 10U_0805_10V4Z
0.1U_0402_16V4Z 10U_0805_10V4Z
2 NCARD@
2 NCARD@
2 NCARD@
2 NCARD@

+1.5VS_PEC

C507

C494
3

0.1U_0402_16V4Z 10U_0805_10V4Z
2 NCARD@
1 NCARD@

GND
GND
FOX_1CH4110C

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Express Card socket

Size
Document Number
Custom LA-2421
Date:

Compal Electronics, Inc.

Sheet

Wednesday, January 05, 2005


E

Rev
0.6
26

of

56

+3VS

+3VS
1394@
1
10K_0402_5%

2
R1101
R1102
1
2
3
4

2
10K_0402_5%
1394@

1
R1117

2
2

C1132
10P_0402_25V8K

SCL_1394
SDA_1394

14

G_RST#

89
90

GPIO3
GPIO2

0.1U_0402_16V4Z

1394@

C1117
0.1U_0402_16V4Z
1394@

+3VS
D

C1118
1000P_0402_50V7K
1394@

1394@
2
4.7U_0805_10V4Z

1000P_0402_50V7K
1394@

1
R1105

125
124
123
122
121

R0

118

1
2
R1108
6.34K_0402_1%

1394@

C1121
1000P_0402_50V7K

1394@

C1122
1000P_0402_50V7K
1394@

+3VS

C1124

0.01U_0402_16V7K
2 1394@

R1103
56.2_0402_1%
1394@

2
1K_0402_5%
1394@

XTPBIAS1
XTPA1+
XTPA1XTPB1+
XTPB1-

1
R1104
56.2_0402_1%
1394@

C1125
1U_0805_25V4Z
1394@

XTPA1+
XTPA1XTPB1+
XTPB1-

TPBIAS1
TPA1+
TPA1TPB1+
TPB1-

XTPBIAS1
XTPA1+
XTPA1XTPB1+
XTPB1-

1000P_0402_50V7K

106

C1120

+PLLVDD
1
C1123

L35
1394@
BLM21A601SPT_0805
1
2

C1119

15
27
39
51
59
72
88
100
7
1
2
107
108
120

R1106
56.2_0402_1%
1394@

Near 1394 IC

<41>
<41>
<41>
<41>

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
PLLVDD
AVDD
AVDD
AVDD
AVDD
AVDD

R1107
56.2_0402_1%
1394@

1394@

119

X0

1
C1126

FILTER1

1
C1128

1
2
C1129
1394@
0.1U_0402_16V4Z

EEPROM 2 WIRE BUS SDA

92

SDA_1394

SCL

91

SCL_1394

PC0
PC1
PC2

99
98
97

FILTER

POWER CLASS

PHY PORT 1

TPBIAS0
TPA0+
TPA0TPB0 +
TPB0 -

116
115
114
113
112

TEST9
TEST8

94
95

TEST3
TEST2
TEST1
TEST0

101
102
104
105

5.11K_0402_1%
1394@

2
22P_0402_50V8J
1394@

R1111
56.2_0402_1%
1394@
XTPBIAS0
XTPA0+
XTPA0XTPB0+
XTPB0-

R1112
56.2_0402_1%
1394@

C1130
1U_0805_25V4Z
1394@
JP12

4
3
2
1

EEPROM cancel,
need System
Support

R1114
56.2_0402_1%
1394@

Connect To
Shielding
GND

FILTER0

30ppm

R1109

220P_0402_50V7K
1394@ 2

X3 1394@
24.576MHz_16P_3XG-24576-43E1

X1

C1127

2
22P_0402_50V8J
1394@

R1

OSCILLATOR

5
6
7
8

SUYIN_020204FR004S508ZA
1394@
R1115
56.2_0402_1%
1394@

C1131
TSB43AB22_PQFP128
1394@

R1118

220P_0402_50V7K
1394@ 2

5.11K_0402_1%
1394@

The connector depend on


defferent project

Close Chip
1
0.1U_0402_16V4Z

Entry S3

2
1394@

BIAS CURRENT

** GPIO2 and GPIO3 defaults as an input


and if it is not implemented, it is
recommended that it be pulled low to
ground with a 220 ohm resistor.

Power on

2
1394@

0.1U_0402_16V4Z

C1116

86
96
10
11
CYCLEOUT
CNA
TEST17
TEST16

CYCLEIN

PHY PORT 2

8
9
109
110
111
117
126
127
128
17
23
30
33
44
55
64
68
75
83
93
103

220_1206_8P4R_5%
1394@

10_0402_5%

8
7
6
5

1394@

C1115

4.7K_1206_8P4R_5%
1394@
+3VS

CPS

PLLGND1
REG_EN#
AGND
AGND
AGND
AGND
AGND
AGND
AGND
DGND
DGND
REG18
DGND
DGND
DGND
DGND
DGND
DGND
DGND
REG18
DGND

R1116

1
2
3
4

1394@

PCI BUS INTERFACE

G_RST# connect to PCIRST#


CLK_PCI_1394

0.1U_0402_16V4Z

1
R1113

9,24,25,28,29,36,37,38> PCI_RST#

1394@

0.1U_0402_16V4Z

C1114

<19,24,28,29> PCI_SERR#
<19,24,28,29> PCI_PAR

1394@

0.1U_0402_16V4Z

C1113

2
100_0402_5%

1394@

0.1U_0402_16V4Z

C1112

PCI_AD16 1
R1110

ID: AD16

C1111

PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_PIRQE#

0.1U_0402_16V4Z

<19,24,28,29>
<19,24,28,29>
<19,24,28,29>
<19,24,28,29>
<19,24,28,29>
<19,24,28,29>
<19,24>

CLK_PCI_1394

TSB43AB22

C1110

PCI_CBE#3
PCI_CBE#2
PCI_CBE#1
PCI_CBE#0
CLK_PCI_1394
PCI_GNT#0
PCI_REQ#0

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3#
PCI_C/BE2#
PCI_C/BE1#
PCI_C/BE0#
PCI_CLK
PCI_GNT#
PCI_REQ#
PCI_IDSEL
PCI_FRAME#
PCI_IRDY#
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_PERR#
PCI_INTA#/CINT#
PCI_PME#
PCI_SERR#
PCI_PAR
PCI_CLKRUN#
PCI_RST#

8
7
6
5

<19,24,28,29>
<19,24,28,29>
<19,24,28,29>
<19,24,28,29>
<19>
<19>
<19>

22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

VDDP
VDDP
VDDP
VDDP
VDDP

U12

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

20
35
48
62
78

PCI_AD[0..31]

<19,23,24,28,29> PCI_AD[0..31]

87

+3VS

S3 Wake-up

C1133
1394@

C1134

0.1U_0402_16V4Z
2 1394@

CLOSE CHIP

VCC(+3VS)
A

T1:
T2:

GLOBA_RESET#

T1

T1

>2ms
>=0

Note: GLOAB_RESET#
Can Connect to
PCI_PCIRST#

PCI_PCIRST#

T2
5

T2
4

Compal Electronics, Inc.


Title

IEEE 1394 CONTROLLER


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet
1

27

of

56

+3VALW
+3VALW
C211
1U_0603_10V4Z

LINK_100#

8110S@ 2SB1188_SC62

1
3
1
Q13

Q34

1
1

C224
4.7U_0805_10V4Z

C610
8110S@ 4.7U_0805_10V4Z

R92
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE#0
C/BE#1
C/BE#2
C/BE#3

46

IDSEL

<19,24,27,29> PCI_PAR
<19,24,27,29> PCI_FRAME#
<19,24,27,29> PCI_IRDY#
<19,24,27,29> PCI_TRDY#
<19,24,27,29> PCI_DEVSEL#
<19,24,27,29> PCI_STOP#

76
61
63
67
68
69

PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

<19,24,27,29> PCI_PERR#
<19,24,27,29> PCI_SERR#

70
75

PERR#
SERR#

<19> PCI_REQ#1
<19> PCI_GNT#1

30
29

REQ#
GNT#

25

INTA#

31

PME#

<19,24> PCI_PIRQG#
<29,37,38> PME_EC#

27

<19,24,25,27,29,36,37,38> PCI_RST#
<19,23> CLK_PCI_LAN

1
R136

CLK_PCI_LAN

R414
10_0402_5%
1

C606
10P_0402_50V8K

2 LAN_IDSEL
100_0402_5%

CLK_PCI_LAN
28
65
2
10K_0402_5%

117
115
114
113

+3VALW

C609
8110S@ 0.1U_0402_16V4Z

NC/M66EN

88

NC/AVDDH
NC/HV

10
120

NC/HSDAC+
NC/HG
NC/LG2
NC/LV2

11
123
124
126

9
13

NC/GND
NC/GND
NC/GND
NC/GND
NC/GND
NC/GND

22
48
62
73
112
118

MDO3+

PR4+

MDO1-

PR2-

MDO2-

PR3-

MDO2+

PR3+

MDO1+

PR2+

MDO0-

PR1-

MDO0+

PR1+

GND/VSS
GND/VSS
GND/VSS

21
38
51
66
81
91
101
119

GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST
GND/VSSPST

R403
R402
R353

GND
GND
GND
GND

+3VS

C529

8110S@ 0.01U_0402_16V7K
2
1

C531

2
R109

8110S@ 0.1U_0402_16V4Z
AVDDH
1 R119
2 8110S@ 0_0805_5% +3VALW
1
1
C191
C588
8110S@ 0.1U_0402_16V4Z
1 0_0402_5%
2
2
8110S@

8110S@ 0.01U_0402_16V7K
1

8110S@ 0.01U_0402_16V7K
1

8110S@ 0.01U_0402_16V7K
1

C527

SHLD2

14

SHLD1

13

Green LED-

Green LED+

TD4TD4+
TCT4

MX4MX4+
MCT4

13
14
15

MDO0+
MDO0MCT0

MDO0+
MDO0-

<41>
<41>
RJ45_GND2
2
1 R63
75_0402_5%

RXIN+/MDI1+
RXIN-/MDI1-

9
8
7

TD3TD3+
TCT3

MX3MX3+
MCT3

16
17
18

MDO1+
MDO1MCT1

MDO1+
MDO1-

<41>
<41>
2
1 R60
75_0402_5%

NC/MDI2+
NC/MDI2-

6
5
4

TD2TD2+
TCT2

MX2MX2+
MCT2

19
20
21

MDO2+
MDO2-

NC/MDI3+
NC/MDI3-

3
2
1

TD1TD1+
TCT1

MX1MX1+
MCT1

22
23
24

MDO3+
MDO3-

V1.8_LAN
TXD+/MDI0+
TXD-/MDI0-

26
41
56
71
84
94
107

C532 1

2 8100C@ 0.1U_0402_16V4Z
RXIN+/MDI1+
RXIN-/MDI1-

MDO3+
<41>
MDO3<41>
2
1 R54
8110S@ 75_0402_5%

use 24ST1041A-4

8
7
6

TDTD+
CT

TXTX+
CT

9
10
11

MDO0+
MDO0MCT0

3
2
1

CT
RDRD+

CT
RXRX+

14
15
16

MCT1
MDO1+
MDO1-

C171
27P_0402_50V8J

R397
8110S@ 49.9_0402_1%
NC/MDI3+ 2

C207
0.1U_0402_16V4Z

1
C234
0.1U_0402_16V4Z

1
C237
0.1U_0402_16V4Z

1
C219
0.1U_0402_16V4Z

C599
1
1

NC/MDI3- 2
1
R400
8110S@ 49.9_0402_1% 8110S@ 0.01U_0402_16V7K

+3VALW

8100C@ NS0013_16P

1
C172
27P_0402_50V8J

1000P_1206_2KV7K

MDO2+
<41>
MDO2<41>
2
1 R58
8110S@ 75_0402_5%

C528

U6

R94
8110S@ 0_0402_5%

25MHZ_16P_XSL025000FK1H
Y1
LAN_X2
2
1
LAN_X1

VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33

C201
0.1U_0402_16V4Z

R392
8110S@ 49.9_0402_1%
NC/MDI2+ 2

C595
1
2

1
NC/MDI2- 2
1
R394
8110S@ 49.9_0402_1% 8110S@ 0.01U_0402_16V7K
AVDDL
1

1
C196
0.1U_0402_16V4Z

R106 1

1
C197
0.1U_0402_16V4Z

C200
0.1U_0402_16V4Z
DVDD

24
45
64
110
116

12
11
10

C190
8110S@ 0.1U_0402_16V4Z

32
54
78
99

15

TXD+/MDI0+
TXD-/MDI0-

8110S@ PULSE_H1285
DVDD_A

3
7
20
16

2 300_0603_5%

16

SHLD3

TYCO_1566597-1

2
2 1K_0402_5%
2 15K_0402_5%
2 5.6K_0603_1%

CTRL18

NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18
NC/VDD18

+3VALW

R353 5.6K for 8100CL


2.49K for 8110S(B)

2
35
52
80
100

R52 1

10

+3VALW

C519

1
1
1

125

VDD25/VDD18
VDD25/VDD18
VDD25/VDD18
VDD25/VDD18

0.1U_0402_16V4Z

LAN_X1
LAN_X2

RTT3/CRTL18

AVDD33/AVDDL
AVDD33/AVDDL
AVDD33/AVDDL
NC/AVDDL

C202

SHLD4
PR4-

U3

CTRL25

CLK
CLKRUN#

ACTIVITY#

Amber LED+

MDO3-

V2.5_LAN

RST#

GND
NC
NC
VCC

5
6
7
8

Amber LED-

11

AT93C46-10SI-2.7_SO8

NC/VSS
NC/VSS

CTRL25

4
17
128

NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-

105
23
127
72
74

DO
DI
SK
CS

+3VALW

12

LINK_1000#

14
15
18
19

LWAKE
ISOLATE#
RTSET
NC/SMBCLK
NC/SMBDATA

4
3
2
1

ACTIVITY#
LINK_100#

TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-

121
122

2 3.6K_0402_5%
U9

LAN_EEDO
LAN_EEDI
LAN_EECLK
LAN_EECS

1
2
5
6

X1
X2

Power

1
R141

LED0
LED1
LED2
NC/LED3

NC/MDI2+
NC/MDI2NC/MDI3+
NC/MDI3-

92
77
60
44

PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
PCI_CBE#3

EEDO
AUX/EEDI
EESK
EECS

108
109
111
106

TXD+/MDI0+
TXD-/MDI0RXIN+/MDI1+
RXIN-/MDI1-

LAN I/F

104
103
102
98
97
96
95
93
90
89
87
86
85
83
82
79
59
58
57
55
53
50
49
47
43
42
40
39
37
36
34
33

PCI I/F

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

JP23

U8

PCI_AD22

2 8110S@ 300_0603_5%

PCI_AD[0..31]

<19,23,24,27,29> PCI_AD[0..31]

<19,24,27,29>
<19,24,27,29>
<19,24,27,29>
<19,24,27,29>

2 8100C@ 300_0603_5%

V1.8_LAN

2SB1188_SC62
V2.5_LAN

CTRL25

CTRL18

R41

LINK_1000# R44

1
C604
0.1U_0402_16V4Z

1
C218
0.1U_0402_16V4Z

1
C235
0.1U_0402_16V4Z

2
8100C@ 0_0805_5%

V2.5_LAN

R422 1

V1.8_LAN

2
8110S@ 0_0805_5%

C243

C208

C194

R376
49.9_0402_1%
TXD+/MDI0+ 2

C189

8110S@ 0.1U_0402_16V4Z
1
1
1
1
8110S@ 0.1U_0402_16V4Z
8110S@ 0.1U_0402_16V4Z
V_12P
R126 1
8110S@ 0.1U_0402_16V4Z
2
V2.5_LAN
AVDD25/HSDAC- 12
8100C@ 0_0402_5%
1
RTL8100CL_LQFP128
C199
R393
AVDDH
1
2
8110S@
0_0402_5%
0.1U_0402_16V4Z
2

8100C@ 0_0805_5%
2

2
R379
49.9_0402_1%

R388
49.9_0402_1%
RXIN+/MDI1+ 2

V2.5_LAN

RXIN-/MDI1-

C188

1
0.01U_0402_16V7K

C582
1
2

R390
49.9_0402_1%

8110S@ 0.1U_0402_16V4Z
1

C580
1
2

TXD-/MDI0-

C236
0.1U_0402_16V4Z
R135 1

+3VALW

8110S@ 0_0805_5%
R127 1
2

1
0.01U_0402_16V7K
A

near U20
Compal Electronics, Inc.
Title

LAN RealTech8100CL/8110SBL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

28

of

56

D28
3

LAN RESERVED

<33,35> WIRELESS_LED

TIP

1N4148_SOT23
MINI_LED
<20>
+3VS
1

@ 0.1U_0402_16V4Z
1
C589

C611

WL_ON

WL_ON

<19,24> PCI_PIRQF#
0.1U_0402_16V4Z
1
<19> PCI_REQ#4
C622

W=40mils

C585

CLK_PCI_MINI

<19,23> CLK_PCI_MINI
2
4.7U_0805_10V4Z

2
2
1000P_0402_50V7K

<19> PCI_REQ#3
<19,23,24,27,28> PCI_AD31
<19,23,24,27,28> PCI_AD29
<19,23,24,27,28> PCI_AD27
<19,23,24,27,28> PCI_AD25
<33> CH_DATA
<19,24,27,28> PCI_CBE#3
<19,23,24,27,28> PCI_AD23
<19,24,27,28> PCI_AD21
<19,24,27,28> PCI_AD19

CLK_PCI_MINI

CH_DATA

R387
2

1
R423

10_0402_5%

<19,24,27,28> PCI_AD17
<19,24,27,28> PCI_CBE#2
<19,24,27,28> PCI_IRDY#

C579
10P_0402_50V8K

<19,24,27,28> PCI_SERR#

2
10K_0402_5%

<19,24,27,28> PCI_PERR#
<19,24,27,28> PCI_CBE#1
<19,24,27,28> PCI_AD14
<19,24,27,28> PCI_AD12
<19,24,27,28> PCI_AD10
<19,24,27,28> PCI_AD8
<19,24,27,28> PCI_AD7
<19,24,27,28> PCI_AD5
<19,24,27,28> PCI_AD3
+5VS
<19,24,27,28> PCI_AD1

W=30mils

W=30mils

+5VS

LAN RESERVED

JP8
1

2
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

1
KEY
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123

2
KEY
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

RING

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124

W=30mils

+5VS

PCI_PIRQF#

PCI_GNT#4 <19>
+3VALW
PCI_RST# <19,24,25,27,28,36,37,38>
0.1U_0402_16V4Z
1
1
PCI_GNT#3 <19>
C578
C623

W=40mils
W=40mils

PME_EC#
CH_CLK

1
R404

2 PCI_AD18
100_0402_5%
PCI_AD22

PME_EC# <28,37,38>
CH_CLK <33>
2
PCI_AD30 <19,23,24,27,28>

@ 0.1U_0402_16V4Z
+3VS
1
1
C598
C608
4.7U_0805_10V4Z

2
2
1000P_0402_50V7K

PCI_AD28 <19,23,24,27,28>
PCI_AD26 <19,23,24,27,28>
PCI_AD24 <19,23,24,27,28>

IDSEL : AD18

PCI_AD18

PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18
PCI_AD16

<19,24,27,28>
<19,24,27,28>
<19,24,27,28>
<19,24,27,28>
<19,24,27,28>

PCI_FRAME# <19,24,27,28>
PCI_TRDY# <19,24,27,28>
PCI_STOP# <19,24,27,28>
PCI_DEVSEL# <19,24,27,28>

+5VS
1000P_0402_50V7K

PCI_AD15 <19,24,27,28>
PCI_AD13 <19,24,27,28>
PCI_AD11 <19,24,27,28>

1
C639
4.7U_0805_10V4Z

PCI_AD9 <19,24,27,28>
PCI_CBE#0 <19,24,27,28>
PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

1
C577

<19,24,27,28>
<19,24,27,28>
<19,24,27,28>
<19,24,27,28>

1
C630

0.1U_0402_16V4Z

+3VALW
@ 1000P_0402_50V7K

R465
1

2
1

@ 10K_0402_5%
C637
@ 4.7U_0805_10V4Z

W=40mils

1
R1129

2
10K_0402_5%

1
C581

1
C641

0.1U_0402_16V4Z

+3VS
+3VALW

QTC_C102A-052B11

Compal Electronics, Inc.


Title

Mini PCI Slot


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

29

of

56

+3VAMP_CODEC
1

R536

10K_0402_1%
+3VAMP_CODEC
W=40Mil

+5VS

10K_0402_5%

C424

2.4K_0402_5%

10U_0805_10V4Z

C423

2 2
560_0402_5%

DELAY

VOUT

250mA

SENSE or ADJ

CNOISE

ERROR
SD

1
3

GND

C420

0.1U_0402_16V4Z

SB_SPKR <20>

R223 2

SI9182DH-AD_MSOP8

R535
2 1

VIN

R219 7
2

PCM_SPK

<24>

Q21
Q37
MMBT3904_SOT23
MMBT3904_SOT23

(3.33V)
1

C418

C671

47K_0603_1%
2

R222
27K_0603_1%

1U_0603_10V4Z

@ 0.1U_0402_16V4Z

0.01U_0402_16V7K

560_0402_5%

1
R221

1U_0603_10V4Z

R528
1

U16
MONO_INR

C674
2

MONO_IN

1
C441
1
C442
1
C443
1
R532

For Layout:
Place decoupling caps near the
power pins of SmartAMC
device.

2
0.1U_0402_16V4Z
2
0_0402_5%
2
0.1U_0402_16V4Z
2
0_0603_5%

1
R1134

+3VAMP_CODEC

2
@ 0_0603_5%

GNDA

<32,41>

0.1U_0402_16V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z

R522
2

<31> PWRCLKP
3

<31> PWRCLKN
2
C665
150P_0402_50V8J

2
0_0402_5%
2
0_0402_5%
2
0_0402_5%
2
0_0402_5%

<20,23> AC97_SDOUT
<20> AC97_SYNC
<20> AC97_RST#

1
<20> AC97_SDIN0
<20> AC97_BITCLK

1
R503
1
R502
1
R209
1
R505

<36,41> MUTE_LED

+CODEC_REF

1U_0603_10V4Z

PWRCLKP

PWRCLKN

15
16
17

SDATA_OUT
SYNC
AC_RESET#

20

AC_ONLY

44

33

23

CD_IN_R
CD_IN_GND
CD_IN_L

32
31
30

LINE_IN_L
LINE_IN_R

27
28

LINE_OUT_L
LINE_OUT_R
HP_OUT_L
HP_OUT_R

39
40
42
43

REF_FLT
VC_SCA
VREF_SCA

38
37
36

BIT_CLK
ID0#

MBIAS/AVDD

34

S_PDIF

46

GPIO_4

47

GPIO_5

48

XTLO
XTLI

24
25

ID1#
EAPD
PC_BEEP

13

DSPKOUT

2
6
9
19
26

0.1U_0402_16V4Z

3K_0402_5%
29

SDATA_IN0

45

C1229
R524

MIC_IN
DIB_DATAP

0.1U_0402_16V4Z

AVDD44

DIB_DATAN

AVDD33

RCOSC1

21
2
22_0402_5%
22
2
22_0402_5%
11
2
@ 10K_0402_5%
12
2
@ 10K_0402_5%
14

MONO_INR

GNDA

CDROM_RC_R
C DGNDA
CDROM_RC_L

C413 1

2 10U_0805_10V4Z

C668 2
C666 2
C663 2

1 2.2U_0603_6.3V4Z
1 2.2U_0603_6.3V4Z
1 2.2U_0603_6.3V4Z

MIC

<32>

CDROM_R_R
CD_GNA
CDROM_R_L

R215 1
R517 1
R212 1
R214

2 4.7K_0402_5%
2 2.7K_0402_5%
2 4.7K_0402_5%

CDROM_R <34>
CD_AGND <34>
CDROM_L <34>

<31> DIB_DATAP

GND
C414

1
R520
1
R518
1
R516
1
R513

AGND35
AGND41

<31> DIB_DATAN

VDD_CLK

1
2
C667
150P_0402_50V8J

18
10

U41

0.1U_0402_16V4Z

35
41

0.1U_0402_16V4Z

VDD5

10U_0805_10V4Z

C409

249K_0402_1%

VDDC18
VDDC10

GNDC2
GND8
GNDC9
GNDC19
AVSS_CLK

C412

R514

R213

4.7K_0402_5% 2.7K_0402_5% 4.7K_0402_5%

LINE_OUTL <32>
LINE_OUTR <32>

C365

C364

C402

1U_0603_10V4Z

+CODEC_REF

2 R533
1
@ 4.7K_0402_5%
SPDIFO

R529 1

<41>

2 10K_0402_5%

R507
1

C661
1
2

33_0402_5%

C669

C673

C675

0.1U_0402_16V4Z
2
2
2
0.1U_0402_16V4Z
R217
1
2
1
2

1K_0402_5%

C670
0.1U_0402_16V4Z

HP_PLUG <32>

D34
RB751V_SOD323

R526

33P_0402_50V8J
2.2K_0402_5%

X2

CX20468-31_TQFP48

24.576MHZ_16P_XSL024576FG1H
C662
1
2

C408

1
C410

+3VALW

33P_0402_50V8J
4

Compal Electronics, Inc.


Title

Codec CX20468-31
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

30

of

56

RJ11 CONN.
JP18

3
4

5
6

FOX_JM34613-L001

1
1

1
2

1
2

GNDGND
GNDGND

R1142

R1143

0_0402_5%

0_0402_5%

2
2

MTP28

JP20
TIP
MRING

1
2

MTP52

MOLEX_53398-0290
VDD

MTP26

MTP59

BR908_CC

MC928
VDD

PRI

SEC

MC974
@ 0.001U_0402_50V7M

@ HEADER8
MJ1B
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8

MC944

24

DVdd

TRDC

12

28

DIB_N

MTP62

MC976

2
2
0.001U_0402_50V7M
0.1U_0402_10V6K
AGND_LSD

Vc

VRef

8
22
25

NC1
NC2
NC3

29

PADDLE

EIC

11

RXI

GPIO1

RBias

VZ

C666 is X5R ceramic.

3
3

DIB_P

DIB_N2

Vref_LSD
MC940
MTP63
1U_0603_6.3V6M
1
1
1

27

10

2
1
E&T_3800-02

MTP42

EIO

17

EIF

16

2
4

18

DIB_P2

Vc_LSD

@ 30U_82154R_1%_1:1.67

TAC2

2
0_0402_5%
MR924
MTP61

PWR+

TXO

14

TXF

13

CX20493-58_QFN28

1 3

1
2
3
4
5
6
7
8

MJ2

MTP65

MR938
110_0603_5%

MTP31

MR928
27_0805_5%

1
2
3
4
5
6
7
8

19

MTP73

MT922

RAC2

MTP41

MTP25

MR922
0_0402_5%
2

20

DIB_N1

1 MTP35
1 MTP38
MFB902
RING_2
MOD_RING
1
2
1 MTP39
MR902
MMZ1608D301BT_0603
1M_0805_5%
MC902
RAC1
MC906
1
2 RAC1/RING
1
2 0.033U_1206_100V7K
1
MC904
470P_1808_3KV
TAC1
MBR904
2
1 TAC1/TIP
1
2 0.033U_1206_100V7K
1M_0805_5%
MMBD3004S_SOT23
2
MTP34
MR904
TIP_2
1
MTP40 1
TRDC
MR906 1
2 6.8M_0805_5%
1
MTP33
1
MC958
MC918
AGND_LSD
GND
1
1 MTP32
E IC
1
2
0.1U_0603_16V7K
0.015U_0603_25V7K 2
MBR906
MC908
MR910
MMBD3004S_SOT23 470P_1808_3KV
2
237K_0805_1%
AGND_LSD
RXI 1
RXI-1
2
1 MTP71
MFB904
TIP_2
MOD_TIP
1
2
1 MTP70
MMZ1608D301BT_0603
AGND_LSD
RBias 1
MR9542
MC966
59K_0402_1%
1
2
MTP69
MC910
0.01U_0805_100V7M
VZ 1 1 MR908 2
BRIDGE_CC
1
2
0.047U_1206_100V7K
348K_0805_1%
AGND_LSD
MTP68
MTP67
C
1
EIO 1
MQ902
2
B
PMBTA42_SOT23
Use 59K_0402_1% for MR954
E
E IF
MQ904
C
1
TXO
MQ906
2
B
PMBTA42_SOT23
FZT458TA_SOT223
E
MTP66
1
TXF
1 MTP64
1

DIB_P1

2 10P_1808_3KV

AGND_LSD

C906 and C908 must be Y3 type


Capacitors for Nordic
Countries only

MTP37

MTP72

2 10P_1808_3KV

TAC1

DGnd

MC924

MJ1

AVdd

1
MC922

<30> DIB_DATAN

PWR+
MTP60

Check 0.047u or 10p cap

1
<30> DIB_DATAP

21

23

PCLK

CLK

RAC1

26

MTP36

DGND_LSD

MTP30

DC_GND

SEC

MC970
0.1U_0402_10V6K

AGnd

PRI

30U_82154R_1%_1:1.67
MTP27

MBR908B
BAV99DW-7_SOT363

MTP24

1
2
MMZ1608D301BT_0603

PWRCLKP

MC962
47P_0603_50V8J

<30>

MU902

MFB906

MTP58

MRV902
TB3100M-13-01_SMB

MTP23

AGND_LSD

15

4BR908_AC1
1

PWRCLKN

<30>

MT902

1
MR932
MC926
15K_0402_5%
10P_0402_50V8J
1
2CLK2 1
2 CLK

MC978
0.1U_0402_10V6K
2

MTP22

MC930
2.2U_0805_10V6K

1
MTP29

MBR908A
BAV99DW-7_SOT363

0.1U_0402_10V6K

1
2

@ HEADER8
GND

MTP49

AGND_LSD
DGND_LSD
AGND_LSD

AGND_LSD

AGND_LSD

Compal Electronics, Inc.


Title

AMOM_modem
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet

31

of

56

+5VS
0.1U_0402_16V4Z
JP36
C440

1
C425

10U_0805_10V4Z

SPKL+
SPKLSPKR+
SPKR-

C426
2

1
2
3
4
C429

C430

C431

C432

1
2
3
4
ACES_85205-0400

0.1U_0402_16V4Z
47P_0402_50V8J

2 0.47U_0603_16V7KLINE_C_OUTR 23

RLINEIN

C677 1

2 0.47U_0603_16V7KHP_C_OUTR

RHPIN

C439 1

2 0.47U_0603_16V7K

C438 1

2 0.47U_0603_16V7K

20
8

PVDD2
PVDD1

19

C676 1

VDD

U42
<30> LINE_OUTR

47P_0402_50V8J
47P_0402_50V8J
2
2
2
47P_0402_50V8J

18
7

RIN

LOUTLOUT+
ROUTROUT+

9
4
16
21

SPKLSPKL+
SPKRSPKR+

10 dB

LHPIN

LLINEIN

2 0.47U_0603_16V7K

14
22

GAIN1
GAIN0
PC-BEEP
BYPASS

100K_0402_5%

Gain Settings

@ 100K_0402_5%

GAIN0

GAIN1

SE/BTL#

11

15.6 dB

21.6 dB

4.1 dB

SHUTDOWN#

GND1
GND2
GND3
GND4

<37,38> EC_MUTE#

17
3
2

C436
0.47U_0603_10V7K

R233

@ 100K_0402_5%

100K_0402_5%

1
12
13
24

TPA0312PWP_TSSOP24~D

R234

R1149

2 75_0805_5%INTSPK_CR+

2 100U_6.3V_M

R1150

2 75_0805_5%INTSPK_CL+

+5VS

1
R1124

R1123
1

100K_0402_5%
C1135

I0

I1

JP15
R511
1
2
2K_0402_5%

HP_PLUG

HP_PLUG <30>
L34

TC7SH32FU_SSOP5

<30>

MIC

<41>

DOCK_MIC

1U_0603_10V4Z

1K_0402_5%

0.1U_0402_16V4Z

U46

FBM-11-160808-601-T_0603
100K_0402_5%
3

1K_0402_5%

R235

C1136

DOCK_LOUT_R

<41> JACK_DET

JACK_DET

R232

C660
47P_0402_50V8J

+5VS

R508
1
2
18K_0402_5%

7
8

6 dB
* 10 dB

HEADPHONE OUT/LINE OUT


1

2 100U_6.3V_M

C433 1

C434 1

SPKL+

SPKR+

Av(inv)

5
4

MIC IN

3
6
2
1
FOX_JA6033L-5S1-TR

7
8

C427 1

HP/LINE#

2 0.47U_0603_16V7K LINE_C_OUTL

R236

2 0.47U_0603_16V7KHP_C_OUTL

C679 1

R237

C678 1

15

SE/BTL#

<30> LINE_OUTL

LIN

+5VS
10

HP_PLUG

JP16
INTSPK_CR+
<41> DOCK_LOUT_R
<41> DOCK_LOUT_L

PR

1
2
L16 FBM-11-160808-601-T_0603

DOCK_LOUT_R

DOCK_LOUT_L
INTSPK_CL+
L15

C437
47P_0402_50V8J

3
6
2
1

PL

1
2
FBM-11-160808-601-T_0603
1

FOX_JA6033L-5S1-TR
C435
47P_0402_50V8J

Compal Electronics, Inc.


Title

AMP & Audio Jack


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Custom
Date:

Document Number

Rev
0.6

LA-2421
Sheet

Wednesday, January 05, 2005


E

32

of

56

USB CONNECTOR 1(Rear side)


+5V

+USB_VCCA
+USB_VCCA

W=40mils

U17
5

IN

SET

OUT

ON#

GND

0.1U_0402_16V4Z

C449 +

C460

C447

C448

R239
2

10K_0402_5%

0.47U_0603_16V7K

100U_6.3V_M

0.1U_0402_16V4Z
OVCUR#4

4.7K_0402_1%

OVCUR#4 <20>

1000P_0402_50V7K
JP17

AATI4610AIGV-T1_SOT23-5

R242

C464
2
1

R241
20K_0402_5%

1
2
3
4

USBP4USBP4+

USBP4USBP4+

C459

C445

C446

VCC
DD+
GND

5
6
7
8

GND1
GND2
GND3
GND4
@ 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z SUYIN_020173MR004G533ZR

1000P_0402_50V7K

<20>
<20>

+5V
+USB_VCCB
C247
2
1

USB CONNECTOR 2(Left side)

U10
5

OUT

ON#

GND

0.1U_0402_16V4Z
3
2

SET

C244

+USB_VCCB

R442
2

10K_0402_5%

W=40mils

0.47U_0603_16V7K
1

AATI4610AIGV-T1_SOT23-5

R163

IN

C594 +

4.7K_0402_1%

100U_6.3V_M

OVCUR#2 <20>
1

R157

C587
2

C586
1000P_0402_50V7K

C624

JP7
0.1U_0402_16V4Z

20K_0402_5%

1000P_0402_50V7K

<20>
<20>

1
2
3
4

USBP2USBP2+

USBP2USBP2+

C597

C600

SUYIN_020167MR004S511ZU
2

@ 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z

+5V
+USB_VCCC
C254
2
1

USB CONNECTOR 3(Left side)

U11
IN

OUT

ON#

GND

SET

C249

+USB_VCCB

R156
2

10K_0402_5%

W=40mils

0.47U_0603_16V7K
1

AATI4610AIGV-T1_SOT23-5

R148

0.1U_0402_16V4Z

C617 +
OVCUR#0

OVCUR#0 <20>

@ 100U_D2_6.3VM

4.7K_0402_1%

R151

C616
2

C615
1000P_0402_50V7K

C258

JP10
0.1U_0402_16V4Z

20K_0402_5%

1000P_0402_50V7K

<20>
<20>

1
2
3
4

USBP3USBP3+

USBP3USBP3+

C626

C629

SUYIN_020167MR004S511ZU
2

@ 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z

Note: PLACE CLOSE TO EACH USB PORT

USB CONNECTOR 4(Right side)


+USB_VCCC

W=40mils

BT CONNECTOR
1
BT_ON#

C270 +
G

<20>

1U_0603_10V4Z

D26

1 +3V_BT

AO3413_SOT23
Q10

1U_0603_10V4Z

<20>
<20>

1
2

USB KEY
1N4148_SOT23
C428 1

2 @ 10U_0805_10V4Z

<20>
<20>
<29>
<29>
<20>

USBP6+
USBP6CH_DATA
CH_CLK
BT_DET#

BLUETOOTH_LED
R1130 1
R1131 1

C239

2 100_0402_5%
2 100_0402_5%

1
2
3
4

USBP0USBP0+

USBP0USBP0+

C232

JP4

<29,35> WIRELESS_LED

1000P_0402_50V7K

0.1U_0402_16V4Z

C253

JP9

C32

C252
2

C31

+3VALW

100U_6.3V_M

SUYIN_020167MR004S511ZU

1
2
3
4
5
6
7
8

@ 0.1U_0402_16V4Z
@ 0.1U_0402_16V4Z

ACES_87212-0800

JP32
+5V
<20>
<20>

USBP7USBP7+

Note: Place close to JP46

4
3
2
1
ACES_85201-0405

Compal Electronics, Inc.


Title

Bluetooth & USB CONN.


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet

33

of

56

HDD/CD-ROM Module

Placea caps. near HDD CONN.


+5VS
0.1U_0402_16V4Z

@ 10U_0805_10V4Z

C76

C75

2
2
1000P_0402_50V7K

C84

2
1U_0603_10V4Z

C99

C109
10U_0805_10V4Z

D13
1N4148_SOT23
<21> PD_D[0..15]

3
HDD_LED#

JP28

+5VS

NB_RST#
PD_D7
PD_D6
PD_D5
PD_D4
PD_D3
PD_D2
PD_D1
PD_D0

<13,19,26> NB_RST#

2
D31
1N4148_SOT23

R515
100K_0402_5%
2

3
CD_LED#

PD_D[0..15]

1
ACT_LED#

ACT_LED# <36>

1
R61

+5VS

PD_DREQ#
PD_IOW#
PD_IOR#
PD _IORDY
PD_DACK#
PD_IRQA
PD_A1
PD_A0
PD_CS#1
HDD_LED#

<21> PD_DREQ#
<21>
PD_IOW#
<21>
PD_IOR#
<21> PD_IORDY
<21,23> PD_DACK#
<21>
PD_IRQA
<21>
PD_A1
<21>
PD_A0
<21>
PD_CS#1
2
@ 100K_0402_5%

+5VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
GNDGND

PD_D8
PD_D9
PD_D10
PD_D11
PD_D12
PD_D13
PD_D14
PD_D15

PCSEL R73

2 470_0402_5%

PD_A2
PD_CS#3

PD_A2 <21>
PD_CS#3 <21>
+5VS

SUYIN_200043FR044S504ZL

+5VS
@ 0.1U_0402_16V4Z
1

C405

C406

1000P_0402_50V7K

<21> SD_D[0..15]

@ 10U_0805_10V4Z
1

C407

C403

C664
10U_0805_10V4Z

@ 1U_0603_10V4Z

SD_D[0..15]

JP31
<30>
<30>

+5VS

2
R218

CDROM_L
CD_AGND

<21> SD_SIOW#
<21> SD_IORDY
<21>
SD_IRQA
<21> SD_SBA1
<21> SD_SBA0
<21> SD_SCS1#
1
2
R512
@ 100K_0402_5%

1 SEC_CSEL
470_0402_5%

CDROM_L
CD_AGND
NB_RST#
SD_D7
SD_D6
SD_D5
SD_D4
SD_D3
SD_D2
SD_D1
SD_D0
SD_SIOW#
SD _IORDY
SD_IRQA
SD_SBA1
SD_SBA0
SD_SCS1#
CD_LED#
+5VS
+5VS

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

CDROM_R
SD_D8
SD_D9
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
SD_DREQ#
SD_SIOR#

CDROM_R <30>

SD_DACK#
PDIAG# R510 1
SD_SBA2
SD_SCS3#
W=80mils

Pin4 of CD_ROM connector is NC


if use Pioneer ODD(DVD Dual
DVR-K12TBC/DVR-K13TBC)

SD_DREQ# <21>
SD_SIOR# <21>
SD_DACK# <21>
2 @ 100K_0402_5%
SD_SBA2 <21>
SD_SCS3# <21>
+5VS
+5VS
+5VS

+5VS

C404 0.1U_0402_16V4Z

SUYIN_800180MB050S111ZL

Place caps. near CDROM CONN.


A

Compal Electronics, Inc.


Title

HDD & CDROM Connector


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

34

of

56

<37,38>

KSO16

KSO16

3
5

SW3

KSI0

KSI0

<36,37,38>

FOR POWER BUTTON


BACKLIGHT ( PAV )

TC010-PS11CET_5P
PAV@

+5V
2
D

KSI1

KSI1

3 FOR
PROGRAMING

3
5

SW4

TC010-PS11CET_5P
PAV@

3
5

SW5

KSI2

<37,38> PWR_ACTIVE_PAV#

R238 PAV@ 680_0402_5%


1
2

<37,38> PWR_ACTIVE_PRES#

R27
1

<36,37,38>

KSI2

1
3

<36,37,38>

KSI3

KSI3

<36,37,38>

2
3

FOR 3 PROGRAMING
BUTTON BACKLIGHT
(PAV)

WIRELESS_BTN#

PAV@ HSMB-C172 BLUE_0805


C

R1
470_0402_5%
PAV@

WIRELESS_BTN# <37,38>
2

FOR WIRELESS ON OFF

10K_0402_5%

PAV_LEDVCC

PAV@ HSMB-C172 BLUE_0805


D5
PAV_LEDVCC
1
2

R28
C

PAV@ HSMB-C172 BLUE_0805


D4
PAV_LEDVCC
1
2

+3VS

TC010-PS11CET_5P

D3
1

SW9

D8
1

PRES@ 17-21UYOC/S530-A2/TR8_ORG

FOR TP ON OFF
4

PRES@ 300_0402_5%
2

FOR POWER BUTTON


BACKLIGHT ( PRES )

TC010-PS11CET_5P
PAV@

PAV@ HSMB-C172 BLUE_0805


D1
1
2

SW2

TC010-PS11CET_5P
PAV@
D11
2

C1

C2

@ 0.1U_0402_16V4Z
1
1

@ 0.1U_0402_16V4Z

2
<37,38> NUMLED#

@ 0.1U_0402_16V4Z
1

<37,38> CAPSLED#

680_0402_5%

R129 1

D16
PRES@ 17-21UYOC/S530-A2/TR8_ORG
2 PRES@ 130_0402_5% 1
2 PRES_LEDVCC
PRES_LEDVCC <36,38>

R125 1

2 PAV@ 680_0402_5%

PAV_LEDVCC

D20
PRES@ 17-21UYOC/S530-A2/TR8_ORG
PRES_LEDVCC
1
2

PAV_LEDVCC <36>

PAV@ HSMB-C172 BLUE_0805

2PRES_LEDVCC
PAV_LEDVCC

6411@ 17-21UYOC/S530-A2/TR8_ORG

PAV_LEDVCC

R16
PAV@680_0402_5%

2
R26
PRES@ 680_0402_5%

R227
1K_0402_5%

MMBT3904_SOT23
6411@

D2

PAV@ HSMB-C172 BLUE_0805

D7
PRES@ HSMB-C172 BLUE_0805

PAV@ HSMB-C172 BLUE_0805

Q23
MMBT3906_SOT23~D

Q39

6411@ HSMB-C172 BLUE_0805

1
1

PAV_LEDVCC

PAV@ HSMB-C172 BLUE_0805


D22
1
2

D24
1

1
3

<37,38> TP_OFF_LED#

300_0402_5%
6411@

D21
1

+5VS

R539

2
2
1K_0402_5%

2PAV_LEDVCC

D15

<24> CARD_LED

2 PAV@

PAV@ HSMB-C172 BLUE_0805

D23

R538

R279 1

D12

@ 0.1U_0402_16V4Z

INDICATOR

CARD_LED 1
6411@

R273 1

PRES@ 17-21UYOC/S530-A2/TR8_ORG
2 PRES@ 130_0402_5%
1
2PRES_LEDVCC

FOR CARDREADER
( PAV /PRES )

TC010-PS11CET_5P
PRES@

SW7

@ 0.1U_0402_16V4Z
1

C3

C4

2
C421

R225
2
220_0402_5%

R15
WIRELESS_LED
1

<29,33> WIRELESS_LED

1
2 2
1K_0402_5%

Q2

FOR WIRLESS LED

Compal Electronics, Inc.

MMBT3904_SOT23
Title

R17
10K_0402_5%

LED INDICATOR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2
5

Size
B
Date:

Document Number

Rev
0.6

LA-2421
Wednesday, January 05, 2005

Sheet
1

35

of

56

2 100P_0402_50V8J

2 100P_0402_50V8J

JP14

KSI3 C1160

2 100P_0402_50V8J

24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

KSO5 C1161

2 100P_0402_50V8J

KSO1 C1162

2 100P_0402_50V8J

KSI0 C1163

2 100P_0402_50V8J

D27
DAN202U_SC70

R262
1

ON/OFFBTN#

KSO9 C1167

2 100P_0402_50V8J

KSI4 C1168

2 100P_0402_50V8J

KSI5 C1169

2 100P_0402_50V8J

KSO0 C1170

2 100P_0402_50V8J

KSI2 C1171

2 100P_0402_50V8J

2 100P_0402_50V8J

ACES_85201-2405

KSO6 C1172
KSO3 C1173

2 100P_0402_50V8J

KSO12C1174

2 100P_0402_50V8J

KSO13C1175

2 100P_0402_50V8J

KSO14C1176

2 100P_0402_50V8J

KSO11C1177

2 100P_0402_50V8J

KSO10C1178

2 100P_0402_50V8J

KSO15C1179

2 100P_0402_50V8J

4.7K_0402_5%
EC_ON

EC_ON

D25
RLZ20A_LL34

2
R256

<37,38>

1000P_0402_50V7K

Front Board CONNECTOR

WHEN R=0,Vbe=1.35V
WHEN R=33K,Vbe=0.8V

2
G

Q29
@ 2N7002_SOT23

Pavilion only

+5VALW
2

2 100P_0402_50V8J

C488

R540
@ 10K_0402_5%

SW1
2

JP33

KSI6 C1166

SW6
PAV@ TC010-PS11CET_5P
2
1

ON/OFFBTN#

2 100P_0402_50V8J

Q30
DTC124EK_SC59

KSI7 C1165

2 100P_0402_50V8J

EC_PWR_ON# <43>

ON/OFF# <37,38>

+3VALW
KSI1 C1164

100K_0402_5%
2
+3VALW

ON/OFF#

KSO8 C1159

SW8
PRES@ TC010-PS11CET_5P
2
1

KSO7 C1158

Power BTN

2 100P_0402_50V8J

KSI1
KSI7
KSI6
KSO9
KSI4
KSI5
KSO0
KSI2
KSI3
KSO5
KSO1
KSI0
KSO2
KSO4
KSO7
KSO8
KSO6
KSO3
KSO12
KSO13
KSO14
KSO11
KSO10
KSO15

KSO[0..15] <37,38>

2 100P_0402_50V8J

KSO[0..15]

<35,37,38>

KSO4 C1157

KSI[0..7]

KSO2 C1156

KSI[0..7]

INT_KBD CONN.

LID_SW# <37,38>

14
13
12
11
10
9
8
7
6
5
4
3
2
1

<37,38,41> CIR_IN
<37,38> VOLBTN+#
<37,38> VOLBTN-#
<30,41> MUTE_LED

+5VALW
+5VS
<35> PAV_LEDVCC
<37,38> PMLED_1#
<37,38> BATLED_0#

ESE11MV9_4P

PMLED_1#
BATLED_0#
ACT_LED_PAV

+5VS

PRESARIO only
JP2

ACT_LED#

+3VS
VOLBTN+#
VOLBTN-#
MUTE_LED

PRESARIO only

+3VS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

7
8
9
10
11
12

ACES_85203-0602

+5VS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

VOLBTN+#
VOLBTN-#
MUTE_LED

Q25
PDTA114EK_SC59

FOR LPC SIO DEBUG PORT

1
2
3
4
5
6

+3VS

ACES_85201-1405

<34>

JP25

14
13
12
11
10
9
8
7
6
5
4
3
2
1

R231
ACT_LED_PAV

ACT_LED

+3VALW
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#
LDRQ0#
PCI_RST#
CLK_PCI_SIO

R230 2

1 R229

LPC_AD[0..3] <19,37,38>

PRES@ 130_0402_5%
PMLED_1#
2 PRES@ 130_0402_5%
BATLED_0#
ACT_LED

<35,38> PRES_LEDVCC
+3VS
LPC_FRAME# <19,37,38>
LDRQ0#
<19>
PCI_RST# <19,24,25,27,28,29,37,38>
R285
R440 1
2 @ 22_0402_5%
SIRQ

JP35
+3VALW

300_0402_5%

1
2
3
4
5
6
7
8

1
2
3
4
5
6
7
8

ACES_87213-0800
2
1@ 10K_0402_5%
CLK_PCI_SIO_R <19,23>

TP CONNECTOR

<19,24,37,38>

+5V
JP34
8
7
6
5
4
3
2
1

@ ACES_85201-2005
<37,38> TP_DATA
<37,38> TP_CLK

ACES_87152-0807

Compal Electronics, Inc.


Title

KBD,ON/OFF,T/P,LED/B
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


1

36

of

56

+3VALW
+3VALW

+EC_AVCC
2

ENE@10K_0402_5%

R306 ENE@ 10K_0402_5%


PS2_DATA 1
2
PS2_CLK
1
2

+5VS

CLK_PCI_EC
1

R304 ENE@ 10K_0402_5%

R305
2

10_0402_5%
1

C515
10P_0402_50V8K

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

<38>
<38>

1
IN
NC
2

OUT
NC
3

Y2
32.768KHZ_12.5P_1TJS125DJ2A073

C RY1
C RY2

CRY1
CRY2

95

VBAT

AVCC

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
PORTB

IOPC0
IOPC1/SCL2
IOPC2/SDA2
IOPC3/TA1
IOPC4/TB1/EXWINT22
IOPC5/TA2
IOPC6/TB2/EXWINT23
IOPC7/CLKOUT

168
169
170
171
172
175
176
1

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

138
139
140
141
144
145
146
147

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

IOPJ0/RD
IOPJ1/WR0

150
151

FR D#
FWR#

SELIO#

152

SELIO#

IOPD4
IOPD5
IOPD6
IOPD7

41
42
54
55

C RY2

160

32KX2

<13,17,38> ENABLT
<17,38> BKOFF#
FSEL#

FSEL#

173
174
47

SEL0#
SEL1#
CLK

ACIN

124
125
126
127
128
131
132
133

32KX1/32KCLKIN

<20,38> EC_RSMRST#

EC_SMC_2
EC_SMD_2
FAN_SPEED1

IOPH0/A0/ENV0
IOPH1/A1/ENV1
IOPH2/A2/BADDR0
IOPH3/A3/BADDR1
IOPH4/A4/TRIS
IOPH5/A5/SHBM
IOPH6/A6
IOPH7/A7

158

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

EC_SMC_1
EC_SMD_1
PCI_RST#

M_SEN#

C RY1

148
149
155
156
3
4
27
28

KSO16

2
44
24
25

PS2 interface

VOLBTN+#
VOLBTN-#

TP_OFF_LED#

IOPE4/SWIN
IOPE5/EXWINT40
IOPE6/LPCPD/EXWIN45
IOPE7/CLKRUN/EXWINT46

PORTH

PORTI

PORTJ-1

<20,38> EC_SWI#
<36,38> VOLBTN+#
<36,38> VOLBTN-#

<38,39>

153
154
162
163
164
165

PORTE

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

INVT_PWM <17,38>
VDDA_EN <6,38>
VLDT_EN <38,40>
ACOFF
<38,44>

26
29
30

110
111
114
115
116
117
118
119

62
63
69
70
75
76

32
33
36
37
38
39
40
43

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21
IOPD2/EXWINT24/RESET2

JTAG debug port

EC_SMI#

DAC_BRIG <17,38>
EN_FAN1 <4,38>
IREF
<38,44>
EN_FAN2 <4,38>

PORTD-1

C544
10P_0402_50V8K

<20,38> EC_SMI#
<32,38> EC_MUTE#

99
100
101
102

IOPB0/URXD
IOPB1/UTXD
IOPB2/USCLK
IOPB3/SCL1
IOPB4/SDA1
IOPB7/RING/PFAIL/RESET2

PORTC

TINT#
TCK
TDO
TDI
TMS

<26,38,42,46> SYSON
<26,38,39,42> SUSP#
<16,38,50> VR_ON

EC DEBUG port

Key matrix scan

105
106
107
108
109

1
4

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

PWM
or PORTA

71
72
73
74
77
78
79
80

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#

<36,38> TP_CLK
<36,38> TP_DATA
<36,38> LID_SW#

GA20/IOPB5
KBRST/IOPB6

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

EC_TINIT#
URXD
UTXD

C543
10P_0402_50V8K

5
6

DA0
DA1
DA2
DA3

DA output

PORTD-2
PORTJ-2

PORTK
PORTM

PORTL

ADP_IR

<38>

ADP_I

<44>

+3VALW

EC_ON
<36,38>
LID_OUT# <20,38>
TP_OFF_LED# <35,38>
KSO16

<35,38>

KBA1

1
R310

2
@ 10K_0402_5%

KBA3

1
R311

2
@ 10K_0402_5%

KBA5

1
2
R314 ENE@ 10K_0402_5%

EC_SMC_1 <38,39,52>
EC_SMD_1 <38,39,52>
PCI_RST# <19,24,25,27,28,29,36,38>

R298

KSI[0..7]
KSO[0..15]

<35,36,38> KSI[0..7]
<36,38> KSO[0..15]

+5VS

IOPD3/ECSCI#

BID

1
2ECAGND
C504
0.01U_0402_16V7K
EC_AC_ID <38,44>
BATT_OVP <38,44>
R278
1
2
10K_0402_5%
1
PRES_DETECT <38>
BID
<38>
C489
WIRELESS_BTN# <35,38>
0.22U_0603_10V7K
DOCK_VOLBTN-# <38,41>
2

R269
1K_0402_5%
fu@

PWRBTN_OUT# <20,38>
EC_SMC_2 <6,38>
EC_SMD_2 <6,38>
FAN_SPEED1 <4,38>
PME_EC# <28,29,38>
EC_THERM# <20,38>
FAN_SPEED2 <4,38>

BID

1 2

EC_GA20
KB_RST#

<20,38> EC_GA20
<20,38> KB_RST#
R301 ENE@10K_0402_5%
KBD_DATA 1
2
KBD_CLK
1
2

31

0.1U_0402_16V4Z

ADP_IR

R274
1K_0402_5%
de@
2

JOPEN

CLK_PCI_EC
EC_RST#

C513

AD Input

EC_AC_ID

ACIN
CIR_IN
SLP_S3#

<38,43,45>
<36,38,41>
<20,38>

ON/OFF#
SLP_S5#
M_SEN#
CONA#

<36,38>
<20,38>
<18,38>
<38,41>

+3VALW
ADB[0..7]
KBA[0..19]

ADB[0..7] <38,39>
1

J2

Host interface

81
82
83
84
87
88
89
90
93
94

KBA[0..19] <38,39>

R292
ENE@ 10K_0402_5%
3

47K_0402_5%

BATT_TEMP <38,52>

AD0
AD1
AD2
AD3
IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7
DP/AD8
DN/AD9

EC_TINIT#
FRD#
FWR#

<38,39>
<38,39>

SELIO#

<38>

GPIO5
GPIO6

DOCK_VOLBTN+# <38,41>
CAPSLED# <35,38>
NUMLED# <35,38>

IOPK0/A8
IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12
IOPK5/A13_BE0
IOPK6/A14_BE1
IOPK7/A15_CBRD

143
142
135
134
130
129
121
120

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19
IOPL4/WR1#

113
112
104
103
48

KBA16
KBA17
KBA18
KBA19
FSTCHG

R303
1

+3VALW

SERIRQ
LDRQ#
LFRAME#
LAD0
LAD1
LAD2
LAD3
LCLK
RESET1#
SMI#
PWUREQ#

C542
ENE@ 1U_0603_10V6K

EC_RST#

7
8
9
15
14
13
10
18
19
22
23

R313
ENE@ 10K_0402_5%

R312
ENE@ 10K_0402_5%
2

<38>

<19,36,38> LPC_FRAME#
<19,36,38> LPC_AD0
<19,36,38> LPC_AD1
<19,36,38> LPC_AD2
<19,36,38> LPC_AD3
<19,23,38> CLK_PCI_EC

U26

<19,24,36,38> SIRQ

16

1
C520
ENE@
0.1U_0402_16V4Z
2
2

34
45
123
136
157
166

VDD

C521
@ 4.7U_0805_6.3V6K

161

+3VALW

<38,44>

EC_GPIO16 <38>

ENE@ KB910_LQFP176

<38>

ECAGND

NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10

2 @ 0_0402_5% DOCK_VOLBTN-#
2 @ 0_0402_5% EC_GPIO16

AGND

R270 1
R271 1

11
12
20
21
85
86
91
92
97
98

+5VALW
URXD
UTXD

96

1
2
3
4
5
6
7
8
9
10

17
35
46
122
159
167
137

1
2
3
4
5
6
7
8
9
10

GND1
GND2
GND3
GND4
GND5
GND6
GND7

JP22

ECAGND

PWR_ACTIVE_PAV#
PMLED_1#
EC_SCI#

GPIO5
GPIO6

@ 96212-1011S

PWR_ACTIVE_PRES# <35,38>
BATLED_0# <36,38>
PWR_ACTIVE_PAV# <35,38>
PMLED_1# <36,38>
EC_SCI# <20,38>

Compal Electronics, Inc.


Title

KBD EC CTRL-NS PC87591L


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

37

of

56

+3VALW
1

C491

2
0.1U_0402_16V4Z

0.1U_0402_16V4Z

1
R302

<37>

2
2
0.01U_0402_16V7K

C509
0.1U_0402_16V4Z

+3VALW
+EC_AVCC
1

C499

@ 1000P_0402_50V7K
2
U25

<20,37> EC_GA20
<20,37> KB_RST#
<19,24,36,37> SIRQ
<19,36,37> LPC_FRAME#
<19,36,37> LPC_AD3
<19,36,37> LPC_AD2
<19,36,37> LPC_AD1
<19,36,37> LPC_AD0
<19,23,37> CLK_PCI_EC
<19,24,25,27,28,29,36,37> PCI_RST#
EC_RST#
<20,37> EC_SCI#
<36,37> VOLBTN+#

EC_GA20
KB_RST#

CLK_PCI_EC
EC_RST#
EC_SCI#
VOLBTN+#

1
2
3
5
6
9
10
12
14
15
42
24
44

GA20/ GPIO00/GA20
KBRST#/GPIO01/KBRST#
SERIRQ
LPC_FRAME# / LFRAME#
LPC AD3/LAD3
LPC AD2/LAD2
Host
LPC AD1/LAD1 INTERFACE
LPC AD0/LAD0
CLK_PCI_EC/PCICLK
PCIRST#
EC RST#/ ECRST#
EC SCI#/SCI#/GPIO0E
PM_CLKRUN#/ CLKRUN#

10K_0402_5%

C534

+EC_AVCC
1

1
L26 1
ECAGND
2
FBML10160808121LMT_0603

PCI_RST#

0.1U_0402_16V4Z

71
72
73
74

ADP_IR
EC_AC_ID

BATT_TEMP <37,52>
BATT_OVP <37,44>
ADP_IR <37>
EC_AC_ID <37,44>

DAC_BRIG/DA0/GPIO3D
EN DFAN1/DA1/GPIO3D
IREF2/DA2
EN DFAN2/DA3/ GPIO3F
DA output or GPO

76
78
79
80

DAC_BRIG <17,37>
EN_FAN1 <4,37>
IREF
<37,44>
EN_FAN2 <4,37>

INVT_PWM/GPIO0F/PWM1
BEEP#/GPIO10/PWM2
OUT BEEP/GPIO12/PWM3
ACOFF/GPIO18/PWM4
FAN SPEED1/GPIO14/FANFB1
FAN SPEED2/GPIO15/FANFB2

25
27
30
31
32
33

INVT_PWM <17,37>
CONA#
<37,41>
VLDT_EN <37,40>
ACOFF
<37,44>
FAN_SPEED1 <4,37>
FAN_SPEED2 <4,37>

+5V

FAN/PWM

R319

10K_0402_5%

<35,37>

+3VALW

1
R297

2 LID_SW#
20K_0402_5%

+3VALW

1
R295

2 PME_EC#
4.7K_0402_5%

+3VS
3

1
R277

2 VOLBTN+#
10K_0402_5%

1
R276

2 VOLBTN-#
10K_0402_5%

1
R282

2 DOCK_VOLBTN+#
10K_0402_5%

1
R283

2 DOCK_VOLBTN-#
10K_0402_5%

+5VALW
RP58
8
7
6
5

EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1

1
2
3
4

10K_0804_8P4R_5%

KSO16
<36,37> VOLBTN-#
<6,37>
<6,37>
<37,39,52>
<37,39,52>

EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1

<37> EC_GPIO16
<37,41> DOCK_VOLBTN-#
<36,37> PMLED_1#
<35,37> NUMLED#
<36,37> BATLED_0#
<35,37> PWR_ACTIVE_PRES#
<35,37> CAPSLED#
<35,37> TP_OFF_LED#
<26,37,42,46> SYSON
<20,37> EC_RSMRST#
<17,37> BKOFF#
<20,37> SLP_S3#
<20,37> LID_OUT#
<20,37> SLP_S5#
<20,37> EC_SMI#
<20,37> EC_SWI#
<36,37> LID_SW#
<26,37,39,42> SUSP#
<20,37> PWRBTN_OUT#
<28,29,37> PME_EC#

<37>
<37>

CRY1
CRY2

EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1

88
87
86
85

34
35
38
40
99
101
100
TP_OFF_LED# 102
104
PMLED_1#

EC_SMI#
LID_SW#
SUSP#

C RY1
C RY2

4
7
8
16
17
18
19
20
21
22
23

140
138

EC SMD2/ GPIO47/SDA2
EC SMC2/GPIO46/SCL2
EC SMD1/GPIO44/SDA1
EC SMC1/GPIO44/SCL1

RP57
8
7
6
5

FSEL#
SELIO#
FR D#
EC_SMI#

1
2
3
4

Data
BUS

Address
BUS
SM BUS

PCM_SPK#/EMAIL_LED#/ GPIO16
SB_SPKR/PWR_SUSP_LED#/ GPIO17
PWRLED#/ GPIO19
NUMLED#/ GPIO1A
BATT CHGI LED#/ E51CS#
BATT LOW LED#/ E51MR0
CAPS LED#/ E51TMR1
ARROW LED#/ E51 INT0
SYSON/GPIO56/ E51 INT1
EC_RSMRST#/ GPIO02
BKOFF#/GPIO03
PM SLP S3#/GPIO04
EC LID OUT#/GPIO06
PM SLP S05#/ GPIO07
EC SMI#/GPIO08
EC SWI#/GPIO09
LID SW#/ GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC PME#/GPIO0D

XCLKO
XCLKI

910L@ KB910L_LQFP144

+3VALW

PSCLK1
PSDAT1
PSCLK2
PSDAT2
PSCLK3
PSDAT3

WIRELESS_BTN#
PRES_DETECT
PWR_ACTIVE_PAV#

91
92
93
94
95
96

TP_CLK
TP_DATA

ADB0/D0
ADB1/D1
ADB2/D2
ADB3/ D3
ADB4/D4
ADB5/D5
ADB6/D6
ADB7/D7
KBA0/A0
KBA1/A1
KBA2/A2
KBA3/A3
KBA4/A4
KBA5/A5
KBA6/A6
KBA7/A7
KBA8/A8
KBA9/A9
KBA10/A10
KBA11/A11
KBA12/A12
KBA13/A13
KBA14/A14
KBA15/A15
KBA16/A16
KBA17/A17
KBA18/A18
KBA19/A19

125
126
128
130
131
132
133
134
111
112
113
114
115
116
117
118
119
120
121
122
123
124
110
109
108
107
106
98

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

SELIO2#/ GPIO43
SELIO#/ GPIO50
FRD#/RD#
FWR#/WR#
FSEL#/SELMEM#

84
97
135
136
144

BID
SELIO#
FR D#
FWR#
FSEL#

EC ON/ GPIO1B
AC IN/ GPIO1C
ECTHERM#/GPIO11
ONOFF/GPIO18
PCMRST#/GPIO1E
WL OFF#/GPIO1F
ALI/MH#/GPIO40
FSTCHG/GPIO41
VR ON/ GPIO42
GPIO57/GPIO57
GPIO58/GPIO58
GPIO59/GPIO59

41
43
29
36
45
46

WIRELESS_BTN# <35,37>

PWR_ACTIVE_PAV# <35,37>
DOCK_VOLBTN+# <37,41>
TP_CLK
<36,37>
TP_DATA <36,37>

PRES_LEDVCC <35,36>
2

6.2K_0402_5%
R275
10K_0402_5%

ADB[0..7]

ADB[0..7] <37,39>

KBA[0..19]

KBA[0..19] <37,39>

VDDA_EN

81
82
83
137
142
143

Check ENE
PRES_DETECT <37> R272

PS2 interface

10K_0402_5%
2
2
10K_0402_5%

key Matrix
scan
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
EC URXD/KSO16/GPIO48
EC UTXD/KSO17/GPIO49

R309
1
1
R308

BID
SELIO#
FRD#
FWR#
FSEL#

<37>
<37>
<37,39>
<37,39>
<37,39>

EC_ON
<36,37>
ACIN
<37,43,45>
EC_THERM# <20,37>
ON/OFF# <36,37>
VDDA_EN <6,37>
ENABLT <13,17,37>
FSTCHG <37,44>

M_SEN#

VR_ON

<16,37,50>

M_SEN# <18,37>
CIR_IN
<36,37,41>
R320
EC_MUTE# <32,37>
1

SUSP#

47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
89
90

TP_DATA
TP_CLK

10K_0402_5%
2

@ 15P_0402_50V8J
2

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
VOLBTN-#

AGND

C517

CONA#
VLDT_EN

77

@ 10_0402_5%

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPI032
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPI035
KSI6/GPIO36
KSI7/GPIO37

GND
GND
GND
GND
GND
GND

1
R307

63
64
65
66
67
68
69
70

139
129
103
13
28
39

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KSO[0..15]

<36,37> KSO[0..15]

CLK_PCI_EC

BATTEMP/AD0/GPIO38
BATT OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
AD BID0/AD3/GPIO3B
AD INtput or GPI

PWR

KSI[0..7]

<35,36,37> KSI[0..7]

75

L25
1
2
FBML10160808121LMT_0603
2
C497

+3VALW

C535

EC_AVCC / AVCC

4.7U_0805_6.3V6K

11
26
37
105
127
141

C490

VCC/ EC VCC
VCC / EC VCC
VCC / EC VCC
VCC / EC VCC
VCC
VCC

ECAGND

ECAGND

<37>

10K_0804_8P4R_5%
4

+3VS

1 R299
2 M_SEN#
@ 10K_0402_5%

Compal Electronics, Inc.


Title

KBD EC CTRL-KB910L
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev
0.6

LA-2421
Date:

Sheet

Wednesday, January 05, 2005


E

38

of

56

ADB[0..7]

<37,38> ADB[0..7]

KBA[0..19]

U36

+3VALW

+3VALW
SUSP#

<26,37,38,42>

R316

C203
C516
0.1U_0402_16V4Z

0.1U_0402_16V4Z

10K_0402_5%
2

2
G

FWE#
KBA17
KBA14
KBA13
KBA8
KBA9
KBA11
FR D#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

+3VALW

3
S

U24B

FWE#

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

VDD
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3

14

A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Q31

SN74LVC32APWLE_TSSOP14

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1
KBA0
ADB0
ADB1
ADB2

<37,38> KBA[0..19]

EC_FLASH# <20>

2N7002_SOT23
FWR#

<37,38>

SST39VF040-70-4C-NH_PLCC32

+3VALW
1

+3VALW

<37,38>
<37,38>

FSEL#
FRD#

FSEL#
FR D#
FWE#

22
24
9

CE#
OE#
WE#

31
30

D0
D1
D2
D3
D4
D5
D6
D7

25
26
27
28
32
33
34
35

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

RP#
NC
READY/BUSY#
NC0
NC1

10
11
12
29
38

RESET#

GND0
GND1

23
39

@ SST39VF080-70_TSOP40

C538
0.1U_0402_16V4Z

VCC0
VCC1

JP27

1
2
R169
@100K_0402_5%

+3VALW

KBA16
KBA15
KBA14
KBA13
KBA12
KBA11
KBA9
KBA8
FWE#
RESET#
KBA18
KBA7
KBA6
KBA5
KBA4
KBA3
KBA2
KBA1

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

1
R326
100K_0402_5%

U29
8
7
6
5

<37,38,52> EC_SMC_1
<37,38,52> EC_SMD_1

KBA17

VCC
WP
SCL
SDA

A0
A1
A2
GND

1
2
3
4

AT24C16AN-10SI-2.7_SO8
KBA19
KBA10
ADB7
ADB6
ADB5
ADB4

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

R329
100K_0402_5%
+3VALW

21
20
19
18
17
16
15
14
8
7
36
6
5
4
3
2
1
40
13
37

+3VALW

U39
KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7
KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15
KBA16
KBA17
KBA18
KBA19

ADB3
ADB2
ADB1
ADB0
FR D#
FSEL#
KBA0

@ SUYIN-80065A-040G2T

Compal Electronics, Inc.


Title

BIOS & EC I/O Port


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size

Document Number

Rev
0.6

LA-2421
Date:

Wednesday, January 05, 2005

Sheet

39

of

56

+3VALW

+3VALW

14

14
4

U1B
200K_0402_5%1
SN74LVC14APWLE_TSSOP14

P
5

O
G

U1A
SN74LVC14APWLE_TSSOP14

R36

R33

C25
2 0.1U_0402_16V4Z

+3VALW

U1C
SN74LVC14APWLE_TSSOP14

C29
0.47U_0603_16V7K

I
7

R32
10K_0402_5%

14

P
1

1
2
470K_0402_5%

VLDT_EN

<37,38> VLDT_EN

14

R30

+3VALW

C24
0.1U_0402_16V4Z

SB_PWRGD <20>

U1D
10_0402_5%
SN74LVC14APWLE_TSSOP14
C

NB_PWRGD <13>

note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,


SUSP# goes to low after SB_PWRGD goes to low for power
down.
T1

14

+3VALW

VLDT_EN

P
11

I
7

VLDT_EN#

10

O
G

VLDT_EN

VLDT_EN# <48>

U1E
SN74LVC14APWLE_TSSOP14

NB_PWRGD
SB_PWRGD
T2

SUSP#
+1.8VS
B

SN74LVC125APWLE_TSSOP14

14
A

O
B

U24C

13

SN74LVC125APWLE_TSSOP14

14

U24D

14
12
11

SN74LVC32APWLE_TSSOP14

+3VALW

11

13

O
G

U33D

12

OE#

13

+3VALW

U24A

SN74LVC32APWLE_TSSOP14

SN74LVC32APWLE_TSSOP14

10

14
O

9
8

+3VALW

U33C

OE#

10

+3VALW

12

U1F
SN74LVC14APWLE_TSSOP14

Title

Compal Electronics, Inc.


Power OK/Reset Conn.& MUTE Switch

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5

Size
Custom
Date:

Document Number

R ev
0.6

LA-2421
W ednesday, January 05, 2005
1

Sheet

40

of

56

+3VALW

R79

10K_0402_5%

CONA#
1

<37,38>

DOCK_PRESENT

JP6

<30>

SPDIFO

<20,23> SB_SPDIFO

R90

R93

2 22_0402_5%

JACK_DET#

SPDIFO_L
1 R1063 2
100_0402_5%

+5VS
2@ 22_0402_5%
<30,36> MUTE_LED
<27>
XTPA1+
<27>
XTPA1<27>
XTPB1+
<27>
XTPB1-

+5V
DOCK_PRESENT
DOCKVIN

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
GND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
GND

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60

DOCK_PRES_GND

Q11
MMBT3904_SOT23
3

MDO3+
MDO3MDO1+
MDO1-

MDO2+
MDO2MDO0+
MDO0-

<28>
<28>
<28>
<28>

DOCK_PRES_GND

DOCK_MIC <32>
DOCK_LOUT_R
DOCK_LOUT_L

DOCK_LOUT_R <32>
DOCK_LOUT_L <32>

USBP1USBP1+
AC_ID

USBP1USBP1+
AC_ID

R83
1

<20>
<20>
<43,44>

200_0402_5%
2

DOCK_VOLBTN+# <37,38>
2

C185
1000P_0402_50V7K

TV_COMPS <13,18>
TV_LUMA <13,18>
TV_CRMA <13,18>
CIR_IN
+5V

200_0402_5% R78
2
1

<36,37,38>
C176

V_Bat

<44>
2

<28>
<28>
<28>
<28>

DOCKVIN

1000P_0402_50V7K

DOCK_VOLBTN-# <37,38>

R71
1K_0402_5%
1

FOX_QL11293-H212C1-TR

+5VS
+5VS

R1125
100K_0402_5%
2

R1126

JACK_DET

Note: PLACE CLOSE TO SPR PORT (JP33)


L27
1
2
DOCKVIN
KC FBM-L18-453215-900LMA90T_1812
1
1
C73
C149

DC_IN

JACK_DET#

100K_0402_5%

2
G

JACK_DET <32>

Q42
2N7002_SOT23

+5V
10U_0805_10V4Z

1000P_0402_50V7K

1000P_0402_50V7K
C166
0.1U_0402_16V4Z

C174

C165
@ 1000P_0402_50V7K

Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Compal Electronics, Inc.


SPR Connector

Size
Document Number
Custom LA-2421
Date:

Rev
0.6
Sheet

Wednesday, January 05, 2005


E

41

of

56

+12VALW
+12VALW

+12VALW

1M_0402_5%

2 SYSON#
G
Q19
2N7002_SOT23

+5VALW

SI4800DY_SO8

1
C596
22U_1206_10V4Z

470_0402_5%

C607
@ 10U_0805_10V4Z

RUNON

2
S

Q8
2N7002_SOT23

+2.5V

R201

R487

470_0402_5%

470_0402_5%

1 2

2
G

<26,37,38,46> SYSON

Q9
2N7002_SOT23

+1.25V
2 SUSP
G
Q33
2N7002_SOT23

+ C315

SYSON#

SYSON#

@ 33U_D2_8M_R35

D
Q17
2N7002_SOT23

D
2 SYSON#
G

2 SYSON#
G

Q36
2N7002_SOT23

C328

<26,37,38,39> SUSP#

R391

4.7U_0805_10V4Z

2
G

C593

+5VALW

<47>
D

470_0402_5%

2
1 2

R211
C366

SUSP

<45,48,49> SUSP

0.1U_0402_16V4Z

1
2
3
4

S
S
S
G

SI4800DY_SO8
SUSON

C329
22U_1206_10V4Z

D
D
D
D

8
7
6
5

47K_0402_5%

R22

10K_0402_5%

U34

0.1U_0402_16V4Z

C322

1
2
3
4

S
S
S
G

1
1
3

R207

D
D
D
D

R24

+5V
U13
8
7
6
5

SYSON# 2
G
Q18
2N7002_SOT23

+2.5VS

1 2

+2.5V

+2.5V to +2.5VS Transfer


+5VALW

0.01U_0402_16V7K

+5VALW to +5V Transfer


R206
100K_0402_5%

3
+1.8VALW

+3VS

C1143

+1.8VALW

C1138

C1139

+1.8VALW

C1140

C1141

C1142

C1144

+5VALW

C1145

C1146

C1147

+3VS

C1148

C1149

+3VS

C1151

C1152

C1154

C1153

C1155

1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2

+3VALW

+1.8VS

+5V

+1.8VS

+5VALW

+3VALW

+3VALW

B+

4
C1181

For EMI request

+3VALW
1000P_0402_50V7K 1000P_0402_50V7K
2
2

1000P_0402_50V7K
1

C1067

+5VALW to +5VS Transfer

C1068
FM1

+12VALW

CF5

+3VS

R534

R220

C1070

C1071

C1072

C1073

C417
470_0402_5%

@ 1000P_0402_25V8K
2

CF1

CF4

1
CF3

CF10 CF12

@ 1000P_0402_25V8K
H1
HOLEA

H2
HOLEA

H3
HOLEA

H4
HOLEA

H5
HOLEA

H6
HOLEA

H7
H8
H9
HOLEA HOLEA HOLEA

H10
HOLEA

@ 1000P_0402_25V8K

C419
@ 100U_D_16VM

H11
HOLEA

+1.8VALW to +1.8VS Transfer

1
2
3
4

SI4800DY_SO8
C545

0.1U_0402_16V4Z

C567
22U_1206_10V4Z

C554

10U_0805_10V4Z

C642

H21
HOLEA

R144

1
H22
HOLEA

H23
HOLEA

H24
HOLEA

H25
HOLEA

H27
HOLEA

H28
HOLEA

H29
HOLEA

H30
HOLEA

470_0402_5%
1

7
1

D
R485
RUNON
2
1
22K_0402_5%

R338

82_0402_5%

22U_1206_10V4Z

C631

10U_0805_10V4Z

S
S
S
G

SI4800DY_SO8
C643

C645
0.01U_0402_16V7K

2 SUSP
G
Q15
2N7002_SOT23

D
D
D
D

8
7
6
5

0.1U_0402_16V4Z
1

+3VALW to +3VS Transfer

H17
H18
H19
H20
HOLEA HOLEA HOLEA HOLEA

+3VS

U30

S
S
S
G

1
2
3
4

+3VALW

H14
H15
HOLEA HOLEA

+1.8VS

U40
D
D
D
D

H13
HOLEA

+1.8VALW

H12
HOLEA

2 SUSP
G
Q38
2N7002_SOT23

+5VALW

8
7
6
5

100U_D2_10VM

CF8

D
+5VALW

4.7U_0805_10V4Z

FM5
1

C415
0.1U_0402_16V4Z

+ C160

FM6
1

CF11 CF13 CF14 CF6

@ 1000P_0402_25V8K

C416

FM4
1

1
2

RUNON

1M_0402_5%

CF2
1

SI4800DY_SO8
C422

1
2
3
4

S
S
S
G

2
G
Q22
2N7002_SOT23

CF7

SUSP

D
D
D
D

0.01U_0402_16V7K

+3VS

22U_1206_10V4Z

U15
8
7
6
5

CF9

+3VALW

R224
100K_0402_5%

FM3
1

+5VS

5
+5VALW

FM2
1

1000P_0402_50V7K

C1180

D
RUNON

2 SUSP
G
Q32
2N7002_SOT23

Title

Compal Electronics, Inc.

DC/DC Circuit
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Size
Custom
Date:

Document Number

Rev
0.6

LA-2421
Wednesday, January 05, 2005

Sheet

42

of

56

Detector

PJP12

PC4
1000P_0402_50V7K

PR1
1M_0402_1%
1
2

1
2

DC_IN

8
3

PR4
10K_0402_5%
1
2

3.2V

PACIN

PU1A
LM393M_SO8

PACIN

<44>

2
1
PR9
10K_0402_5%

<37,38,45>

PR7
10K_0402_5%

PD1
RLZ4.3B_LL34

ACIN

O
4

1
2

1
1N4148_SOD80

PR6
19.6K_0603_0.1%
2
1

PD2
DC_IN

PC6
0.047U_0603_16V7K

PR8
47_1206_5%
1
2

PR5
22K_0402_1%
1
2

PC7
1000P_0402_50V7K

PR2
82.5K_0603_0.1%
2
1

DC_IN

VS

VS

PR3
10K_0805_1%

ADPGND

PC5
0.01U_0402_50V4Z

PC3
100P_0402_50V8K
PC2
1000P_0402_50V7K

17.481
16.858

PC1
100P_0402_50V8K

Vin Detector
18.202 17.841
17.568 17.210

DC_IN

FOX_JPD105L-W12-TR

PWR2

GND2

ADPIN

PL1
FBM-L18-453215-900LMA90T_1812

PWR1

<41,44>

GND1

AC_ID

5
1

SINGAL

RTCVREF

PD3
2

VMB

RB751V_SOD323

VS1

CHGRTCP

PR11
2
1.5K_1206_5%

PR13
2
1.5K_1206_5%

PC9
0.1U_0603_50V4Z

PC14
10U_0805_6.3V6M

PC13
1U_0805_25V4Z

ACIN
2

VL

5V

2
PR22
499K_0402_1%

PR24
47K_0402_5%

PR23
10K_0402_5%

2
G
PQ2
2N7002_SOT23

PACIN

Precharge detector
16.421 15.817 15.229
14.108 13.657 13.002

PR19
499K_0402_1%

PC10
1000P_0402_50V7K

IN
GND

OUT

RB715F_SOT323

200_0603_5%

1
3

<44> ACON

200_0603_5%

<45,52> MAINPWON

PR21

PR20

PU2
G920AT24U_SOT89

PU1B
LM393M_SO8

PD23

PR18
200_0805_5%

CHGRTC

CHGRTCP

RTCVREF

PC12
0.1U_0402_16V7K
2
1

3.3V

5V

VL

PR15
432K_0402_1%

PR17
1M_0402_1%
2
1

PR16
10K_0402_5%
1
2

PR14
22K_0402_5%

B+

1N4148_SOD80

PR10
2
1.5K_1206_5%

PD4
2

DC_IN

PC11
0.01U_0402_16V7K

PC8
0.22U_1206_25V7K

PR12
100K_0402_5%
2
1

<36> EC_PWR_ON#

PQ1
TP0610K_SOT23
1

+2.5V

+1.5VSP

PQ3
DTC115EUA_SC70

+1.5VS

PJP5
3MM
2

+5VALW

+1.2V_HTP

PJP9
3

PJP4
3MM
4

+2.5VP

PJP3
3MM
2

2MM
2

+1.2V_HT

+12VSP_FAN

+5VALWP

+5VALWP

+3VALW

+3VALWP

PJP2
3MM
2

PJP1
3MM
1

+12VS_FAN

PJP14
PJP6

3MM

2MM
+12VALWP

+12VALW

Compal Electronics, Inc.


PJP8
3MM
+1.8VALWP

PJP7
3MM
2

+1.8VALW

+1.25VP

Title
2

+1.25V

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:
A

Detector
Document Number

Rev
Sheet

Thursday, January 06, 2005


E

43

of

55

Charger

PR25
0_0402_5%
1
2

<41> V_Bat

Iadp=0~6.0A
B++

24

OUTC2

GND

23

+INE2

CS

22

-INE2 VCC(o)

21

FB2

OUT

20

VREF

VH

19

4
3
2
1

DC_IN

+INC2

ACOFF#

1
1

7
2
PR39
1K_0402_1%
8

PC26
1500P_0402_50V7K

1
2

PR46
100K_0402_1%
2
1

PR44
2
1
10K_0402_1%
PC32
0.1U_0402_10V6K

FB1
-INE1

VCC

18

RT

17

+INE1

-INE3

16

10

OUTC1

FB3

15

11

OUTD

CTL

14

-INC1

+INC1

13

12

PC24
0.1U_0603_50V4Z
1
2

2
PC21
0.1U_0603_50V4Z

ACOFF <37,38>
2

LXCHRG

CC=0(0.5A) ~ 3A
CV=16.8V (12 CELLS)

PC27
2 0.1U_0603_50V4Z

1
1
2
PR41
68K_0402_1%

PR42
0.02_2512_1%
1
2

BATT+
BATT+

PL3
15U_PLC1045-150_3.2A_20%

PC28
PR45
47K_0402_1% 1500P_0402_50V7K
1
2
1
2
ACON

PD8
SKS30-04AT_TSMA

PC31
4.7U_1206_25V6K
2
1

5.0V

PQ10
DTC115EUA_SC70

PR38
1
2
1K_0402_1%

PC19
2200P_0402_25V7K
2

PC30
4.7U_1206_25V6K
2
1

PC23
4700P_0402_25V7K_A34

1
2
PR43
174K_0603_1%

IREF=1.113*Icharge
IREF=0.373~3.3V

PC29
4.7U_1206_25V6K
2
1

VREF

CS

5
6
7
8

PR34
47K_0402_1%

PR35
31.6K_0603_1%
2
1
1
2

PQ12
2N7002_SOT23

<37,38> IREF

ACON <43>

PC25
0.1U_0402_10V6K

2
G
3

<43> PACIN

1
2

PR37
10K_0402_1%
2
1

PR36
150K_0402_5%

1SS355_SOD323
PR40
3K_0402_5%
1
2

PC22
0.1U_0402_16V4Z
2
1

-INC2

PR28
47K_0402_5%
PR32
10K_0402_5%

1
2

PC18
0.22U_0805_16V7K_V2

1
2
1

ACOFF#

4
1
PD7

8
7
6
5

PQ8
SI4835BDY_SO8
4

PU3

1
2
3

<37> ADP_I

I
2

PR31
0_0402_5%

1.2V

PQ11
2N7002_SOT23
3

PQ9
DTC115EUA_SC70

1 47K_0402_1%
2

10K

PR33

2
G

PQ6
AO4407_SO8

2
47K

PQ7
DTA144YKA_SOT23

PR30
1K_0402_5%

PL2
C8B BPH 853025_2P

PR26
0.01_2512_1%(1W)
2
1

8
7
6
5

PC20
0.1U_0603_25V7K

1
2
3

PC17
@2200P_0402_50V7K

1
2
3

PR29
200K_0402_5%

PR27
15K_0402_5%

PD6
1SS355_SOD323

8
7
6
5

DC_IN

B+

PQ5
AO4407_SO8

PC16
4.7U_1206_25V6K

PQ4
AO4407_SO8

P3

PC15
10U_1206_25V6M
2
1

P2

MB3887_SSOP24

4.2V

PR47
49.9K_0603_0.1%

PR48
150K_0603_0.1%

PC33
22P_0402_50V8J

BATT+
PR194
1
2
0_0402_5%

<41,43>

AC_ID
+3VALWP

VL
1

PR49
8.25K_0603_1%
1

1
3

PQ13
2N7002_SOT23

2
G

2
2

PQ14
DTC115EUA_SC70

<37,38>

FSTCHG

LM358A_SO8

2
PR52
@0_0402_5%

PC36
0.01U_0402_50V4Z

@0_0402_5%

CS
PR51
47K_0402_5%

0
4

PR54
@2.2K_0402_5%
2
1

8
PR57
105K_0603_0.5%

PC35
@0.1U_0402_16V7K
2
1

PC37
0.01U_0402_50V4Z

LM358A_SO8

PR56
2.2K_0402_5%
2
1

EC_AC_ID
1

PR211

<37,38>

PU4B
5

<37,38> BATT_OVP
PC38
@0.1U_0402_16V7K
2
1

PU4A
+ 3

PR55
2K_0603_1%
1

1
2

1
PR53
499K_0402_1%

PC34
0.1U_0603_50V4Z

PR50
340K_0402_1%

OVP voltage : LI-MH 12 CELL(4S3P)


BATT+ : 18.0V--> BATT_OVP : 2.0V
(BATT_OVP voltage = 0.1109*BATT+)

Compal Electronics, Inc.


Title

Charger
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size
Date:

Document Number

Rev
Sheet

Wednesday, January 05, 2005


E

44

of

55

+3.3V/+5V/+12V
PC39
4.7U_1206_25VFZ
2

B+

PC40
PD9
470P_0805_100V7K
EC11FS2_SOD106

PL4

FLYBACK

1
2

PC46
10U_1206_25VAK

1
2

PR63
0_0402_5%

1
2

21

BST5
DH5
LX5
PR70

DL5

1.54K_0402_1%
2
1
1

1
2
PR72
0_0402_5%
698_0402_1%
PR73

PC53
0.47U_0603_16V7K
2

+5VALWP
1

1
+

PD13
SKS10-04AT_TSMA

PC58
150U_D_6.3VM

PR80
0_0402_5%

0_0402_5%

PR77

PC59
100P_0402_50V8K

MAX1902_SSOP28
1
2

PC56
4.7U_0805_6.3V6K

2.5VREF
1

VL
8

PC49
47P_0402_50V8J

PR62
0_0402_5%
1
2

PC50
4.7U_1206_25V6K

1
2
1
3

PR61
2.7K_1206_5%
PQ17
2N7002_SOT23

PC45
2200P_0402_50V7K

AO4912_SO8

MAINPWON <43,52>

PR84
10K_0402_1%

VL
2

1
2

4
5
18
16
17
19
20
14
13
12
15
9
6
11

VL

1
2

PC63
@22U_1206_10V6M

12OUT
VDD
BST5
DH5
LX5
DL5
PGND
CSH5
CSL5
FB5
SEQ
REF
SYNC
RST#

PR79
@0_0402_5%

PR83
499K_0603_1%
1
2

PC60
@0.047U_0402_16V4Z

1
2

PC61
1U_0805_16V7K

PR88
100K_0402_1%
VL
4

2
G
PQ20
2N7002_SOT23

@ S

PR89
200K_0402_1%
@

LM358A_SO8
PU6A

@2
PC66
330P_0402_25V8K
2
1 @

4
2

PC67
1000P_0402_50V7K
@

PC62
22U_1206_10V6M
@

1
-

1
+

@ S

PR87
5.1K_0402_1%
@
2
1

2
G

1
2
3
4

PC64
0.1U_0603_50V4Z
2
1

3
1

2N7002_SOT23
PQ19

PR86
47K_0402_5%
@
2
1

G
VL

PC65
PR85
47P_0402_50V8J 0_0402_5%

RUN/ON3

PR82
47K_0402_1%

+8VSP

6
5
2
1

TIME/ON5

PC57
680P_0402_50V7K

VS

PQ18
SI3455DV_TSOP6

7
28

G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A

PR66
2M_0402_5%

CSH3
CSL3
FB3
SKIP#
SHDN#

PR76
@300K_0402_5%

8
7
6
5

PR78
10.7K_0402_1%
2
1

100P_0402_50V8K

LX3
DL3

PR74
10K_0402_5%

PC55

2
1

<37,38,43> ACIN

DH3

26
24

27

1
2
3
10
23

619_0402_1%
2

PR71
1

PR81
10K_0402_1%
1
2

PR75
3.57K_0402_1%
1
2

PD12
SKS10-04AT_TSMA

PC54
150U_D_6.3VM

1
2
PR69
0_0402_5%

PC52
0.47U_0603_16V7K
2
1

BST3

2
G

PQ16

GND

PR67
1M_0402_1%
2

1
2

PR68
1.27K_0402_1%

+3VALWP

PU5
25

22

1
2
PR65
1.27K_0402_1%

ACIN

V+

PC51
47P_0402_50V8J

PR64
0_1206_5%
@
1

DH3

PL6
10U_SPC-1204P-100_4.5A_20%

1
PC48
0.1U_0603_50V4Z
2
1

2
LX3

PR60
0_0402_5%

DL3

PC47
4.7U_0805_10V6K

AO4912_SO8

+12VALWP

DAP202U_SOT323

VS

8
7
6
5

D2
G2
D2
D1/S2/K
G1
D1/S2/K
S1/A D1/S2/K

PD11
1SS355_SOD323

1
2
3
4

B+++

VL

1
2

PC44
4.7U_1206_25V6K

1
2

PC43
2200P_0402_50V7K

PD10
PR59
0_0402_5%
1
2

PQ15

PC42
0.1U_0603_50V4Z
1
2

BST51

PC41
0.1U_0603_50V4Z
BST31
1
2

B+++

PL5
9U_SDT-1204P-9R0-120_4.5A_20%

PR58
22_1206_5%

SNB

FBM-L18-453215-900LMA90T_1812

SUSP <42,48,49>

Compal Electronics, Inc.

Title

3.3V / 5V / 12V

PR90
5.1K_0402_1%
@

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B

Size

Document Number

Rev

1.0
Date:

Sheet

Thursday, January 06, 2005


E

45

of

55

B+++

PR92
51_1206_5%
+5VALWP

1
1

PC69
10U_1206_25V6M

D
D
D
D

1
PC72
@2200P_0402_50V7K

PC71
2.2U_0805_10V6K

2
PR93
2.2_0402_5%

8
7
6
5

PD14

PC70
0.1U_0603_25V7K
2
1

1
2

PC68
@2200P_0402_50V7K

PR91
0_1206_5%
2
1

PC73
4.7U_1206_25V6K

PR102
0_0402_5%

LGATE2

27

PGND1

PGND2

26

VOUT2
VSEN2
EN2
PG2/REF

20
19
21
16

OCSET2

18

9
10
8
15

VOUT1
VSEN1
EN1
PG1

11

OCSET1

ISL6227CA_SSOP28

+5VALWP

PR106
91K_0402_1%
2

PR105
91K_0402_1%

PC81
4.7U_0805_6.3V6K

22

LGATE1

ISEN1

PC80
220U_D2_4VM

ISEN2

DDR

ISL6227

PR99
2.74K_0402_1%
2
1

25

PR97
0_0402_5%
2

PR100
10K_0402_1%

PHASE2

PHASE1

PR95
0_0402_5%

24

+1.8VALWP

PR104
10K_0402_1%

28
VCC

UGATE2

PL8
3.3UH_PLC0745P-3R3A_4.8A_30%
1
2

PC82
0.01U_0402_16V7K
2
1

14

UGATE1

AO4912_SO8

PC77
0.1U_0603_25V7K
2
1

13

<26,37,38,42> SYSON
PC84
@1000P_0402_50V7K

23

GND

S
S
S
G

D
D
D
D
1
2
1

BOOT2

1
2
3
4

PC85
@1000P_0402_50V7K

PR103
10K_0402_1%

PR101
17.8K_0402_1%

BOOT1

PR98
2.74K_0402_1%
7
2
1

1
2
3
4

PQ23
AO4702_SO8

17

PR94
0_0402_5%
1
PR96
0_0402_5%

PC83
0.01U_0402_16V7K

PC78
470U_6.3V_M

PC79
4.7U_0805_6.3V6K

SOFT2

G2
D2
D1/S2/K
D2
D1/S2/K
G1
D1/S2/K S1/A

PC75
0.01U_0402_16V7K
2
1

8
7
6
5

1
8
7
6
5

+2.5VP

PC76
0.1U_0603_25V7K
2
1

VIN

PL7
4.7UH_PLC1045-4R7_5.5A_30%

PC74
0.01U_0402_16V7K PU7
12 SOFT1
2
1

1
2
3
4

S
S
S
G

PQ22
DAP202U_SOT323

PQ21
AO4404_SO8

Iimit=9.6/RILIM*(100+Rsense)/Rds(on)
Rsense=2K,RILM=107K,Rds(on) tpy.=19.7m,Max=24m.
Iimit Min=9.6/107K*(100+2K)/(24m*1.3)=6.0388A
Iimit Max=9.6/107K*(100+2K)/19.7m=9.564A
+VCCP O.C.P. = 6.038A ~ 9.564A

Iimit=10.3/RILIM*(140+Rsense)/Rds(on)
Rsense=1K,RILM=51K,Rds(on) tpy.=19.7m,Max=24m.
Iimit Min=9.6/51K*(100+1K)/(24m*1.3)=6.636A
Iimit Max=9.6/51K*(100+1K)/19.7m=10.897A
+VCCP O.C.P. = 6.636A ~ 10.897A
A

COMPAL ELECTRONICS, INC


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

DDR POWER 2.5VP & +1.8VALWP


Document Number

Rev
0.1

Date: Wednesday, January 05, 2005


5

Sheet
1

46

of

55

PJP10

+2.5VP

2MM
1

+3VALWP
PU8
1

VIN

PGND

VFB

AGND

VTT

VCCA

VTT

REFEN

+2.5VP
PR108
100K_0402_1%
1
2
1

100K_0402_1%

PC91
@4700P_0603_50V7K

CM8562IS_PSOP8

PR109
PC90
0.1U_0603_25V7K

PC88
10U_0805_10V4Z

PC89
22U_1206_6.3V6M

PR107
10_0603_1%

+1.25VP
C

AGND

PC86
10U_0805_6.3V4Z

PC87
10U_0805_6.3V4Z

2
1

2
G
2N7002_SOT23
PQ24

SYSON# <42>

COMPAL ELECTRONICS, INC


Title

+1.25VP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Size
Date:

Document Number
Wednesday, January 05, 2005

Rev
Sheet
1

47

of

55

PR199
1
2
10_0603_5%

PR201
1
2
0_1206_5%

+5V

D
D
D
D

8
7
6
5

1
2

2
UGATE

PC160

PC161
22U_1206_6.3V6M

PQ52
AO4404_SO8

PR196

<40> VLDT_EN#

D
PQ51
2N7002_SOT23

2
G

FB

PHASE

LGATE

D
D
D
D

0_0402_5%

0.1U_0402_16V7K

GND

+1.2V_HTP

PQ53
AO4702_SO8

Ipeak = 8.2 7A
Io = 7 .58A

S
S
S
G

PC155
@0.1U_0402_16V7K

PL21
3.3UH_IHLP-2525_30%
2

8
7
6
5

1
2
3
4

OCSET

PC163
22U_1206_6.3V6M

S
S
S
G

VCC
BOOT

PD36
1N4148_SOD80

PU16

PC159
1U_0603_6.3V6M

PC156
470P_0402_50V8J

PR197
8.06K_0402_1%

2 PC164
2 PC162
470U_V_2.5VM
470U_V_2.5VM

1
2
3
4

APW7057KC-TR_SOP8
C

2
PC158
0.1U_0402_16V7K

+1.5VSP

5.1K_0402_5% 68P_0402_50V8J
1
2
1
2
PR120
PC101

PR118
100_0402_1%

PR119
200_0603_5%

1
B
1

PR117

PC100
4.7U_0805_6.3V6K

PC99
22U_1210_6.3V6M

5.1K_0402_5%

1 2

+1.8VALW

PC98
@220U_B2_2.5VM

PQ29
2SC4672_SOT89
2
3

PJP11
2MM

PC157
@0.1U_0402_16V7K

PR198
10K_0402_1%

PR200
5.11K_0402_1%
1
2

PC102
560P_0402_50V7K

PU6B
- 6

0
+

2.5VREF

1 PR121

6.34K_0402_1%

PR122

2
G

SUSP <42,45,49>

2
1

10K_0402_1%

PC103
0.01U_0402_16V7K

LM358A_SO8

PQ30
2N7002_SOT23

<>

COMPAL ELECTRONICS, INC


Title

1.2V_HTP / +1.5VSP
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Size

Document Number

Date: Wednesday, January 05, 2005


5

Rev
Sheet
1

48

of

55

B+++

+12VSP_FAN
PQ31
@SI3455DV_TSOP6

1
+

PC105
@100U_25V_M

PC106
@10U_1206_25V6M

PR127
@30K_0402_1%

PC109
@0.1U_0603_50V4Z

PU10A
+ 3

O
G

2
B
PQ33
@2SA1036K_SOT23

PR128

2.5VREF

@200K_0402_1%

@LM393M_SO8

PC104
@470P_0402_50V7K

1
1
2

VS

PR124
@107K_0402_1%

@SKS30-04AT_TSMA

1
3

PR125
@10K_0402_5%
3

2
1
2

PC108
@2200P_0603_50V7K

PQ32
@HMBT2222A_SOT23

PR126
@10K_0402_1%
2
2

PC107
@10U_1206_25V6M

PD19

PD18
@RB751V_SOD323

6
5
2
1

4
C

PL10
@5U_TPRH6D38-5R0M-N_2.9A_20%
2
1

PR123
@0_1206_5%

PC110
PQ34 D
@1000P_0603_50V7K @2N7002_SOT23

2
G

PR129
@0_0402_5%
1

SUSP

<42,45,48>

S
B

COMPAL ELECTRONICS, INC


Title

FAN 12V
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

Size
Date:

Document Number
Wednesday, January 05, 2005

Rev
Sheet
1

49

of

55

+5VS

PR130
10_0402_5%

CPU_B+

PR131
@90.9K_0402_1%

PC111
1U_0805_25V4Z

+3VS

PR132
@10K_0402_5%

PR133
1
2 PWM3
@0_0402_5%

2 1

PR149
2K_0402_1%

PR148 107K_0402_1%

1
PC116
3300P_0402_50V7K

2.49K_0402_1%

PR146
1.21K_0603_1%
1
2

1
2
PR143 0_0402_5%
PR147

3900P_0603_50V7K

1
2
PC113
47P_0402_25V8K
1
2 1
2
PR145
PC114 3.57K_0603_1%

6
7
9
10
5
26

COMP
FB
IOUT
VDIFF
OFS
FS

28
13
14
19

GND
GND
GND
GND

29

VCC

15

PWM1
ISEN1

21
22

PWM2
ISEN2

20
18

PWM3
ISEN3

16
17

VSEN

11

RGND

12

PWM4
ISEN4

24
23

1
2
0_0402_5%

1
2
PR139 1.2K_0603_0.5%
1
2
PR142 1.2K_0603_0.5%
1
2
PR144 1.2K_0603_0.5%

PWM1
ISEN1

<51>
<51>

PWM2
ISEN2

<51>
<51>

PWM3
ISEN3

<51>
<51>

PWM4
ISEN4

<51>
<51>

PC115
@1U_0805_25V4Z

PWM4
2

PR192 @1.2K_0603_0.5%
ISL6559CR-T_QFN32

4
8
31

<16,37,38> VR_ON

VID4
VID3
VID2
VID1
VID0
PGOOD
EN

2
2
2
2
2

PWM4

PR135 1K_0402_5% 30
PR136 1K_0402_5% 32
PR137 1K_0402_5%
1
PR138 1K_0402_5%
2
PR140 1K_0402_5%
3
25
PR141
0_0402_5%
27
2

1
1
1
1
1

VID4
VID3
VID2
VID1
VID0

PR193

OVP

PU11

VGATE

<6>
<6>
<6>
<6>
<6>

PR134
10K_0402_5%

NC
NC
NC

PR185
10K_0402_5%

PC112
@1U_0402_6.3V4Z

PR150 0_0402_5%
1

<6> CPU_COREFB#

2
PR151 0_0402_5%

2
1
PR153 100_0402_5%

<6> CPU_COREFB

PR152 100_0402_5%
2
1

+CPU_CORE

COMPAL ELECTRONICS, INC


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+CPU_CORE
Document Number

Rev
1.0

Date: Wednesday, January 05, 2005


5

Sheet
1

50

of

55

+12VALWP

PD33
SKS10-04AT_TSMA

2
5

LGATE

ISL6209CB-T_SO8
2

PD31
SKS10-04AT_TSMA

1
2

1
2

PC130
2200P_0402_50V7K

1
2

PC138
2200P_0402_50V7K

1
2

PC137
10U_1206_25VAK

PC136
10U_1206_25VAK

1
PC139
680P_0603_50V8J

PD32
SKS10-04AT_TSMA

PQ43
SI7886DP_SO8

Snubber

PC141
1U_0805_25V4Z
1
2

PC140
@0.1U_0603_16V7K
1
2

PR174
57.6K_0402_1%
2
1

PR175
4.7_1206_5%

ISEN2

PD34
@SKS10-04AT_TSMA

1
2

1
2

1
PC152
@680P_0603_50V8J

PL16
@0.5U_MPC1250LR50_35A_20%
1
2

Snubber

PR191
@4.7_1206_5%
1

PQ50
@ SI7886DP_SO8
1

LGATE

GND

@ ISL6209CB-T_SO8

3
2
1

3
2
1

DELAYPHASE

PD24
SKS30-04AT_TSMA

PWM UGATE

Local Transistor
Swtich Decoupling

PQ48
@SI7840DP_SO8

3
2
1

PC154
1U_0805_25V4Z
1
2

PR190
@ 57.6K_0402_1%
2
1

PC153
@0.1U_0603_16V7K
1
2

PQ47
@SI7840DP_SO8

PQ49
SI7886DP_SO8

PR188
@0_0402_5%
1

PR187
2
@ 0_0402_5%
1
2
1

BOOT

VCC

3
2
1

PWM4

@
PU15
6

PC151
2200P_0402_50V7K

4
PR205
@4.7_0402_5%
1
2

PC150
10U_1206_25VAK

@ 0.33U_0805_16V7K
PR186
@2_0402_5%

5
2

PC149
10U_1206_25VAK

CPU_B+

PC147
1

PC148
10U_1206_25VAK

<50>

PL14
0.5U_MPC1250LR50_35A_20%
1
2

LGATE

Local Transistor
Swtich Decoupling

GND

ISL6209CB-T_SO8

PR169
4.7_1206_5%

PQ46
SI7840DP_SO8

PD22
SKS30-04AT_TSMA

DELAYPHASE

PQ41
SI7840DP_SO8

1
2

PR171
0_0402_5%
2
1

3
2
1

PQ42
SI7886DP_SO8

BOOT

PWM UGATE

VCC

3
2
1

2
B

3
2
1

PU14

PR172
@0_0402_5%
2
1

Snubber

3
2
1

PC135
10U_1206_25VAK

5
2

0.33U_0805_16V7K

4
PR204
4.7_0402_5%
1
2

CPU_B+

PR170
2_0402_5%

PR189
@ 499K _0402_1%

PC131
680P_0603_50V8J

PC134

0>

PC129
10U_1206_25VAK

3
2
1

PQ40
SI7886DP_SO8

ISEN1

PR173
499K _0402_1%

+CPU_CORE

GND

2 2

PL13
0.5U_MPC1250LR50_35A_20%
1
2

PQ45
SI7840DP_SO8

PD21
SKS30-04AT_TSMA

DELAYPHASE

PQ38
SI7840DP_SO8

PR165
0_0402_5%
2
1

PC133
1U_0805_25V4Z
1
2

PC132
@0.1U_0603_16V7K
1
2

PR168
57.6K_0402_1%
2
1

<50>

PWM2

PR163
4.7_1206_5%

3
2
1

PQ39
SI7886DP_SO8

BOOT

PWM UGATE

VCC

3
2
1

3
2
1

PU13

PR166
@0_0402_5%
2
1

0>

Snubber

PC128
10U_1206_25VAK

2
4

4
PR203
4.7_0402_5%
1
2

0.33U_0805_16V7K

5
2

PR164
2_0402_5%

PR167
499K _0402_1%

PC123
680P_0603_50V8J

CPU_B+

PC126

PWM1

PQ37
SI7886DP_SO8

ISEN3

0>

3
2
1

3
2
1

ISL6209CB-T_SO8

+ PC146
@68U_25V_M
2

LGATE

PC122
@47U_25V_M

GND

CPU_B+

PL12
0.5U_MPC1250LR50_35A_20%
1
2

B+

PQ44
SI7840DP_SO8

PD20
SKS30-04AT_TSMA

DELAYPHASE

PQ35
SI7840DP_SO8

PR159
0_0402_5%
2
1

3
2
1

PQ36
SI7886DP_SO8

BOOT

PWM UGATE

Local Transistor
Swtich Decoupling

PL11
FBM-L18-453215-900LMA90T_1812
1
2

PC127
10U_1206_25VAK

<50>

VCC

3
2
1

PR162
57.6K_0402_1%
2
1

PR161
499K _0402_1%

PC125
1U_0805_25V4Z
1
2

PC124
@0.1U_0603_16V7K
1
2

PR160
@0_0402_5%
2
1

PWM3
2

0>

PU12

PC120
10U_1206_25VAK

PR202
4.7_0402_5%
1
2

PR158
2_0402_5%

PC119
10U_1206_25VAK

0.33U_0805_16V7K

PC118
10U_1206_25VAK

PR157
@0_0402_5%

PC117
2

PR154
0_0402_5%
2
1

PR156
@0_0402_5%
2
1

PR155
@0_0402_5%
2
1

+5VS

+8VSP

PC121
2200P_0402_50V7K

CPU_B+
+12VSP_FAN

Compal Electronics, Inc.


Title

CPU_CORE_Power-Stage
<50>

Size
Document Number
CustomLA-2431

ISEN4

Date:
5

Rev
0.1

Wednesday, January 05, 2005


1

Sheet

51

of

55

VMB

TS_A
EC_SMDA
EC_SMCA

BATT+

1
PC142
1000P_0402_50V7K

PC143
0.01U_0402_50V4Z

PH2 near main Battery CONN :


BAT. thermal protection at 84 degree C
Recovery at 45 degree C

VL

2
PR178
25.5K_0402_1%

+3VALWP
PR180
47K_0402_1%
1
2

PR179
2.15K_0402_1%
VL

8
+

PU9B

MAINPWON <43,45>

4
1

LM393M_SO8

PR183

EC_SMC_1 <37,38,39>

EC_SMD_1 <37,38,39>

EC_SMC_1

PC145
1000P_0402_50V7K

BATT_TEMP <37,38>
EC_SMD_1

PC144
1U_0402_6.3V5K

PR182
16.9K_0402_1%
1
2

PR181
1K_0402_5%

PR176
PR177
100_0402_5% 100_0402_5%

SUYIN_200275MR009G130ZL

PH1
10K_TH11-3H103FT_0603_1%

TS
SMD
SMC
GND
GND

3
4
5
6
7

PL15
C8B BPH 853025_2P
1
2

1
2

BATT+
BATT+

PCN2

VL

150K_0402_1%
PR184
150K_0402_1%

COMPAL ELECTRONICS, INC


Title

BATTERY CONN / OTP


THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A

Size

Document Number

Rev

Date: Wednesday, January 05, 2005


D

Sheet

52

of

55

POWER PIR LIST


D

COMPAL ELECTRONICS, INC


Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PIR
Document Number

Date: Wednesday, January 05, 2005


5

Rev
Sheet
1

53

of

55

PIR LIST

Pre-DB

2004/6/05
1.page16 add R541/R542/R543/R544 and net NBSRCCLK_R/ NBSRCCLK/ NBSRCCLK#_R/ NBSRCCLK#.
2.page13 add net NBSRCCLK/NBSRCCLK#.
3.page13 change R85 pin2 from +2.5VS to +2.5V.
4.page14 add D33.
5.page19 del D18 and remove C265 to U38 pinA2.

2004/6/08
1.page13 del R82 change net name from SUS_STAT# to NB_SUSSTAT#.
2004/6/19
1.page19 Change U32,C584,R389 to @.
2.page23 Change R460 to @ and Add R464.
2004/6/25
1.page40 Change R30 from 10K_0402 to 340K_0402_1%.
2.Page4/6 change C18, C28 to SF10001M100 ELE CAP 100U 6.3V M B (6.3X6.0) CV-AX.
3.Page19 Add JP37, del BATT1

2004/6/28
1.Page26 Change U2 from R5535 to TPS2231.
2.Page26 Change C485/C487 to 4.8U_0805,change C486 to 10U_0805.
3.Page26 Change C503/C494 to 10U_0805,C492 to 4.7U_0805.
4.Page26 Del R268,Add Q40 2N7002.

Update for DB2

35. WL_ON connect to pin #C5 of SB/ BT_ON# connect to pin #B5/ BT_DET#
connect to pin #C8. (Page 20)
36. Add R1132 to ensure ENABLT is low during power up.(Page 13)
37. AGP_BUSY# and AGP_STP# pull up to solve shut down issue. (Page 20)
38. Delete R159 (OVCUR#3) and LID_OUT# change to GPM3# and add R1133
pull up S3_STATE to +3VALW (Page20)
39. Change all blue LED's footprint to LED_17-21UYOC-S530-A2-TR8_2P
40. Change R532 to 0603 size and add R1134 (Page 30)
41. Add AC-caps for PCI and LPC bus turn path. (Page 42)
42. Delete R541, R542, R543 and R544. (Page 16)

1.page34 change IDE Resistor from 0402 to 8P4R.


4.page27 change DOCK@ to 1394@.
5.ME update connector check and sub-board connector change to hot bar.
6.change 470U placement for +1.25V.
7.page40 change R33 from 0603 to 0402 type and R30 to 470k_0402_5%.
8. change C18, C28 to SF10001M100 ELE CAP 100U 6.3V M B (6.3X6.0) CV-AX.
9. change C318 to bottom side SF33001M100 ELE CAP 330U 6.3V M B (6.3X7.7) CV-AX
10. change C411 to bottom side SF47001M000 ELE CAP 470U 6.3V M B (10X10.5) CV-EX
11. change C325 to SGA19471D20.
13. change BATT1 to SP07S00080L( socket) + GC20323MX00( battery) (Page 19)
14. change new card power switch from RICOH to TI.
15. Remove PME_EC# from SB and pin C4 wire to EC_SWI#
16. Disconnect UTXD from U26.154
17. Page 23 update hardware strap for SB400 A21 (PA_IXP400AD1 & 105-A27800-00C R1.1)
18. Page 13 add EEPROM for NB to solve boot up intermittently
19. Page 23 strap select 14 MHz OSC mode, it is generated from NB to SB and
delete 14 MHz crystal at SB
20. 1394 controller change to TI
21. Update PIRQ routing
22. X2 change size.
23. Cardbus controller change to TI
24. Fan circuit change to MOS
25. Change AMP to TPA0312 and add TC7SH32FU to solve HP_PLUG issue
26. Implement HP wireless/bluetooth control requirement. Change host to SB. (Page 20)
27. Change CRT connector JP19 (Page18)
28. Modify KB910L debug pin RXD=pin#35 & TXD=pin#34
29. No need PWR_BACK# from EC controller
30. DFX review: Change blue LED footprint to be same as amber LED footprint.
31. AC97 primary codec SDATA_IN0 should connect to SB's AC97_SDIN0 (Page 30)
32. R182 change to 11.8 k (Page 20)
33. Reserve D36, D37, and R1127 for XD detect issue. (Page24)
34. PCIE_PME# change to pin #D2 of SB. (Page 20)

Compal Electronics, Inc.


Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Date:
5

LAN RealTech8100BL
Document Number

Rev
0.6

LA-2421
Sheet

Wednesday, January 05, 2005


1

54

of

56

Update for SI

1. Applying CLK_STOP of ICS951418. (Page 16)


2. R176 change to 4.12k 1% (page 19)
3. Add pull down resistor for SYSON (R1135) and SUSP# (R319), due to TPS2231 internal pull-up when +3VALW present, EC can not control at the first 10 ms.
4. Reverse JP33 and JP34
5. TI CardReader workaround: add Q44, R1137, D38, and D39 to prevent signal output earlier than power up (page 24)
7. MU902's pin29 connect to AGND_LSD (page 31)
9. Change C621, C619, C628, and C625 to 0.01U from 0.1U (page 19)
10. DDR change to single channel from dual channel.
11. Swap pin40 and 44 of docking connector (JP6) for TV-out signal. (page 41)
12. Update from ATi AP note of SB, unsed SATA pins connect to GND. (page21).
13. Reserve R1138 for XD_WP# pin at socket side. (page 24)
14. Reserve U47 to generate independent +1.9VS to PCIE_PVDD and PCIE_VDDR. (page 19)
15. For KB910L, pin #94 is for DOCK_VOLBTN+# and pin #34 is for EC_GPIO16. (page 38)
16. Add R1141 on SUS_STAT# per ATI recommend. (page 13)
17. PR110 connect to +5V due to +3VS too dirty that will cause TV display garbage. (page 48)
18. Update PCIE connector (JP5) pin defined of #7, #8, and #9 and reserve backward compatible due to there are two different version of NewCard spec. (page 26)
19. GPP_RX0N/P connect to JP5.21/22 and PCIE_TX0N/P connect to JP5.24/25 (page 26)
20. Reserve D40 and D41 for NewCard hot-plug detected. (page 26)
21. Adjust AMP output to 10 dB: Add R237/R233, delete R236/R234. (page 32)
22. Change CP1 ~ CP6 to C1156 ~ C1179 due to cost saving. (page 36)
23. Add C1180 and C1181 for EMI requirement. (page 42)
24. Add C160 due to +3VS unstable. (page 42)
25. R1121 change to 0_0402_5% per TI recommend (page 24)

Update for SI-R (Rev 0.4)


1.
2.
3.
4.
5.
6.

DDR_SDM_L2 length mismatch (page 9)


Add U48 (TPS2211A) for PCI1510RGVF (page 25)
NC_CP# connects to U38.D3 for New Card hot-plug (page 20)
R51 and R77 change from 49.9_0402_1% to 61.9_0402_1% (page 11)
Change C621, C619, C628, and C625 to 0.1U from 0.01U --- ATI final decision for SB A22 RPO3 and future (page 19)
Q25 change from MMBT3906 to PDTA114EK and R228 change to 0_0402_5% due to Hitach HDD LED will not be turn off light. (page 36)

Update for SI-2 (Rev 0.4B)


B

1. Remove C27 due to Sempron CPU intermittent boot-up issue. (page 6)


2. Change Q39 to MMBT3904 due to CARD_LED is high active signal. (page 35)
3. D40 and D41 replace by R1146 and R1148 due to TPS2231 truth table treat both CPUUSB# andCPPE# as the same. (page 26)
4. R87 change to 8.06k_1% due to New Card eye-diagram issue. (page 12)

Update for PV (Rev 0.5)

1. Add R1149 and R1150 for headphone gain degrading. (page 32)
2. Modify AVDDTX and AVDDRX layout to improve USB signal quality.
3. Change wireless LED power from +5V to +5VS (page 35)
4. Follow TI layout guideline.
5. Change R1099 and R1100 to 2.2k per TI recommend for XD certification. (page 24)
6. Change LAN LED indicator color, Green is for link and Amber is for activity. (page 28)
7. Change R34, R35 and R259 from 1k to 680 base on AMD design guide. (page 6)
8. Change R286, R290, R473, and R486 from 100 to 15 base on AMD recommendation. (page 5/ 9)
9. Reserve C1182 at NB VDD_CORE and change C161 ~ C164, C136 ~C138, C153, C154, C156, C157 from 0.1uF to 1uF due to +1.2V_HT is not stable and clean. (page 14)
10. Delete R1083 due to SM card detect issue (quick or slow). (page 24)
11. Add C1183 ~ C1220, 1000pF or 220pF, on +2.5V, +1.25V, +CPU_CORE, +3V_CLK, +3VS, and +1.2V_HT for EMI require. (page 7/ 10/ 14/ 16/ 22)
12. Change R155, R162, R441, R444, and R448 from 22 ohm to 33 ohm due to EMI require. (page 19)
13. Wire MUTE_LED to JP6.15 due to HP docking spec V0.8 update (page 41)
14. Add C1151 and C1152 to isolate GND and change C61 and C241 from 0.1uF to 1000pF for EMI. (page 4)
15. Add C1221 ~ C1226 on +2.5VS for EMI (page 15)
Title
<Title>
16. Reserve C1227 and C1228 on EDID_CLK/DAT for EMI. (page 17)
Size
Document Number
17. Remove R64, R65, R69, and R70 due to EMI. (page 5)
CustomLA-2421
18. RTC battery change to CR2025 (165mAh) due to power consumption less than 5uA. (page 19)
Date:
Sheet
Thursday, January 06, 2005
5

Rev
0.6
55

of

56

Update for PV-2 (Rev 0.6)

1.
2.
3.
4.
5.
6.
7.

Delect R1138, wire WP# pins of XD and SM together (SM_EL_WP#) and series 3.3k ohm (R1082) to CLK per HP recommendation. (page 24)
Tie un-used inputs of U24 and U33 to GND. (page 40)
Delect all reserve 0 ohm resistors. (page 34)
Add C1229 for power (+CODEC_REF) stable on MIC_IN. (page 30)
R53 change to 91_0402_5% due to HT output from RS480 need to improve rising and falling time. (page 11)
Reserve R1153 ~ R1157 for SanDisk 256MB SD card overshoot and undershoot issue. (page 24)
De-feature mother board populate R274, and full-feature mother board populate R269 for 90W adapter protection. (page 37)

Title
<Title>
Size
Document Number
Custom<Doc>
Date:

Wednesday, January 05, 2005

Rev
0.6
Sheet

56

of

56

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