Huawei OptiX RTN 950 Radio Transmission System IDU Hardware Description

OptiX RTN 950 Radio Transmission System V100R001C02
IDU Hardware Description

Issue Date 02 2010-01-30
HUAWEI TECHNOLOGIES CO., LTD.
Copyright Huawei Technologies Co., Ltd. 2010. All rights reserved. No part of this document may be reproduced or transmitted in any form or by any means without prior written consent of Huawei Technologies Co., Ltd.
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Notice
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OptiX RTN 950 Radio Transmission System IDU Hardware Description
About This Document
About This Document

Related Versions
The following table lists the product versions related to this document. Product Name OptiX RTN 950 iManager U2000 Version V100R001C02 V100R001C00
Intended Audience
l l l l l l
Network planning engineer Hardware installation engineer Installation and commissioning engineer Field maintenance engineer Data configuration engineer System maintenance engineer
Before reading this document, you need to be familiar with the following:
l l
Basics of digital microwave communication Basics of the OptiX RTN 950
Symbol Conventions
The symbols that may be found in this document are defined as follows. Symbol Description Indicates a hazard with a high level of risk, which if not avoided, will result in death or serious injury.
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GUI Conventions
Symbol
Description Indicates a hazard with a medium or low level of risk, which if not avoided, could result in minor or moderate injury. Indicates a potentially hazardous situation, which if not avoided, could result in equipment damage, data loss, performance degradation, or unexpected results. Indicates a tip that may help you solve a problem or save time. Provides additional information to emphasize or supplement important points of the main text.
GUI Conventions
The GUI conventions that may be found in this document are defined as follows. Convention Boldface > Description Buttons, menus, parameters, tabs, window, and dialog titles are in boldface. For example, click OK. Multi-level menus are in boldface and separated by the ">" signs. For example, choose File > Create > Folder.
Update History
This document is the second release of the V100R001C02 version.
Updates in Issue 02 (2010-01-30) Based on Product Version V100R001C02

The updated contents are as follows. Update Location 2 Hardware Structure 3.1.6 DIP Switches and CF Card 4 Cables
iv
Description Deletes the section describing fibers and cables. Adds descriptions of the DIP switches and CF card. Adds description of cables to the IDU.
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Update History
Update Location 3 Boards
Description Adds the priorities of slots for housing each board.
Updates in Issue 01 (2009-09-30) Based on Product Version V100R001C02

This document is the first release of the V100R001C02 version.
Issue 02 (2010-01-30)
Contents
Contents
About This Document...................................................................................................................iii 1 Introduction to the Product......................................................................................................1-1
1.1 Network Application.......................................................................................................................................1-2 1.2 Equipment Type..............................................................................................................................................1-2
2 Hardware Structure....................................................................................................................2-1
2.1 Chassis.............................................................................................................................................................2-2 2.2 Boards..............................................................................................................................................................2-2
3 Boards...........................................................................................................................................3-1
3.1 CXPR..............................................................................................................................................................3-3 3.1.1 Version Description................................................................................................................................3-3 3.1.2 Functions and Features...........................................................................................................................3-3 3.1.3 Working Principle and Signal Flow.......................................................................................................3-4 3.1.4 Front Panel.............................................................................................................................................3-6 3.1.5 Valid Slots............................................................................................................................................3-10 3.1.6 DIP Switches and CF Card...................................................................................................................3-10 3.1.7 Board Configuration Reference...........................................................................................................3-13 3.1.8 Specifications.......................................................................................................................................3-13 3.2 IFE2...............................................................................................................................................................3-13 3.2.1 Version Description..............................................................................................................................3-14 3.2.2 Functions and Features.........................................................................................................................3-14 3.2.3 Working Principle and Signal Flow.....................................................................................................3-15 3.2.4 Front Panel...........................................................................................................................................3-17 3.2.5 Valid Slots............................................................................................................................................3-18 3.2.6 Board Configuration Reference...........................................................................................................3-18 3.2.7 Specifications.......................................................................................................................................3-19 3.3 IFU2..............................................................................................................................................................3-20 3.3.1 Version Description..............................................................................................................................3-20 3.3.2 Functions and Features.........................................................................................................................3-20 3.3.3 Working Principle and Signal Flow.....................................................................................................3-22 3.3.4 Front Panel...........................................................................................................................................3-25 3.3.5 Valid Slots............................................................................................................................................3-27 3.3.6 Board Configuration Reference...........................................................................................................3-28 Issue 02 (2010-01-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. vii
Contents
OptiX RTN 950 Radio Transmission System IDU Hardware Description 3.3.7 Technical Specifications......................................................................................................................3-28
3.4 IFX2..............................................................................................................................................................3-29 3.4.1 Version Description..............................................................................................................................3-30 3.4.2 Functions and Features.........................................................................................................................3-30 3.4.3 Working Principle and Signal Flow.....................................................................................................3-31 3.4.4 Front Panel...........................................................................................................................................3-35 3.4.5 Valid Slots............................................................................................................................................3-38 3.4.6 Board Configuration Reference...........................................................................................................3-38 3.4.7 Technical Specifications......................................................................................................................3-38 3.5 CD1...............................................................................................................................................................3-39 3.5.1 Version Description..............................................................................................................................3-40 3.5.2 Functions and Features.........................................................................................................................3-40 3.5.3 Working Principle and Signal Flow.....................................................................................................3-42 3.5.4 Front Panel...........................................................................................................................................3-44 3.5.5 Valid Slots............................................................................................................................................3-45 3.5.6 Board Configuration Reference...........................................................................................................3-45 3.5.7 Specifications.......................................................................................................................................3-46 3.6 EM6T/EM6F.................................................................................................................................................3-47 3.6.1 Version Description..............................................................................................................................3-48 3.6.2 Functions and Features.........................................................................................................................3-48 3.6.3 Working Principle and Signal Flow.....................................................................................................3-49 3.6.4 Front Panel...........................................................................................................................................3-52 3.6.5 Valid Slots............................................................................................................................................3-56 3.6.6 Board Configuration Reference...........................................................................................................3-56 3.6.7 Technical Specifications......................................................................................................................3-56 3.7 EF8T..............................................................................................................................................................3-58 3.7.1 Version Description..............................................................................................................................3-59 3.7.2 Functions and Features.........................................................................................................................3-59 3.7.3 Working Principle and Signal Flow.....................................................................................................3-59 3.7.4 Front Panel...........................................................................................................................................3-61 3.7.5 Valid Slots............................................................................................................................................3-62 3.7.6 Board Configuration Reference...........................................................................................................3-62 3.7.7 Specifications.......................................................................................................................................3-62 3.8 EF8F..............................................................................................................................................................3-63 3.8.1 Version Description..............................................................................................................................3-63 3.8.2 Functions and Features.........................................................................................................................3-63 3.8.3 Working Principle and Signal Flow.....................................................................................................3-64 3.8.4 Front Panel...........................................................................................................................................3-65 3.8.5 Valid Slots............................................................................................................................................3-66 3.8.6 Board Configuration Reference...........................................................................................................3-66 3.8.7 Specifications.......................................................................................................................................3-67 3.9 EG2................................................................................................................................................................3-67 viii Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. 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Contents
3.9.1 Version Description..............................................................................................................................3-68 3.9.2 Functions and Features.........................................................................................................................3-68 3.9.3 Working Principle and Signal Flow.....................................................................................................3-69 3.9.4 Front Panel...........................................................................................................................................3-70 3.9.5 Valid Slots............................................................................................................................................3-71 3.9.6 Board Configuration Reference...........................................................................................................3-71 3.9.7 Specifications.......................................................................................................................................3-71 3.10 ML1/ML1A.................................................................................................................................................3-73 3.10.1 Version Description............................................................................................................................3-73 3.10.2 Functions and Features.......................................................................................................................3-74 3.10.3 Working Principle and Signal Flow...................................................................................................3-75 3.10.4 Front Panel.........................................................................................................................................3-77 3.10.5 Valid Slots..........................................................................................................................................3-79 3.10.6 Board Configuration Reference.........................................................................................................3-79 3.10.7 Specifications.....................................................................................................................................3-79 3.11 PIU..............................................................................................................................................................3-80 3.11.1 Version Description............................................................................................................................3-81 3.11.2 Functions and Features.......................................................................................................................3-81 3.11.3 Working Principle and Signal Flow...................................................................................................3-81 3.11.4 Front Panel.........................................................................................................................................3-82 3.11.5 Valid Slots..........................................................................................................................................3-83 3.11.6 Specifications.....................................................................................................................................3-83 3.12 FAN.............................................................................................................................................................3-84 3.12.1 Version Description............................................................................................................................3-84 3.12.2 Functions and Features.......................................................................................................................3-84 3.12.3 Working Principle and Signal Flow...................................................................................................3-85 3.12.4 Front Panel.........................................................................................................................................3-86 3.12.5 Valid Slots..........................................................................................................................................3-87 3.12.6 Specifications.....................................................................................................................................3-87 3.13 AUXQ.........................................................................................................................................................3-87 3.13.1 Version Description............................................................................................................................3-88 3.13.2 Functions and Features.......................................................................................................................3-88 3.13.3 Working Principle and Signal Flow...................................................................................................3-89 3.13.4 Front Panel.........................................................................................................................................3-90 3.13.5 Valid Slots..........................................................................................................................................3-93 3.13.6 Board Configuration Reference.........................................................................................................3-94 3.13.7 Specifications.....................................................................................................................................3-94
4 Cables...........................................................................................................................................4-1
4.1 Power Cable.................................................................................................................................................... 4-3 4.2 IDU PGND Cable............................................................................................................................................4-3 4.3 Fiber Jumper....................................................................................................................................................4-4 4.4 IF Jumper.........................................................................................................................................................4-6 Issue 02 (2010-01-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. ix
Contents
4.5 XPIC Cable.....................................................................................................................................................4-7 4.6 E1 Cable..........................................................................................................................................................4-8 4.7 Network Cable...............................................................................................................................................4-12 4.8 Orderwire Cable............................................................................................................................................4-14
5 Power Consumption and Weight............................................................................................5-1 6 Indicators.....................................................................................................................................6-1 7 Label..............................................................................................................................................7-1

7.1 Safety Labels...................................................................................................................................................7-2 7.2 Optical Module Labels....................................................................................................................................7-4
A Glossary.....................................................................................................................................A-1 B Acronyms and Abbreviations.................................................................................................B-1
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Figures
Figures
Figure 1-1 Packet microwave transmission solution provided by the OptiX RTN 950.......................................1-2 Figure 1-2 IDU 950..............................................................................................................................................1-3 Figure 2-1 Slot allocation of the IDU 950............................................................................................................2-2 Figure 2-2 Board relations of the IDU 950.......................................................................................................... 2-4 Figure 3-1 Block diagram for the working principle of the CXPR......................................................................3-5 Figure 3-2 Front panel of the CXPR....................................................................................................................3-6 Figure 3-3 Positions of the DIP switches and CF card ......................................................................................3-11 Figure 3-4 Block diagram for the functions of the IFE2....................................................................................3-15 Figure 3-5 Front panel of the IFE2.....................................................................................................................3-17 Figure 3-6 Functional block diagram of the IFU2.............................................................................................3-22 Figure 3-7 Front panel of the IFU2....................................................................................................................3-25 Figure 3-8 Functional block diagram of the IFX2.............................................................................................3-32 Figure 3-9 Front panel of the IFX2....................................................................................................................3-35 Figure 3-10 Block diagram for the working principle of the CD1.....................................................................3-42 Figure 3-11 Appearance of the front panel of the CD1......................................................................................3-44 Figure 3-12 Functional block diagram...............................................................................................................3-50 Figure 3-13 Front panel of the EM6T................................................................................................................3-52 Figure 3-14 Front panel of the EM6F................................................................................................................3-52 Figure 3-15 Front view of the RJ-45 connector.................................................................................................3-54 Figure 3-16 Block diagram for the functions of the EF8T.................................................................................3-60 Figure 3-17 Font panel of the EF8T...................................................................................................................3-61 Figure 3-18 Block diagram for the functions of the EF8F.................................................................................3-64 Figure 3-19 Font panel of the EF8F...................................................................................................................3-66 Figure 3-20 Block diagram for the functions of the EG2...................................................................................3-69 Figure 3-21 Font panel of the EG2.....................................................................................................................3-70 Figure 3-22 Block diagram for the working principle of the ML1....................................................................3-76 Figure 3-23 Front panel of the ML1...................................................................................................................3-77 Figure 3-24 Front panel of the ML1A................................................................................................................3-77 Figure 3-25 Block diagram for the working principle of the PIU......................................................................3-81 Figure 3-26 Appearance of the front panel of the PIU.......................................................................................3-82 Figure 3-27 Block diagram for the working principle of the FAN....................................................................3-85 Figure 3-28 Appearance of the front panel of the FAN.....................................................................................3-86 Figure 3-29 Block diagram for the functions of the AUXQ..............................................................................3-89 Issue 02 (2010-01-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. xi
Figures
OptiX RTN 950 Radio Transmission System IDU Hardware Description Figure 3-30 Front panel of the AUXQ...............................................................................................................3-91 Figure 4-1 Power cable.........................................................................................................................................4-3 Figure 4-2 Appearance of IDU PGND cable.......................................................................................................4-4 Figure 4-3 LC/PC connector................................................................................................................................4-5 Figure 4-4 SC/PC connector.................................................................................................................................4-5 Figure 4-5 FC/PC connector.................................................................................................................................4-6 Figure 4-6 IF jumper............................................................................................................................................4-7 Figure 4-7 View of the XPIC cable......................................................................................................................4-8
Figure 4-8 E1 cable..............................................................................................................................................4-9 Figure 4-9 Network cable...................................................................................................................................4-13 Figure 4-10 Orderwire cable..............................................................................................................................4-15 Figure 7-1 Label position.....................................................................................................................................7-3
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Tables
Tables
Table 1-1 Basic features of the IDU 950..............................................................................................................1-3 Table 2-1 Boards supported by the IDU 950 and their valid slots.......................................................................2-2 Table 3-1 Functions and Features of the CXPR...................................................................................................3-3 Table 3-2 Types and usage of the interfaces on the CXPR..................................................................................3-7 Table 3-3 Pins of the ETH/OAM interface..........................................................................................................3-8 Table 3-4 Pins of the CLK1/TOD1 and CLK2/TOD2 interfaces.........................................................................3-8 Table 3-5 Pins of the EXT interface...................................................................................................................3-10 Table 3-6 Setting the DIP switches....................................................................................................................3-11 Table 3-7 IFE2 interface description..................................................................................................................3-18 Table 3-8 ODU power switch.............................................................................................................................3-18 Table 3-9 IF performance...................................................................................................................................3-19 Table 3-10 Baseband signals processing performance of the modem................................................................3-19 Table 3-11 Signal processing flow in the receive direction of the IFU2............................................................3-23 Table 3-12 Signal processing flow in the transmit direction of the IFU2..........................................................3-24 Table 3-13 Description of the indicators on the IFU2........................................................................................3-26 Table 3-14 Description of the Interfaces ...........................................................................................................3-27 Table 3-15 IF performance.................................................................................................................................3-28 Table 3-16 Baseband signal processing performance of the modem.................................................................3-28 Table 3-17 Mechanical behavior........................................................................................................................3-29 Table 3-18 Signal processing flow in the receive direction of the IFX2............................................................3-32 Table 3-19 Signal processing flow in the transmit direction of the IFX2..........................................................3-34 Table 3-20 Description of the indicators on the IFX2........................................................................................3-36 Table 3-21 Description of the interfaces............................................................................................................3-37 Table 3-22 IF performance.................................................................................................................................3-38 Table 3-23 Baseband signal processing performance of the modem.................................................................3-39 Table 3-24 Mechanical behavior........................................................................................................................3-39 Table 3-25 Functions and features of the CD1...................................................................................................3-40 Table 3-26 Interfaces on the CD1.......................................................................................................................3-45 Table 3-27 Mapping relation between the service type and C2 byte.................................................................3-46 Table 3-28 Mapping relation between the service type and V5 byte.................................................................3-46 Table 3-29 Specifications of the interfaces on the CD1.....................................................................................3-46 Table 3-30 Signal processing flow in the receive direction...............................................................................3-50 Table 3-31 Signal processing flow in the transmit direction..............................................................................3-51 Issue 02 (2010-01-30) Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. xiii
Tables
OptiX RTN 950 Radio Transmission System IDU Hardware Description Table 3-32 Description of the indicators on the EM6T/EM6F..........................................................................3-52 Table 3-33 Description of the interfaces on the EM6T/EM6F...........................................................................3-54 Table 3-34 Pin assignment of the RJ-45 connector in MDI mode.....................................................................3-54 Table 3-35 Pin assignment of the RJ-45 connector in MDI-X mode.................................................................3-55 Table 3-36 Description of the two indicators of the RJ-45 connector................................................................3-56 Table 3-37 Performance of the GE optical interface .........................................................................................3-57 Table 3-38 GE electric interface performance....................................................................................................3-57 Table 3-39 FE electric interface performance....................................................................................................3-58 Table 3-40 Mechanical behavior .......................................................................................................................3-58 Table 3-41 Functions and features of the EF8T.................................................................................................3-59 Table 3-42 Types and usage of interfaces on the EF8T..................................................................................... 3-62 Table 3-43 Pins of the RJ-45 connector of the EF8T.........................................................................................3-62 Table 3-44 Specifications of interfaces on the EF8T.........................................................................................3-63 Table 3-45 Functions and features of the EF8F................................................................................................. 3-64 Table 3-46 Interfaces of the EF8F......................................................................................................................3-66 Table 3-47 Specifications of the interfaces on the EF8F....................................................................................3-67 Table 3-48 Functions and Features of the EG2..................................................................................................3-68 Table 3-49 Types and usage of optical interfaces on the EG2...........................................................................3-71 Table 3-50 Specifications of the optical interfaces on the EG2......................................................................... 3-71 Table 3-51 Allocation of central wavelengths of 1000BASE-CWDM interfaces and related optical module code .............................................................................................................................................................................3-72 Table 3-52 Functions and features of the ML1.................................................................................................. 3-74 Table 3-53 Type and usage of the interface on the front panel of the ML1.......................................................3-78 Table 3-54 Pins of the Anea 96 interface...........................................................................................................3-78 Table 3-55 Specifications of the interfaces on the ML1/ML1A.........................................................................3-80 Table 3-56 Functions and features of the PIU....................................................................................................3-81 Table 3-57 Types and usage of the interfaces on the PIU..................................................................................3-83 Table 3-58 Technical specifications of the PIU................................................................................................. 3-84 Table 3-59 Technical specifications of the FAN................................................................................................3-87 Table 3-60 Functions and Features of the AUXQ..............................................................................................3-88 Table 3-61 Types and usage of the interfaces on the AUXQ.............................................................................3-91 Table 3-62 Pins of the PHONE interface........................................................................................................... 3-92 Table 3-63 Pins of the F1 interface.................................................................................................................... 3-92 Table 3-64 Pins of the ALMI interface.............................................................................................................. 3-93 Table 3-65 Pins of the ALMO interface.............................................................................................................3-93 Table 3-66 Technical specifications of the FE1 - FE4.......................................................................................3-94 Table 4-1 Specifications of the power cable.........................................................................................................4-3 Table 4-2 Technical specifications of the power cable and protection grounding cable......................................4-4 Table 4-3 Types of fiber jumpers.........................................................................................................................4-4 Table 4-4 Pin assignment of the 75-ohm E1 cable...............................................................................................4-9 Table 4-5 Pin assignment of the 120-ohm E1 cable...........................................................................................4-11 Table 4-6 Pin assignment of the MDI interface................................................................................................. 4-12 Table 4-7 Pin assignment of the MDI-X interface.............................................................................................4-13
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Tables
Table 4-8 Pin assignment of the straight through cable.....................................................................................4-13 Table 4-9 Pin assignment of the crossover cable...............................................................................................4-14 Table 4-10 Pin assignment of the orderwire cable.............................................................................................4-15 Table 5-1 Power consumption and weight...........................................................................................................5-1 Table 7-1 Label description..................................................................................................................................7-2 Table 7-2 Codes and types of optical modules.....................................................................................................7-4
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1 Introduction to the Product
1
About This Chapter
Introduction to the Product
This topic provides basic information on the OptiX RTN 950 and IDU 950 in terms of product application and equipment type. 1.1 Network Application The OptiX RTN 900 is a new generation split microwave transmission system developed by Huawei. It can provide a seamless Packet microwave transmission solution for a mobile communication network or private network. 1.2 Equipment Type The IDU 950 is the indoor unit of the OptiX RTN 950. The IDU 950 accesses services and performs multiplexing, IF processing, system communication and control function, and other functions. The IDU 950 works with the ODU to form the OptiX RTN 950 radio transmission system.
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1-1
1.1 Network Application

The OptiX RTN 900 is a new generation split microwave transmission system developed by Huawei. It can provide a seamless Packet microwave transmission solution for a mobile communication network or private network. The OptiX RTN 900 products are available in two types: OptiX RTN 910 and OptiX RTN 950. The IDU of the OptiX RTN 910 is 1U high and supports one or two IF boards. The IDU of the OptiX RTN 950 is 2U high and supports one to six IF boards. The users can choose an appropriate type based on the actual requirements. The OptiX RTN 950 provides several types of service interfaces and facilitates installation and flexible configuration. The solution can evolve based on the service changes that occur due to radio mobile network evolution. Thus, this solution can meet the transmission requirements of not only 2G and 3G networks, but also future LTE and 4G networks. Figure 1-1 shows the Packet microwave transmission solution that is provided by the OptiX RTN 950 for the mobile communication network. Figure 1-1 Packet microwave transmission solution provided by the OptiX RTN 950
FE FE E1
E1 IMA E1
E1 FE/GE IMA E1 Regional backhaul network GE E1 IMA E1 FE E1
OptiX RTN 910
NodeB
BTS
RNC
BSC
NOTE
In the solutions, the local backhaul network is optional. The OptiX RTN 950 can be connected to the RNC or the BSC directly.
1.2 Equipment Type

The IDU 950 is the indoor unit of the OptiX RTN 950. The IDU 950 accesses services and performs multiplexing, IF processing, system communication and control function, and other functions. The IDU 950 works with the ODU to form the OptiX RTN 950 radio transmission system.
1-2 Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd. Issue 02 (2010-01-30)
Table 1-1 lists the basic features of the IDU 950. Figure 1-2 shows the appearance of the IDU 950. Table 1-1 Basic features of the IDU 950 Item Chassis height Pluggable board Microwave type Microwave modulation scheme Adaptive modulation (AM)a function Number of microwave directions RF configuration mode Service type IDU 950 2U Supported Packet microwave QPSK/16QAM/32QAM/64QAM/128QAM/256QAM Supported 1 to 6 1+0 non-protection configuration, N+0 non-protection configuration (N5), and 1+1 protection configuration Transmits the accessed Ethernet services, TDM E1 services, or IMA E1 services in a uniform manner by using the MPLS/PWE3 technology.
NOTE
a: The AM technology realizes the automatic adjustment of modulation schemes depending on the quality of channel. The AM function can use the following modulation schemes: QPSK, 16QAM, 32QAM, 64QAM, 128QAM, and 256QAM.
Figure 1-2 IDU 950
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1-3
2 Hardware Structure
2
About This Chapter
Hardware Structure
The equipment hardware includes the chassis, boards, optical fibers, and cables. 2.1 Chassis The IDU 950 is case-shaped for easy deployment. 2.2 Boards Boards are the key hardware components of the equipment.
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2-1
2.1 Chassis
The IDU 950 is case-shaped for easy deployment. The dimensions of the IDU 950 are 442 mm (width) x 220 mm (depth) x 2 U (height, 1 U = 44.45 mm). The IDU 950 can be installed in the following:
l l l l l l l
ETSI cabinet (300 mm deep) ETSI cabinet (600 mm deep) 19 inch cabinet (450 mm deep) 19 inch cabinet (600 mm deep) Open rack Wall Desktop
Figure 2-1 shows the slot allocation of the IDU 950. Figure 2-1 Slot allocation of the IDU 950
SLOT 10 SLOT 9
SLOT 7 SLOT 11 SLOT 5 (1 Gbit/s) SLOT 3 (1 Gbit/s) SLOT 1 (2 Gbit/s)
SLOT 8 SLOT 6 (1 Gbit/s) SLOT 4 (1 Gbit/s) SLOT 2 (2 Gbit/s)
2.2 Boards
Boards are the key hardware components of the equipment.
Board Description and Valid Slots

Table 2-1 shows the boards supported by the IDU 950 and their valid slots. Table 2-1 Boards supported by the IDU 950 and their valid slots Board Name CXPR AUXQ Board Description System control, switching and timing board Auxiliary board, with 4xFE service interfaces
Valid Slot Slot 7 and slot 8 Slots 1-6
2-2
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Board Name IFE2
Board Description Packet IF board, which provides the packet-based microwave service. Universal IF board, which provides the hybrid microwave service and the packet-based microwave service. Universal IF board, which provides the hybrid microwave service and the packet-based microwave service, and supports the XPIC function of the hybrid microwave. 6-port RJ45 Ethernet/Gigabit Ethernet Interface Board 4-port RJ45 + 2 Port SFP Fast Ethernet/Gigabit Ethernet Interface Board 8xFE service interface board (electric interface) 8xFE service interface board (optical interface) 2xGE service interface board 16xE1 service processing board (75 ohms) 16xE1 service processing board (120 ohms) 1-channel STM-1 service processing board Power board Fan board
Valid Slot Slots 1-6
IFU2
Slots 1-6
IFX2
Slots 1-6
EM6T EM6F
Slots 1-6 Slots 1-6
EF8T EF8F EG2 ML1 ML1A CD1 PIU FAN

NOTE
Slots 1-6 Slots 1-6 Slots 1-6 Slots 1-6 Slots 1-6 Slots 1-6 Slot 9 and slot 10 Slot 11
l When housed in slot 1 or slot 2, the EG2 can process 2xGE signals. When housed in any other slot, the
second port of the EG2 is not available.

l The second port of the CD1 can be used for only the LMSP protection. l As the ML1 and ML1A have the same functions except for the match impedance, this document
describes only the ML1 instead of both.

l All the boards except the power board support hot plugging.
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2-3
Board Relations
The IDU 950 uses different boards to achieve various functions. Figure 2-2 shows board relations of the IDU 950.
NOTE
The service signals on each service board are connected to the service processing and forwarding module on the system control board.
Figure 2-2 Board relations of the IDU 950

1.Orderwire interface 2.Alarm interface 3.Transparent data interface 4.NM interface 5.NE serial interface 6.Clock interface 7.Time interface 8.Concatenation interface Microwave side Control and management module Packet microwave
Service side
4xFE 8xFE 8xFE 2xGE+4xFE 2xGE+4xFE 2xGE E1 C-STM-1
AUXQ EF8F EF8T EM6F EF6T EG2

ML1/ML1A
Service processing and forwarding module
IFE2/ IFU2/IFX2
Clock module CXPR
CD1
-48V/-60V -48V/-60V
Power module PIU
Heat dissipation module FAN
2-4
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3 Boards
3
About This Chapter
Boards
Boards of the IDU 950 include system control, cross-connect and protocol processing board, interface boards, packet microwave IF board, power supply board, and fan board. 3.1 CXPR This section describes the CXPR, which is the system control, cross-connect and protocol processing board, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.2 IFE2 This section describes the IFE2, which is a intermediate frequency (IF) board, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. The IFE2 board supports the DC-I power distribution mode. 3.3 IFU2 The IFU2 is a general IF board, which can support the Hybrid microwave transmission and Packet microwave transmission at the same time. The IFU2 board supports the DC-I power distribution mode. 3.4 IFX2 The IFX2 is a general IF board, which can support the XPIC function of the Hybrid microwave and Packet microwave. The IFX2 board supports the DC-I power distribution mode. 3.5 CD1 This section describes the CD1, which is a 1 x channelized STM-1 service processing board, in terms of the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.6 EM6T/EM6F The EM6T/EM6F is an FE/GE interface board, which provides four FE electrical interfaces and two GE interfaces. The EM6T has similar functions to the EM6F. The only difference is as follows: the GE interfaces on the EM6T always function as electrical interfaces whereas the GE interfaces on the EM6F use the SFP modules and therefore can function as two optical or electrical interfaces. The GE electrical interfaces on the EM6F and the EM6T are compatible with the FE electrical interfaces. 3.7 EF8T
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This section describes the EF8T, which is an interface board with eight FE electrical interfaces, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.8 EF8F This section describes the EF8F, which is an interface board with eight FE optical interfaces, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.9 EG2 This section describes the EG2, which is an interface board with two GE optical interfaces, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.10 ML1/ML1A This section describes the ML1/ML1A, which is a 16 x E1 electrical interface board, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.11 PIU This section describes the PIU, a power input unit, in terms of the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.12 FAN This section describes the FAN, a fan board, in terms of the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.13 AUXQ This section describes the AUXQ, which is an auxiliary interface and 4 x FE electrical interface board, with regard to the version, functions and features, working principle, front panel, valid slots, and technical specifications.
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3.1 CXPR
This section describes the CXPR, which is the system control, cross-connect and protocol processing board, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.1.1 Version Description The functional version of the CXPR is SL91. 3.1.2 Functions and Features The CXPR controls the system, grooms services, processes the clock, and provides auxiliary interfaces. 3.1.3 Working Principle and Signal Flow The CXPR mainly consists of the service processing and grooming module, system control module, clock processing module, auxiliary interface module, and power supply module. 3.1.4 Front Panel On the front panel of the CXPR, there are indicators, buttons, and interfaces. 3.1.5 Valid Slots The CXPR can be housed in slot 7 or slot 8. The slot priority order is slot 7 > slot 8. 3.1.6 DIP Switches and CF Card This board has a set of DIP switches and a pluggable CF card. 3.1.7 Board Configuration Reference You can use the U2000 to set parameters for the CXPR. 3.1.8 Specifications The technical specifications of the CXPR include board dimensions, and weight.
3.1.1 Version Description

The functional version of the CXPR is SL91.
3.1.2 Functions and Features

The CXPR controls the system, grooms services, processes the clock, and provides auxiliary interfaces. Table 3-1 lists the functions and features of the CXPR. Table 3-1 Functions and Features of the CXPR Function and Feature Basic funtion Description Cross-connect capacity 8 Gbit/s
Supports switching, control, and clock management. Supports the board-level 1+1 backup function.
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Function and Feature Auxiliary interface function
Description Provides two clock/time input/output interfaces and provides the synchronization time source and clock source for the equipment. Provides one 10 Mbit/s/100 Mbit/s auto-sensing Ethernet NM interface or NM serial interface for communication with the NMS. Provides one 10 Mbit/s/100 Mbit/s auto-sensing extended Ethernet interface for communication.
Tact switches
Provides two tact switches. When you rotate the ejector levers to remove the board, the two tact switches are triggered to start the active/standby protection switching.
NOTE When you rotate only one ejector lever, the protection switching is not triggered. The protection switching is triggered only when you rotate the two ejector levers.
3.1.3 Working Principle and Signal Flow

The CXPR mainly consists of the service processing and grooming module, system control module, clock processing module, auxiliary interface module, and power supply module. Figure 3-1 shows the block diagram for the working principle of the CXPR.
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Figure 3-1 Block diagram for the working principle of the CXPR
Backplane
NM pass-through The other CXPR
NM network interface/ serial interface 2-channel time/clock input/output interface Extended network interface
NM communication
System control module CPU control unit

Active/standby board communication bus The other CXPR
Auxiliary interface module
NM serial interface
Time/clock signals
Time/clock signals
Management bus
Time/clock signals
Clock processing module
Time/clock signals
Logic control unit
Clock Signal
Interface boards
Management bus
Under-voltage/ over-voltage detection bus
Service processing and grooming module
Service signals Interface boards Service communication bus The other CXPR
Power supply module
-48 V/-60 V -48 V/-60 V 12 V 3.3 V
PIU PIU FAN Interface Boards
Service Processing and Grooming Module

This module performs the following functions:
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Grooms services with 8 Gbit/s switching capacity. Supports automatic switching and manual switching of the active and standby boards.
System Control Module

This module mainly consists of the CPU control unit and logic control unit, which perform the following functions:
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The CPU control unit works with the logic control unit to detects alarms and hardware faults, control boards, process overhead, and manage the equipment. The logic control unit provides interfaces through which the CPU control unit connects to other chips on the board. The logic control unit specifies the working states of chips, initializes chips, and operates the register. In addition, the logic control unit achieves log control on active/standby switching, monitors the working state of the board, and detects the states of other boards.
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Clock Processing Module

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Provides working clock signals for the key chips on the CXPR. Supports the physical-layer clock synchronization, and provides system clock signals for each boards. Processes the IEEE 1588V2 protocol to achieve clock/time synchronization.
Auxiliary Interface Module

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Provides one NM Ethernet interface or NM serial interface. Provides two clock/time input/output interfaces, which can be configured to different working modes. Provides one extended Ethernet interface.
Power Supply Module

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Accesses two -48 V DC/-60 V DC power supplies. Detects and reports overvoltage and undervoltage of two input power supplies. Supplies 12 V power for the FAN board. Supplies 3.3 V working power for the local board and the interface boards in a centralized manner.
3.1.4 Front Panel

On the front panel of the CXPR, there are indicators, buttons, and interfaces.
Appearance of the Front Panel

Figure 3-2 shows the appearance of the front panel of the CXPR. Figure 3-2 Front panel of the CXPR
Indicator
The following indicators are present on the front panel of the CXPR:
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STAT indicator, red, orange or green, which indicates the board working status
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PROG indicator, red or green, which indicates the running status of the program SYNC indicator, red or green, which indicates the synchronization status ACTX indicator, green, which indicates the switching status ACTC indicator, green, which indicates the status of the system control unit
For details on meanings of indicators, see 6 Indicators.
Button
The following buttons are present on the front panel of the CXPR:
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CF RCV button, which is used to restore the configuration data from the CF card. When you press the CF RCV button for 5 seconds, the equipment automatically restores the configuration data from the CF card. RST button, which is used for warm reset on the board. When you press the RST button and then release it, the board is reset (warm). LAMP, which is used to test the indicators on the board. When you press the LAMP button, all the board indicators on the NE, except the Ethernet service interface indicators, should be on.
Switch for the Ejector Lever

On the front panel, there are two switches for the two ejector levers on the front panel. To remove a board, you need to push the two switches to the middle and then rotate the ejector levers.
Interface
Table 3-2 lists the types and usage of the interfaces on the CXPR. Table 3-2 Types and usage of the interfaces on the CXPR Interface on the Front Panel ETH OAM Interface Type RJ-45 Usage 10M/100M auto-sensing Ethernet NM interface or NM serial interface Phase/frequency input/ output interface Phase/frequency input/ output interface 10M/100M auto-sensing Ethernet extended NM concatenation interface Pin For details, see Table 3-3. For details, see Table 3-4. For details, see Table 3-4. For details, see Table 3-5.
CLK1/TOD1 CLK2/TOD2 EXT
RJ-45 RJ-45 RJ-45
Table 3-3 lists the pins of the ETH/OAM interface.

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Table 3-3 Pins of the ETH/OAM interface Front View Pin 1 2 3

8 7 6 5 4 3 2 1
Usage Transmit positive of the NM interface Transmit negative of the NM interface Receive positive of the NM interface Grounding end of the NM serial interface Receive end of the NM serial interface Receive negative of the NM interface undefined Transmit end of the NM serial interface
4 5 6 7 8
Table 3-4 lists the pins of the CLK1/TOD1 and CLK2/TOD2 interfaces. Table 3-4 Pins of the CLK1/TOD1 and CLK2/TOD2 interfaces Front View Pin Working Mode External Clock External Time Input (1PPS + Time Informatio n) 1 Negative receive end of external clock Positive receive end of external clock Unspecified External Time Output (1PPS + Time Informatio n) Unspecified Unspecified Unspecified External Time Input (DCLS) External Time Output (DCLS)
2
8 7 6 5 4 3 2 1
Unspecified
Unspecified
Unspecified
Unspecified
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Front View
Pin
Working Mode External Clock External Time Input (1PPS + Time Informatio n) External Time Output (1PPS + Time Informatio n) Negative output for the 1pps signal (RS422 level) Negative input for the DCLS time signal (RS422 level) Grounding end Grounding end Negative output for the DCLS time signal (RS422 level) Grounding end External Time Input (DCLS) External Time Output (DCLS)
Unspecified
Negative input for the 1pps signal (RS422 level)
Negative transmit end of external clock Positive transmit end of external clock Unspecified
Grounding end
Grounding end
Grounding end
Grounding end
Grounding end
Positive input for the 1pps signal (RS422 level)
Positive output for the 1pps signal (RS422 level)
Positive input for the DCLS time signal (RS422 level)
Positive output for the DCLS time signal (RS422 level) Unspecified
Unspecified
Negative input for time information (RS422 level)
Negative output for time information (RS422 level) Positive output for time information (RS422 level)
Unspecified
Unspecified
Positive input for time information ()RS422 level
Unspecified
Unspecified
NOTE
The CLK1/TOD1 and CLK2/TOD2 interfaces can be configured so that they can work in one of the preceding five working modes.
Table 3-5 lists the pins of the EXT interface.

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Table 3-5 Pins of the EXT interface Front View Pin 1 2 3

8 7 6 5 4 3 2 1
Usage Transmit positive of the extended Ethernet interface Transmit negative of the extended Ethernet interface Receive positive of the extended Ethernet interface Receive negative of the extended Ethernet interface -
4 5 6 7 8
3.1.5 Valid Slots

The CXPR can be housed in slot 7 or slot 8. The slot priority order is slot 7 > slot 8.
3.1.6 DIP Switches and CF Card

This board has a set of DIP switches and a pluggable CF card. Different values of the DIP switches correspond to different functions of the DIP switches. The CF card stores the following information:
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All the data of the NE, including the NE ID, NE IP address, and service data NE software and all the board software programs All the FPGA files
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Figure 3-3 Positions of the DIP switches and CF card
ON DIP
1 2 3 4
1. DIP switches Table 3-6 Setting the DIP switches Setting of the DIP Switches a 4 0 3 0 2 0
2. CF card
Function 1 0 Normal operating state when the watchdog is enabled. Reserved. Memory selfcheck state. Commissioning state. Operating state when the watchdog is disabled and the full memory check is performed.
0 0 0 0
0 0 0 1
0 1 1 0
1 0 1 0
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Setting of the DIP Switches a 4 0 0 0 3 1 1 1 2 0 1 1 1 1 0 1
Function
BIOS holdover state. BIOS exhibition state. Reserved (by default, operating state when the watchdog is started). Reserved (by default, operating state when the watchdog is started). To recover the data of the CF card. To erase the data in the system parameter area. To erase the databases. To erase the NE software, including the patches. To erase the databases and NE software (including the patches). To format the file system, that is, to erase all the data in the file system.
1 1
0 1
1 0
1 0
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Setting of the DIP Switches a 4 1 3 1 2 1 1 1
Function
To format the file system so that all the data is erased (file system + extended BIOS + system parameter area).
NOTE
a: When a DIP switch is turned to the numeral side, it represents the binary digit 1. When a DIP switch is turned to the letter side, it represents the binary digit 0.
3.1.7 Board Configuration Reference

You can use the U2000 to set parameters for the CXPR. You can use the U2000 to set the following parameter for the CXPR. External clock/time interface
3.1.8 Specifications
The technical specifications of the CXPR include board dimensions, and weight. Board dimensions (mm): 22.86 (H) x 225.75 (D) x 193.80 (W) Weight (kg): 0.66
3.2 IFE2
This section describes the IFE2, which is a intermediate frequency (IF) board, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. The IFE2 board supports the DC-I power distribution mode. 3.2.1 Version Description The functional version of the IFE2 is TND1. 3.2.2 Functions and Features The IFE2 receives and transmits one IF signal, and provides the management channel to the ODU and the -48 V DC power that the ODU requires. 3.2.3 Working Principle and Signal Flow The IFE2 consists of the combiner interface module, IF processing module, MODEM module, SMODEM module, MUX/DEMUX module, control module, power module, and clock module. 3.2.4 Front Panel There are indicators, an IF port, an ODU power switch, and labels on the front panel. 3.2.5 Valid Slots
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The IFE2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 3 and 5 > slots 4 and 6 > slots 1 and 2. 3.2.6 Board Configuration Reference You can use the U2000 to set parameters for the IFE2. 3.2.7 Specifications The technical specifications of the IFE2 include the IF performace, baseband signals processing performance of the Modem, board dimensions, and weight.

The functional version of the IFE2 is TND1.

The IFE2 receives and transmits one IF signal, and provides the management channel to the ODU and the -48 V DC power that the ODU requires. The functions and features of the IFE2 are as follows:
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IF Processing

Supports the Adaptive Modulation function. Performs mapping and demapping between packet service signals and microwave frame signals. Codes and decodes microwave frame signals. Modulates and demodulates microwave frame signals. Modulates and demodulates ODU control signals. Combines and splits service signals, ODU control signals, and -48 V DC power supplies. Supports the automatic transmit power control (ATPC) function. Processes the overheads of the microwave frame. Supports the setting and querying of the Link ID. Supports 1+1 HSB/FD/SD protection. Supports 1+1 FD/SD hitless switching. Supports inloop and outloop at the IF port.
NOTE
Overhead Processing

Protection Processing

Maintenance Features
When the IF port works in Layer 3 mode, the loopback function is invalid because the IP protocol is used to process data packets.

support the PRBS test for the IF ports. Supports the detecting of the board temperature. Supports cold resetting of the board. Supports the querying of the manufacturing information of the board. Supports the in-service upgrade of the FPGA.
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The IFE2 consists of the combiner interface module, IF processing module, MODEM module, SMODEM module, MUX/DEMUX module, control module, power module, and clock module. Figure 3-4 shows the block diagram for the functions of the IFE2. Figure 3-4 Block diagram for the functions of the IFE2
Backplane
ODU control signal
SMODEM module
CXP
IF
Combiner interface module
Service signal IF processing module MODEM module MUX/ DEMUX module
HSM signal Service bus
Paried board CXP
Control bus
Control module
Control bus CXP
Power module
Clock module
NOTE
In the block diagram, the CXP on the backplane indicates the system control, cross-connect and protocol processing board. For OptiX RTN 950, the CXP indicates the CXPR board.
Combiner Interface Module

Divides the ODU control signal and the microwave service signal from the IF signal in the receive direction. Combines the ODU control signal, microwave service signal, and -48 V power supplies, and sends them to the IF cable in the transmit direction.
IF Processing Module
In the receive direction,
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Controls the level of the service signal through the automatic gain control (AGC) circuit. Filters the signal.
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Performs A/D conversion. Performs D/A conversion. Performs analog modulation.
In the transmit direction,

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MODEM Module
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Performs digital demodulation. Performs time domain adaptive equalization. Performs FEC decoding and generates the corresponding alarms. Performs FEC coding. Performs digital modulation.

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MUX/DEMUX Module
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Detects the microwave frame header and generates the corresponding alarms and performance events. Verifies the check code in the microwave frame and generates the corresponding alarms and performance events. Checks the Link ID and generates the corresponding alarms. Detects the changes in the ATPC message in the microwave frame and the changes in the microwave RDI, and reports the changes to the CXPR through the control module. Extracts the overheads from the microwave frame and sends it to the logic processing module. Extracts the packet service signals from the microwave frame and sends the signals to the CXPR. Sets microwave frame overheads. Combines the packet service signals and microwave frame overheads to form microwave frames.
NOTE
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In 1+1 FD/SD, the MUX/DEMUX unit sends the service signal to the MUX/DEMUX unit of the paired board. The MUX/DEMUX unit of the main IF board selects a better signal for later processing.
SMODEM Module
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Demodulates the ODU control signal. Transmits the ODU control signal to the CXPR.
In the transmit direction, modulates the ODU control signal that is transmitted from the CXPR.
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Control Module
Controls the reading and writing on the chip, resetting of the chip, and fault detection on the chip.
Clock Module
This unit performs the following functions:
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Provides the working clock for each unit on the board. Detects and restores the link clock. Supports the IEEE 1588V2 protocol.
Power Module
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Supports two inputs of -48 V DC/-60 V DC power. Converts the input -48 V DC/-60 V DC power into the DC voltages required by the modules and provides a backup for 3.3 V power. Provides -48 V power for the ODU.
3.2.4 Front Panel

There are indicators, an IF port, an ODU power switch, and labels on the front panel.

Figure 3-5 shows the front panel of the IFE2. Figure 3-5 Front panel of the IFE2
Indicators
The following indicators are present on the front panel of the IFE2.
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Board status indicator (STAT) - two colors (red and green) Service status indicator (SRV) - three colors (red, yellow, and green) Radio link status indicator (LINK) - one color (green) ODU status indicator (ODU) - three colors (red, yellow, and green) Remote end status indicator (RMT) - one color (yellow) Protection status indicator (ACT) - one color (green)

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Interfaces
Table 3-7 IFE2 interface description Interface IF Interface Type TNC Usage IF port
ODU power switch

Table 3-8 ODU power switch Switch ODU-PWRa Usage ODU power switch
NOTE
a: The ODU-PWR switch is equipped with a lockup device. To move the switch, you need to first pull out the switch lever partially. When the switch is set to "O", it indicates that the circuit is open. When the switch is set to "I", it indicates that the circuit is closed.
Labels
There is a high temperature warning label, an operation warning label, and an operation guidance label on the front panel.
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The high temperature warning label suggests that the board surface temperature may exceed 70C when the ambient temperature is higher than 55C. In this case, you need to wear protective gloves before touching the board. The operation warning label suggests that the ODU-PWR switch must be turned off before the IF cable is removed. The operation guidance label suggests that you must pull the switch lever outwards slightly before setting the switch to the "I" or "O" position.
3.2.5 Valid Slots

The IFE2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 3 and 5 > slots 4 and 6 > slots 1 and 2. When being configured in 1+1 FD/SD protection mode, the IFE2 boards must be housed in paired slots. The paired slots supported by the IDU 950 are as follows: (slot 1, slot 2), (slot 3, slot 5), and (slot 4, slot 6).

You can use the U2000 to set parameters for the IFE2. You can use the U2000 to set the following parameter for the IFE2: Microwave interface
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To configure the microwave interface, set the general attributes, IF attributes, Layer 2 attributes, Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the IF parameters, link-layer parameters, network-layer parameters, link identifier, and loopback mode for the microwave interface.
The technical specifications of the IFE2 include the IF performace, baseband signals processing performance of the Modem, board dimensions, and weight.
IF Performance
Table 3-9 IF performance Item IF service signal Transmit frequency of the IF board (MHz) Receive frequency of the IF board (MHz) ODU O&M signal Modulation scheme Transmit frequency of the IF board (MHz) Receive frequency of the IF board (MHz) Impedance (ohm) Performance 350
140 ASK 5.5
10 50
Baseband Signals Processing Performance of the Modem

Table 3-10 Baseband signals processing performance of the modem Item Encoding mode Adaptive timedomain equalizer for baseband signals Description Low-density parity check code (LDPC) encoding. supported.
Other Specifications
Other specifications of the IFE2 are as follows:
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Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) Weight (kg): 0.53
3.3 IFU2
The IFU2 is a general IF board, which can support the Hybrid microwave transmission and Packet microwave transmission at the same time. The IFU2 board supports the DC-I power distribution mode.
NOTE
In this version, the IFU2 supports only the Packet microwave transmission.
3.3.1 Version Description The functional version of the IFU2 is SL91. 3.3.2 Functions and Features The IFU2 receives and transmits one Hybrid/Packet IF signal, provides the management channel to the ODU, and supplies the required -48 V power to the ODU. 3.3.3 Working Principle and Signal Flow This topic considers the processing of one Hybrid microwave IF signal as an example to describe the working principle and signal flow of the IFU2. 3.3.4 Front Panel There are indicators, an IF interface, labels and an ODU power switch on the front panel. 3.3.5 Valid Slots The IFU2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3 and 5 > slots 4 and 6 > slots 1 and 2. 3.3.6 Board Configuration Reference You can use the U2000 to set parameters for the IFU2. 3.3.7 Technical Specifications This topic describes the board specifications, including IF performance, modem performance, board mechanical behavior and board power consumption.

The functional version of the IFU2 is SL91.

The IFU2 receives and transmits one Hybrid/Packet IF signal, provides the management channel to the ODU, and supplies the required -48 V power to the ODU.
IF Processing
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Supports the Hybrid microwave frames, and supports the pure transmission of E1 or Ethernet signals and the hybrid transmission of E1 and Ethernet signals. Supports the Packet microwave frames and supports the packet service transmission. Supports the adaptive modulation (AM) technology. Maps service signals into microwave frame signals.
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Codes and decodes microwave frame signals. Modulates and demodulates microwave frame signals. Modulates and demodulates ODU control signals. Combines and splits service signals, ODU control signals, and -48 V power supplies. Provides a maximum of 56 MHz signal bandwidth and supports the highest modulation mode of 256QAM.
Overhead Processing
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Processes the overheads of the Hybrid/Packet microwave signals. Supports the setting and query of the link ID.
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Supports 1+1 HSB/FD/SD protection. Supports 1+1 FD/SD hitless switching.

NOTE
For details on the 1+1 HSB, 1+1 FD, 1+1 SD, see the OptiX RTN 950 Radio Transmission System Feature Description.
Alarms and Performance Events

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Reports various alarms and performance events. Supports the alarm management functions such as setting the alarm reversion function and setting the BER threshold. Supports the performance event management functions such as setting the performance thresholds and setting the automatic reporting of 15-minute/24-hour performance events.
NOTE
For details about the alarm management and performance event management functions, see the OptiX RTN 950 Radio Transmission System Maintenance Guide.
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Supports the inloop and outloop over IF interfaces. Supports the inloop and outloop at composite ports. Supports the MAC inloop at IFETH ports. Supports the PRBS BER test over IF interfaces. Supports the detection of the board temperature. Supports the monitoring of the power supply and the clock. Supports the detection of the board voltage. Supports the detection of the board clock. Supports the cold reset on the board. Supports the query of the board manufacturing information. Supports the in-service upgrade of the FPGA.
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NOTE
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For details on the loopback function, see the OptiX RTN 950 Radio Transmission System Maintenance Guide. A warm reset causes the reset on the board software unit in the system control and communication unit but does not affect the services. A cold reset causes the reset on the board software unit in the system control and communication unit, the initiation of the board (if the board has the FPGA, the FPGA is reloaded), and a service interruption.

This topic considers the processing of one Hybrid microwave IF signal as an example to describe the working principle and signal flow of the IFU2.
NOTE
The working principle and signal flow of the Packet microwave IF signals are similar to the working principle and signal flow of the Hybrid microwave IF signals. The only difference is with regard to the frame structure. In the case of the Packet microwave, the MUX/DEMUX unit only multiplexes/ demultiplexes the packet services and does not transmit the TDM services to the cross-connect unit or receive the TDM services from the cross-connect unit.
Functional Block Diagram

Figure 3-6 Functional block diagram of the IFU2
SMODEM unit ODU control signal Backplane System control and communication unit HSM switching signal Service bus
Overhead bus
Paired board
Cross-connect unit System control and communication unit
Logic processi ng unit
MUX/DEMUX unit
IF processing unit
Combiner interface unit
IF
MODEM Microwave frame unit signal
Ethernet processin g unit
GE bus
Packet switching unit
Control bus
System control and communication unit Logic control unit
-48 V power supplied to the ODU +3.3 V power supplied to the other units on the board +3.3 V power supplied to the monitoring circuit Clock signal provided to the other units on the board
Power supply unit
-48 V1 -48V2 +3.3 V
Clock unit
System clock signal
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Signal Processing Flow in the Receive Direction

Table 3-11 Signal processing flow in the receive direction of the IFU2 Step 1 2 Functional Module Combiner interface unit SMODEM unit Processing Flow Separates the ODU control signal and the microwave service signal from the IF signal.
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Demodulates the ODU control signal. Transmits the ODU control unit to the system control and communication unit. Filters the signal. Performs the ADC sampling. Performs A/D conversion. Performs digital demodulation. Performs time domain adaptive equalization. Performs FEC decoding and generates the corresponding alarms. Detects the Hybrid microwave frame header and generates the corresponding alarms and performance events. Verifies the check code and generates the corresponding alarms and performance events. Checks the link ID and generates the corresponding alarms. Detects the changes in the ATPC message and the microwave RDI, and reports the changes to the system control and communication unit through the control bus. Extracts the orderwire bytes, auxiliary channel bytes including the F1 and SERIAL bytes, DCC bytes, and SSM bytes to form a 2 Mbit/s overhead signal, and transmits the 2 Mbit/s overhead signal to the logic processing unit. Maps the E1 signals in the Hybrid microwave service signals to the specific positions in the VC-4s and then transmits the VC-4s to the logic processing unit. Transmits the Ethernet signals in the Hybrid microwave service signals to the ethernet processing unit. Processes the GE signals received from the MUX/ DEMUX unit. Sends the processed signals to the packet switching unit.
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IF processing unit
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MODEM unit
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MUX/DEMUX unit
Ethernet processing unit
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Step 7
Functional Module Logic processing unit
Processing Flow
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Processes the clock signal. Multiplexes the 2 Mbit/s overhead signals into an 8 Mbit/s overhead signal and transmits the 8 Mbit/s overhead signal to the system control and communication unit. Each 2 Mbit/s overhead signal occupies a 2 Mbit/s timeslot in the 8 Mbit/s overhead bandwidth. Transmits the VC-4 signal and pointer indication signal to the main and standby cross-connect units.
NOTE
In the 1+1 FD/SD mode, the MUX/DEMUX unit transmits the service signals by HSM bus to the MUX/DEMUX unit of the paired board. The MUX/DEMUX unit of the paired board selects the signal of higher quality for subsequent processing.
Signal Processing Flow in the Transmit Direction

Table 3-12 Signal processing flow in the transmit direction of the IFU2 Step 1 Functional Module Logic processing unit Processing Flow
l l
Processes the clock signal. Demultiplexes the 8 Mbit/s overhead signal into 2 Mbit/s overhead signals. Receives the VC-4 signal and pointer indication signal from the cross-connect unit. Receives the GE signal from the packet switching unit. Processes the GE signals. Demaps E1 signals from the VC-4 signal. Sets the Hybrid microwave frame overheads. Combines the E1 signals, Ethernet signals, and microwave frame overheads to form microwave frames. Performs FEC coding. Performs digital modulation. Performs D/A conversion. Performs analog modulation. Filters the signal. Amplifies the signals.
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MODEM unit
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IF processing unit
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Step 7 8
Functional Module SMODEM unit Combiner interface unit
Processing Flow Modulates the ODU control signal that is transmitted from the system control and communication unit. Combines the ODU control signal, microwave service signal, and -48 V power supplies, and transmits the combined signals to the IF cable.
Control Signal Processing Flow

The board is directly controlled by the CPU unit of the system control and communication unit. The CPU unit issues the configuration data and query commands to the other units of the board through the control bus. The command responses, alarms, and performance events are also reported to the CPU unit through the control bus. The logic control unit decodes the read/write address signals from the CPU unit of the system control and communication unit.
Power Supply Unit

l
This unit receives the -48 V power from the power supply bus in the backplane, performs the start-delay, filtering, and DC-DC conversion, and then supplies the -48 V power to the ODU. This unit receives the -48 V power from the power supply bus in the backplane, performs the start-delay, filtering, and DC-DC conversion, and then supplies the +3.3 V power to the other units on the IFU2.
Clock Unit
This unit receives the system clock from the control bus in the backplane and provides the clock signal to the other units on the board.
3.3.4 Front Panel

There are indicators, an IF interface, labels and an ODU power switch on the front panel.
Front Panel Diagram

Figure 3-7 Front panel of the IFU2
IFU2
ODU-PWR
STAT SRV LINK ODU RMT ACT
IF
-48V OUTPUT TURN OFF POWER BEFORE DISCONNECTING IF CABLE
WARNING
I
PULL
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Indicators
Table 3-13 Description of the indicators on the IFU2 Indicator STAT State On (green) On (red) Off Meaning The board is working normally. The board hardware is faulty.
l l l
The board is not working. The board is not created. There is no power supplied to the board.
SRV
On (green) On (red)
The services are normal. Indicates that a critical or major alarm occurs in the service. A minor or remote alarm occurs in the services. The services are not configured. The space link is normal. The space link is faulty. The ODU works normally.
l
On (yellow) Off LINK On (green) On (red) ODU On (green) On (red)
The ODU has critical or major alarms. No power is supplied.
On (yellow) On for 300 ms (yellow) and off for 300 ms repeatedly RMT On (yellow) Off
The ODU has minor alarms. The antennas are not aligned. The equipment at the opposite end reports an RDI. The equipment at the opposite end does not report an RDI.
l
ACT
On (green)
The board is in the active state in the 1+1 protection system. The board is already activated in the unprotected system.
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Indicator
State Off
Meaning
l
The board is in the standby state in the 1+1 protection system. The board is not activated in the unprotected system.
Interface and Switch

Table 3-14 Description of the Interfaces Interface IF ODU-PWRa Description IF interface ODU power switch Connector Type TNC Corresponding Cable IF jumperb -
NOTE
a: The ODU-PWR switch is equipped with a lockup device. To turn on or turn off the switch, you need to first pull the switch lever outwards slightly. When the switch is set to "O", it indicates that the circuit is open. When the switch is set to "I", it indicates that the circuit is closed. b: The 5D IF cable is directly connected to the IF board. Hence, when the 5D IF cable is used, the IF jumper is not required.
Labels
There is a high temperature warning label, an operation warning label, and an operation guidance label on the front panel. The high temperature warning label indicates that the board surface temperature may exceed 70C when the ambient temperature is higher than 55C. In this case, you need to wear protective gloves before handling the board. The operation warning label indicates that you must turn off the ODU-PWR switch before removing the IF cable. The operation guidance label indicates that you need to pull the switch outward slightly before setting the switch to the "I" or "O" position.
3.3.5 Valid Slots

The IFU2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3 and 5 > slots 4 and 6 > slots 1 and 2. When being configured in 1+1 FD/SD protection mode, the IFU2 boards must be housed in paired slots. The paired slots supported by the IDU 950 are as follows: (slot 1, slot 2), (slot 3, slot 5), and (slot 4, slot 6).
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You can use the U2000 to set parameters for the IFU2. You can use the U2000 to set the following parameter for the IFU2: Microwave interface To configure the microwave interface, set the general attributes, IF attributes, Layer 2 attributes, Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the IF parameters, link-layer parameters, network-layer parameters, link identifier, and loopback mode for the microwave interface.
3.3.7 Technical Specifications

This topic describes the board specifications, including IF performance, modem performance, board mechanical behavior and board power consumption.
IF Performance
Table 3-15 IF performance Item IF signal Transmit frequency of the IF board (MHz) Receive frequency of the IF board (MHz) Impedance (ohm) ODU O&M signal Modulation mode Transmit frequency of the IF board (MHz) Receive frequency of the IF board (MHz) ASK 5.5 10 350 140 50 Performance
Baseband Signal Processing Performance of the Modem

Table 3-16 Baseband signal processing performance of the modem Item Encoding mode Performance The LDPC encoding is performed for the Hybrid microwave signals.
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Item Adaptive timedomain equalizer for baseband signals
Performance Supported
Mechanical Behavior
Table 3-17 Mechanical behavior Item Dimensions Weight Performance 19.82 mm (height) x 196.70 mm (depth) x 193.80 mm (width) 0.79 kg
Power Consumption
Power consumption: < 23 W
3.4 IFX2
The IFX2 is a general IF board, which can support the XPIC function of the Hybrid microwave and Packet microwave. The IFX2 board supports the DC-I power distribution mode.
NOTE
In this version, the IFX2 supports only the Packet microwave transmission.
3.4.1 Version Description The functional version of the IFX2 is SL91. 3.4.2 Functions and Features The IFX2 receives and transmits one Hybrid/Packet IF signal, provides the management channel to the ODU, and supplies the required -48 V power to the ODU. The IFX2 can cancel the crosspolarization interference in the IF signal. 3.4.3 Working Principle and Signal Flow This topic considers the processing of one Hybrid microwave IF signal as an example to describe the working principle and signal flow of the IFX2. 3.4.4 Front Panel There are indicators, an IF interface, XPIC signal ports, an ODU power switch, and labels on the front panel. 3.4.5 Valid Slots The IFX2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3 and 5 > slots 4 and 6 > slots 1 and 2. 3.4.6 Board Configuration Reference You can set the microwave work mode, link ID, ATPC attribute, AM attribute, and XPIC attribute for the IFX2 by using the NMS.
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3.4.7 Technical Specifications This section describes the board performance, including IF performance, modem performance, board mechanical behavior, and power consumption.

The functional version of the IFX2 is SL91.

The IFX2 receives and transmits one Hybrid/Packet IF signal, provides the management channel to the ODU, and supplies the required -48 V power to the ODU. The IFX2 can cancel the crosspolarization interference in the IF signal.
IF Processing
l
Supports the XPIC function, provides the XPIC input and output interfaces, and supports the manual configuration of the XPIC function. Supports the Hybrid microwave frames and supports the pure transmission of E1 or Ethernet signals and the hybrid transmission of E1 and Ethernet signals. Supports the Packet microwave frames and supports the packet service transmission. Supports the adaptive modulation (AM) technology. Maps service signals into microwave frame signals. Codes and decodes microwave frame signals. Modulates and demodulates microwave frame signals. Modulates and demodulates ODU control signals. Combines and splits service signals, ODU control signals, and -48 V power supplies. Provides the maximum signal bandwidth of 56 MHz and supports the highest modulation mode of 256QAM.
l l l l l l l l
Overhead Processing
l l
Processes the overheads of the Hybrid/Packet microwave signals. Supports the setting and query of the link ID.
l l
Supports 1+1 HSB/FD/SD protection. Supports 1+1 FD/SD hitless switching.

NOTE
For details on the 1+1 HSB, 1+1 FD, and 1+1 SD, see the OptiX RTN 950 Radio Transmission System Feature Description.

l l
Reports various alarms and performance events. Supports the alarm management functions such as setting the alarm reversion function and setting the BER threshold.
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Supports the performance event management functions such as setting the performance thresholds and setting the automatic reporting of 15-minute/24-hour performance events.
NOTE
For details about the alarm management and performance event management functions, see the OptiX RTN 950 Radio Transmission System Maintenance Guide.
l l l l l l l l l l
Supports the inloop and outloop over IF interfaces. Supports the inloop and outloop at composite ports. Supports the MAC inloop at IFETH ports. Supports the PRBS BER test over IF interfaces. Supports the detection of the board temperature. Supports the detection of the board voltage. Supports the detection of the board clock. Supports the cold reset on the board. Supports the query of the board manufacturing information. Supports the in-service upgrade of the FPGA.
NOTE
l l
For details on the loopback function, see the OptiX RTN 950 Radio Transmission System Maintenance Guide. A warm reset causes the reset on the board software unit in the system control and communication unit but does not affect the services. A cold reset causes the reset on the board software unit in the system control and communication unit, the initiation of the board (if the board has the FPGA, the FPGA is reloaded), and a service interruption.

This topic considers the processing of one Hybrid microwave IF signal as an example to describe the working principle and signal flow of the IFX2.
NOTE
The working principle and signal flow of the Packet microwave IF signals are similar to the working principle and signal flow of the Hybrid microwave IF signals. The only difference is with regard to the frame structure. In the case of the Packet microwave, the MUX/DEMUX unit only multiplexes/ demultiplexes the packet services and does not transmit the TDM services to the cross-connect unit or receive the TDM services from the cross-connect unit.
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Figure 3-8 Functional block diagram of the IFX2
Backplane SMODEM unit ODU control signal HSM switching signal Service bus
Overhead
System control and communication unit Paired board Cross - connect unit System control and communication unit Packet switching unit
Logic processi ng unit
MUX/DEMUX unit
bus
IF processing unit
Combiner interface unit

XPIC signal
IF
Microwave frame signal
MODEM unit
GE bus
Control bus Logic control unit - 48 V power supplied to the ODU +3.3V power supplied to the other units on the board +3.3V power supplied to the monitoring circuit Clock signal provided to the other units on the board Clock unit
System control and communication unit
Power supply unit
- 48 V1 - 48 V2 +3.3 V
System clock signal

Table 3-18 Signal processing flow in the receive direction of the IFX2 Step 1 2 Functional Module Combiner interface unit SMODEM unit Processing Flow Separates the ODU control signal and the microwave service signal from the IF signal.
l l
Demodulates the ODU control signal. Transmits the ODU control unit to the system control and communication unit.
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Functional Module IF processing unit
Processing Flow
l l
Performs the ADC sampling. Filters the signal and splits the signal to two channels.
Performs A/D conversion for one filtered signal and transmits the converted signal to the MODEM unit. Outputs the other filtered signal as the XPIC signal.
Performs A/D conversion for the XPIC signal from the paired IFX2 and transmits the converted signal to the MODEM unit. Performs digital demodulation by using the XPIC IF signal from the paired IFX2 as a reference signal. Performs time domain adaptive equalization. Performs FEC decoding and generates the corresponding alarms. Detects the Hybrid microwave frame header and generates the corresponding alarms and performance events. Verifies the check code and generates the corresponding alarms and performance events. Checks the link ID and generates the corresponding alarms. Detects the changes in the ATPC message and the microwave RDI, and reports the changes to the system control and communication unit through the control bus. Extracts the orderwire bytes, auxiliary channel bytes including the F1 and SERIAL bytes, DCC bytes, and SSM bytes to form a 2 Mbit/s overhead signal, and transmits the 2 Mbit/s overhead signal to the logic processing unit. Maps the E1 signals in the Hybrid microwave service signals to the specific positions in the VC-4s and then transmits the VC-4s to the logic processing unit. Transmits the Ethernet signals in the Hybrid microwave service signals to the Ethernet processing unit. Processes the GE signals received from the MUX/ DEMUX unit. Sends the processed signals to the packet switching unit.
MODEM unit
l l
MUX/DEMUX unit
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Step 7
Functional Module Logic processing unit
Processing Flow
l l
Processes the clock signal. Multiplexes the 2 Mbit/s overhead signals into an 8 Mbit/s overhead signal and transmits the 8 Mbit/s overhead signal to the system control and communication unit. Each 2 Mbit/s overhead signal occupies a 2 Mbit/s timeslot in the 8 Mbit/s overhead bandwidth. Transmits the VC-4 signal and pointer indication signal to the cross-connect unit.
NOTE
In the 1+1 FD/SD mode, the MUX/DEMUX unit transmits the service signals by HSM bus to the MUX/DEMUX unit of the paired board. The MUX/DEMUX unit of the paired board selects the signal of higher quality for subsequent processing.

Table 3-19 Signal processing flow in the transmit direction of the IFX2 Step 1 Functional Module Logic processing unit Processing Flow
l l
Processes the clock signal. Demultiplexes the 8 Mbit/s overhead signal into 2 Mbit/s overhead signals. Receives the VC-4 signal and pointer indication signal from the cross-connect unit. Receives the GE signal from the packet switching unit. Processes the GE signals. Demaps E1 signals from the VC-4 signal. Sets the Hybrid microwave frame overheads. Combines the E1 signals, Ethernet signals, and microwave frame overheads to form microwave frames. Performs FEC coding. Performs digital modulation. Performs D/A conversion. Performs analog modulation. Filters the signal. Amplifies the signals.
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Ethernet processing unit MUX/DEMUX unit
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MODEM unit
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IF processing unit
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Step 7 8
Functional Module SMODEM unit Combiner interface unit
Processing Flow Modulates the ODU control signal that is transmitted from the system control and communication unit. Combines the ODU control signal, microwave service signal, and -48 V power supplies, and transmits the combined signals to the IF cable.

The board is directly controlled by the CPU unit of the system control and communication unit. The CPU unit issues the configuration data and query commands to the other units of the board through the control bus. The command responses, alarms, and performance events are also reported to the CPU unit through the control bus. The logic control unit decodes the read/write address signals from the CPU unit of the system control and communication unit.
Power Supply Unit

l
This unit receives the -48 V power from the power supply bus in the backplane, performs the start-delay, filtering, and DC-DC conversion, and then supplies the -48 V power to the ODU. This unit receives the -48 V power from the power supply bus in the backplane, performs the start-delay, filtering, and DC-DC conversion, and then supplies the +3.3 V power to the other units on the IFX2.
Clock Unit
3.4.4 Front Panel

There are indicators, an IF interface, XPIC signal ports, an ODU power switch, and labels on the front panel.
Front Panel Diagram

Figure 3-9 Front panel of the IFX2
IFX2
-48V OUTPUT TURN OFF POWER BEFORE DISCONNECTING IF CABLE
PULL
I
X-IN X-OUT
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XPIC STAT SRV LINK ODU RMT ACT
IF
WARNING
IFX2
ODU-PWR
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Indicators
Table 3-20 Description of the indicators on the IFX2 Indicator XPIC State On (green) On (red) Off STAT On (green) On (red) Off Meaning The XPIC input signal is normal. The XPIC input signal is lost. The XPIC function is disabled. The board is working normally. The board hardware is faulty.
l l l
SRV
On (green) On (red)
The services are normal. Indicates that a critical or major alarm occurs in the service. A minor or remote alarm occurs in the services. The services are not configured. The space link is normal. The space link is faulty. The ODU works normally.
l
On (yellow) Off LINK On (green) On (red) ODU On (green) On (red)
The ODU has critical or major alarms. No power is supplied.
On (yellow) On for 300 ms (yellow) and off for 300 ms repeatedly RMT On (yellow) Off
The ODU has minor alarms. The antennas are not aligned. The equipment at the opposite end reports an RDI. The equipment at the opposite end does not report an RDI.
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Indicator ACT
State On (green)
Meaning
l
The board is in the active state in the 1+1 protection system. The board is already activated in the unprotected system. The board is in the standby state in the 1+1 protection system. The board is not activated in the unprotected system.
Off
Interfaces
Table 3-21 Description of the interfaces Interface IF ODU-PWRa X-IN X-OUT Description IF interface ODU power switch XPIC signal input interface XPIC signal output interface Connector Type TNC SMA SMA Corresponding Cable IF jumperb XPIC cable
NOTE
a: The ODU-PWR switch is equipped with a lockup device. To turn on or turn off the switch, you need to first pull the switch lever outwards slightly. When the switch is set to "O", it indicates that the circuit is open. When the switch is set to "I", it indicates that the circuit is closed. b: The 5D IF cable is directly connected to the IF board. Hence, when the 5D IF cable is used, the IF jumper is not required.
Labels
There is a high temperature warning label, an operation warning label, and an operation guidance label on the front panel. The high temperature warning label indicates that the board surface temperature may exceed 70C when the ambient temperature is higher than 55C. In this case, you need to wear protective gloves before handling the board. The operation warning label indicates that you must turn off the ODU-PWR switch before removing the IF cable.
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The operation guidance label indicates that you need to pull the switch outward slightly before setting the switch to the "I" or "O" position.
3.4.5 Valid Slots

The IFX2 can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 3 and 5 > slots 4 and 6 > slots 1 and 2. When being configured in 1+1 FD/SD protection mode, the IFX2 boards must be housed in paired slots. The paired slots supported by the IDU 950 are as follows: (slot 1, slot 2), (slot 3, slot 5), and (slot 4, slot 6).

You can set the microwave work mode, link ID, ATPC attribute, AM attribute, and XPIC attribute for the IFX2 by using the NMS. You can use the U2000 to set the following parameter for the IFX2: Microwave interface To configure the microwave interface, set the general attributes, IF attributes, Layer 2 attributes, Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the IF parameters, link-layer parameters, network-layer parameters, link identifier, loopback mode and XPIC attributes for the microwave interface.

This section describes the board performance, including IF performance, modem performance, board mechanical behavior, and power consumption.
IF Performance
Table 3-22 IF performance Item IF signal Transmit frequency of the IF board (MHz) Receive frequency of the IF board (MHz) Impedance (ohm) ODU O&M signal Modulation mode Transmit frequency of the IF board (MHz) Receive frequency of the IF board (MHz) ASK 5.5 10 350 140 50 Performance
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Baseband Signal Processing Performance of the Modem

Table 3-23 Baseband signal processing performance of the modem Item Encoding mode Adaptive timedomain equalizer for baseband signals Performance The LDPC encoding is performed for the Hybrid microwave signals. Supported
Mechanical Behavior
Table 3-24 Mechanical behavior Item Dimensions Weight Performance 19.82 mm (height) x 196.70 mm (depth) x 193.80 mm (width) 0.796 kg
Power Consumption
Power consumption: < 33 W
3.5 CD1
This section describes the CD1, which is a 1 x channelized STM-1 service processing board, in terms of the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.5.1 Version Description The functional version of the CD1 is TND1. 3.5.2 Functions and Features The CD1 accesses 1 x channelized STM-1 services. When used with the CXP, the CD1 processes the service signals. The CD1 supports the IMA, CES, and ML-PPP protocols, and the service type can be flexibly configured. 3.5.3 Working Principle and Signal Flow The CD1 consists of the SDH processing module, line processing module, data processing module, management module, clock module, and power supply module. 3.5.4 Front Panel On the front panel of the CD1, there are indicators and interfaces. 3.5.5 Valid Slots The CD1 can be housed in any of the six slots, that is, slots 1 to 6. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5. 3.5.6 Board Configuration Reference
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You can use the U2000 to configure parameters for the CD1. 3.5.7 Specifications The technical specifications of the CD1 cover the interface specifications, board dimensions, and weight.

The functional version of the CD1 is TND1.

The CD1 accesses 1 x channelized STM-1 services. When used with the CXP, the CD1 processes the service signals. The CD1 supports the IMA, CES, and ML-PPP protocols, and the service type can be flexibly configured. Table 3-25 lists functions and features of the CD1. Table 3-25 Functions and features of the CD1 Function and Feature Basic function Fractional E1 Interface function Remarks Service interfaces on the front panel Supports two channelized STM-1 optical interfacesa.
Supports the CES services and IMA services at 64 kibt/s level. Automatic shutdown function of the laser at the port Type of the loopback at the port Automatic loopback release at the port Supported
Inloop Outloop Supported
All the VC-12 timeslots of each CD1 interface support the DCN function. By default, the DCN function of only the first, seventeenth, thirty-third, and forty-ninth VC-12 timeslots of each optical interface can be enabled. Manually enables or disables the DCN function of the VC-12 timeslots of the optical interface on the CD1. ATM/IMA Number of supported ATM E1 services Number of supported IMA groups Maximum number of VC-12 timeslots in each IMA group 32 32 63
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Function and Feature
Remarks Dynamically enables or disables the IMA group, restarts the IMA group protocol, and dynamically adds or deletes the IMA group members. Supported traffic type CBR UBR UBR+ rt-VBR nrt-VBR Encapsulates ATM VPC/VCC service to the PWE3 in the N-to-1 (N 16) or 1-to-1 format. Encapsulates the ATM cells to the PW in the concatenation and nonconcatenation modes. The number of PW connections that support the cell concatenation is 64, and the maximum number of concatenated cells is 31. ATM OAM on the UNI side Supports the CC test Supports the LB test.
CES
Number of supported CES servicesb Supported emulation mode
63 CESoPSN SAToP
Supports the timeslot compression function. Provides the idle 64 kbit/ s timeslot suppression function for the CES services in the CESoPSN mode to save the transmission bandwidth. Supported clock mode Retiming mode
The jitter buffer time of the CES service can be set. The jitter buffer time ranges from 0.375 ms to 16 ms, and the step value is 0.125 ms. The encapsulation buffer time of the CES service can be set. The encapsulation buffer time ranges from 0.125 ms to 5 ms, and the step value is 0.125 ms. ML-PPP Number of supported MLPPP groups Maximum number of links supported by each ML-PPP group 7 16
Functions as the NNI interface, and functions as the UNI interface to access IP packets of the L3VPN services.
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Function and Feature LMSP protection Extraction and insertion of the S1 byte SSM protocol
Remarks Supports the 1+1 LMSP protection for two STM-1 ports on the same board and the inter-board 1:1 LMSP protection. Supported
Supported
NOTE a: The second channelized STM-1 interface on the front panel cannot be used to carry services, and it can be used for only the LMSP protection. b: The CD1 board only supports the inter-board CES local services.

The CD1 consists of the SDH processing module, line processing module, data processing module, management module, clock module, and power supply module. Figure 3-10 shows the block diagram for working principle of the CD1. Figure 3-10 Block diagram for the working principle of the CD1
Channelized STM-1 Stand-by channelized STM-1
Backplane SDH processing module

Service signal
Line processing module
Service signal
Data processing module
Service signal
CXP
Management bus
Management bus
Management bus Management bus
Management module
CXP
Line clocks Line clocks
Clock module
CXP CXP
System clocks
3.3V . . . 1.2V
NOTE
. . .
Power supply module
-48V/-60V -48V/-60V
PIU PIU
Receive Direction
In the receive direction, the SDH processing module accesses 1 x channelized STM-1 services through the interface on the front panel. This module decapsulates the VC-12 timeslots from the
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STM-1 signals, recovers the E1 signals, processes the overhead bytes, pointers, and alarm signals, and sends the processed signals to the line processing module. Then, the line processing module rearranges the E1 frames, processes the rearranged signals according to the service type, and sends the signals to the data processing module for PWE3 encapsulation and PW scheduling. Finally, the signals are sent to the CXPR through the interface on the backplane.
Transmit Direction
In the transmit direction, the data processing module receives the signals from the CXPR, identifies the signals, performs the PWE3 decapsulation, and then sends the signals to the line processing module. The line processing module processes various signals, schedules queues, and sends the processed signals to the SDH processing module. The SDH processing module maps the E1 signals to the VC-12 timeslots, multiplexes the VC-12 timeslots to the STM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, and sends out the STM-1 signals through the interface on the front panel.
SDH Processing Module

l
In the receive direction, this module accesses 1 x channelized STM-1 signals, decapsulates the VC-12 timeslots from the STM-1 signals, obtains the E1 signals by demapping the VC-12 timeslots, and processes the overhead bytes, pointers, and alarm signals. In the transmit direction, this module receives the E1 signals from the line processing module, maps the signals to the VC-12 timeslots, multiplexes the VC-12 timeslots to STM-1 signals, adds the overhead bytes and pointers, processes the alarm signals, and sends out the 1 x channelized STM-1 signals through the interface on the backplane. When the service fails, this module realizes the LMSP protection. Thus, the service is switched. This module extracts and recovers the line clocks.
Line Processing Module

l
In the receive direction, this module receives the signals from the SDH processing module, rearranges the frames of the E1 signals, performs processing for various services such as setup and deletion of the IMA link, creation of the ML-PPP group, extraction of protocol packets in the ML-PPP services, and suppression of timeslots of the CES services. Then, the processed signals are sent to the data processing module. In the transmit direction, this module receives the signals from the data processing module, processes various services, and sends the processed signals to the SDH processing module.
Data Processing Module

l
In the receive direction, this module obtains the corresponding PW channel information of each E1 service, performs the PWE3 encapsulation and PW scheduling, and sends the processed signals to the CXPR through the interface on the backplane. In the transmit direction, this module receives the signals from the CXPR, identifies different service types, and performs the PWE3 decapsulation and service scheduling.
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l
In the case of the ATM E1 or IMA services, this module performs the VP/VC switching for the ATM cells, and processes the concatenated cells during the PWE3 encapsulation or decapsulation.
Management Module
When used with the CXPR, this module manages and controls each module on the CD1.
Clock Module
l l
Processes the line clocks. Accesses and processes the system clock from the CXPR, and provides the working clock to each module on the CD1. Supports the SSM protocol.
Power Supply Module

l l
Accesses two -48 V/-60 V DC power supplies. Supplies the working power for each module on the CD1.
3.5.4 Front Panel

On the front panel of the CD1, there are indicators and interfaces.

Figure 3-11 shows the appearance of the front panel of the CD1. Figure 3-11 Appearance of the front panel of the CD1
Indicators
The following indicators are present on the front panel of the CD1:
l l l
STAT indicator, red or green, which indicates the board status SRV indicator, red, yellow, or green, which indicates service status LOS1 and LOS2 indicators, red or green, which indicate the board status
For details on indications of indicators, see 6 Indicators.

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Interfaces
Table 3-26 lists the amount, types, and usage of the interfaces on the CD1. Table 3-26 Interfaces on the CD1 Interface on the Front Panel IN1 to IN2 OUT1 to OUT2 Interface Type LC LC Usage Input optical interfaces for channelized STM-1 signals Output optical interfaces for channelized STM-1 signals
3.5.5 Valid Slots

The CD1 can be housed in any of the six slots, that is, slots 1 to 6. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5.

You can use the U2000 to configure parameters for the CD1. You can use the U2000 to configure the following parameters for the CD1.
l l l l l l l l
J0 J1 J2 C2 V5 SDH interface Automatic laser shutdown Spare timeslot recovery value
The descriptions of the parameters are as follows:

l
The J0 byte is continually transmitted to carry section access point identifiers, according to which the receive end verifies the constant connection to the intended transmit end. The J1 byte is the path tracing byte. The transmit end successively transmits the higher order access point identifiers, according to which the receive end verifies the constant connection to the intended transmit end. When detecting mismatch of the J1 bytes, the receive end inserts the HP_TIM alarm in the corresponding path. The J2 byte is a VC-12 path tracing byte. The transmit end successively transmits the lower order access point identifiers based on the negotiation of the two ends. According to these access point identifiers, the receive end verifies the constant connection to the intended transmit end in this path. The C2 byte is the signal label byte, which indicates the multiplexing structure of the VC frames and the payload property. The received C2 should be consistent with the transmitted
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C2. If the C2 bytes are mismatched, the local end inserts the HP_SLM alarm in the corresponding VC-4 path. Table 3-27 lists the mapping relation between the service type and setting of the C2. Table 3-27 Mapping relation between the service type and C2 byte Input Service Type TUG structure ATM mapping HDLC, PPP framed signal mapping Unequipped C2 Byte (in Hex) 02 13 16 00
As a path status and signal identification byte, the V5 byte detects the bit error and indicates the remote fault and failure in the lower order path. Table 3-28 lists the mapping relation between the service type and V5 byte. Table 3-28 Mapping relation between the service type and V5 byte Input Service Type Asynchronization Unequipped or supervisory unequipped V5 Byte (in Hex) 02 00
The attributes of an SDH interface cover the general attributes, Layer 2 attributes, Layer 3 attributes and advanced attributes. To configure an SDH interface, configure the physical parameters, link layer parameters and network layer parameters. To configure the ALS is to set the parameters of the optical interface. To ensure the valid utilization of the path, the spare timeslots are eliminated when the signals are encapsulated into the network. In this way, the TDM frame is partially stuffed. To recover the TDM frame at the service sink, the spare timeslots eliminated during encapsulation are added again.
l l
The technical specifications of the CD1 cover the interface specifications, board dimensions, and weight. Table 3-29 lists the specifications of interfaces on the CD1. Table 3-29 Specifications of the interfaces on the CD1 Item Optical interface type Specification Requirement Bidirectional two-fiber S-1.1 (15 km)
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L-1.1 (40 km)
L-1.2 (80 km)

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Item Fiber type Working wavelength range (nm) Mean launched optical power (dBm) Receiver sensitivity (dBm) Minimum overhead point (dBm) Extinction ratio (dB) Optical module code
Specification Requirement Single-mode 1261 to 1360 -15 to -8 -28 -8 8.2 34060276 34060307 Single-mode 1263 to 1360 -5 to 0 -34 -10 10 34060281 34060308 Single-mode 1480 to 1580 -5 to 0 -34 -10 10 34060282 34060309
NOTE For details of the optical module, see 7.2 Optical Module Labels.
Board dimensions (mm): 20.32 (H) x 225.75 (D) x 193.80 (W) Board weight (kg): 0.52
3.6 EM6T/EM6F
The EM6T/EM6F is an FE/GE interface board, which provides four FE electrical interfaces and two GE interfaces. The EM6T has similar functions to the EM6F. The only difference is as follows: the GE interfaces on the EM6T always function as electrical interfaces whereas the GE interfaces on the EM6F use the SFP modules and therefore can function as two optical or electrical interfaces. The GE electrical interfaces on the EM6F and the EM6T are compatible with the FE electrical interfaces. 3.6.1 Version Description The functional version of the EM6T/EM6F is SL91. 3.6.2 Functions and Features The EM6T/EM6F accesses, processes, and aggregates four FE signals and two GE signals. In this version, the backplane buses of the EM6T/EM6F provides the capacity of 1 Gbit/s. 3.6.3 Working Principle and Signal Flow This topic considers the processing of one GE signal on the EM6T as an example to describe the working principle and signal flow of the EM6T/EM6F. 3.6.4 Front Panel There are indicators, FE interfaces, and GE interfaces on the front panel of the EM6T/EM6F. The GE electrical interfaces on the front panel of the EM6T are compatible with the FE interfaces. The GE interfaces on the front panel of the EM6F use pluggable SFP optical modules. 3.6.5 Valid Slots
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The EM6T/EM6F can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5. 3.6.6 Board Configuration Reference You can use the U2000 to set parameters for the EM6T/EM6F. 3.6.7 Technical Specifications This topic describes the board specifications, including the GE interface performance, FE interface performance, board mechanical behavior and board power consumption.

The functional version of the EM6T/EM6F is SL91.

The EM6T/EM6F accesses, processes, and aggregates four FE signals and two GE signals. In this version, the backplane buses of the EM6T/EM6F provides the capacity of 1 Gbit/s.
Ethernet Service Signal Processing

l
The EM6T provides two GE electrical interfaces whereas the EM6F uses the SFP optical modules to provide two GE optical or electrical interfaces. The GE electrical interfaces are compatible with the FE electrical interfaces. Supports the setting and query of the working modes of the Ethernet interfaces. The supported working modes are as follows:
The FE interfaces support 10M full duplex, 10M half duplex, 100M full duplex, 100M half duplex, and auto-negotiation. The GE electrical interfaces support 10M full duplex, 10M half duplex, 100M full duplex, 100M half duplex, 1000M full duplex, and auto-negotiation. The GE optical interfaces support 1000M full-duplex and auto-negotiation.
Supports the addition, deletion, and switching of IEEE 802.1q/802.1p-compliant VLAN tags, and forwards packets based on the VLAN tags. Supports the setting and query of the tag attributes of the Ethernet interfaces. The following three TAG attributes are available: tag aware, access, and hybrid. Accesses Ethernet II and IEEE 802.3 service frames with the maximum frame length ranging from 1518 to 9600 bytes. Supports Jumbo frames with the maximum frame length of 9600 bytes. Supports the port-based flow control function that complies with IEEE 802.3x. Supports the link aggregation group (LAG) function.
NOTE
l l l
For details on LAG, see the OptiX RTN 950 Radio Transmission System Feature Description.
Clock Processing
l l
Supports synchronous Ethernet. Supports receiving and transmitting SSM messages through Ethernet interfaces.
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l l
Reports various alarms and performance events. Supports the alarm management functions such as setting the alarm reversion function and setting the alarm thresholds. Supports the performance event management functions such as setting the performance thresholds and setting the automatic reporting of 15-minute/24-hour performance events. Supports RMON performance events.
NOTE
For details on the alarm management and performance event management functions, see the OptiX RTN 950 Radio Transmission System Maintenance Guide.
l l l l l l l
Supports the inloop at the PHY layer over Ethernet ports. Supports the inloop at the MAC layer over Ethernet ports. Supports the mirroring function over Ethernet interfaces. Supports the warm reset and cold reset on the board. Supports the detection of the board temperature. Supports the query of the board manufacturing information. Supports the query of the manufacturing information about the SFP module.

This topic considers the processing of one GE signal on the EM6T as an example to describe the working principle and signal flow of the EM6T/EM6F.
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Figure 3-12 Functional block diagram
Backplane GE signal GE signal Control signal access unit Ethernet processing unit Ethernet signal Ethernet signal Packet switching unit
Logic processing unit
FE signal Control signal access unit FE signal Control bus of the board
Logic control unit
Control bus
System control and communication unit
+3.3 V power supplied to the board +3.3 V backup power supplied to the board Clock signal provided to the other units on the board
Power supply unit
-48 V1 -48 V2 +3.3 V
Clock unit
System clock

Table 3-30 Signal processing flow in the receive direction Step 1 Functional Unit GE signal access unit Processing Flow
l l
Provides access to GE signal. Performs reassembling, decoding, and serial/parallel conversion for the GE signals. Performs frame delimitation, preamble stripping, CRC code processing, and Ethernet performance count for the frame signals.
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Step 2
Functional Unit Ethernet processing unit
Processing Flow
l
Adds the tags identifying the ingress ports to the Ethernet data frames. Processes the VLAN tags in the Ethernet data frames. Performs the QoS processing, such as traffic classification and CAR traffic monitoring, for the Ethernet data frames. Forwards the Ethernet data frames to the logic processing unit.
l l
Logic processing unit
Transmits the Ethernet data frames to .

Table 3-31 Signal processing flow in the transmit direction Step 1 Functional Unit Logic processing unit Processing Flow
l
Selects the Ethernet data frames from the packet switching unit. Transmits the Ethernet data frames to the Ethernet processing unit. Processes the VLAN tags in the Ethernet data frames. Performs the QoS processing, such as traffic shaping and queue scheduling, for the Ethernet data frames. Forwards the Ethernet data frames to the corresponding egress ports based on the egress tags contained in the Ethernet data frames. Performs frame delimitation, preamble addition, CRC code computing, and Ethernet performance count. Performs parallel/serial conversion and coding for the Ethernet data frames, and sends out the generated FE/ GE signals through the Ethernet interfaces.
l l
GE signal access unit

The Ethernet processing unit controls the FE/GE signal access by using the control signal. The logic control unit controls the Ethernet processing unit and logic processing unit through the control unit on the board. The logic control unit communicates with through the system control bus. The configuration data and query commands from the system control and communication unit are issued to the various units of the board through the logic control unit. The command response reported by
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each unit on the board, and the alarms and performance events are reported to the system control and communication unit through the logic control unit.
Power Supply Unit

This unit receives two -48 V power supplies from the backplane, converts the -48 V power into the +3.3 V power, and then supplies the +3.3 V power to the other units on the board. The power supply unit receives a +3.3 V power supply from the backplane, which functions as a +3.3 V power backup for the other units on the board.
Clock Unit
3.6.4 Front Panel

There are indicators, FE interfaces, and GE interfaces on the front panel of the EM6T/EM6F. The GE electrical interfaces on the front panel of the EM6T are compatible with the FE interfaces. The GE interfaces on the front panel of the EM6F use pluggable SFP optical modules.
Front Panel Diagram

Figure 3-13 Front panel of the EM6T
EM6T
STAT PROG SRV
GE1
GE2
FE1
FE2
FE3
FE4
Figure 3-14 Front panel of the EM6F

EM6F
STAT PROG SRV LINK1 LINK2
CLASS1 LASER PRODUCT
GE1
GE2
FE1
FE2
FE3
FE4
Indicators
Table 3-32 Description of the indicators on the EM6T/EM6F Indicator STAT State On (green) On (red)
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Meaning The board is working normally. The board hardware is faulty.

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Indicator
State Off
Meaning
l l l
SRV
On (green) On (red) On (yellow) Off
The system is working normally. A critical or major alarm occurs in the system. A minor alarm occurs in the system. There is no power supplied to the system. When the board is being powered on or being reset, the software is being loaded to the flash memory. When the board is being powered on or being reset, the board software is in BIOS boot state. The upper layer software is being initialized. When the board is being powered on or being reset, the BOOTROM self-check fails. When the board is being powered on or being reset, the memory self-check fails or loading the upper layer software fails. When the board is running, the logic file or upper layer software is lost. The pluggable storage card is faulty.
PROG
On for 100 ms (green) and off for 100 ms repeatedly On for 300 ms (green) and off for 300 ms repeatedly On (green) On for 100 ms (red) and off for 100 ms repeatedly On (red)
Off LINK1a On (green) Blinking (yellow) Off LINK2a On (green) Flashing (green) Off
The software is running normally. The GE1 interface is connected correctly and is not receiving or transmitting data. The GE1 interface is receiving or transmitting data. The GE1 interface is not connected or is connected incorrectly. The GE2 interface is connected correctly and is not receiving or transmitting data. The GE2 interface is receiving or transmitting data. The GE2 interface is not connected or is connected incorrectly.
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NOTE
a: The LINK1 and LINK2 indicators are available only on the EM6F and indicate the states of the corresponding GE optical interfaces.
Interfaces
Table 3-33 Description of the interfaces on the EM6T/EM6F Inte rfac e FE1 FE2 FE3 FE4 GE1 GE2 GE1 GE2 GE electrical interface GE optical interface (EM6F) LC (SFP optical module) Fiber Jumper RJ-45 Network Cable Description Connector Type Corresponding Cable
FE interface
The FE electrical interfaces and GE electrical interfaces support the MDI and MDI-X adaptation modes. For the front view and pin assignment of the RJ-45 connector, see Figure 3-15 and refer to Table 3-34 and Table 3-35. Figure 3-15 Front view of the RJ-45 connector
87654321
Table 3-34 Pin assignment of the RJ-45 connector in MDI mode Pin 10/100BASE-T(X) Signal 1 TX+ Function Transmitting data (+) 1000BASE-T Signal BIDA+ Function Bidirectional data wire A (+)
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Pin
10/100BASE-T(X) Signal Function Transmitting data (-) Receiving data (+) Receiving data (-) -
1000BASE-T Signal BIDABIDB+ BIDC+ BIDCBIDBBIDD+ BIDDFunction Bidirectional data wire A (-) Bidirectional data wire B (+) Bidirectional data wire C (+) Bidirectional data wire C (-) Bidirectional data wire B (-) Bidirectional data wire D (+) Bidirectional data wire D (-)
2 3 4 5 6 7 8
TXRX+ Reserved Reserved RXReserved Reserved
Table 3-35 Pin assignment of the RJ-45 connector in MDI-X mode Pin 10/100BASE-T(X) Signal 1 2 3 4 5 6 7 8 RX+ RXTX+ Reserved Reserved TXReserved Reserved Function Receiving data (+) Receiving data (-) Transmitting data (+) Transmitting data (-) 1000BASE-T Signal BIDB+ BIDBBIDA+ BIDD+ BIDDBIDABIDC+ BIDCFunction Bidirectional data wire B (+) Bidirectional data wire B (-) Bidirectional data wire A (+) Bidirectional data wire D (+) Bidirectional data wire D (-) Bidirectional data wire A (-) Bidirectional data wire C (+) Bidirectional data wire C (-)
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The RJ-45 connector has two indicators. For meaning of the indicators, see Table 3-36. Table 3-36 Description of the two indicators of the RJ-45 connector Indicator LINK (green) State On Off ACT (yellow) On or blinking Off Meaning The link is normal. The link fails. The interface is transmitting or receiving data. The interface is not transmitting or receiving data.
Label
There is a laser safety class label on the front panel of the EM6F. The laser safety class label indicates that the laser safety class of the optical interface is CLASS 1. That is, the maximum launched optical power of the optical interface is lower than 10 dBm (10 mW).
3.6.5 Valid Slots

The EM6T/EM6F can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5.

You can use the U2000 to set parameters for the EM6T/EM6F. You can use the U2000 to set the following parameter for the EM6T/EM6F: Ethernet interface The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3 attributes, advanced attributes and flow control. To configure an Ethernet interface, configure the physical parameters, link layer parameters, network layer parameters and flow control schemes.

This topic describes the board specifications, including the GE interface performance, FE interface performance, board mechanical behavior and board power consumption.
Performance of Optical Interfaces

The optical interfaces on the EM6T/EM6F meet the requirements specified in IEEE 802.3. The following table lists the main specifications for the optical interfaces.
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Table 3-37 Performance of the GE optical interface Item Nominal bit rate (kbit/s) Classification code Fiber type Transmission distance (km) Operating wavelength (nm) Mean launched power (dBm) Receiver minimum sensitivity (dBm) Minimum overload (dBm) Minimum extinction ratio (dB) Performance 1000 1000Base-SX Multiple-mode optical fiber 0.5 770 to 860 -9.5 to 0 -17 0 9 1000Base-LX Single-mode optical fiber 10 1270 to 1355 -9 to -3 -19 -3 9
NOTE
The OptiX RTN 950 uses SFP modules for providing GE optical interfaces. You can use different types of SFP modules to provide GE optical interfaces with different classification codes and transmission distances.
Performance of GE Electrical Interfaces

The GE electrical interfaces on the EM6T/EM6F meet the requirements specified in IEEE 802.3. The following table lists the main specifications for the GE electrical interfaces. Table 3-38 GE electric interface performance Item Nominal bit rate (Mbit/s) Performance 10 (10BASE-T) 100 (100BASE-TX) 1000 (1000BASE-T) Code pattern Manchester encoding signal (10BASE-T) MLT-3 encoding signal (100BASE-TX) 4D-PAM5 encoding signal (1000BASE-T) Interface type RJ-45
Performance of FE Electrical Interfaces

The FE electrical interfaces on the EM6T/EM6F meet the requirements specified in IEEE 802.3. The following table lists the main specifications for the FE electrical interfaces.
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Table 3-39 FE electric interface performance Item Nominal bit rate (Mbit/s) Performance 10 (10BASE-T) 100 (100BASE-TX) Code pattern Manchester encoding signal (10BASE-T) MLT-3 encoding signal (100BASE-TX) Interface type RJ-45
Mechanical Behavior
Table 3-40 Mechanical behavior Item Performance EM6T Dimensions Weight EM6F
19.82mm (height) x 196.70 mm (depth) x 193.80 mm (width) 0.370 kg 0.382 kg
Power Consumption
Power consumption of EM6T: < 10.4 W Power consumption of EM6F: < 11.3 W
3.7 EF8T
This section describes the EF8T, which is an interface board with eight FE electrical interfaces, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.7.1 Version Description The functional version of the EF8T is TND1. 3.7.2 Functions and Features The EF8T mainly accesses 8 x FE electrical signals, and processes the services with the CXPR. 3.7.3 Working Principle and Signal Flow The EF8T mainly consists of the access and convergence module, control driver module, clock module, and power supply module. 3.7.4 Front Panel On the front panel of the EF8T, there are indicators and interfaces. 3.7.5 Valid Slots
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The EF8T can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5. 3.7.6 Board Configuration Reference You can use the U2000 to set parameters for the EF8T. 3.7.7 Specifications The technical specifications of the EF8T include the interface specifications, board dimensions, and weight.

The functional version of the EF8T is TND1.

The EF8T mainly accesses 8 x FE electrical signals, and processes the services with the CXPR. Table 3-41 lists the functions and features of the EF8T. Table 3-41 Functions and features of the EF8T Function and Feature Basic function Description Supports eight FE electrical interfaces. Accesses 8 x FE electrical signals, and processes the services with the CXPR. Supports the inband DCN. By default, the DCN function is enabled at the first four ports. In addition, this function can be disabled or enabled manually. Supports the hot swappable function. Detects the temperature and voltage of the board. Interface function Type of the loopback at the port PHY-layer inloop MAC-layer outloop Automatic loopback release at the port LAG Intra-board LAG Inter-board LAG Clock Synchronous Ethernet SSM protocol IEEE 1588V2 protocol Supported Supported Supported Supported Supported Supported

The EF8T mainly consists of the access and convergence module, control driver module, clock module, and power supply module.
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Figure 3-16 shows the block diagram for the functions of the EF8T. Figure 3-16 Block diagram for the functions of the EF8T
Backplane
8 x FE electrical signals
Access and convergence module
Service bus
Control driver module
Management bus Service bus
CXP CXP
Clock signals Clock signals
Clock module
Clock signals
CXP
Each module on the board
3.3 V 1.2 V
Each module on the board
Power supply module
-48 V/-60 V -48 V/-60 V
PIU PIU
NOTE
Access and Convergence Module

l l l l
Accesses 8 x FE electrical signals. Buffers FE signals to avoid packet loss. Provides flow control frames to control the number of packets. Processes the IEEE 1588V2 packets.
Control Driver Module

l
Detects the system status through the management bus.

Detects any fault of the CXPR. Detects the active/standby status of the CXPR. Detects whether board is loosened from the slot. Detects the voltage and temperature.
Realizes the hot swappable function of the board.
Clock Module

l l l
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Provides the working clock for each module on the board. Supports the synchronous Ethernet and the SSM protocol. Supports the IEEE 1588V2 protocol.
Power Supply Module

l l
Accesses two -48 V DC or -60 V DC power supplies. Supplies 3.3 V and 1.2 V power for the EF8T.
3.7.4 Front Panel

On the front panel of the EF8T, there are indicators and interfaces.

Figure 3-17 shows the appearance of the front panel of the EF8T. Figure 3-17 Font panel of the EF8T
Indicator
The following indicators are present on the front panel of the EF8T:
l l l l
STAT indicator, red, orange or green, which indicates the board working status SRV indicator, red, orange or green, which indicates service status LINK indicator, green, which indicates the connection status of the port ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicator are present above each FE service interface.
Interface
Table 3-42 lists the types and usage of the interfaces on the EF8T.
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Table 3-42 Types and usage of interfaces on the EF8T Interface on the Front Panel FE1 - FE8 Interface Type Usage RJ-45 Input/output interfaces for FE electrical signals Pin For details, see Table 3-43.
Table 3-43 Pins of the RJ-45 connector of the EF8T Front View Pin 1 2 3 4
8 7 6 5 4 3 2 1
Usage Transmit positive Transmit negative Receive positive Undefined Undefined Receive negative Undefined Undefined
5 6 7 8
3.7.5 Valid Slots

The EF8T can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5.

You can use the U2000 to set parameters for the EF8T. You can use the U2000 to set the following parameter for the EF8T: Ethernet interface The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3 attributes, advanced attributes and flow control. To configure an Ethernet interface, configure the physical parameters, link layer parameters, network layer parameters and flow control schemes.
The technical specifications of the EF8T include the interface specifications, board dimensions, and weight. Table 3-44 lists the specifications of the electrical interfaces of the EF8T.
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Table 3-44 Specifications of interfaces on the EF8T Item FE electrical signal interface rate RJ-45 electrical interface specification Specification 100 Mbit/s Complies with IEEE 802.3 and enterprise regulations.
3.8 EF8F
This section describes the EF8F, which is an interface board with eight FE optical interfaces, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.8.1 Version Description The functional version of the EF8F is TND1. 3.8.2 Functions and Features The EF8F mainly accesses and processes 8 x FE optical signals, and processes the services with the CXPR. 3.8.3 Working Principle and Signal Flow The EF8F mainly consists of the access and convergence module, control driver module, clock module, and power supply module. 3.8.4 Front Panel On the front panel of the EF8F, there are indicators and interfaces. 3.8.5 Valid Slots The EF8F can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5. 3.8.6 Board Configuration Reference You can use the U2000 to set parameters for the EF8F. 3.8.7 Specifications The technical specifications of the EF8F include the interface specifications, board dimensions, and weight.

The functional version of the EF8F is TND1.

The EF8F mainly accesses and processes 8 x FE optical signals, and processes the services with the CXPR. Table 3-45 lists the functions and features of the EF8F.
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Table 3-45 Functions and features of the EF8F Function and Feature Basic function Description Supports eight FE optical interfaces.Accesses 8 x FE optical signals, and processes the services with the CXPR. Supports the inband DCN. By default, the DCN function is enabled at the first four ports. In addition, this function can be disabled or enabled manually. Supports the hot swappable function. Detects the temperature and voltage of the board. Interface function Type of the loopback at the port Automatic loopback release at the port LAG Intra-board LAG Inter-board LAG Clock Synchronous Ethernet SSM protocol IEEE 1588V2 protocol PHY-layer inloop MAC-layer outloop Supported Supported Supported Supported Supported Supported

The EF8F mainly consists of the access and convergence module, control driver module, clock module, and power supply module. Figure 3-18 shows the block diagram for the functions of the EF8F. Figure 3-18 Block diagram for the functions of the EF8F
Backplane
8 x FE optical signals
Access and convergence module
Service bus
CXP CXP
Clock signals
Clock signals
Clock module
Clock signals
CXP
Each module on the board Each module on the board
3.3 V 1.2 V
Power supply module
-48 V/-60 V -48 V/-60 V
PIU PIU
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Access and Convergence Module

l l l l
Accesses 8 x FE optical signals. Buffers FE signals to avoid packet loss. Provides flow control frames to control the number of packets. Processes the IEEE 1588V2 packets.

l
Detects the system status through the management control bus.

Checks whether any fault occurs on the CXPR. Checks the active/standby state of the system control board. Checks whether the board properly inserted. Detects voltage and temperature of the board.
Clock Module
l l l
Provides the working clock for each module on the EF8F. Supports the synchronous Ethernet and the SSM protocol. Supports the IEEE 1588V2 protocol.
Power Supply Module

l l
Accesses two - 48 V DC or - 60 V DC power supplies. Supplies 3.3 V and 1.2 V power for the EF8F.
3.8.4 Front Panel

On the front panel of the EF8F, there are indicators and interfaces.

Figure 3-19 shows the appearance of the front panel of the EF8F.
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Figure 3-19 Font panel of the EF8F
Indicators
The following indicators are present on the front panel of the EF8F:
l l l
STAT indicator, red , orange or green, which indicates the board working status SRV indicator, red, orange or green, which indicates the service status LINK1 to LINK8 indicators, green, which indicate the connection status of the port
Interfaces
Table 3-46 lists the types and usage of the interfaces on the EF8F. Table 3-46 Interfaces of the EF8F Interface on the Front Panel IN1 - IN8 OUT1 - OUT8 Interface Type LC LC Usage Input interface for FE optical signals Output interface for FE optical signals
3.8.5 Valid Slots

The EF8F can be housed in any of slots 1 - 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5.

You can use the U2000 to set parameters for the EF8F. You can use the U2000 to set the following parameter for the EF8F: Ethernet interface The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3 attributes, advanced attributes and flow control. To configure an Ethernet interface, configure the physical parameters, link layer parameters, network layer parameters and flow control schemes.
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The technical specifications of the EF8F include the interface specifications, board dimensions, and weight. Table 3-47 lists the specifications of the optical interfaces of the EF8F. Table 3-47 Specifications of the interfaces on the EF8F Item Optical interface type Specification Bidirectional two-fiber 100BASE-FX (15 km) Fiber type Working wavelength range (nm) Mean launched optical power (dBm) Receiver sensitivity (dBm) Min. overhead point (dBm) Extinction ratio (dB) Optical module code Single-mode 1261 to 1360 100BASE-FX (40 km) Single-mode 1263 to 1360 100BASE-FX (80 km) Single-mode 1480 to 1580
- 15 to - 8 -28 -8 8.2 34060276 34060307
- 5 to 0 -34 -10 10 34060281 34060308
-5 to 0 -34 -10 10 34060282 34060309
NOTE
For details of the optical module, see 7.2 Optical Module Labels.
Board dimensions (mm): 20.32 (H) x 225.75(D) x 193.80 (W) Weight (kg): 0.55
3.9 EG2
This section describes the EG2, which is an interface board with two GE optical interfaces, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.9.1 Version Description The functional version of the EG2 is TND1.
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3.9.2 Functions and Features The EG2 mainly accesses 2 x GE optical signals, and processes the services with the CXPR. 3.9.3 Working Principle and Signal Flow The EG2 mainly consists of the interface conversion module, control driving module, clock module, and power supply module. 3.9.4 Front Panel On the front panel of the EG2, there are indicators and interfaces. 3.9.5 Valid Slots The EG2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5. 3.9.6 Board Configuration Reference You can use the U2000 to set parameters for the EG2. 3.9.7 Specifications The technical specifications of the EG2 include the interface specifications, board dimensions, and weight.

The functional version of the EG2 is TND1.

The EG2 mainly accesses 2 x GE optical signals, and processes the services with the CXPR. Table 3-48 lists the functions and features of the EG2. Table 3-48 Functions and Features of the EG2 Function and Feature Basic function Description Supports two GE optical or electrical interfaces. Accesses 2 x GE signals, and processes the services with the CXPR. Supports the inband DCN. By default, the DCN function is enabled at the two ports. In addition, this function can be disabled or enabled manually. Supports the hot swappable function. Detects the temperature and voltage of the board. Interface function Type of the loopback at the port PHY-layer inloop and outloop MAC-layer outloop Automatic loopback release at the port LAG Intra-board LAG Inter-board LAG Supported Supported Supported
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Function and Feature Clock
Description Synchronous Ethernet SSM protocol IEEE 1588V2 protocol Supported by the GE optical interface Supported Supported by the GE optical interface

The EG2 mainly consists of the interface conversion module, control driving module, clock module, and power supply module. Figure 3-20 shows the block diagram for the functions of the EG2. Figure 3-20 Block diagram for the functions of the EG2
Backplane
2 x GE signals
Interface conversion module
Service bus
CXP CXP
Clock signals
Clock signals
Clock module
Clock signals
CXP
Each module on the board Each module on the board
3.3 V 1.2 V
Power supply module
-48 V/-60 V -48 V/-60 V
PIU PIU
NOTE
Interface Conversion Module

l l
Transparently transmits 2 x GE services in two directions. Supports ESFP optical interfaces and GE colored optical interfaces. Select a proper optical interface for single-mode or multi-mode transmission over a specified distance.
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Control Driving Module

l

Clock module
l l l
Provides the working clock for each module on the EG2. Supports the synchronous Ethernet and the SSM protocol. Supports the IEEE 1588V2 protocol.
Power Supply Module

l l
Accesses two -48 V DC or -60 V DC power supplies. Supplies 3.3 V or 1.2 V power for each module on the EG2.
3.9.4 Front Panel

On the front panel of the EG2, there are indicators and interfaces.

Figure 3-21 shows the appearance of the front panel of the EG2. Figure 3-21 Font panel of the EG2
Indicators
The following indicators are present on the front panel of the EG2.
l l l
STAT indicator, red, orange or green, which indicates the board status SRV indicator, red, orange or green, which indicates the service status LINK1 to LINK2 indicators, green, which indicate the connection status of the port
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ACT1 to ACT2 indicators, yellow, which indicate the data transceiving status of the port
Interfaces
Table 3-49 list the types and usage of the interfaces on the EG2. Table 3-49 Types and usage of optical interfaces on the EG2 Interface on the Front Panel IN1 - IN2 OUT1 - OUT2 Interface Type LC LC Usage Input interface for the GE optical signals Output interface for the GE optical signals
3.9.5 Valid Slots

The EG2 can be housed in any of slots 1 to 6 in the slot area. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5.
NOTE
When housed in any of slot 3 to 6, the second port of the EG2 is not available.

You can use the U2000 to set parameters for the EG2. You can use the U2000 to set the following parameter for the EG2: Ethernet interface The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3 attributes, advanced attributes and flow control. To configure an Ethernet interface, configure the physical parameters, link layer parameters, network layer parameters and flow control schemes.
The technical specifications of the EG2 include the interface specifications, board dimensions, and weight. Table 3-50 list the specifications of the interfaces on the EG2. Table 3-50 Specifications of the optical interfaces on the EG2 Item Optical interface type
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Specification Bidirectional two-fiber
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Item
Specification 1000BASESX (0.5 km) 1000BASELX (10 km) Single-mode 1270 to 1360 1000BASEVX (40 km) Single-mode 1270 to 1360 1000BASEZX (80 km) Single-mode 1500 to 1580 1000BASECWDM (80 km) Single-mode For details on wavelength allocation, see Table 3-51. 0 to 5
Fiber type Working wavelength range (nm)
Multi-mode 770 to 860
Mean launched optical power (dBm) Receiver sensitivity (dBm) Min. overhead point (dBm) Extinction ratio (dB) Optical module code
-9.5 to 0
-11 to -3
- 5 to 0
-2 to 5
-17
-19
-22
-22
-28
0 9 34060286
-3 9 34060473 34060290
-3 9 34060298
-3 9 34060360 34060324
-9 8.2 For details, see Table 3-51.
NOTE
For details of the optical module, see 7.2 Optical Module Labels.
Table 3-51 Allocation of central wavelengths of 1000BASE-CWDM interfaces and related optical module code SN 1 2 Optical module code 34060483 34060481 Wavelength (nm) 1464.5 to 1477.5 1484.5 to 1497.5 SN 5 6 Optical module code 34060478 34060476 Wavelength (nm) 1544.5 to 1557.5 1564.5 to 1577.5
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SN 3 4
Optical module code 34060479 34060482
Wavelength (nm) 1504.5 to 1517.5 1524.5 to 1537.5
SN 7 8
Optical module code 34060477 34060480
Wavelength (nm) 1584.5 to 1597.5 1604.5 to 1617.5
3.10 ML1/ML1A
This section describes the ML1/ML1A, which is a 16 x E1 electrical interface board, with regard to the version, functions, features, working principle, front panel, valid slots, and technical specifications.
NOTE
The ML1 and ML1A have the same functions and features except for the matched impedance (ML1: 75 ohms E1; ML1A: 120 ohms E1). In this document, the ML1 represents the ML1 and ML1A, unless otherwise specified.
3.10.1 Version Description The functional version of the ML1 is TND1. 3.10.2 Functions and Features The ML1 is a 75-ohm E1 board and the ML1A is a 120-ohm E1 board. The ML1 can access a maximum of 16 x E1 signals, supports flexible configuration of different services on each port, and is hot swappable. 3.10.3 Working Principle and Signal Flow The ML1 mainly consists of the control module, line-side processing module, system-side processing module, backplane interface module, clock module, and power supply module. 3.10.4 Front Panel On the front panel of the ML1, there are indicators and interfaces. 3.10.5 Valid Slots The ML1 can be housed in any of slots 1 - 6. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5. 3.10.6 Board Configuration Reference You can use the U2000 to set parameters for the ML1. 3.10.7 Specifications The technical specifications of the ML1/ML1A include the interface specifications, dimensions, and weight.

The functional version of the ML1 is TND1.
3 Boards

The ML1 is a 75-ohm E1 board and the ML1A is a 120-ohm E1 board. The ML1 can access a maximum of 16 x E1 signals, supports flexible configuration of different services on each port, and is hot swappable. Table 3-52 lists functions and features of the ML1. Table 3-52 Functions and features of the ML1 Function and Feature Basic functions Remarks Accesses and processes 16xE1 signals and supports the IMA, CES, and ML-PPP protocols. Supports the in-band DCN. By default, the DCN function is enabled at the first and the sixteenth E1 ports. In addition, this function can be disabled or enabled manually. Fractional E1 ATM/IMA Supports the CES services and IMA services at 64 kbit/s level. Number of supported IMA groups /supported ATM E1 services Maximum number of E1 linksin each IMA group 16 8
Dynamically enables or disables the IMA group, restarts the IMA group protocol, and dynamically adds or deletes the IMA group members. Supported traffic types CBR UBR UBR+ rt-VBR nrt-VBR Encapsulates ATM VPC/VCC service to the PWE3 in the Nto-1 (N16) or 1-to-1 format. Encapsulates the ATM cells to the PW in the concatenation and non-concatenation modes. The number of PW connections that support the cell concatenation is 64, and the maximum number of concatenated cells is 31. ATM OAM on the UNI side Supports the CC test. Supports the LB test. CES Number of supported CES services Supported emulation mode 32 CESoPSN SAToP
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Remarks Supports the timeslot compression function. Provides the idle 64 kbit/s timeslot suppression function for the CES services in the CESoPSN mode to save the transmission bandwidth. Supported clock modes Retiming mode
The jitter buffer time of the CES service can be set. The jitter buffer time ranges from 0.375 ms to 16 ms, and the step value is 0.125 ms. The encapsulation buffer time of the CES service can be set. The encapsulation buffer time ranges from 0.125 ms to 5 ms, and the step value is 0.125 ms. ML-PPP Number of supported MLPPP groups Maximum number of links supported by each ML-PPP group Functions as the NNI interface. 7 16

The ML1 mainly consists of the control module, line-side processing module, system-side processing module, backplane interface module, clock module, and power supply module. Figure 3-22shows the block diagram for the working principle of the ML1.
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Figure 3-22 Block diagram for the working principle of the ML1
Backplane
1.2 V 1.26 V To each module 2.5 V 3.3 V -48 V/-60 V
Power supply module
-48 V/-60 V 3.3 V
16 x E1 signals
Line-side processing module
Service bus
System-side processing module
Service bus
Backplane interface module
Service bus
CXP
Management bus Management bus
Control module
Serial management bus
CXP
To each module
Clock signals
Clock module
Clock signals
CXP
NOTE
In Transmit Direction
The ML1 first distributes the signals in Ethernet packets from the backplane to different protocol processing chips according to the service types. The system-side processing module decapsulates the concatenated services and buffers the services in queues. Then, this module schedules the egress queues according to the service types, processes and converts the services, and finally sends the services to the line-side processing module. The line-side processing module performs coding, dejitter, pulse shaping, and line driving for the services, and finally sends the services to E1 interfaces.
In Receive Direction
The line processing module performs impedance match, signal equalization, signal level conversion, clock data recovery, dejitter, and decoding for the accessed E1 signals. Then, the signals are sent into the system-side processing module, which frames the signals, encapsulates the IMA, CES, and ML-PPP services in PWE3, and schedules PWs. Finally, this module sends the signals in Ethernet packets to the backplane interface module.
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Line-Side Processing Module

In the receive channel, this module performs impedance match, signal equalization, electrical level conversion, clock data recovery, dejitter, and decoding to signals. In the transmit channel, this module performs encoding, dejitter, pulse shaping, and line driving to signals.
System-Side Processing Module

This module frames 16 x E1 signals, runs the CES, IMA, and ML-PPP protocols, and performs PWE3 encapsulation.
Backplane Interface Module

The service bus receives or transmits service signals.
Control Module
This module controls the reading and writing on the chip, resets the chip, and detects faults in the chip.When used with the CXPR, this module controls the board.
Clock Module
This module provides various clock signals for the board to operate normally, detects clocks, and selects the line recovery clock.
Power Supply Module

This module converts the -48 V DC/-60 V DC voltage to DC voltages required by each module on the board. In addition, this module supplies 3.3 V power to the ML1 through the backplane.
3.10.4 Front Panel

On the front panel of the ML1, there are indicators and interfaces.

Figure 3-23 shows the appearance of the front panel of the ML1. Figure 3-23 Front panel of the ML1
Figure 3-24 shows the appearance of the front panel of the ML1A. Figure 3-24 Front panel of the ML1A
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Indicators
The following indicators are present on the front panel of the ML1:
l l
STAT indicator, red , orange or green, which indicates the board working status SRV indicator, red, orange, or green, which indicates the service status
Interfaces
There is one Anea 96 interface on the front panel of the ML1. Table 3-53 lists the type and usage of the interface. Table 3-53 Type and usage of the interface on the front panel of the ML1 Interface on the Front Panel 1 - 16 Interface Type Anea 96 Usage Receives and transmits E1 signals from channels 1 - 16.
Table 3-54 lists the pins of the Anea 96 interface. Table 3-54 Pins of the Anea 96 interface Front View Connector Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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Usage Rx1
Connector Pin 25 26
Usage Tx1
Rx2
27 28
Tx2
Rx3
29 30
Tx3
Rx4
31 32
Tx4
Rx5
33 34
Tx5
Rx6
35 36
Tx6
Rx7
37 38
Tx7
Rx8
39
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Front View
Connector Pin 16 17 18 19 20 21 22 23 24 49 50 51 52 53 54 55 56
Usage
Connector Pin 40
Usage
Rx9
41 42
Tx9
Rx10
43 44
Tx10
Rx11
45 46
Tx11
Rx12
47 48
Tx12
Rx13
73 74
Tx13
Rx14
75 76
Tx14
Rx15
77 78
Tx15
Rx16
79 80
Tx16
3.10.5 Valid Slots

The ML1 can be housed in any of slots 1 - 6. The slot priority order is slots 4 and 6 > slots 1 and 2 > slots 3 and 5.

You can use the U2000 to set parameters for the ML1. You can use the U2000 to set the following parameters for the ML1: E1 interface To configure the E1 interface, set the general attributes, Layer 3 attributes, and advanced attributes of the E1 interface. In details, set the physical parameters, network-layer parameters, signal frame format, clock mode, and loopback mode for the E1 interface.
The technical specifications of the ML1/ML1A include the interface specifications, dimensions, and weight.
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Table 3-55 lists the specifications of the interfaces on the ML1/ML1A. Table 3-55 Specifications of the interfaces on the ML1/ML1A Item Nominal bit rate (kbit/s) Interface impedance Specification Requirement 2048 75 ohms (ML1) 120 ohms (ML1A) Interface code Pulse waveform at the output interface Attenuation of the input interface at the point with a frequency of 1024 kHz (dB) Anti-interference capability of the input interface Input jitter tolerance Output jitter HDB3 Complies with ITU-T G.703 0 to 6
Complies with ITU-T G.703 Complies with ITU-T G.823 Complies with ITU-T G.823
3.11 PIU
This section describes the PIU, a power input unit, in terms of the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.11.1 Version Description The functional version of the PIU is TND1. 3.11.2 Functions and Features The PIU, a power access board, supports the functions and features such as power access, power protection, lightning protection detection, and information reporting. 3.11.3 Working Principle and Signal Flow The PIU mainly consists of the lighting protection and failure detection module, communication unit module, slot ID module, and board in-position module. 3.11.4 Front Panel On the front panel of the PIU, there are indicators, power supply interfaces, and a label. 3.11.5 Valid Slots The PIU can be housed in slot 9 or slot 10 in the chassis. 3.11.6 Specifications
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The technical specifications of the PIU cover the board dimensions, weight, power consumption, and input voltage.

The functional version of the PIU is TND1.

The PIU, a power access board, supports the functions and features such as power access, power protection, lightning protection detection, and information reporting. Table 3-56 lists functions and features of the PIU. Table 3-56 Functions and features of the PIU Function and Feature Power access Power protection Description Each of the two PIU accesses one -48 V DC (or -60 V DC) power supply for the equipment. The PIU protects the power supply against overcurrent and short circuit. In this way, the overcurrent is prevented from shocking boards and components on them. The PIU protects the equipment against lightning and reports an alarm if the protection fails. Tow PIU can achieve 1+1 hot backup. One PIU is capable of supplying power for the entire chassis.
Lightning protection Power backup

The PIU mainly consists of the lighting protection and failure detection module, communication unit module, slot ID module, and board in-position module. Figure 3-25 shows the block diagram for the working principle of the PIU. Figure 3-25 Block diagram for the working principle of the PIU
Backplane -48 V/-60 V Lightning protection and failure detection module
Inter-board communication bus
Each board
Lightning protection failure alarm signals
Communication unit module Board in-position module

Board in-position signals
CXP
CXP
Slot ID signals
Slot ID module
CXP
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NOTE
Lighting Protection and Failure Detection Module

This module protects the equipment against lightning and detects the failure of the anti-lightning circuit. If the lightning protection fails, the PIU reports the alarm signals to the CXPR.
Communication Unit Module

This module has the function of reporting the board manufacturing information, PCB version information, and alarm signals about the lightning protection failure.
Slot ID Module
This module reports the slot ID information to the CXPR.
Board In-Position Module

This module reports the board in-position signals to the CXPR.
3.11.4 Front Panel

On the front panel of the PIU, there are indicators, power supply interfaces, and a label.

Figure 3-26 shows the appearance of the front panel of the PIU. Figure 3-26 Appearance of the front panel of the PIU
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Indicators
The following indicator is present on the front panel of the PIU. PWR, green, which indicates the power supply status. When PWR is on and green, it indicates that power is accessed. For details on indications of indicators, see 6 Indicators.
Interfaces
The PIU accesses one power supply. Table 3-57 lists the types of the interfaces on the PIU and their respective usage. Table 3-57 Types and usage of the interfaces on the PIU Interface on the Front Panel NEG(-) RTN(+) Interface Type Usage
-48 V power input interface BGND power input interface
Inputs -48 V power. Inputs BGND power.
Label
Operation warning label: indicates the following precaution, which should be taken for removal or insertion of the PIU board.
CAUTION
Multiple power supplies are accessed for the equipment. When powering off the equipment, make sure that these power supplies are disabled. Before removing or inserting a PIU board, make sure that all the power inputs are disabled. Do not remove or insert the board with power on.
3.11.5 Valid Slots

The PIU can be housed in slot 9 or slot 10 in the chassis.
The technical specifications of the PIU cover the board dimensions, weight, power consumption, and input voltage. Table 3-58 lists the technical specifications of the PIU.
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Table 3-58 Technical specifications of the PIU Item Board dimensions (mm) Weight (kg) Input voltage (V) Technical Specification 41.4 (H) x 229.9 (D) x 21.0 (W) 0.12 -38.4 to -72.0
3.12 FAN
This section describes the FAN, a fan board, in terms of the version, functions, features, working principle, front panel, valid slots, and technical specifications. 3.12.1 Version Description The functional version of the FAN is TND1. 3.12.2 Functions and Features The FAN is used to adjust the fan rotating speed, detect and report status of fans. 3.12.3 Working Principle and Signal Flow The FAN mainly consists of the combiner/start-delay module, filter module, communication unit module, intelligent fan speed adjustment module, and board in-position module. 3.12.4 Front Panel On the front panel of the FAN, there are indicators, anti-static wrist strap jack, handle, and labels. 3.12.5 Valid Slots The FAN can be housed in slot 11 in the chassis. 3.12.6 Specifications The technical specifications of the FAN cover the board dimensions, weight, power consumption, and input voltage.

The functional version of the FAN is TND1.

The FAN is used to adjust the fan rotating speed, detect and report status of fans. The functions and features of the FAN are as follows:
l l
Accesses two 12 V power supplies for driving six fans that each consumes 6 W power. Provides start-delay for the power supply of the fans, protects fans against overcurrent, and filters the lower frequency. Intelligently adjusts the rotating speed of fans to ensure proper heat dissipation of the system. Reports information about the fan rotating speed, environment temperature, alarms, version number, and board in-position information.
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Provides alarm indicators.

The FAN mainly consists of the combiner/start-delay module, filter module, communication unit module, intelligent fan speed adjustment module, and board in-position module. Figure 3-27 shows the block diagram for the working principle of the FAN. Figure 3-27 Block diagram for the working principle of the FAN
Fans x 6 12 V 12 V
12 V
Filter module 12 V
Start-delay
Combiner
CXP CXP
Combiner/ 12 V soft-start module 12 V power shut signals Communication unit module Inter-board communication bus
CXP
Fan speed reporting module
Fan rotating speed signals CXP CXP
PWM signals
PWM driver module
Intelligent fan speed adjustment module Board in-position module Fan in-position signals
CXP
NOTE
Start-delay/Combiner Module
This module provides start delay to the combined two 12 V power supplies and protecting fans against overcurrent.
Filter Module
This module filters the LC low frequency to enhance the EMC feature of the system.
Communication Unit Module

This module reports the board manufacturing information, PCB version, and environment temperature information. In addition, this module provides 12 V power shut signals to the startdelay module.
3 Boards
Intelligent Fan Speed Adjustment Module

This module reports information about the fan rotating speed to the CXPR and adjusts the fan rotating speed according to the six pulse-width modulation (PWM) signals received from the CXPR. The PWM signal of one fan is isolated from that of another.
Board In-Position Module

This module reports the board in-position signals to the CXPR.
3.12.4 Front Panel

On the front panel of the FAN, there are indicators, anti-static wrist strap jack, handle, and labels.

Figure 3-28 shows the appearance of the front panel of the FAN. Figure 3-28 Appearance of the front panel of the FAN
Indicators
The following indicators are present on the front panel of the FAN:
l l l l
FAN indicator, red or green, which indicates status of fans. CRIT indicator, red, which indicates critical alarms. MAJ indicator, orange, which indicates major alarms. MIN indicator, yellow, which indicates minor alarms.
The CRIT, MAJ, and MIN indicators on the front panel of the FAN indicate the current alarm severity of the subrack. For details on indications of indicators, see 6 Indicators.
Anti-Static Wrist Strap Jack

The anti-static wrist strap should be connected to this jack for proper grounding of the human body.
3 Boards
Handle
The handle is used for pushing the FAN into or pulling the FAN out of the chassis during board replacement.
Label
The following labels are present on the front panel of the FAN:
l l
ESD protection label, which indicates that the equipment is static-sensitive. Fan warning label, which says that do not touch the fan leaves before the fan stops rotating.
3.12.5 Valid Slots

The FAN can be housed in slot 11 in the chassis.
The technical specifications of the FAN cover the board dimensions, weight, power consumption, and input voltage. Table 3-59 lists the technical specifications of the FAN. Table 3-59 Technical specifications of the FAN Item Board dimensions (mm) Weight (kg) Working voltage (V) Technical Specification 86.2 (H) x 217.6 (D) x 28.5 (W) 0.302 12 V DC power
3.13 AUXQ
This section describes the AUXQ, which is an auxiliary interface and 4 x FE electrical interface board, with regard to the version, functions and features, working principle, front panel, valid slots, and technical specifications. 3.13.1 Version Description The functional version of the AUXQ is TND1. 3.13.2 Functions and Features The AUXQ processes services and clocks, and provides auxiliary interfaces. 3.13.3 Working Principle and Signal Flow The AUXQ mainly consists of the service access module, auxiliary interface module, control driver module, clock module, and power supply module. 3.13.4 Front Panel On the front panel of the AUXQ, there are indicators and interfaces. 3.13.5 Valid Slots
3 Boards
The AUXQ can be housed in any of slots 1 - 6 in the slot area. 3.13.6 Board Configuration Reference You can use the U2000 to set parameters for the AUXQ. 3.13.7 Specifications The technical specifications of the AUXQ include the interface specifications, board dimensions, and weight.

The functional version of the AUXQ is TND1.

The AUXQ processes services and clocks, and provides auxiliary interfaces. Table 3-60 lists the functions and features of the AUXQ. Table 3-60 Functions and Features of the AUXQ Function and Feature Basic function Description Supports four FE electrical interfaces, and accesses 4 x FE electrical signals. Supports the inband DCN. By default, the DCN function is enabled at the four ports. In addition, this function can be disabled or enabled manually. Supports the hot swappable function. Detects the temperature and voltage of the board. Auxiliary interface function Provides one 64 kbit/s synchronous data port, which is compliant with ITU-T G.703, is used to transparently transmit other NM data. Provides one orderwire interface. Provides one alarm input interface and one alarm output interface. Supports four channels of alarm input, two channels of alarm output, and two channels of alarm concatenation. Interface function Type of the loopback at the port PHY-layer inloop MAC-layer outloop Automatic loopback release at the port LAG Intra-board LAG Inter-board LAG Clock Synchronous Ethernet SSM protocol Supported Supported Supported Supported Supported
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Description IEEE 1588V2 protocol Supported

The AUXQ mainly consists of the service access module, auxiliary interface module, control driver module, clock module, and power supply module. Figure 3-29 shows the block diagram for the functions of the AUXQ. Figure 3-29 Block diagram for the functions of the AUXQ
Backplane
1-channel synchronous service signals 1-channel orderwire signals 2-channel alarm cascade signals and 2-channel alarm output signals 4-channel alarm input signals Transparent service signals
Auxiliary interface module
Orderwire signals Alarm output signals Alarm input signals
4 x FE electrical signals
Service access module
Service bus

Clock signals
CXP CXP
Clock signals
Clock module
To each module To each module To each module 3.3V 1.2V 5V
Clock signals
CXP
Power supply mdoule
-48V/-60V -48V/-60V
PIU PIU
NOTE
Service Access and Processing Module

l l
Accesses 4 x FE electrical signals. Provides physical-layer interfaces, supports medium access control (MAC) communication. Buffers FE signals to avoid packet loss. Provides flow control frames to control the number of packets.
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l
Processes the IEEE 1588V2 packets.
Auxiliary Interface Module

l l l l
Provides one 64 kbit/s G.703-compliant synchronous data interface . Provides one orderwire interface. Provides two channels of alarm concatenation and two channels of alarm output. Provides four channels of alarm input.

l

l l
Processes the alarm signals, orderwire signals, and transparent data signals. Realizes the hot swappable function of the board.
Clock Module
l l l l
Provides the working clock to the service access and processing module. Provides the working clock to the auxiliary interface module. Supports the synchronous Ethernet and the SSM protocol. Supports the IEEE 1588V2 protocol.
Power Supply Module

l l
Accesses two -48 V DC or -60 V DC power supplies. Supplies 1.2 V, 3.3 V, and 5 V power for each module on the board.
3.13.4 Front Panel

On the front panel of the AUXQ, there are indicators and interfaces.

Figure 3-30 shows the appearance of the front panel of the AUXQ.
3 Boards
Figure 3-30 Front panel of the AUXQ
Indicators
The following indicators are present on the front panel of the AUXQ:
l l l l
STAT indicator, red, orange, or green, which indicates the board status SRV indicator, red, orange or green, which indicates service status LINK indicator, green, which indicates the connection status of the port ACT indicator, yellow, which indicates the data transceiving status of the port
NOTE
There are eight LINK indicators and eight ACT indicators. One LINK indicator and one ACT indicator are present above each interface. The four LINK indicators and four ACT indicators above the F1, PHONE, ALMI, and ALMO interfaces, however, are not used.
Interfaces
Table 3-61 lists the types and usage of the interfaces on the AUXQ. Table 3-61 Types and usage of the interfaces on the AUXQ Interface on the Front Panel FE1 - FE4 PHONE F1 ALMI ALMO Interface Type RJ-45 RJ-45 RJ-45 RJ-45 RJ-45 Usage Pin
Input/output interface for FE electrical signals Orderwire interface 64 kbit/s synchronous data interface Four-channel alarm input interface Two-channel alarm output interface, twochannel alarm concatenation interface
For details, see Table 3-62. For details, see Table 3-63. For details, see Table 3-64. For details, see Table 3-65.
Table 3-62 lists the pins of the PHONE interface.

3 Boards
Table 3-62 Pins of the PHONE interface Front View Pin 1-3 4 5 6-8
8 7 6 5 4 3 2 1
Usage Undefined RING TIP Undefined
Table 3-63 lists the pins of the F1 interface. Table 3-63 Pins of the F1 interface Front View Pin 1 2 3 4
8 7 6 5 4 3 2 1
Usage Undefined Undefined Undefined Transmit positive of the 64 kbit/s synchronous data interface Transmit negative of the 64 kbit/s synchronous data interface Undefined Receive positive of the 64 kbit/s synchronous data interface Receive negative of the 64 kbit/s synchronous data interface
5 6 7 8
Table 3-64 lists the pins of the ALMI interface.
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Table 3-64 Pins of the ALMI interface Front View Pin 1 2 3 4

8 7 6 5 4 3 2 1
Usage Alarm input signal 1 Ground for alarm input signal 1 Alarm input signal 2 Alarm input signal 3 Ground for alarm input signal 3 Ground for alarm input signal 2 Alarm input signal 4 Ground for alarm input signal 4
5 6 7 8
Table 3-65 lists the pins of the ALMO interface. Table 3-65 Pins of the ALMO interface Front View Pin 1 2 3 4
8 7 6 5 4 3 2 1
Usage Positive for alarm output signal 1 Negative for alarm output signal 1 Positive for alarm output signal 2 Positive for alarm concatenation signal 1 Negative for alarm concatenation signal 1 Negative for alarm output signal 2 Positive for alarm concatenation signal 2 Negative for alarm concatenation signal 2
5 6 7 8
3.13.5 Valid Slots

The AUXQ can be housed in any of slots 1 - 6 in the slot area.
NOTE
On one NE, only one AUXQ board can be housed.
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3 Boards

You can use the U2000 to set parameters for the AUXQ. You can use the U2000 to set the following parameter for the AUXQ: Ethernet interface The attributes of an Ethernet interface cover the general attributes, Layer 2 attributes, Layer 3 attributes, advanced attributes and flow control. To configure an Ethernet interface, configure the physical parameters, link layer parameters, network layer parameters and flow control schemes.
The technical specifications of the AUXQ include the interface specifications, board dimensions, and weight.
Technical Specifications
Table 3-66 lists the technical specifications of the FE1 - FE4 on the AUXQ. Table 3-66 Technical specifications of the FE1 - FE4 Item Electrical interface rate RJ-45 electrical interface specification Specification 100 Mbit/s The specifications of the RJ-45 electrical interface comply with the following regulations:
l
IEEE 802.3 and enterprise regulations
Transmit jitter
Less than 1.4 ns (peak-peak)
Other Specifications
Other specifications of the AUXQ are as follows:
l l
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4 Cables
4
About This Chapter
Cables
This topic describes the purpose, appearance, and pin assignment information of various cables of the IDU 950. 4.1 Power Cable The power cable connects the PIU board in the IDU to the power supply device (for example, the PDU on top of the cabinet), thus conducting the -48 V power to the IDU. 4.2 IDU PGND Cable The IDU PGND cable connects the left ground point of the IDU to the ground point of the external equipment (for example, the ground support of a cabinet) so that the IDU and the external equipment share the same ground. 4.3 Fiber Jumper The fiber jumper transmits optical signals. One end of the fiber jumper is terminated with an LC/PC connector and is connected to the STM-1 optical interface or FE/GE optical interface on the OptiX RTN 950. The connector with which the other end of the fiber jumper is terminated depends on the type of the optical interface on the equipment to be connected. 4.4 IF Jumper The IF jumper connects the IDU and IF cable. The IF jumper is used with the IF cable to transmit the IF signal, O&M signal, and -48 V power between the ODU and the IDU. 4.5 XPIC Cable The XPIC cable is used to transmit the reference IF signal between the two IFX2 boards of the XPIC working group to realize the XPIC function. 4.6 E1 Cable The E1 cable to the external equipment is used when the IDU needs to receive E1 signals directly from or transmit E1 signals directly to the external equipment. At one end of the E1 cable, the Anea96 connector is used to connect the E1 electrical interface on the board; the other end is connected to the external equipment. Make the connector as required on site. 4.7 Network Cable The network cable connects two pieces of Ethernet equipment. Both ends of the network cable are terminated with RJ-45 connectors. 4.8 Orderwire Cable
4 Cables
The orderwire cable connects the orderwire phone to the equipment. Both ends of the orderwire cable are terminated with RJ-11 connectors. One end of the orderwire cable is connected to the PHONE interface on the AUXQ. The other end of the orderwire cable is connected to the interface of the orderwire phone.
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4 Cables
4.1 Power Cable

The power cable connects the PIU board in the IDU to the power supply device (for example, the PDU on top of the cabinet), thus conducting the -48 V power to the IDU.
Cable Diagram
Figure 4-1 Power cable
Table 4-1 Specifications of the power cable Model 6 mm2 power cable and terminal Cable Power Cable, 450 V/ 750 V, H07Z-K-6 mm2, Blue/Black, Low Smoke Zero Halogen Cable Terminal Common Terminal, Single Cord End Terminal, Conductor Cross Section 6 mm2, 30 A, Insertion Depth 12 mm, Blue
NOTE
In the case of the OptiX RTN 950, the power cable whose conductor line has a sectional area of 6 mm2 can extend for a maximum distance of 43 m.
4.2 IDU PGND Cable

The IDU PGND cable connects the left ground point of the IDU to the ground point of the external equipment (for example, the ground support of a cabinet) so that the IDU and the external equipment share the same ground.
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Cable Diagram
Figure 4-2 Appearance of IDU PGND cable
Table 4-2 Technical specifications of the power cable and protection grounding cable Item Protection grounding cable Wire Related Parameter Electronic/Electric wire, 450 V/ 750 V, H07Z, K, 2.5 mm2, yellow green, fire resistant cable with low smoke and no halogen Terminal Related Parameter General terminal, OT, 6 mm2, M6, tin plating, pre-insulated ring terminal, 12-10AWG, yellow
Pin Assignment
None.
4.3 Fiber Jumper

The fiber jumper transmits optical signals. One end of the fiber jumper is terminated with an LC/PC connector and is connected to the STM-1 optical interface or FE/GE optical interface on the OptiX RTN 950. The connector with which the other end of the fiber jumper is terminated depends on the type of the optical interface on the equipment to be connected.
Types of Fiber Jumpers

Table 4-3 Types of fiber jumpers Connector 1 LC/PC Connector 2 FC/PC Cable 2 mm single-mode fiber 2 mm multi-mode fiber LC/PC SC/PC 2 mm single-mode fiber 2 mm multi-mode fiber
4 Cables
Connector 1 LC/PC
Connector 2 LC/PC
Cable 2 mm single-mode fiber 2 mm multi-mode fiber
NOTE
In the case of the OptiX RTN 950, multi-mode fibers are required to connect to the 1000Base-SX GE optical interfaces.
Fiber Connectors
The following figures show three common types of fiber connectors, namely, LC/PC connector, SC/PC connector, and FC/PC connector. Figure 4-3 LC/PC connector
Figure 4-4 SC/PC connector
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4 Cables
Figure 4-5 FC/PC connector
4.4 IF Jumper
The IF jumper connects the IDU and IF cable. The IF jumper is used with the IF cable to transmit the IF signal, O&M signal, and -48 V power between the ODU and the IDU. The IF jumper is a 2 m RG-223 cable. One end of the IF jumper is terminated with a type-N connector and is connected to the IF cable. The other end of the IF jumper is terminated with a TNC connector and is connected to the IF board.
NOTE
l l
The 5D IF cable is directly connected to the IF board. Thus, when the 5D IF cable is used, the IF jumper is not required. When the RG-8U or 1/2-inch IF cable is used, an IF jumper is required to connect the RG-8U or 1/2inch IF cable to the IF board.
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Cable Diagram
Figure 4-6 IF jumper
1 H.S.tube 2 PCS L = 3 cm 2
2000 mm 1. RF coaxial cable connector, TNC, male 2. RF coaxial cable connector, type-N, female
Pin Assignment
None.
4.5 XPIC Cable

The XPIC cable is used to transmit the reference IF signal between the two IFX2 boards of the XPIC working group to realize the XPIC function. The XPIC cable is an RG316 cable with SMA connectors at both ends. One end of the XPIC cable is connected to the X-IN port of one IFX2 board of an XPIC working group, and the other end of the XPIC cable is connected to the X-OUT port of the other IFX2 board of the same XPIC working group. When the XPIC function of an IFX2 board is disabled, use an XPIC cable to connect the X-IN port and X-OUT port of the IFX2 board to loop back signals. The XPIC cable is available in the following two types:
l
XPIC cable using angle connectors: The XPIC cable using angle connectors is very long, and is used to connect the two IFX2 boards in the horizontal direction, for example, the IFX2 boards in slots 3 and 4. XPIC cable using straight connectors: The XPIC cable using straight connectors is very short, and is used to connect the two IFX2 boards in the vertical direction, for example, the IFX2 boards in slots 3 and 5. The XPIC cable using straight connectors is also used to connect the X-IN port and X-OUT port of the same IFX2 board to loop back signals.
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4 Cables
Cable Diagram
Figure 4-7 View of the XPIC cable
1 1
L1 2 2
L2 1. Coaxial cable connector, SMA, angle, male 2. Coaxial cable connector, SMA, straight, male
Cable Connection Table

None.
4.6 E1 Cable
The E1 cable to the external equipment is used when the IDU needs to receive E1 signals directly from or transmit E1 signals directly to the external equipment. At one end of the E1 cable, the Anea96 connector is used to connect the E1 electrical interface on the board; the other end is connected to the external equipment. Make the connector as required on site. Each E1 cable to the external equipment can transmit a maximum of 16 E1 signals. The E1 cables to the external equipment are categorized into two types, namely, 75-ohm coaxial cables and 120-ohm twisted pair cables.
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Cable Diagram
Figure 4-8 E1 cable
Main label 1 W
X1
A View A Pos.96 Cable Connector, Anea, 96PIN, Female Connector
Pos .1
1. Cable connector, Anea 96, female
NOTE
The appearance of the 120-ohm E1 cable is the same as the appearance of the 75-ohm E1 cable.
Pin Assignment
Table 4-4 Pin assignment of the 75-ohm E1 cable Pin W1 Core 1 2 3 4 5 6 7 8 9
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Serial No. 1
Remark s
Pin
W2 Core Serial No. 2
Remark s
Tip Ring Tip Ring Tip Ring Tip Ring Tip
R1
25 26
Tip Ring Tip Ring Tip Ring Tip Ring Tip
T1
R2
27 28
T2
R3
29 30
T3
R4
31 32
T4
R5
33
10
T5
4-9
4 Cables
Pin
W1 Core Serial No.
Remark s
Pin
W2 Core Serial No.
Remark s
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 49 50 51 52 53 54 55 56 Shell
Ring Tip Ring Tip Ring Tip Ring Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Braid 31 R16 29 R15 27 R14 25 R13 23 R12 21 R11 19 R10 17 R9 15 R8 13 R7 11 R6
34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 73 74 75 76 77 78 79 80 Shell
Ring Tip Ring Tip Ring Tip Ring Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Ring Tip Braid 32 T16 30 T15 28 T14 26 T13 24 T12 22 T11 20 T10 18 T9 16 T8 14 T7 12 T6
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Table 4-5 Pin assignment of the 120-ohm E1 cable Pin W1 Color of the Core 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 49 50 White Blue White Green White Grey Red Orange Red Brown Black Blue Black Green Black Grey White Blue White Green White Grey Red Orange Red Brown Relatio n Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Remark s Pin W2 Color of the Core 25 26 R2 27 28 R3 29 30 R4 31 32 R5 33 34 R6 35 36 R7 37 38 R8 39 40 R9 41 42 R10 43 44 R11 45 46 R12 47 48 R13 73 74 White Orange White Brown Red Blue Red Green Red Grey Black Orange Black Brown Yellow Blue White Orange White Brown Red Blue Red Green Red Grey Relatio n Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Twisted pair Remark s
R1
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
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4 Cables
Pin
W1 Color of the Core Relatio n Twisted pair Twisted pair Twisted pair
Remark s
Pin
W2 Color of the Core Relatio n Twisted pair Twisted pair Twisted pair
Remark s
51 52 53 54 55 56 Shell
Black Blue Black Green Black Grey Braid
R14
75 76
Black Orange Black Brown Yellow Blue Braid
T14
R15
77 78
T15
R16
79 80 Shell
T16
4.7 Network Cable

The network cable connects two pieces of Ethernet equipment. Both ends of the network cable are terminated with RJ-45 connectors. Two types of interfaces use the RJ-45 connectors, which are the medium dependent interface (MDI) and MDI-X. The MDI interface is used by the terminal equipment (for example, the network card). For the pin assignment information of the MDI interface, refer to Table 4-6. The MDI-X interface is used by the network equipment. For the pin assignment information of the MDI-X interface, refer to Table 4-7. Table 4-6 Pin assignment of the MDI interface Pin 10/100BASE-T(X) Signal 1 2 3 4 5 6 7 8 TX+ TXRX+ Reserved Reserved RXReserved Reserved Function Transmitting data (+) Transmitting data (-) Receiving data (+) Receiving data (-) -
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Table 4-7 Pin assignment of the MDI-X interface Pin 10/100BASE-T(X) Signal 1 2 3 4 5 6 7 8 RX+ RXTX+ Reserved Reserved TXReserved Reserved Function Receiving data (+) Receiving data (-) Transmitting data (+) Transmitting data (-) -
Straight through cables are used between MDI and MDI-X interfaces, and crossover cables are used between MDI interfaces or between MDI-X interfaces. The only difference between the straight through cable and crossover cable is with regard to the pin assignment. The NMS/COM interface, NE interface, and Ethernet service electrical interfaces of the OptiX RTN 950 support the MDI and MDI-X autosensing modes. Straight through cables and crossover cables can be used to connect the ETH/OAM interface, EXT interface, and Ethernet service electrical interfaces to MDI or MDI-X interfaces.
Cable Diagram
Figure 4-9 Network cable
1 Label 1 Main Label Label 2 8 1
8 1
1. Network port connector, RJ-45
Pin Assignment
Table 4-8 Pin assignment of the straight through cable Connector X1 X1.1
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Connector X2 X2.1
Color White/Orange
Relation Twisted pair

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4 Cables
Connector X1 X1.2 X1.3 X1.6 X1.4 X1.5 X1.7 X1.8
Connector X2 X2.2 X2.3 X2.6 X2.4 X2.5 X2.7 X2.8
Color Orange White/Green Green Blue White/Blue White/Brown Brown
Relation
Twisted pair
Twisted pair
Twisted pair
Table 4-9 Pin assignment of the crossover cable Connector X1 X1.6 X1.3 X1.1 X1.2 X1.4 X1.5 X1.7 X1.8 Connector X2 X2.2 X2.1 X2.3 X2.6 X2.4 X2.5 X2.7 X2.8 Color Orange White/Orange White/Green Green Blue White/Blue White/Brown Brown Twisted pair Twisted pair Twisted pair Relation Twisted pair
4.8 Orderwire Cable

The orderwire cable connects the orderwire phone to the equipment. Both ends of the orderwire cable are terminated with RJ-11 connectors. One end of the orderwire cable is connected to the PHONE interface on the AUXQ. The other end of the orderwire cable is connected to the interface of the orderwire phone.
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Cable Diagram
Figure 4-10 Orderwire cable
1
6
Main Label
6
X1
1. Orderwire interface, RJ-11 connector
X2
Pin Assignment
Table 4-10 Pin assignment of the orderwire cable Connector X1 X1.3 X1.4 Connector X2 X2.3 X2.4 Function Tip Ring
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5 Power Consumption and Weight
5
Board CXPR IFE2 IFU2 IFX2 EM6T EM6F CD1 EF8T EF8F EG2 ML1/ML1A PIU FAN
Power Consumption and Weight
This chapter lists the power consumption and weight of each board used for the IDU 950. Table 5-1 lists the power consumption and weight of boards. Table 5-1 Power consumption and weight Weight (kg) 0.66 0.53 0.79 0.80 0.37 0.38 0.52 0.53 0.55 0.52 0.56 0.12 0.30 Power Consumption (W) 34.0 24.2 23 33 10.4 11.3 16.15 9.1 17.2 6.0 13.1 0.5 4.0 W (room temperature) 29.6 W (high temperature) AUXQ 0.55 9.5
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6 Indicators
6
Boards and Their Indicators
Board CXPR EF8T EF8F EG2 ML1/ML1A CD1 IFE2 IFU2 IFX2 EM6T EM6F AUXQ PIU FAN Indicator STAT, PROG, SYNC, ACTX, ACTC STAT, SRV, LINK, ACT STAT, SRV, LINK1 - LINK8
Indicators
This section describes the names of various indicators and their indications.
STAT, SRV, LINK1, LINK2, ACT1, ACT2 STAT, SRV STAT, SRV, LOS1, LOS2 STAT, SRV, LINK, ODU, RMT, ACT STAT, SRV, LINK, ODU, RMT, ACT XPIC, STAT, SRV, LINK, ODU, RMT, ACT STAT, SRV, PROG STAT, SRV, PROG, LINK1, LINK2 STAT, SRV, LINK, ACT PWR CRIT, MAJ, MIN, FAN
Description of the Board Status Indicator (STAT)

Status On (green)
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Indication The board is working normally.

6 Indicators
Status On (red) On (orange)
Indication The board hardware is faulty. It indicates the power-on aging state of the interface board. The logic is not loaded.
Off
No power is input, the board is not created, or the board is not running.
Description of the Program Running Indicator (PROG)

Status On (green) On (red) Indication The board software is normally initialized or the board software is running normally. The memory self-check fails. Loading of the board software fails. The board software is lost. The logic file is lost. Executing the initial NE configuration scripts stored in the CF card fails. Restoring the NE configuration data from the CF card fails. On for 10s (green)a Executing the initial NE configuration scripts stored in the CF card is successful. Restoring the NE configuration data from the CF card is successful. On for 100 ms and off for 100 ms alternately (green) On for 300 ms and off for 300 ms alternately (green) Loading of the board software or logic software is in process. The board software is being initialized and is in the BIOS boot status. Execution of the initial NE configuration scripts stored in the CF card is in progress. Restoration of the NE configuration data from the CF card is in progress. On for 100 ms and off for 100 ms alternatively (red) Off The memory self-check fails or loading of the logic software fails. No power supply is accessed.
NOTE a: The PROG indicator stays on and green for 10s and then automatically recovers the original status before execution of the NE initial configuration scripts stored in the CF card or restoration of the NE configuration data from the CF card.
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6 Indicators
Description of the Synchronization Status Indicator (SYNC)

Status On (green) On (red) Off Indication The clock is working normally. The clock source is lost or the clock source is switched. Loading of the board software fails.
Description of the Service Status Indicator (SRV)

Status On (green) On (red) On (Orange) Off Indication Services are running normally and no service-related alarm occurs. A critical or major service-related alarm occurs. A minor or remote service-related alarm occurs. No service is configured or loading of the board software fails.
Description of the CXPR Switching Status Indicator (ACTX)

Status On (green) Indication The board is in the working switching state (1 +1 protection). The switching plane is activated (no protection). Off The board is in the protection switching state (1+1 protection). The switching plane is activated (no protection).
Description of the CXPR Control Status Indicator (ACTC)

Status On (green) Indication The board is in the working control state (1+1 protection). The control plane is activated (no protection). Off The board is in the protection control state (1 +1 protection). The control plane is activated (no protection).
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6 Indicators
Description of the Data Transceiving Status Indicator (ACT)

Status On for 100 ms and off for 100 ms alternately (yellow) Off Indication The data interface is transmitting or receiving data.
The data interface is not connected or connected incorrectly.
Description of the EF8F/EG2/EM6F Port Connection Status Indicator (LINK)

Status On (green) Off Indication The physical connection of the port is normal. The physical connection of the port is faulty.
Description of the CD1 Port Status Indicator (LOS1/LOS2)

Status On (green) On (red) Off Indication The signal at the port is normal. The signal at the port is lost. The optical module is offline.
Description of the IFE2/IFU2/IFX2 Port Connection Status Indicator (LINK)

Status On (green) Off (red) Indication The radio link of the port is normal. The radio link of the port is faulty.
Description of the IFX2 XPIC Port Connection Status Indicator (XPIC)

Status On (green) On (red) Off Indication The XPIC input signal is normal. The XPIC input signal is lost. The XPIC function is disabled.
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6 Indicators
ODU Status Indicator (ODU)

Status On (green) On (red) On (orange) On for 300 ms and off for 300 ms alternately (yellow) Indication The ODU works normally. The ODU has critical or major alarms, or has no power access. The ODU has minor alarms. The antennas are not aligned.
Remote Status Indicator (RMT)

Status On (orange) Off Indication The radio defect alarm indication is received from the remote end. The remote end receives services normally.
Description of the IFE2/IFU2/IFX2 Protection Status Indicator (ACT)

Status On (green) Indication The board is in the active state (1+1 protection). The board is activated (no protection). Off The board is in the standby state (1+1 protection). The board is not activated (no protection).
Description of the Critical Alarm Indicator (CRIT)

Status On (red) Off Indication Critical alarm(s) occurs on any board inside the chassis. No critical alarm occurs on any board inside the chassis.
Description of the Major Alarm Indicator (MAJ)

Status On (orange) Indication Major alarm(s) occurs on any board inside the chassis.
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6 Indicators
Status Off
Indication No major alarm occurs on any board inside the chassis.
Description of the Minor Alarm Indicator (MIN)

Status On (yellow) Off Indication Minor alarm(s) occurs on any board inside the chassis. No minor alarm occurs on any board inside the chassis.
Description of the Power Supply Status Indicator (PWR)

Status On (green) Off Indication Power is accessed. No power is accessed or the power supply poles are inversely connected.
Description of the Fan Status Indicator (FAN)

Status On (green) On (red) Off Indication The fans are working normally. The fans are working abnormally. The fans are not powered on or no fan is installed.
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7
About This Chapter
The equipment has safety labels and optical module labels.
Label
7.1 Safety Labels The equipment has various safety labels. This section describes the suggestions and locations of these safety labels. 7.2 Optical Module Labels Optical module labels, attached onto optical modules, are used to distinguish different types of optical modules.
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7 Label
7.1 Safety Labels

The equipment has various safety labels. This section describes the suggestions and locations of these safety labels.
Label Description
There are labels on the chassis and boards. See Table 7-1. Table 7-1 Label description Figure Type ESD protection label Description The label suggests the electrostatic-sensitive equipment. The label suggestions the grounding position. The label suggests that do not touch the fan leaves when the fan is rotating. The label indicates the precaution that should be taken for operations on the PIU board. For details, see Label If the ambient temperature exceeds 55, the temperature at the board panel surface may exceed 70. In this case, wear gloves to touch the board. Power off the ODU before removing the IF cable.
Chassis grounding label
Fan warning label
Operation warning label

!
High temperature warning label
! WARNING -48V OUTPUT TURN OFF POWER BEFORE DISCONNECTING IF CABLE
Operation warning label
RoHS label
The equipment is in line with the RoHS-related environment-friendly requirements.
7-2
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7 Label
Figure
/QUALIFICATION CARD
Type Qualification label
Description The equipment is qualified.
HUAWEI
HUAWEI TECHNOLOGIES CO.,LTD.
MADE IN CHINA
OptiX RTN 950

POWER RATING:
Class 1 Laser Product -48-60V;14.3A
Product nameplate label
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and(2) this device must accept any interference received, including interference that may cause undesired operation.
The label suggests the product name and certification.
N 14036
HUAWEI TECHNOLGIES CO.,LTD.
MADE IN CHINA
NOTE
The current on the nameplate of the equipment indicates the maximum current when the equipment has the microwave feature.
Label Position
Figure 7-1 shows positions of labels on the chassis. Figure 7-1 Label position
OptiX RTN 950
POWER Class 1 Laser Product
RATING:
-48-60V;14.3A
/QUALIFICATION CARD
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions (1) this device may not cause harmful : interference, and(2) this device must accept any interference received, including interference that may cause undesired operation .
N 14036
HUAWEI
HUAW EI TECHNOLOGIES CO.,LTD.
MADE IN CHINA
HUAWEI TECHNOLGIES CO ., LTD.
MADE IN CHINA
! WARNING -48V OUTPUT TURN OFF POWER BEFORE DISCONNECTING IF CABLE
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7 Label
7.2 Optical Module Labels

Optical module labels, attached onto optical modules, are used to distinguish different types of optical modules. As shown in Table 7-2, different types of optical modules have different codes. Table 7-2 Codes and types of optical modules Optical Module Code 34060286 Optical Interface Type 1000BASESX (0.5 km) 34060473 1000BASELX (10 km) 34060290 1000BASELX (10 km) 34060298 1000BASEVX (40 km) 34060360 1000BASEZX (80 km) 34060324 1000BASEZX (80 km) 34060483 1000BASECWDM (80 km) 34060481 1000BASECWDM (80 km) 34060479 1000BASECWDM (80 km) Optical Transceiver, eSFP, 1550 nm, 1.25 Gbit/s, LC (-40 to 85), Singlemode, 80 km Optical transceiver, eSFP, 1471 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical transceiver, eSFP, 1491 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical transceiver, eSFP, 1511 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km EG2 Optical Transceiver, eSFP, 1550 nm, 1.25 Gbit/s, LC, Single-mode, 80 km Optical Transceiver, eSFP, 1310 nm, 1.25 Gbit/s, LC ( - 40 to 85), Singlemode, 10 km Optical Transceiver, eSFP, 1310 nm, 1.25 Gbit/s, LC, Single-mode, 40 km Optical Module Basic Information Optical Transceiver, eSFP, 850 nm, 2.125 Gbit/s (Multi rate), LC, Multimode, 0.5 km Optical transceiver, eSFP, 1310 nm, 1.25 Gbit/s, LC, Single-mode, 10 km Mapping Board EG2
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7 Label
Optical Module Code 34060482
Optical Interface Type 1000BASECWDM (80 km)
Optical Module Basic Information Optical transceiver, eSFP, 1531 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical transceiver, eSFP, 1551 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical transceiver, eSFP, 1571 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical transceiver, eSFP, 1591 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical transceiver, eSFP, 1611 nm, 100 Mbit/s to 2.67 Gbit/s, LC, Singlemode, 80 km Optical Transceiver, eSFP, 1310 nm, STM1, LC, Single-mode, 15 km
Mapping Board
34060478
1000BASECWDM (80 km)
34060476
34060477
34060480
34060276
100BASE-FX /S-1.1 (15 km)
EF8F CD1
34060307
100BASE-FX /S-1.1 (15 km)
Optical Transceiver, eSFP, 1310 nm, STM1, LC, Single-mode, 15 km
34060281
100BASE-FX /L-1.1 (40 km)
34060308
100BASE-FX /L-1.1 (40 km)
Optical Transceiver, eSFP, 1310 nm, STM1 LC, Single-mode, 40 km
34060282
100BASE-FX /L-1.2 (80 km)
34060309
100BASE-FX /L-1.2 (80 km)
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A Glossary
A
A ATM Air interface link
Glossary
The asynchronous transfer mode (ATM) is designed to transfer cell in which multiple service types (such as voice, video, or data) are conveyed in fixed-length (53-byte) cells. Fixed-length cells allow cell processing to occur in hardware, thereby reducing transit delays. A link used to transmit radio frequencies between mobile phones and base stations.
B BTS Base transceiver station. It terminates the radio interface. It allows transmission of traffic and signaling across the air interface. The BTS includes the baseband processing, radio equipment, and the antenna. Base station controller. A BSC is used to control the radio signals of the receiving and transmitting base stations.
BSC
C CES CoS Circuit emulation service. A technology adapts the traditional narrowband services, that is, TDM services, to the wideband. Class of Service. A queuing discipline. An algorithm compares fields of packets or CoS tags to classify packets and to assign to queues of differing priority. CoS can not ensure network performance or guarantee priority in delivering packets. A process that combines multiple virtual containers. The combined capacities can be used as a single capacity. The concatenation also keeps the integrity of bit sequence.
Concatenation
Issue 02 (2010-01-30)
A-1
A Glossary
Control plane
The control plane performs the call control and connection control functions. Through signaling, the control plane sets up and releases connections, and may restore a connection in case of a failure. The control plane also performs other functions in support of call and connection control, such as routing information dissemination.
E E-Line Ethernet line. An point-to-point private service type that is provided for the user Ethernet in different domains.
F FEC Forwarding equivalence class. A term used in multiprotocol label switching (MPLS) to describe a group of packets which are forwarded in the same manner (e.g., over the same path, with the same forwarding treatment). FEC can be classified by address, service type, priority and QOS of packets, and may be bound to a MPLS label. Forward Error Correction. FEC is a technology of error control for data transmission, whereby the sender adds redundant data to its messages, which allows the receiver to detect and correct errors (within some bound). In the case of flow classification, all the services from Layer 2 to Layer 7 of the OSI model are searched out and the service types are classified. Refers to a cyclic set of consecutive timeslots in which the relative position of each time slot can be identified In the transmission network. Refers to the packet data unit of the data link layer in the OSI model. It consists of frame header, user data and frame tail. The frame header and frame tail are used for synchronization and error control. The forwarding plane is also referred to as data plane, which forwards packets under the management of the control plane.
FEC
Flow classification
Frame
Forwarding plane
I IS-IS IS-IS inter-domain rerouting information switching protocol. The IS-IS protocol is a dynamic routing protocol designed by ISO for connectionless network protocol (CLNP).
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Issue 02 (2010-01-30)
A Glossary
IMA
Inverse multiplexing over ATM. A physical layer technology in which a high-speed stream of ATM cells is broken up and transmitted across multiple T1/E1 links, then is reconstructed back into the original ATM cell order at the destination. IMA is first standardized (v1.0) by the ATM Forum in 1997, and recently updated (v1.1) in 1999.
L L2VPN Layer 2 virtual private network. A virtual private network realized in the packet switched (IP/MPLS) network by Layer 2 switching technologies. label switch router. LSR is to forward packets in an MPLS network by looking only at the fixed-length label. Label switch path. An ingress and egress switched path built through a series of LSRs to forward the packets of a particular FEC using a label swapping forwarding mechanism. A "topological component" that provides transport capacity between two endpoints in different subnetworks via a fixed (that is, inflexible routing) relationship.
LSR LSP
link
M MPLS OAM The MPLS OAM provides continuity check for a single LSP, and provides a set of fault detection tools and fault correct mechanisms for MPLS networks.
N node In a network, a point where one or more functional units interconnect transmission lines.
P PWE3 pseudo wire emulation edge to edge. A mechanism that emulates the essential attributes of service (such as a E1 leased line or Frame Relay) over a PSN. A method used to upgrade, load, and manage NE-level software in a centralized manner. A logical grouping of information including header and (usually) user data. Pseudo wire. A mechanism that bears the simulated services between PEs on the PSN.
Package loading packet PW
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A Glossary
Q QoS Quality of Service. A set of service requirements to be met by the network while transporting a connection or flow; the collective effect of service performance which determine the degree of satisfaction of a user of the service. (E.360.1)
R Route Path through an network.
S Switch To filter, forward frames based on label or the destination address of each frame. This behavior operates at the data link layer of the OSI model.
T Tunnel A information transmission channel that is set up between two entities in the application of VPN. A tunnel provides sufficient security to prevent intrusion to the VPN internal information. A technique that can creates data forwarding paths for nodes based on the available resources on the network and reserve bandwidths for key traffic.
Traffic engineering
V VC VPWS A unidirectional logical connection between two nodes. virtual private wire service. A Virtual Private Wire Service (VPWS) is a point-to-point circuit (link) connecting two Customer Edge devices. The link is established as a logical link through a packet switched network.
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Issue 02 (2010-01-30)
B Acronyms and Abbreviations
B
A ATM AF AM ATPC APS ARP
Acronyms and Abbreviations
Asynchronous Transfer Mode Assured Forwarding Adaptive and Modulation Automatic Transmit Power Control Automatic Protection Switching Address Resolution Protocol
B BSC BTS Base Station Controller Base Transceiver Station
C CES CE CoS CC CIR Circuit Emulation Service Customer Edge Class of Service Continuity Check Committed Information Rate
D DCN Data Communication Network
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DSCP DS
Differentiated Services Code Point Differentiated Services
E EMC EPL EVPL ETS ETSI E-Line Electromagnetic Compatibility Ethernet Private Line Ethernet Virtual Private Line European Telecommunication Standards European Telecommunications Standards Institute Ethernet-Line
F FEC FEC FD Forwarding Equivalence Class Forward Error Correction Frequency Diversity
G GPS Global Positioning System
H HSB HSDPA Hot Standby High Speed Downlink Packet Access
I IP IEC IEEE IMA ITU-T Internet Protocol International Electrotechnical Commission Institute of Electrical and Electronics Engineers Inverse Multiplexing for ATM International Telecommunication Union Telecommunication Standardization Sector
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L LACP LSP LSR L2VPN Link Aggregation Control Protocol Label Switched Path Label Switched Router Layer2 Virtual Private Network
M MPLS MP MAC Multiprotocol Label Switching Merge Point Medium Access Control
N NNI NSF Network to Network Interface Not Stop Forwarding
O OAM Operation, Administration and Maintenance
P PE PW PWE3 PSN PDU PRC PHP PHB PPVPN PIR Provider Edge Pseudo Wire Pseudo Wire Emulation Edge-to-Edge Packet Switched Network Protocol Data Unit Primary Reference Clock Penultimate Hop Popping Per-Hop Behavior Provider Provisioned VPN Peak Information Rate
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B-3
Q QoS QPSK Quality of Service Quadrature Phase Shift Keying
R RNC Radio Network Controller
S SD SDH Space Diversity Synchronous Digital Hierarchy
T TDM TTL Time Division Multiplex Time to Live
U UNI User Network Interface
V VC VCC VLAN VP VPN VPC VPWS VPI VCI Virtual Channel Virtual Channel Connection Virtual Local Area Network Virtual Path Virtual Private Network Virtual Path Connection Virtual Private Wire Service Virtual Path Identifier Virtual Channel Identifier
W WRED Weighted Random Early Detection
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Issue 02 (2010-01-30)
Issue 02 (2010-01-30)
B-5

Huawei OptiX RTN 950 Radio Transmission System IDU Hardware Description

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Huawei OptiX RTN 950 Radio Transmission System IDU Hardware Description

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OptiX RTN 950 Radio Transmission System V100R001C02

IDU Hardware Description

HUAWEI TECHNOLOGIES CO., LTD.

Trademarks and Permissions

Huawei Technologies Co., Ltd.

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

About This Document

About This Document

Basics of digital microwave communication Basics of the OptiX RTN 950

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Updates in Issue 02 (2010-01-30) Based on Product Version V100R001C02

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Update Location 3 Boards

Description Adds the priorities of slots for housing each board.

Updates in Issue 01 (2009-09-30) Based on Product Version V100R001C02

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

OptiX RTN 950 Radio Transmission System IDU Hardware Description

OptiX RTN 950 Radio Transmission System IDU Hardware Description

A Glossary.....................................................................................................................................A-1 B Acronyms and Abbreviations.................................................................................................B-1

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

1 Introduction to the Product

Introduction to the Product

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

1 Introduction to the Product

OptiX RTN 950 Radio Transmission System IDU Hardware Description

1.1 Network Application

E1 FE/GE IMA E1 Regional backhaul network GE E1 IMA E1 FE E1

OptiX RTN 910

1.2 Equipment Type

OptiX RTN 950 Radio Transmission System IDU Hardware Description

1 Introduction to the Product

Figure 1-2 IDU 950

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

SLOT 7 SLOT 11 SLOT 5 (1 Gbit/s) SLOT 3 (1 Gbit/s) SLOT 1 (2 Gbit/s)

SLOT 8 SLOT 6 (1 Gbit/s) SLOT 4 (1 Gbit/s) SLOT 2 (2 Gbit/s)

Board Description and Valid Slots

Valid Slot Slot 7 and slot 8 Slots 1-6

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Board Name IFE2

Valid Slot Slots 1-6

Slots 1-6 Slots 1-6

EF8T EF8F EG2 ML1 ML1A CD1 PIU FAN

second port of the EG2 is not available.

describes only the ML1 instead of both.

Huawei Proprietary and Confidential Copyright Huawei Technologies Co., Ltd.

OptiX RTN 950 Radio Transmission System IDU Hardware Description

Figure 2-2 Board relations of the IDU 950

4xFE 8xFE 8xFE 2xGE+4xFE 2xGE+4xFE 2xGE E1 C-STM-1

AUXQ EF8F EF8T EM6F EF6T EG2

Service processing and forwarding module