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5

Pamirs UMA Block Diagram

SYSTEM DC/DC
TPS51120
OUTPUTS

INPUTS

Project code : 91.4S401.001


PCB P/N :06228
Revision : SB

Intel CPU
Meron 2M/4M SV
FSB:667 or 800 MHz

CLK GEN

ICS9LPRS355AKLFT-GP

5V_S3
DCBATOUT
3V_AUX_S5

SYSTEM DC/DC

4,5,6

RGB CRT

CRT

15

1D5V_S0
DCBATOUT

Host BUS
533/667MHz

1D8V_S3

LVDS
DDRII 667 Channel A

SYSTEM DC/DC

16

ISL6269CRZ

DDR I/F

INTEGRATED GRAHPICS

DDR II 667 Channel B

Slot 1

LCD

Crestline-GM/GML
AGTL+ CPU I/F

DDRII
533/667

OUTPUTS

INPUTS

DDRII
Slot 0
533/667
13

MAX8743

LVDS, CRT I/F

14

SVIDEO

TVOUT 15

INPUTS

OUTPUTS

DCBATOUT

1D05V_S0

PCIE x 16

7,8,9,10,11,12

MAXIM CHARGER
MAX8725

1394

1394
25

DMI I/F
100MHz

Ricoh
R5C832

SD/SDIO/MMC
MS/MS Pro/xD25

CAMERA32

OUTPUTS
BT+

DCBATOUT

18V

3.0A

5V

100mA

BLUE
TOOTH 32

INTEL

24,25

10/100 NIC
Marvell 88E8039

LCI

CPU DC/DC
MAX8736ETL

ICH8-M

USB 2.0

USB x 3 23

INPUTS

OUTPUTS

10 USB 2.0/1.1 ports

27

VCC_CORE

ETHERNET (10/100/1000Mb)
High Definition Audio

SATA

HDD

23

PATA

ODD

23

DCBATOUT

0.844~1.3V
44A

ATA 66/100
ACPI 1.1

AMOM
B

RJ11
CONN 29

HD Audio

MODEM
CX20548

PCB LAYER

LPC I/F
PCI/PCI BRIDGE

TPM
SLB9635TT

LPC Bus

18,19,20,21

34

INTERNAL
ARRAY MIC

PCIE+USB 2.0
29

LINE OUT

Ricoh
R5538

SPDIF

PCIE x 1
USB 2.0 x 1

PCIE x 1

HD AUDIO
CODEC
CX20549-12Z

MIC IN

PCI

CardReader

RJ45
CONN 28

INPUTS

KBC
ENE KB3910SF

L1:

Signal 1

L2:

GND

L3:

Signal 2

L4:

Signal 3

L5:

VCC

L6:

Signal 4

31

28

OP AMP
APA2031

New Card

30

28

Mini-Card
802.11a/b/g26

Mini-Card
WWAN26

Capacity
Button32

Touch
Pad 32

Int.
KB32

Thermal
& Fan
G792 22

CIR

Flash ROM
1MB 33
A

<Core Design>

Wistron Corporation

2CH
SPEAKER

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

DOCK
CRT

MIC IN

LINE OUT

S/PDIF

TVOUT

Title

10/100
Ethernet

Block Diagram

CIR

Size
A3

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007


5

-1
Sheet
1

of

41

E
19,21 +RTCVCC
4,5,6,7,9,10,11,19,21,38,41

Signal

Usage/When Sampled

HDA_SDOUT

XOR Chain Entrance/


PCIE Port Config 1 bit1,
Rising Edge of PWROK

HDA_SYNC

PCIE Port Config 1 bit0,


Rising Edge of PWROK.

Comment
Allows entrance to XOR Chain testing when TP3
pulled low at rising edge of PWROK.When TP3 not
pulled low at rising edge of PWROK,sets bit1 of
RPC.PC(Config Registers:offset 224h)
Sets bit0 of RPC.PC(Config Registers:Offset 224h)

GNT2#

PCIE Port Config 2 bit0,


Rising Edge of PWROK.

Sets bit2 of RPC.PC(Config Registers:Offset 224h)

GPIO20

Reserved

Weak Internal PULL-DOWN.NOTE:This signal should


not be pull HIGH.

GNT3#

Top-Block Swap Override.


Rising Edge of PWROK.

ICH_RSVDtp3

AZ_DOUT_ICH

0
0
1
1

0
1
0
1

Description
RSVD
Enter XOR Chain
Normal Operation(default)
Set PCIE port cofig bit1

1D05V_S0

3,7,10,21,38 1D25V_S0

1D25V_S0

27 1D2V_LAN_S5

1D2V_LAN_S5

28 1D5V_NEW_S0

1D5V_NEW_S0

5,10,17,19,20,21,26,28,37,38,41

GNT0#
SPI_CS1#

INTVRMEN

Boot BIOS Destination


Selection.
Rising Edge of PWROK.
Integrated VccSus1_05
VccSus1_5 and VccCL1_5
VRM Enable/Disable.Always
sampled.

Enables integrated VccSus1_05,VccSus1_5 and


VccCL1_5 VRM when sampled high

29,30 3D3V_AUD_S0

3D3V_AUD_S0

SATALED#

SPKR

TP3

GPIO33/
HDA_DOCK_EN#

Integrated VccLAN1_05
VccCL1_05 VRM enable
/Disable. Always sampled.

Enables integrated
when sampled high

VccLAN1_05,VccCL1_05 VRM

PCIE LAN REVERSAL.Rising


Edge of PWROK.

This signal has weak internal pull-up.


set bit27 of MPC.LR(Device28:Function0:Offset D8)

No Reboot.
Rising Edge of PWROK.

If sampled high, the system is strapped to the


"No Reboot" mode(ICH8M will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.(Offset:3410h:bit5)

XOR Chain Entrance.


Rising Edge of PWROK.

This signal should not be pull low unless using


XOR Chain testing.

High=Enable

CFG Strap
CFG 5

LOW 0
DMI X 2

CFG 8

Low Power PCI Express

CFG 9

PCI Express Graphics


Lane Reversal

CFG 16

FSB Dynamic ODT

Normal
Lane Reversal

Disabled

HIGH 1
DMI X 4
Low Power mode
Normal Mode(Lanes
number in order)
Enabled

3D3V_LAN_S5

3D3V_S0

3D3V_S0

3D3V_S5

3D3V_S5
5V_AUX_S5

5V_S3

5V_S3

5V_S0

5V_S0

16,21,34,37,38 5V_S5

5V_S5

15,16,17,20,21,22,23,26,29,30,31,32,33,34,35,41

17,39,40,41 AD+
16,17,34,35,36,37,38,39,41

Low=Disable
Low=Disable

AD+

DCBATOUT

DCBATOUT

13,14,38,41 DDR_VREF_S0

DDR_VREF_S0

7,13,14,38 DDR_VREF_S3

DDR_VREF_S3

22,31,33,39 KBC_3D3V_AUX

KBC_3D3V_AUX

16

DEFAULE HIGH

LCDVDD_S0

LCDVDD_S0

5,6,35 VCC_CORE_S0

VCC_CORE_S0

No Reboot Strap
SPKR
LOW = Defaule
High=No Reboot

Internal Pull-Up.If sampled low,the Flash Descriptor


Flash Descriptor Security Security will be overidden.if high,the Security
Override Strap
measures defined in the Flash Descriptor will be in
8.2K PULL HIGH
Rising Edge of PWROK.
effect.
This should only be used in manufacturing
environments

INTEL CRESTLINE STRAP PIN

3D3V_AUX_S5

27,28 3D3V_LAN_S5

16,23,32,33,34,36,37,38

integrated VccSus1_05,VccSus1_5,VccCL1_5

LAN100_SLP

3D3V_AUX_S5

22,29,31,34,36 5V_AUX_S5

integrated VccLan1_05VccCL1_05
LAN100_SLP

1D8V_S3
2D5V_LAN_S5

17,18,20,21,22,26,27,28,29,31,34,36,39,41

1D5V_S0

1D8V_S3

27,28 2D5V_LAN_S5

3,4,7,9,10,11,13,14,15,16,18,19,20,21,22,23,24,25,26,27,28,29,31,32,33,34,35,36,41

LPC(Default)

SM_INTVRMEN High=Enable

1D5V_S0

7,10,11,13,14,37,38,41

19,31,32,33,36,39,40

Sampled low:Top-Block Swap mode(inverts A16 for all A16 swap override strap
cycles targeting FWH BIOS space).
PCI_GNT#3 low = A16 swap override enable
Note: Software will not be able to clear the
high = default
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.
BOOT BIOS Strap
PCI_GNT#0 SPI_CS#1
BOOT BIOS Location
Controllable via Boot BIOS Destination bit
0
1
SPI
(Config Registers:Offset 3410h:bit 11:10).
PCI
1
0
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

+RTCVCC

1D05V_S0

XOR Chain Entrance Strap

INTEL ICH8-M STRAP PIN


4

INTEL ICH8-M INTEGRATED


PULL-UPS and PULL-DOWNS
SIGNAL

Resistor Type/Value

HDA_BIT_CLK

PULL-DOWN 20K

HDA_RST#

NONE

HDA_SDIN[3:0]

PULL-DOWN 20K

HDA_SDOUT

PULL-DOWN 20K

HDA_SYNC

PULL-DOWN 20K

GNT[3:0]

PULL-UP 20K

GPIO[20]

PULL-DOWN 20K

LDA[3:0]#/FHW[3:0]#

PULL-UP 20K

LAN_RXD[2:0]

PULL-UP 20K

LDRQ[0]

PULL-UP 20K

LDRQ[1]/GPIO23

PULL-UP 20K

PME#

PULL-UP 20K

CFG 20

Normal Operation Reserved Lane


Only PCIE or SDVO
PCIE and SDVO are
is operation
operation simultaneous

PWRBTN#

PULL-UP 20K

SATALED#

PULL-UP 20K

SDVO_CTRL_DATA

NO SDVO Card
Present

SPI_CS1#

PULL-UP 20K

SPI_CLK

PULL-UP 20K

XOR/ALL-Z

SPI_MOSI

PULL-UP 20K

Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation

SPI_MISO

PULL-UP 20K

Wistron Corporation

TACH_[3:0]

PULL-UP 20K

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

SPKR

PULL-DOWN 20K

TP[3]

PULL-UP 20K

USB[9:0][P,N]

PULL-DOWN 15K

CL_RST#

TBD

CFG 19

DMI Lane Reserved


Concurrent SDVO/PCIE

SDVO Card Present

SDVO Present

CFG 12
CFG 13
LL(00)
LH(01)
HL(10)
HH(11)

<Core Design>

Title

Table of Content
Size
A3

Document Number

Date: Tuesday, March 06, 2007

Rev

Pamirs
Sheet

-1
2

of

41

CLK_XTAL_OUT
1

C185
SC27P50V2JN-2-GP
U21

4
16
9
46
62
23

C186
SC27P50V2JN-2-GP

1
2

X-14D31818M-40GP

VDDREF
VDD48
VDDPCI
VDDSRC
VDDCPU
VDDPLL3

R650
1
L36

1
2

3
2

CPUT0
CPUC0

61
60

CLK_CPU_BCLK1
CLK_CPU_BCLK1#

RN29

1
2

4 SRN0J-6-GP
3

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

CPUT1_F
CPUC1_F

58
57

CLK_MCH_BCLK1
CLK_MCH_BCLK1#

RN32

1
2

4 SRN0J-6-GP
3

CLK_MCH_BCLK 7
CLK_MCH_BCLK# 7

CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8

54
53

CLK_CPU_XDP1
CLK_CPU_XDP1#

SRCT7/CR#_F
SRCC7/CR#_E

51
50

CLK_PCIE_LAN1
CLK_PCIE_LAN1#

RN36

1
2

4 SRN0J-6-GP
3

SRCT6
SRCC6

48
47

CLK_PCIE_MINI1_1
CLK_PCIE_MINI1_1#

RN44

1
2

4 SRN0J-6-GP
3

SRCT10
SRCC10

41
42

CLK_PCIE_NEW1
CLK_PCIE_NEW1#

2
1

3
4

SRCT11/CR#_H
SRCC11/CR#_G

40
39

SRCT9
SRCC9

37
38

CLK_PCIE_MINI2_1
CLK_PCIE_MINI2_1#

SRCT4
SRCC4

34
35

CLK_MCH_3GPLL1
CLK_MCH_3GPLL1#

SRCT3/CR#_C
SRCC3/CR#_D

31
32

CLK_PCIE_ICH1
CLK_PCIE_ICH1#

SRCT2/SATAT
SRCC2/SATAC

28
29

CLK_PCIE_SATA1
CLK_PCIE_SATA1#

27MHZ_NONSS/SRCT1/SE1
27MHZ_SS/SRCC1/SE2

24
25

MCH_SSCDREFCLK1
MCH_SSCDREFCLK1#

SRCT0/DOTT_96
SRCC0/DOTC_96

20
21

X1
X2

C206
20

SC10U10V5ZY-1GP

C200
SCD1U16V2ZY-2GP

C465
SCD1U16V2ZY-2GP

DY

C459
SCD1U16V2ZY-2GP

C466
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U10V5ZY-1GP

SC1U10V3KX-3GP

C441

C212

0R3-0-U-GP

CLK_XTAL_IN
CLK_XTAL_OUT

C190 SC4D7P50V2CN-1GP

C446

CLK_48M_ICH

R159
20
20

FSA

H_STP_PCI#
H_STP_CPU#

20

USB_48MHZ/FSLA

45
44

PCI_STOP#
CPU_STOP#

7
6

13,14,20 ICH_SMBCLK
13,14,20 ICH_SMBDATA

17

33R2J-2-GP

CK_PWRGD

SCLK
SDATA

63

CK_PWRGD/PD#

8
10
11
12
13
14

PCI0/CR#_A
PCI1/CR#_B
PCI2/TME
PCI3
PCI4/27_SELECT
PCI_F5/ITP_EN

64
5

FSLB/TEST_MODE
REF0/FSLC/TEST_SEL

55

NC#55

1
1
1
1
1

DY

2
2
2
2
2

33R2J-2-GP
33R2J-2-GP
33R2J-2-GP
33R2J-2-GP
33R2J-2-GP

R382
20

CLK_14M_ICH

PCI2_TME
27_SEL
ITP_EN

FSB
FSC

18
15
1

C457

2 C1711
SC4D7P50V2CN-1GP

2 C1741

2 C1721

2 C1731
SC4D7P50V2CN-1GP

1
R386
10KR2J-3-GP

CLK_PCIE_MINI1 26
CLK_PCIE_MINI1# 26

SRN0J-6-GP
1
R184
R183 1

12/18 DY
RN41
RN40
RN39

RN38

2
1

3
4

2
1

3
4

2
1

3
4

2
1

3
4

01/31

2
1
RN33
CLK_MCH_DREFCLK1
2
CLK_MCH_DREFCLK1#
1
RN31

CLK_PCIE_NEW 28
CLK_PCIE_NEW# 28
3D3V_S0
10KR2J-3-GP
NEWCARD_CLKREQ# 28
2
10KR2J-3-GP

SRN0J-6-GP

CLK_PCIE_MINI2 26
CLK_PCIE_MINI2# 26

SRN0J-6-GP

CLK_MCH_3GPLL 7
CLK_MCH_3GPLL# 7

SRN0J-6-GP

CLK_PCIE_ICH 20
CLK_PCIE_ICH# 20

CLK_PCIE_SATA 19
CLK_PCIE_SATA# 19

SRN0J-6-GP

10/24
3
4

MCH_SSCDREFCLK 7
MCH_SSCDREFCLK# 7

SRN0J-6-GP
3
4

CLK_MCH_DREFCLK 7
CLK_MCH_DREFCLK# 7

SRN0J-6-GP

FS_B
0
0
1
1

FS_A
1
1
0
1

CPU

DY
2

1
0
0
0

100M
133M
200M
166M

R141
10KR2J-3-GP
27_SEL

FS_C

R142
10KR2J-3-GP
2

R379
10KR2J-3-GP

ITP_EN

12/12
CLK_PCIE_LAN 27
CLK_PCIE_LAN# 27

3D3V_S0_CK505

3D3V_S0_CK505

Output

ITP_EN

0
1

R378
10KR2J-3-GP

SRC8
CPU_ITP

CPU_BSEL2

R381

CPU_BSEL1

R163

CPU_BSEL0

R160

DY

RN42

2/12

ICS9LPRS355AKLFT-GP

DY

SC4D7P50V2CN-1GP

12/20

PCI2_TME

SC4D7P50V2CN-1GP

DY

SC4D7P50V2CN-1GP

01/31

R385
10KR2J-3-GP

GND48
GNDPCI
GNDREF

33R2J-2-GP
3D3V_S0_CK505

GND

R143
R150
R151
R153
R152

TP103
TP104

65

20 CLKSATAREQ#
7
CLKREQ#_B
33 PCLK_FWH
34
CLK_PCI_TCG
31
PCLK_KBC
18
CLK_PCI_ICH
24
PCLK_PCM

GND
GNDSRC
GNDSRC
GNDSRC
GNDCPU
GND

12/18

22
30
36
49
59
26

3D3V_S0_CK505_IO

DUMMY-R3

2/12

X1
CLK_XTAL_IN

1D25V_S0

2/12
3D3V_S0

3D3V_S0_CK505_IO

C445

C440

SCD1U16V2ZY-2GP

C475

SCD1U16V2ZY-2GP

C442

SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP

C439
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

C448

C195

3D3V_S0_CK505

SC10U10V5ZY-1GP

C4840R3-0-U-GP
SC1U10V3KX-3GP

3D3V_S0_CK505

2/12
2

19
27
43
52
33
56

L11
1

VDD96_IO
VDDPLL3_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDCPU_IO

3D3V_S0

FSC

2
10KR2J-3-GP

FSB

27_SEL

PIN 20

PIN 21

0
1

DOT96T
SRCT0

DOT96C
SRCC0

PIN 24

PIN 25

SRCT1/LCDT_100
27M_NSS

SRCT1/LCDT_100
27M_SS

0R0402-PAD
FSA
2K2R2J-2-GP

R149 1

2 1KR2J-1-GP

MCH_CLKSEL0 7

R134 1

2 1KR2J-1-GP

MCH_CLKSEL1 7

R377 1

2 1KR2J-1-GP

MCH_CLKSEL2 7

<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Design Note:
Title

1. All of Input pin didn't have internal pull up resistor.


2. Clock Request (CR) function are enable by registers.
3. CY28548 integrated serial resistor of differential clock,
so put 0 ohm serial resistor in the schematic.

Size
A3

Clock generator CY28548

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007

-1
Sheet

of

41

5
7

H_A#[3..35]
U53A 1 OF 4

7
7
7
7
7

H_ADSTB#0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_ADSTB#1
H_A20M#
H_FERR#
H_IGNNE#

19
19
19
19

H_STPCLK#
H_INTR
H_NMI
H_SMI#

TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28
TPAD28

TP9
TP10
TP5
TP7
TP3
TP8
TP4
TP12
TP6
TP11

TPAD28 TP2

A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
A32#
A33#
A34#
A35#
ADSTB1#

A6
A5
C4

A20M#
FERR#
IGNNE#

D5
C6
B4
A3

STPCLK#
LINT0
LINT1
SMI#

CPU_RSVD01
CPU_RSVD02
CPU_RSVD03
CPU_RSVD04
CPU_RSVD05
CPU_RSVD06
CPU_RSVD07
CPU_RSVD08
CPU_RSVD09
CPU_RSVD10

M4
N5
T2
V3
B2
C3
D2
D22
D3
F6

CPU_RSVD11

B1

RSVD#M4
RSVD#N5
RSVD#T2
RSVD#V3
RSVD#B2
RSVD#C3
RSVD#D2
RSVD#D22
RSVD#D3
RSVD#F6

H_DEFER#
H_DRDY#
H_DBSY#

F1

H_BR0#
H_IERR#
H_INIT#

IERR#
INIT#

D20
B3

LOCK#

H4

H_LOCK#

RESET#
RS0#
RS1#
RS2#
TRDY#

C1
F3
F4
G3
G2

H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#

HIT#
HITM#

G6
E4

H_HIT#
H_HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#

XDP_BPM#0
AD4
XDP_BPM#1
AD3
XDP_BPM#2
AD1
XDP_BPM#3
AC4
XDP_BPM#4
AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
C20 XDP_DBRESET#

H_ADS#
H_BNR#
H_BPRI#

1D05V_S0

7
7
7

H_ADS#
H_BNR#
H_BPRI#

H5
F21
E1

H_DEFER#
7
H_DRDY# 7
H_DBSY# 7
H_BR0#
H_INIT#

PROCHOT#
THRMDA
THRMDC
THERMTRIP#

HCLK

BCLK0
BCLK1

R114
56R2J-4-GP

CONTROL

BR0#

H1
E2
G5

19

H_LOCK# 7
H_RESET#
7
H_RS#0 7
H_RS#1 7
H_RS#2 7
H_TRDY#
7
H_HIT#
7
H_HITM# 7
TP68
TP91
TP93
TP101
TP102

2/12

XDP_DBRESET# 20
CPU_PROCHOT#

THERMAL

ICH

H_A20M#
H_FERR#
H_IGNNE#

19
19
19

Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1

REQ0#
REQ1#
REQ2#
REQ3#
REQ4#

ADDR GROUP 1

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

C
7

K3
H2
K2
J3
L1

ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#

XDP/ITP SIGNALS

A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
ADSTB0#

D21
A24
B25
C7

1
R122

2
68R3J-GP

H_THERMDA
H_THERMDC
H_THERMTRIP#

A22 CLK_CPU_BCLK
A21 CLK_CPU_BCLK#

RESERVED

J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1

ADDR GROUP 0

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

35

1D05V_S0
H_THERMDA 22
H_THERMDC 22

H_THERMTRIP# 7,19

H_THERMDA, H_THERMDC routing together,


Trace width / Spacing = 10 / 10 mil

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

layout note:Zo =55


ohm , 0.5" MAX for
GTLREF

layout note : Change R237 to 649 ohm if using XTP to ITP adapter

3D3V_S0

R29

KEY_NC

XDP_DBRESET#

BGA479-SKT6-GPU3

DY
1KR2J-1-GP
1D05V_S0

original value:BGA479-SKT6-GPU1
XDP_TDI

R31
XDP_TMS

54D9R2F-L1-GP

R30
XDP_TDO

54D9R2F-L1-GP

R55

XDP_TRST#

54D9R2F-L1-GP

R28

1D05V_S0

XDP_TCK

51R2F-2-GP
54D9R2F-L1-GP

R42

54D9R2F-L1-GP

R33
XDP_BPM#5

R123
56R2J-4-GP

DY

CPU_PROCHOT#

DY
Q8

OCP#

20

MMBT3904WT1G-GP
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Meron(1/3)-AGTL+/XDP
Size
Custom
Date:

Document Number

Thursday, March 08, 2007

Rev

-1

Pamirs
Sheet

of

41

7 H_D#[0..63]

VCC_CORE_S0

VCC_CORE_S0

U53B 2 OF 4
U53C 3 OF 4

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

B22
B23
C21

COMP0
COMP1
COMP2
COMP3

BSEL0
BSEL1
BSEL2

DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#

E5
B5
D24
D6
D7
AE6

H_DPRSTP#
H_DPSLP#
H_DPWR#
H_CPUSLP#
PSI#

R131
R132
R84
R83

1
1
1
1

2
2 27D4R2F-L1-GP
2 54D9R2F-L1-GP
2 27D4R2F-L1-GP
54D9R2F-L1-GP

H_DPRSTP#
7,19
H_DPSLP#
19
H_DPWR# 7

SB
H_PWRGOOD 19

H_CPUSLP#
PSI#

7
35

BGA479-SKT6-GPU3

PLACE C173
make sure
routing is
away other

close to the TEST4 PIN,


TEST3,TEST4,TEST5 trace
reference to GND and
noisy signals

B
CPU_BSEL

CPU_BSEL2
0

166

200

CPU_BSEL1

Resistor Placed
within 0.5" of CPU
pin. Trace should
be at least 25 mils
away from any other
toggling signal .
COMP[0,2] trace
width is 18 mils.
COMP[1,3] trace
width is 4 mils .

CPU_BSEL0

1D05V_S0
1 R113
1 R100

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

VCCA
VCCA

B26
C26

VID0
VID1
VID2
VID3
VID4
VID5
VID6

AD6
AF5
AE5
AF4
AE3
AF3
AE2

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

VCCSENSE

AF7

VCC_SENSE

VSSSENSE

AE7

VSS_SENSE

BGA479-SKT6-GPU3

2 0R0402-PAD
2 0R0402-PAD
TC15

DY

R26
U26
AA1
Y1

DATA GRP2

COMP0
COMP1
COMP2
COMP3

MISC

H_DSTBN#3 7
H_DSTBP#3 7
H_DINV#3 7

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

1D5V_S0

layout note:
place C3 near
PIN B26

C156
CPU_VID[0..6]

35

VCC_SENSE

35

VSS_SENSE

35

VCC_SENSE

1
R99

VSS_SENSE

1
2
R98 100R2F-L1-GP-U

2
100R2F-L1-GP-U

TPAD28 TP1
TPAD28 TP15
3 CPU_BSEL0
3 CPU_BSEL1
3 CPU_BSEL2

AD26
C23
D25
C24
AF26
AF1
A26

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

2 C154

DY

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#

H_DSTBN#2 7
H_DSTBP#2 7
H_DINV#2 7

A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

V_CPU_GTLREF
TPAD28 TP13
TPAD28 TP16
TPAD28 TP14

SCD1U16V2KX-3GP
1

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_DSTBN#1
H_DSTBP#1
H_DINV#1

D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
DSTBN1#
DSTBP1#
DINV1#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

SE330U2VDM-6-GP

7
7
7

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

DATA GRP1

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#

SCD01U16V2KX-3GP

H_DSTBN#0
H_DSTBP#0
H_DINV#0

D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
DSTBN0#
DSTBP0#
DINV0#

DATA GRP3

7
7
7

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25

DATA GRP0

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

C161
SC10U10V5ZY-1GP

Length match within


25 mils . The trace
width/space/other is
20/7/25 .

VCC_CORE_S0

Close to CPU pin


within 500mils

R352
1KR2F-3-GP
1 1

1D05V_S0

Close to CPU
pin AD26
Z0=55 ohm
with in
500mils .

<Core Design>

V_CPU_GTLREF

Wistron Corporation

R353

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

2KR2F-3-GP
2

Title

Meron(2/3)-AGTL+/PWR
Size
A3

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

of

41

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

SC10U10V5KX-2GP

C828

C144

C146

C142

C135

C130
SC10U10V5KX-2GP

DY

C127
SC10U10V5KX-2GP

DY

C120
SC10U10V5KX-2GP

DY

C111

SC10U10V5KX-2GP

C827

C117
SC10U10V5KX-2GP

1
2

DY

C826
SC10U10V5KX-2GP

SC10U10V5KX-2GP

1
SC10U10V5KX-2GP

SC10U10V5KX-2GP

C136

C125

C145

C124
SC10U10V5KX-2GP

DY

C131
SC10U10V5KX-2GP

DY

C139
SC10U10V5KX-2GP

3/5
Place these capacitors on L1
(North side ,Secondary Layer)

VCC_CORE_S0

Mid Frequencd
Decoupling

B
2

2
C150
SCD1U16V2KX-3GP

C149
SCD1U16V2KX-3GP

C108
SCD1U16V2KX-3GP

C109
SCD1U16V2KX-3GP

C107
SCD1U16V2KX-3GP

1D05V_S0

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

Place these capacitors on L1


(North side ,Secondary Layer)

A4
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3

4 OF 4

SC10U10V5KX-2GP

3/5
U53D

VCC_CORE_S0

C148
SCD1U16V2KX-3GP

Place these
inside socket
cavity on L1
(North side
Secondary)

BGA479-SKT6-GPU3

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Meron(3/3)-GND&Bypass
Size
A3

Document Number

Date: Monday, March 05, 2007

Rev

-1

Pamirs
Sheet

of

41

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

E12
D7
D8

H_RS#0
H_RS#1
H_RS#2

2
10KR2J-3-GP

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

5
5
5
5

CFG[17:3] have internal pull up


CFG[19:18] have internal pull down

From Astro demo schematic

4
4
4
4
4

TP43
TP48
TP45
TP49
TP50
TP42
TP46
TP44
TP51

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13

TP47

CFG16

TP37
TP36
TP39

CFG18
CFG19
CFG20

4
4
4
20 PM_BMBUSY#
5,19 H_DPRSTP#
13 PM_EXTTS#0
14 PM_EXTTS#1
4,19 H_THERMTRIP#
20,35 DPRSLPVR
R68

Layout Note :
H_RCOMP / H_VREF / H_SWNG
trace width and spacing is 10/20

1D05V_S0

PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_POK_R
PLT_RST_R#
H_THERMTRIP#
DPRSLPVR

20,22 PM_PWROK

20,35 VGATE_PWRGD

DY

PM_POK_R

2
2

R70

0R2J-2-GP

R343

PLT_RST_R#
H_SWNG

Layout Note :
Place C32 within 100 mils of NB

PLT_RST1# 18,20,26,28,31,33,34

1
2

R121
113R2F-GP

100R2J-2-GP

R127
24D9R2F-L-GP

SCD1U16V2ZY-2GP

1
C151

R116
2KR2F-3-GP

H_RCOMP

PM_BM_BUSY#
PM_DPRSTP#
PM_EXT_TS#0
PM_EXT_TS#1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

BJ51
BK51
BK50
BL50
BL49
BL3
BL2
BK1
BJ1
E1
A5
C51
B50
A50
A49
BK2

NC#BJ51
NC#BK51
NC#BK50
NC#BL50
NC#BL49
NC#BL3
NC#BL2
NC#BK1
NC#BJ1
NC#E1
NC#A5
NC#C51
NC#B50
NC#A50
NC#A49
NC#BK2

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

BG20 DDR_CS0_DIMMA#
BK16 DDR_CS1_DIMMA#
BG16 DDR_CS2_DIMMB#
BE13 DDR_CS3_DIMMB#

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#
DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

13
13
14
14

SM_ODT0
SM_ODT1
SM_ODT2
SM_ODT3

BH18
BJ15
BJ14
BE16

M_ODT0
M_ODT1
M_ODT2
M_ODT3

SM_RCOMP_VOH
SM_RCOMP_VOL

BK31
BL31

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_RCOMP
SM_RCOMP#

BL15
BK14

SM_RCOMP
SM_RCOMP#

SM_VREF#AR49
SM_VREF#AW4

AR49
AW4

B42
C42
H48
H47

M_ODT0
M_ODT1
M_ODT2
M_ODT3

13
13
14
14
1D8V_S3

1
R111 1
R342

2
2 20R2F-GP
20R2F-GP
DDR_VREF_S3

DDR_VREF_S3

CLK_MCH_DREFCLK
CLK_MCH_DREFCLK#
MCH_SSCDREFCLK
MCH_SSCDREFCLK#

PEG_CLK
PEG_CLK#

K44 CLK_MCH_3GPLL
K45 CLK_MCH_3GPLL#

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

AN47
AJ38
AN42
AN46

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

AM47
AJ39
AN41
AN45

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

AJ46
AJ41
AM40
AM44

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

AJ47
AJ42
AM39
AM43

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VR_EN

CLK_MCH_DREFCLK 3
CLK_MCH_DREFCLK# 3
MCH_SSCDREFCLK 3
MCH_SSCDREFCLK# 3
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

20
20
20
20

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

20
20
20
20

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

20
20
20
20

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

20
20
20
20

E35
A39
C38
B39
E36

DFGT_VID0
DFGT_VID1
DFGT_VID2
DFGT_VID3
DFGT_VR_EN

AM49
AK50
AT43
AN49
AM50

CLPWROK_MCH 1
R337

TP41
TP34
TP35
TP31
TP33

1D25V_S0

CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF

CL_CLK0 20
CL_DATA0 20
2
VGATE_PWRGD 20,35
0R2J-2-GP
CL_RST#
20

CL_VREF

R71
1KR2F-3-GP

R72
392R2F-GP

C63

SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLKREQ#
ICH_SYNC#
TEST1
TEST2

H35
K36
G39
G40

ICH_SDVO_CLK
ICH_SDVO_DATA

TP32
TP38
CLKREQ#_B
3
MCH_ICH_SYNC#

MCH_ICH_SYNC#

A37 TEST1_GMCH
R32 TEST2_GMCH1
R332

C153
SCD1U16V2ZY-2GP

1
R92

20

2
0R2J-2-GP

20KR2J-L2-GP

2
1

H_VREF

G41
L39
L36
J36
AW49
AV20
N20
G36

NC

SB 0823

R120
267R2F-1-GP

CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

13
13
14
14

13
13
14
14

0R2J-2-GP

1D05V_S0

R115
1KR2F-3-GP

P27
N27
N24
C21
C23
F23
N23
G23
J20
C20
R24
L23
J23
E23
E20
K23
M20
M24
L32
N33
L35

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#

PM

layout note :
Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

BE29 DDR_CKE0_DIMMA
AY32 DDR_CKE1_DIMMA
BD39 DDR_CKE2_DIMMB
BG37 DDR_CKE3_DIMMB

CLK

SM_CKE0
SM_CKE1
SM_CKE3
SM_CKE4

DDR MUXING

SCD01U25V2KX-3GP

1
2
1
2

SCD01U25V2KX-3GP

2
10KR2J-3-GP

1
C115

1
R327

3 MCH_CLKSEL0
3 MCH_CLKSEL1
3 MCH_CLKSEL2
5
5
5
5

H_RS#0
H_RS#1
H_RS#2

PM_EXTTS#1

5
5
5
5

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

2
10KR2J-3-GP

M_CLK_DDR#0
M_CLK_DDR#1
M_CLK_DDR#2
M_CLK_DDR#3

H_AVREF
H_DVREF

M14
E13
A11
H13
B12

1
R326

AW30M_CLK_DDR#0
BA23 M_CLK_DDR#1
AW25M_CLK_DDR#2
AW23M_CLK_DDR#3

H_CPURST#
H_CPUSLP#

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

PM_EXTTS#0

SM_CK#0
SM_CK#1
SM_CK#3
SM_CK#4

13
13
14
14

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

3D3V_S0

R91

RSVD#H10
RSVD#B51
RSVD#BJ20
RSVD#BK22
RSVD#BF19
RSVD#BH20
RSVD#BK18
RSVD#BJ18
RSVD#BF23
RSVD#BG23
RSVD#BC23
RSVD#BD24
RSVD#BJ29
RSVD#BE24
RSVD#BH39
RSVD#AW20
RSVD#BK20
RSVD#C48
RSVD#D47
RSVD#B44
RSVD#C44
RSVD#A35
RSVD#B37
RSVD#B36
RSVD#B34
RSVD#C34

M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3

DMI

L7
K2
AC2
AJ10

DDR_A_MA14
DDR_B_MA14

13 DDR_A_MA14
14 DDR_B_MA14

CLKREQ#_B

H10
B51
BJ20
BK22
BF19
BH20
BK18
BJ18
BF23
BG23
BC23
BD24
BJ29
BE24
BH39
AW20
BK20
C48
D47
B44
C44
A35
B37
B36
B34
C34

AV29 M_CLK_DDR0
BB23 M_CLK_DDR1
BA25 M_CLK_DDR2
AV23 M_CLK_DDR3

B9
A9

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

R107
1KR2F-3-GP

SM_CK0
SM_CK1
SM_CK3
SM_CK4

B6
E5

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI#
4
H_BR0# 4
H_DEFER#
4
H_DBSY# 4
CLK_MCH_BCLK 3
CLK_MCH_BCLK# 3
H_DPWR# 5
H_DRDY# 4
H_HIT#
4
H_HITM# 4
H_LOCK#
4
H_TRDY#
4

RSVD#P36
RSVD#P37
RSVD#R35
RSVD#N35
RSVD#AR12
RSVD#AR13
RSVD#AM12
RSVD#AN13
RSVD#J12
RSVD#AR37
RSVD#AM36
RSVD#AL36
RSVD#AM37
RSVD#D20

SCD1U16V2KX-3GP
2

H_VREF

M7
K3
AD2
AH11

R102
1KR2F-3-GP

P36
P37
R35
N35
AR12
AR13
AM12
AN13
J12
AR37
AM36
AL36
AM37
D20

GRAPHICS VID

H_RESET#
H_CPUSLP#

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

U16B 2 OF 10

1D8V_S3

R104
3K01R2F-3-GP

SM_RCOMP_VOL

1
FOR Calero: 80.6 ohm
Crestline: 20 ohm

ME

4
5

H_RESET#
H_CPUSLP#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

MISC

54D9R2F-L1-GP

54D9R2F-L1-GP
2

H_SCOMP
H_SCOMP#

K5
L2
AD13
AE13

SM_RCOMP_VOH

H_ADS#
G12
H_ADSTB#0
H17
H_ADSTB#1
G20
H_BNR#
C8
H_BPRI#
E8
H_BR0#
F12
H_DEFER#
D6
H_DBSY#
C10
AM5 CLK_MCH_BCLK
AM7 CLK_MCH_BCLK#
H_DPWR#
H8
H_DRDY#
K7
H_HIT#
E4
H_HITM#
C6
H_LOCK#
G10
H_TRDY#
B7

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_A#[3..35]

H_SCOMP
H_SCOMP#

R129 R128

C123

H_SWING
H_RCOMP

W1
W2

1D05V_S0

H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19

B3
C2

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

C112
SC2D2U10V3ZY-1GP
2
1

H_SWNG
H_RCOMP

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

CFG

E2
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13

RSVD

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

C126
SC2D2U10V3ZY-1GP
1
2

U16A 1 OF 10

H_D#[0..63]

HOST

Layout Note :
Place C33 near
pin B3 of NB

0921 P/N CHANGE TO 71.CREST.M02

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRESTLINE(1/6)-AGTL+/DMI/DDR2

Size
Custom

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

of

41

DDR_A_D[0..63]

13

DDR_A_BS[0..2]

13

DDR_A_DM[0..7]

13

DDR_A_DQS[0..7]

DDR_B_D[0..63]

14

DDR_B_BS[0..2]

14

DDR_B_DM[0..7]

14

DDR_B_DQS[0..7]
DDR_A_DQS#[0..7]

DDR_B_MA[0..13]

14

U16E 5 OF 10
BB19
BK19
BF29

DDR_A_BS0
DDR_A_BS1
DDR_A_BS2

SA_CAS#

BL17

DDR_A_CAS#

SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7

AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13

BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13

SA_RAS#
SA_RCVEN#

BE18
AY20

DDR_A_RAS#
SA_RCVEN#

SA_WE#

BA19

SA_BS0
SA_BS1
SA_BS2

DDR_A_WE#

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

DDR_A_CAS# 13

DDR_A_RAS# 13
TP52
DDR_A_WE# 13

AP49
AR51
AW50
AW51
AN51
AN50
AV50
AV49
BA50
BB50
BA49
BE50
BA51
AY49
BF50
BF49
BJ50
BJ44
BJ43
BL43
BK47
BK49
BK43
BK42
BJ41
BL41
BJ37
BJ36
BK41
BJ40
BL35
BK37
BK13
BE11
BK11
BC11
BC13
BE12
BC12
BG12
BJ10
BL9
BK5
BL5
BK9
BK10
BJ8
BJ6
BF4
BH5
BG1
BC2
BK3
BE4
BD3
BJ2
BA3
BB3
AR1
AT3
AY2
AY3
AU2
AT2

SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

AY17
BG18
BG36

DDR_B_BS0
DDR_B_BS1
DDR_B_BS2

SB_CAS#

BE17

DDR_B_CAS#

SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7

AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13

BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13

SB_RAS#
SB_RCVEN#

AV16
AY18

DDR_B_RAS#
SB_RCVEN#

SB_WE#

BC17

DDR_B_WE#

SB_BS0
SB_BS1
SB_BS2

DDR SYSTEM MEMORY B

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

DDR SYSTEM MEMORRY A

AR43
AW44
BA45
AY46
AR41
AR45
AT42
AW47
BB45
BF48
BG47
BJ45
BB47
BG50
BH49
BE45
AW43
BE44
BG42
BE40
BF44
BH45
BG40
BF40
AR40
AW40
AT39
AW36
AW41
AY41
AV38
AT38
AV13
AT13
AW11
AV11
AU15
AT11
BA13
BA11
BE10
BD10
BD8
AY9
BG10
AW9
BD7
BB9
BB5
AY7
AT5
AT7
AY6
BB7
AR5
AR8
AR9
AN3
AM8
AN10
AT9
AN9
AM9
AN11

14

13

U16D 4 OF 10
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

14

13
DDR_B_DQS#[0..7]

DDR_A_MA[0..13]

13

DDR_B_CAS# 14

DDR_B_RAS#

14

DDR_B_WE#

14

TP53

<Core Design>

A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CRESTLINE(2/6)-DDR2 A/B CH

Size
A3

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

of

41

1
2
R325 24D9R2F-L-GP

DY
SRN10KJ-5-GP

1
R321

LVDS_IBG

2
2K4R2F-GP

TP30

VGA_TXACLKVGA_TXACLK+
VGA_TXBCLKVGA_TXBCLK+

16 VGA_TXAOUT016 VGA_TXAOUT116 VGA_TXAOUT2-

J40
H39
E39
E40
C37
D35
K40

L_BKLT_CTRL
L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA
L_DDC_CLK
L_DDC_DATA
L_VDD_EN

L41
L43
N41
N40
D46
C45
D44
E42

LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

G51
E51
F49

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2

16 VGA_TXAOUT0+
16 VGA_TXAOUT1+
16 VGA_TXAOUT2+

G50
E50
F48

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2

16 VGA_TXBOUT016 VGA_TXBOUT116 VGA_TXBOUT2-

G44
B47
B45

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2

16 VGA_TXBOUT0+
16 VGA_TXBOUT1+
16 VGA_TXBOUT2+

E44
A47
A45

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2

E27
G27
K27

TVA_DAC
TVB_DAC
TVC_DAC

PEG_COMPI
PEG_COMPO

1
2

R108
150R2F-1-GP

R109
150R2F-1-GP

1
2

3D3V_S0

R101

DY

F27
J27
L27

TVA_RTN
TVB_RTN
TVC_RTN

M35
P33

TV_DCONSEL0
TV_DCONSEL1

H32
G32
K29
J29
F29
E29

CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#

K33
G35
E33
C32
F33

CRT_DDC_CLK
CRT_DDC_DATA
CRT_VSYNC
CRT_TVO_IREF
CRT_HSYNC

TV

R110
150R2F-1-GP

M_COMP
M_LUMA
M_CRMA

15 M_COMP
15 M_LUMA
15 M_CRMA

2K2R2J-2-GP

1
R97

R103
150R2F-1-GP

1
1
2

R105
150R2F-1-GP
2

R106
150R2F-1-GP
4
3

CRT_VSYNC
CRT_HSYNC

CRTIREF
2
1K3R2D-GP

VGA

15 GMCH_DDCCLK
RN60
15 GMCH_DDCDATA
1
15,17 GMCH_VSYNC
2
15,17 GMCH_HSYNC
SRN33J-5-GP-U

SB

N43
M43

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

J51
L51
N47
T45
T50
U40
Y44
Y40
AB51
W49
AD44
AD40
AG46
AH49
AG45
AG41

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

J50
L50
M47
U44
T49
T41
W45
W41
AB50
Y48
AC45
AC41
AH47
AG49
AH45
AG42

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

N45
U39
U47
N51
R50
T42
Y43
W46
W38
AD39
AC46
AC49
AC42
AH39
AE49
AH44

PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

M45
T38
T46
N50
R51
U43
W42
Y47
Y39
AC38
AD47
AC50
AD43
AG39
AE50
AH43

PEGCOMP trace
width and spacing
is 20/25 mils.

PEGCOMP

2
Strap Pin Table

010 = FSB 800MHz


011 = FSB 667MHz
Others = Reserved

CFG[2:0] FSB Freq select


CFG5 (DMI select)

0 = DMI x 2
1 = DMI x 4

CFG6

Reserved
0 = Reserved
1 = Mobile CPU

CFG7 (CPU Strap)

0 = Normal mode
1 = Low Power mode

CFG8 (Low power PCIE)


CFG9
(PCIE Graphics Lane Reversal)

0 = Reverse Lane
1 = Normal Operation

CFG[11:10]

Reserved
00
01
10
11

CFG[13:12] (XOR/ALLZ)
CFG[15:14]

=
=
=
=

Reserved
XOR Mode Enabled
All Z Mode Enabled
Normal Operation (Default)*

Reserved
0 = Disable
1 = Enable *

CFG16 (FSB Dynamic ODT)


CFG[18:17]

Reversed

SDVO_CTRLDATA

0 = No SDVO Device Present *


1 = SDVO Device Present
0 = Normal Operation
(Lane number in Order)
1 = Reverse lane

CFG19(DMI Lane Reversal)

0 = Only PCIE or SDVO is operational *


1 = PCIE/SDVO are operating simu.

CFG20(PCIE/SDVO consurrent)

M_BLUE
M_GREEN
M_RED

15 M_BLUE
15 M_GREEN
15 M_RED

PCI_EXPRESS GRAPHICS

2
1

LVDS

RN54
3
4

16 LDDC_CLK
16 LDDC_DATA
16 LCDVDD_EN

16
16
16
16

1D05V_S0

U16C 3 OF 10

16 LBKLT_CTL
31 BLON_IN
3D3V_S0

For Crestline : 2.4 Kohm


For Calero : 1.5Kohm

FOR Calero: 255 ohm


Crestline: 1.3k ohm

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Size
A3

CRESTLINE(3/6)-VGA/LVDS/TV
Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

of

41

3D3V_S0

1
2

SCD22U16V3ZY-GP

1
2

C160
SC10U10V5KX-2GP

1
0R2J-2-GP

10R2J-2-GP

C352
SCD1U16V2KX-3GP

3D3V_S0
R652 0R3-0-U-GP
1
2

5V_S0

SET

OUT

Wistron Corporation
3D3V_S0_TVDAC C825

G913CF-GP

C823

1 R651
2
0R3-0-U-GP

C824

SHDN#
GND
IN

<Core Design>
VCCA_TVDAC

DY

1
2
3

1D25V_S0

R324
1

3D3V_S0

SC47U6D3V6MX-1GP
2
1

DY

1
2
1

SS0530-GP

U72

C822

1
2

C155 BLM18AG121SN-1GP

3D3V_S0_HV
R323

0R3-0-U-GP

TC1

1D8V_S3

SCD22U16V3ZY-GP

1
2

1D05V_S0_D

D13
A

1D05V_S0

3/6
2

1D25V_S0

L10
1

0R5J-5-GP

DY DY

1D8V_S3

C336R65
SC10U10V5KX-2GP
1
DY 2

1D25V_S0

C420
SC10U10V5KX-2GP

1D05V_S0

SC10U10V5ZY-1GP

SC47U6D3V6MX-1GP

C158

SC1U10V3ZY-6GP

1
2

C350

R306

0R3-0-U-GP
C338
C334
SC10U10V5KX-2GP
SC1U10V3KX-3GP

C159

TC14

C418 BLM18AG121SN-1GP

1D25V_S0_MPLL
2

0R5J-5-GP

R60

40mil

1D8V_S0_LVDS

C157

1D8V_S0_TXLVDS

2/14

1
2

1
2

C359

HV
PEG

2
1
2

C134
100R2F-L1-GP-U

1D5V_S0

ST220U2VBM-3GP

SCD1U16V2ZY-2GP

SCD022U16V2KX-3GP

0R3-0-U-GP

C384

VCCA_TVDAC

R112
1

20mil

TC13

VCCD_LVDS
VCCD_LVDS

R316
1

DY
2

VCCD_PEG_PLL

J41
H42

1D05V_S0_PEG

ST220U2VBM-3GP

U48

1D8V_S0_LVDS

VTTLF1
VTTLF2
VTTLF3

A7
F2
AH1

SCD47U16V3ZY-3GP

1D25V_S0_PEGPLL

VTTLF
VTTLF
VTTLF

VCCD_HPLL

SCD47U16V3ZY-3GP
2

VCCD_QDAC

VCC_RXR_DMI
VCC_RXR_DMI

AH50
AH51

1D05V_S0_PEG

N28

AD51
W50
W51
V49
V50

L33
1

C55
SC10U10V5KX-2GP

C356
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

2
1D5V_S0
0R5J-5-GP

C378

1D25V_S0

C40
B40

2
L-10UH-11-GP

VCC_HV
VCC_HV

1D8V_S0_TXLVDS

C377

1D8V_S3

R136

1D25V_S0_HPLL

ST220U2VBM-3GP

A43

SCD47U16V3ZY-3GP
2

VCCD_CRT
VCCD_TVDAC

AN2

1D5V_S0_QDAC

R339

1
2

1D25V_S0_DPLLA

1
VCC_TX_LVDS

BLM18PG121SN-1GP

1
L4
C66

2
0R5J-5-GP

1D25V_S0

C58
SC10U10V5KX-2GP

AXF

1D8V_S3_SM_CK

VTTLF

VCCA_TVA_DAC
VCCA_TVA_DAC
VCCA_TVB_DAC
VCCA_TVB_DAC
VCCA_TVC_DAC
VCCA_TVC_DAC

1D25V_S0_HPLL

PLL
A LVDS
A PEG

VCCA_SM_CK
VCCA_SM_CK

SM CK

SC1U10V3KX-3GP

A SM

1
2

SCD22U16V3ZY-GP
2

SC4D7U6D3V5KX-3GP

1
2

ST22U6D3VBM-1GP
2
1

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM_NCTF
VCCA_SM_NCTF

1D5V_S0_QDAC

1D25V_S0_DMI

BK24
BK23
BJ24
BJ23

VCCA_TVDAC

R341

M32
L29

1D5V_S0_TVDAC

1
2

1
2

3/5

AJ50

SC1KP50V2KX-1GP

3D3V_S0_TVDACC

SCD1U16V2ZY-2GP
C133

0R3-0-U-GP

3D3V_S0_TVDACB

VCCA_TVDAC

C400 0R3-0-U-GP

3D3V_S0_TVDACB

C383

C25
B25
C27
B27
B28
A28

3D3V_S0_TVDACA

SCD022U16V2KX-3GP

SCD1U16V2ZY-2GP
C401

SCD022U16V2KX-3GP

3D3V_S0_TVDACA

1
C393

VCC_DMI
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

1D25V_S0_AXF

3D3V_S0_HV
BC29
BB29

C379

R340

SCD1U16V2ZY-2GP

SCD022U16V2KX-3GP

C392

AT22
AT21
AT19
AT18
AT17
AR17
AR16

B23
B21
A21

SCD1U16V2ZY-2GP

3D3V_S0_TVDACC

C399

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

A CK

2
2

DY

C407

VCC_AXF
VCC_AXF
VCC_AXF

SCD1U16V2ZY-2GP

DY

C376

SCD1U16V2ZY-2GP

SCD22U16V3ZY-GP
2

C372

SC1U10V3KX-3GP
2

C366

SC1U10V3KX-3GP
2

1
2

C425

VCCA_PEG_PLL

C65

C394

1D5V_S0_TVDAC

L7
1

SCD1U16V2ZY-2GP

R133
1
0R3-0-U-GP

AW18
AV19
AU19
AU18
AU17

1D25V_S0_A_SM

AR29

1D25V_S0_PEGPLL
C389
SC10U10V5KX-2GP

SCD1U16V2ZY-2GP

1D25V_S0_SM_CK

C424

U51

VCC_AXD_NCTF

2
0R5J-5-GP

C381

SCD1U16V2ZY-2GP

20mil

1D25V_S0

R135
1

C391

C385

SCD022U16V2KX-3GP

TC6
ST100U4VBM-U

DY

VSSA_PEG_BG

AT23
AU28
AU24
AT29
AT25
AT30

R73
1

DY

1D25V_S0

C406
C390
SC10U10V5KX-2GP
SC1U16V3ZY-GP

1D25V_S0

0R3-0-U-GP

SCD1U16V2ZY-2GP

12/12
R137
2
0R5J-5-GP

VCCA_PEG_BG

K49
C343
SCD1U16V2ZY-2GP
1D25V_S0_PEGPLL

K50
1

2
0R3-0-U-GP

1D25V_S0_AXD

VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD
VCC_AXD

AXD

1
2

R74
1

POWER

R344
2
0R3-0-U-GP

1D25V_S0

1D8V_S3_SM_CK
2

C62

VSSA_LVDS

2
L-10UH-11-GP

C56
SC10U10V5KX-2GP

1D25V_S0_DMI
R67
1

SC2D2U6D3V3MX-1-GP

VCCA_LVDS

B41

SC1KP50V2KX-1GP

3D3V_S0_PEG_BG

TV

3D3V_S0

C410

VCCA_MPLL

A41

C353

VCCA_HPLL

AM2

SC4D7U6D3V5KX-3GP

AL2

1D25V_S0_MPLL

C357

1D25V_S0_HPLL

C364
SC4D7U6D3V5KX-3GP

VCCA_DPLLB

SCD47U16V3ZY-3GP
2
1

H49

VCCA_DPLLA

1D25V_S0_DPLLB

1D8V_S0_TXLVDS

1D25V_S0

1D25V_S0_AXF
1
L5
C67

SCD1U16V2ZY-2GP

B49

VSSA_DAC_BG

1D25V_S0_DPLLA

TC16

DY

SC1U10V3KX-3GP

VCCA_DAC_BG

B32

VTT

A30

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

CRT

3D3V_S0_DAC_BG

DMI

2
0R3-0-U-GP

TV/CRT

R329

VCCA_CRT_DAC
VCCA_CRT_DAC

3D3V_S0_TVDAC

C362

VCC_SYNC

A33
B33

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C363

SCD022U16V2KX-3GP

J32

3D3V_S0_DAC_CRT

U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1

LVDS

1
2

1
2

C375

ST220U2VBM-3GP

1D25V_S0_DPLLB
1D05V_S0
U16H 8 OF 10

C369
SCD1U16V2ZY-2GP

3/5

0R3-0-U-GP

3D3V_S0_DAC_CRT

DY

VCCA_TVDAC
2

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
C374

DY

R335
1

2
0R3-0-U-GP

3D3V_S0_DAC_BG

3D3V_S0_VCCSYNC

R334
1

SCD022U16V2KX-3GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A3

CRESTLINE(4/6)-PWR
Document Number

Date: Tuesday, March 06, 2007

Rev

-1

Pamirs
Sheet

10

of

41

1
1D05V_S0

1D05V_S0

LIB C

C397

SCD22U10V2KX-1GP

C59

C60

1
SC1U10V3KX-3GP

SC1U10V3KX-3GP
2

C61

1
SCD47U16V3ZY-3GP
2

SCD22U10V2KX-1GP C405
2
1

VCC GFX NCTF

SC4D7U6D3V5KX-3GP
C421
1

C412
1

2
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

SCD22U10V2KX-1GP
2

1
2

1
2

AW45
BC39
BE39
BD17
BD4
AW8
AT6

SCD1U16V2ZY-2GP

1
10R2J-2-GP

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

C413
1

VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG
VCC_AXG

R328

K
RB751V-40-2-GP

C403
C395
SC10U10V5KX-2GP
SC10U10V5KX-2GP

R20
T14
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
AC24
AC26
AC28
AC29
AD20
AD23
AD24
AD28
AF21
AF26
AA31
AH20
AH21
AH23
AH24
AH26
AD31
AJ20
AN14

D30

1
2
3D3V_S0

TC18

C388

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

1D05V_S0

1D05V_S0

VCC SM LF

1D05V_S0

VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM
VCC_SM

VCC SM

SC22U6D3V5MX-2GP
2

1
2

SC22U6D3V5MX-2GP
2

2
20R0402-PAD
0R2J-2-GP
2
20R0402-PAD
0R2J-2-GP
2
0R2J-2-GP
2
0R2J-2-GP

AU32
AU33
AU35
AV33
AW33
AW35
AY35
BA32
BA33
BA35
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
BF33
BF34
BG32
BG33
BG35
BH32
BH34
BH35
BJ32
BJ33
BJ34
BK32
BK33
BK34
BK35
BL33
AU30

VCC GFX

DY
DY
DY

ST220U2VBM-3GP

DY

C404

AT33
AT31
AK29
AK24
AK23
AJ26
AJ23

1
R1241
R1251
R1261
R1301
R69 1
R76

SC1U10V3KX-3GP

VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM
VCC_AXM

MCHGND1
MCHGND2
MCHGND3
MCHGND4
MCHGND5
MCHGND6

ST220U2VBM-3GP

VSS NCTF
VCC NCTF
VSS SCB

A3
B2
C1
BL1
BL51
A51

VSS AXM NCTF

VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF
VCC_AXM_NCTF

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

1
2
1
2

DY

SCD1U16V2ZY-2GP

TC2

C402

POWER
1D8V_S3

C361 SCD01U16V2KX-3GP

C370

C367

C371

C365 C396

0R3-0-U-GP

SCD1U16V2ZY-2GP

VCC

R336

C118

T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28

POWER

1D05V_S0

AL24
AL26
AL28
AM26
C408
C411
AM28
SC10U10V5KX-2GP
SC10U10V5KX-2GP AM29
AM31
AM32
AM33
AP29
AP31
AP32
AP33
AL29
AL31
AL32
AR31
AR32
AR33

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

C368

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

VSS AXM

1
2

SC22U6D3V5MX-2GP
2

SCD1U16V2ZY-2GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

ST220U2VBM-3GP
2

C386

C387

C373

TC5

C419

AB33
AB36
AB37
AC33
AC35
AC36
AD35
AD36
AF33
AF36
AH33
AH35
AH36
AH37
AJ33
AJ35
AK33
AK35
AK36
AK37
AD33
AJ36
AM35
AL33
AL35
AA33
AA35
AA36
AP35
AP36
AR35
AR36
Y32
Y33
Y35
Y36
Y37
T30
T34
T35
U29
U31
U32
U33
U35
U36
V32
V33
V36
V37

T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31

SCD1U16V2ZY-2GP

2VCC_GMCH1 R30

U16G 7 OF 10
1D05V_S0

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

C380

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC CORE

U16F 6 OF 10

AT35
AT34
AH28
AC32
AC31
AK32
AJ31
AJ28
AH32
AH31
AH29
AF32

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

CRESTLINE(5/6)-PWR/GND
Document Number

Size
Custom

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

11

of

41

4
U16I

A13
A15
A17
A24
AA21
AA24
AA29
AB20
AB23
AB26
AB28
AB31
AC10
AC13
AC3
AC39
AC43
AC47
AD1
AD21
AD26
AD29
AD3
AD41
AD45
AD49
AD5
AD50
AD8
AE10
AE14
AE6
AF20
AF23
AF24
AF31
AG2
AG38
AG43
AG47
AG50
AH3
AH40
AH41
AH7
AH9
AJ11
AJ13
AJ21
AJ24
AJ29
AJ32
AJ43
AJ45
AJ49
AK20
AK21
AK26
AK28
AK31
AK51
AL1
AM11
AM13
AM3
AM4
AM41
AM45
AN1
AN38
AN39
AN43
AN5
AN7
AP4
AP48
AP50
AR11
AR2
AR39
AR44
AR47
AR7
AT10
AT14
AT41
AT49
AU1
AU23
AU29
AU3
AU36
AU49
AU51
AV39
AV48
AW1
AW12
AW16

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

9 OF 10

VSS

2
U16J

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41

C46
C50
C7
D13
D24
D3
D32
D39
D45
D49
E10
E16
E24
E28
E32
E47
F19
F36
F4
F40
F50
G1
G13
G16
G19
G24
G28
G29
G33
G42
G45
G48
G8
H24
H28
H4
H45
J11
J16
J2
J24
J28
J33
J35
J39
K12
K47
K8
L1
L17
L20
L24
L28
L3
L33
L49
M28
M42
M46
M49
M5
M50
M9
N11
N14
N17
N29
N32
N36
N39
N44
N49
N7
P19
P2
P23
P3
P50
R49
T39
T43
T47
U41
U45
U50
V2
V3

10 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50

C
VSS

<Core Design>

A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Size
A3

CRESTLINE(6/6)-PWR/GND
Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

12

of

41

8 DDR_A_BS[0..2]

Layout Note:
Place near DM1

7 DDR_A_MA14

1
2

TC3
ST220U2VBM-3GP

1
2

1
2

1
2

C84
SCD1U16V2ZY-2GP

C91
SCD1U16V2ZY-2GP

DY

C103
SCD1U16V2ZY-2GP

C79
SCD1U16V2ZY-2GP

DY

C128
SC2D2U16V5ZY-2GP

DY

C119
SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

C110

C99
SC2D2U16V5ZY-2GP

C75
SC2D2U16V5ZY-2GP

1D8V_S3

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

1
2

1
2

1
2

C113
SCD1U16V2ZY-2GP

C87
SCD1U16V2ZY-2GP

C78
SCD1U16V2ZY-2GP

C102
SCD1U16V2ZY-2GP

C68
SCD1U16V2ZY-2GP

DY

C358
SCD1U16V2ZY-2GP

C360
SCD1U16V2ZY-2GP

C354
SCD1U16V2ZY-2GP

DY

C355
SCD1U16V2ZY-2GP

C347
SCD1U16V2ZY-2GP

DY

C349
SCD1U16V2ZY-2GP

C341
SCD1U16V2ZY-2GP

DY

C342
SCD1U16V2ZY-2GP

DDR_VREF_S0

Layout Note:
Place these resistors
closely DM1,all
trace length Max=1.5"

DDR_VREF_S0
SRN56J-4-GP
DDR_A_BS2
1
DDR_CKE0_DIMMA
2

4
3

RN55 SRN56J-4-GP
DDR_A_MA7
1
DDR_A_MA6
2

DDR_A_RAS#
DDR_CS0_DIMMA#

RN58 SRN56J-4-GP
1
4
2
3

4
3

RN10 SRN56J-4-GP
DDR_A_MA12
1
DDR_A_MA9
2

DDR_A_MA10
DDR_A_BS0

RN19 SRN56J-4-GP
1
4
2
3

4
3

RN56 SRN56J-4-GP
DDR_A_MA4
1
DDR_A_MA2
2

DDR_A_WE#
DDR_CS1_DIMMA#

RN22 SRN56J-4-GP
1
4
2
3

4
3

RN57 SRN56J-4-GP
DDR_A_MA0
1
DDR_A_BS1
2

M_ODT1
DDR_A_CAS#

RN25 SRN56J-4-GP
1
4
2
3

4
3

RN59 SRN56J-4-GP
M_ODT0
1
DDR_A_MA13
2

RN52 SRN56J-4-GP
DDR_CKE1_DIMMA 1
4
2
3

4
3

RN53 SRN56J-4-GP
1 DDR_A_MA14
DDR_A_MA11
2

DDR_VREF_S3

7
7

M_ODT0
M_ODT1

DDR_VREF_S3

DDR_A_BS0
DDR_A_BS1

107
106

BA0
BA1

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

11
29
49
68
129
146
167
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT0
M_ODT1

114
119

OTD0
OTD1

1
2

SC2D2U16V5ZY-2GP

C817
DUMMY-C2

CS0#
CS1#

110
115

DDR_CS0_DIMMA#
DDR_CS1_DIMMA#

DDR_CS0_DIMMA# 7
DDR_CS1_DIMMA# 7

CKE0
CKE1

79
80

DDR_CKE0_DIMMA
DDR_CKE1_DIMMA

DDR_CKE0_DIMMA 7
DDR_CKE1_DIMMA 7

CK0
CK0#

30
32

M_CLK_DDR0
M_CLK_DDR#0

M_CLK_DDR0 7
M_CLK_DDR#0 7

CK1
CK1#

164
166

M_CLK_DDR1
M_CLK_DDR#1

M_CLK_DDR1 7
M_CLK_DDR#1 7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
ICH_SMBDATA
ICH_SMBCLK

SDA
SCL

195
197

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

C818
DUMMY-C2

put near connector

C813
1

2
DUMMY-C2
C814

2
DUMMY-C2

12/15

ICH_SMBDATA 3,14,20
ICH_SMBCLK 3,14,20
SCD1U16V2ZY-2GP

R346 1
R347 1

12/19

1
DDR_A_RAS# 8
DDR_A_WE# 8
DDR_A_CAS# 8

2 10KR2J-3-GP
2 10KR2J-3-GP

3D3V_S0

C414
PM_EXTTS#0 7

C416
SC2D2U6D3V3KX-GP

1D8V_S3

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

202

GND

GND

201

MH1

MH1

MH2

MH2

RN16 SRN56J-4-GP
1
4
2
3

C21

C23
2

DDR_A_MA3
DDR_A_MA1

RN7
4
3

DDR_A_MA8
DDR_A_MA5

RN12 SRN56J-4-GP
1
4
2
3

DDR_A_BS2

RAS#
WE#
CAS#

DDR_A_RAS#
DDR_A_WE#
DDR_A_CAS#

8 DDR_A_MA[0..13]

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

108
109
113

8 DDR_A_DQS[0..7]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

8 DDR_A_DM[0..7]

M_CLK_DDR0
M_CLK_DDR#0

DM2

8 DDR_A_D[0..63]

8 DDR_A_DQS#[0..7]

SCD1U16V2ZY-2GP

Wistron Corporation

DDR2-200P-20-GP-U

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

DDRII-SODIMM SLOT1
Size
Document Number
Custom

Rev

Pamirs

Date: Wednesday, February 14, 2007


5

-1
Sheet

13
1

of

41

M_CLK_DDR2
M_CLK_DDR#2

12/19

8 DDR_B_DQS#[0..7]

C819
DUMMY-C2

8 DDR_B_D[0..63]
DM1

C820
DUMMY-C2

C121
SCD1U16V2ZY-2GP

DY

C82
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C46

C351
SCD1U16V2ZY-2GP

C92
SC2D2U16V5ZY-2GP

C340
SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

SC2D2U16V5ZY-2GP

DY

C105

C346

C382
SC2D2U16V5ZY-2GP

7 DDR_B_MA14

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS
C

1
2

DY

C85
SCD1U16V2ZY-2GP

C53
SCD1U16V2ZY-2GP

C77
SCD1U16V2ZY-2GP

C98
SCD1U16V2ZY-2GP

C104
SCD1U16V2ZY-2GP

C96
SCD1U16V2ZY-2GP

C86
SCD1U16V2ZY-2GP

C122
SCD1U16V2ZY-2GP

DY

C95
SCD1U16V2ZY-2GP

C70
SCD1U16V2ZY-2GP

C54
SCD1U16V2ZY-2GP

C114
SCD1U16V2ZY-2GP

DY

C106
SCD1U16V2ZY-2GP

DDR_VREF_S0

Layout Note:
Place these resistors
closely DM2,all
trace length Max=1.5"

DDR_VREF_S0
RN17

SRN56J-4-GP
1
4
2
3

4
3

RN20
DDR_B_MA10
DDR_B_BS0

SRN56J-4-GP
1
4
2
3

4
3

RN18

SRN56J-4-GP
1
4
2
3

4
3

RN21
DDR_CS2_DIMMB#
DDR_B_RAS#

SRN56J-4-GP
1
4
2
3

4
3

RN23
DDR_B_WE#
DDR_B_CAS#

SRN56J-4-GP
1
4
2
3

RN26
DDR_CS3_DIMMB#
M_ODT3

1
2

DDR_B_MA3
DDR_B_MA1

DDR_B_MA0
DDR_B_BS1

RN8
DDR_B_MA14

SRN56J-4-GP
4
3

SRN56J-4-GP
1
4
2
3

RN9

1
2
RN6

SRN56J-4-GP
DDR_CKE3_DIMMB
1
DDR_B_MA11
2

RN13

SRN56J-4-GP
DDR_B_MA5
1
DDR_B_MA8
2

RN11

SRN56J-4-GP
DDR_B_MA7
1
DDR_B_MA6
2

RN15

SRN56J-4-GP
DDR_B_MA4
1
DDR_B_MA2
2

RN24

SRN56J-4-GP
M_ODT2
1
DDR_B_MA13
2

RN5

SRN56J-4-GP
DDR_B_BS2
1
DDR_CKE2_DIMMB
2

4
3
4
3
4
3

DDR_B_MA12
DDR_B_MA9

DDR_VREF_S3

7
7

M_ODT2
M_ODT3

DDR_VREF_S3

DDR_B_BS0
DDR_B_BS1

107
106

BA0
BA1

DDR_CS2_DIMMB# 7
DDR_CS3_DIMMB# 7

CKE0
CKE1

79
80

DDR_CKE2_DIMMB
DDR_CKE3_DIMMB

DDR_CKE2_DIMMB 7
DDR_CKE3_DIMMB 7

CK0
CK0#

30
32

M_CLK_DDR2
M_CLK_DDR#2

M_CLK_DDR2 7
M_CLK_DDR#2 7

CK1
CK1#

164
166

M_CLK_DDR3
M_CLK_DDR#3

M_CLK_DDR3 7
M_CLK_DDR#3 7

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

10
26
52
67
130
147
170
185

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

SDA
SCL

195
197

ICH_SMBDATA
ICH_SMBCLK

VDDSPD

199

SA0
SA1

198
200

NC#50
NC#69
NC#83
NC#120
NC#163/TEST

50
69
83
120
163

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

81
82
87
88
95
96
103
104
111
112
117
118
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

11
29
49
68
129
146
167
186

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

13
31
51
70
131
148
169
188

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

M_ODT2
M_ODT3

114
119

OTD0
OTD1

1
2

VREF
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

GND

201

MH2

MH2

DDR_B_RAS# 8
DDR_B_WE# 8
DDR_B_CAS# 8

put near connector


C815

2
DUMMY-C2
C816

2
DUMMY-C2

12/15

ICH_SMBDATA 3,13,20
ICH_SMBCLK 3,13,20
SCD1U16V2ZY-2GP

R350 1
R351 1

2 10KR2J-3-GP
2 10KR2J-3-GP

3D3V_S0

3D3V_S0

C423

PM_EXTTS#1 7

C422
SC2D2U6D3V3KX-GP

1D8V_S3

CS0#
CS1#

DDR_CS2_DIMMB#
DDR_CS3_DIMMB#

5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194

SC2D2U16V5ZY-2GP

202
C22

C19

DDR_B_RAS#
DDR_B_WE#
DDR_B_CAS#

110
115

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

SRN56J-4-GP

108
109
113

DDR_B_BS2

RAS#
WE#
CAS#

1D8V_S3

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

8 DDR_B_BS[0..2]

102
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85

8 DDR_B_MA[0..13]

Layout Note:
Place near DM2

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

8 DDR_B_DQS[0..7]

8 DDR_B_DM[0..7]

MH1

MH1

Wistron Corporation

SCD1U16V2ZY-2GP
DDR2-200P-21-GP-U

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

DDRII-SODIMM SLOT2
Size
Custom

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007


5

-1
Sheet
1

14

of

41

CRT I/F & CONNECTOR

5V_CRT_S0

5V_S0
F1

0721

C7

M_RED

CRT_R

D4
RB751V-40-2-GP

SCD01U16V2KX-3GP
K

L3

FUSE-1D1A6V-8GP

CRT_R

5V_CRT1_S0
4

17
1
2

Layout Note:
Place these resistors
close to the CRT-out
connector
4

BLM18BB470SN1-GP
L2
CRT_G

CRT_G

17

CRT_B

17

17

1
2

CRT_B

13

JVGA_HS

14

JVGA_VS
DDC_CLK_CON

15
16

20.20424.015
U2
GMCH_HSYNC

DY

C8
SC33P50V2JN-3GP
DY

C9
C6
SC33P50V2JN-3GP
DY
SC22P50V2JN-4GP

1
1

VIDEO-15-57-GP-U1

5V_CRT1_S0

2
2

DY

5V_CRT1_S0
2

DDC_DATA_CON

DDC_DATA_CON

12

11

7
2
8
3
9
4
10
5

CRT_G

D10

C10

1
2

1
2

Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.

C12

SC10P50V2JN-4GP

C14

SC10P50V2JN-4GP

BLM18BB470SN1-GP

6
1

CRT_R
CRT_B

SC10P50V2JN-4GP

C11
SC10P50V2JN-4GP

C13
SC10P50V2JN-4GP

R5
150R2F-1-GP

150R2F-1-GP

150R2F-1-GP

R6

SC10P50V2JN-4GP

R7

C16

9 M_BLUE

SRN2K2J-1-GP

CRT1
4
3

2
BLM18BB470SN1-GP
L1

9 M_GREEN

RN1

C5
SC22P50V2JN-4GP

CRT_G
3

CRT_R

BAV99-7-F-GP
D12
DY
2

Hsync & Vsync level shift

DDC_CLK_CON

3D3V_S0
GMCH_VSYNC

CRT_B

3
PACDN009MR-GP-U
1
4
3

5V_S0
BAV99-7-F-GP

RN2
SRN2K2J-1-GP

PR_INSERT 17
1

14

1
2

3D3V_S0

C320
SCD1U16V2ZY-2GP

9,17 GMCH_VSYNC

14

9,17 GMCH_HSYNC

U5A

HSYNC_5
U1

TSAHCT125PW-GP
RN4
VSYNC_5

1
2

4
3

JVGA_HS
JVGA_VS

9 GMCH_DDCDATA

DDC_DATA_CON

DDC_DATA_CON

17
2

SRN33J-5-GP-U
U5B

TSAHCT125PW-GP

DDC_CLK_CON

17 DDC_CLK_CON

GMCH_DDCCLK

2N7002DW-1-GP

TV OUT CONN
L23

LUMA
CRMA
COMP

0721

1
3
8
9

1
1

D3

3D3V_S0
2

22.10021.H31

1
BAV99-7-F-GP

SC10P50V2JN-4GP

C3
SCD1U16V2ZY-2GP
DY
<Core Design>
1

SC10P50V2JN-4GP

R1
150R2F-1-GP

C295
C294
BLM18BB470SN1-GP

C1
SCD1U16V2ZY-2GP
DY

BAV99-7-F-GP

TV_LUMA

TV_COMP 17
1

GND
GND
GND
GND

MINDIN7-18-GP

L24
1

NC#5

NC#2

3
2

4
6
7

SC10P50V2JN-4GP

TV_COMP

TV1
TV_LUMA
TV_CRMA
TV_COMP

TV_CRMA 17

SC10P50V2JN-4GP

9 M_COMP

5V @ ext. CRT side

2
2

C293
C292
BLM18BB470SN1-GP

9 M_CRMA

R271
150R2F-1-GP

3D3V_S0

D1

connector

L25

SC10P50V2JN-4GP

1
1

SC10P50V2JN-4GP

Title

3
2

TV_CRMA

TV_LUMA 17

C297
C296
BLM18BB470SN1-GP

C2
SCD1U16V2ZY-2GP
DY

BAV99-7-F-GP

R2
150R2F-1-GP

1
Place this 2 resistors
close to the TV-out
connector

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

2
2
1

9 M_LUMA

Wistron Corporation

3D3V_S0

D2

CRT/TV Connector
Size
A3

Document Number

Rev

Pamirs

Date: Thursday, February 15, 2007


A

-1
Sheet
E

15

of

41

LED / INVERTER INTERFACE

I=3.57 mA
5V_S5

R516

LED5

Q31
2CHG_LED#

LED-B-27-U-GP

255R2F-L-GP

R1

CHG_LED 31

LCD/INV CONN

R2
PDTC124EU-1-GP

5V_S3

I=3.57 mA
LED4
2

33

LED-B-27-U-GP

R1

LCDVDD_S0

PWR_LED 31

C304
SC10U10V5ZY-1GP
U59C

LED1

8
10

CAPS_LED 31

LED-B-27-U-GP

9
9

255R2F-L-GP

42
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39

C305
SCD1U16V2ZY-2GP

14

I=3.57 mA

3D3V_S0

LCD1

5V_S0
5V_S0
R95

5V_S0

R2
PDTC124EU-1-GP

PWR_LED#

2
255R2F-L-GP

Q30

R515

TSAHCT08PWR-1GP

LDDC_CLK
LDDC_DATA

BRIGHTNESS_CONN
3D3V_S0

DCBATOUT

R412
1

LED-O-16-GP

LED3
2

SCD1U16V2ZY-2GP

TP_LED 31

C316

2
255R2F-L-GP

C306

SCD1U25V2ZY-U
2

C308
5V_S0

BLON_OUT

LED2

U28

31

R187

20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

40
41

VGA_TXACLK- 9
VGA_TXACLK+ 9
VGA_TXAOUT0- 9
VGA_TXAOUT0+ 9
VGA_TXAOUT1- 9
VGA_TXAOUT1+ 9
VGA_TXAOUT2- 9
VGA_TXAOUT2+ 9
VGA_TXBCLK- 9
VGA_TXBCLK+ 9
VGA_TXBOUT0- 9
VGA_TXBOUT0+ 9
VGA_TXBOUT1- 9
VGA_TXBOUT1+ 9
VGA_TXBOUT2- 9
VGA_TXBOUT2+ 9

SCD1U16V2ZY-2GP

ACES-CONN40C-GP-U

LED-B-27-U-GP

255R2F-L-GP

20.F0813.040

2N7002DW-1-GP
3D3V_S0
1

5V_S0
5V_S0

R493
10KR2J-3-GP

14

U59A

LED6

MEDIA_LED#

CDROM_LED#

3
2

R284
R285
4
3
RN50
SRN2K2J-1-GP

5V_S0

R470
1

LDDC_DATA

LED7

1
C307
1
C314

MS_LED# 25

LED-B-67-GP-U2
TSAHCT08PWR-1GP

3D3V_S0

Layout 40 mil

2
0R0402-PAD

BRIGHTNESS

LBKLT_CTL 9

31

0R2J-2-GP

LDDC_CLK

4
5

255R2F-L-GP

DY

R286
100KR2J-1-GP
DY

60804

1
2
14

NC

I=3.6 mA
U59B

1
2

TSAHCT08PWR-1GP

5V_S0

BRIGHTNESS_CONN

SATA_LED# 19

LED-B-27-U-GP

255R2F-L-GP

3D3V_S0

23

I=3.57 mA
R520
1

BLON_OUT
2
SC1000P50V3JN-GP
BRIGHTNESS_CONN
2
SCD1U16V2ZY-2GP

0707

LCDVDD_S0

5V_S3
2

U6

R12
100KR2J-1-GP

IN#1
OUT
EN
GND

GND
IN#8
IN#7
IN#6
IN#5

BC1
SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

G5281RC1U-GP
EC8

9
8
7
6
5

U46

R280
10KR2J-3-GP

DY

DY
1

LCDVDD_EN

1
2
3
4

LCDVDD_S0

LCDVDD_EN
1
R281

DY

2
100R2J-2-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2N7002DW-1-GP
Title

LCD/Inverter Connector
Size
Custom
Date:

Document Number

Rev

Pamirs
Wednesday, February 14, 2007

Sheet

-1
16

of

41

5V_S0

5V_S0

D9

Docking Connector

5V_S0

D26

D27

2
DOCK1

VOL_UP_DK# 3

DY

VOL_DWN_DK#3

DY

DY

BAV99PT-GP-U

BAV99PT-GP-U

AD+

BAV99PT-GP-U

15
CRT_R
15
CRT_G
15
CRT_B
15 DDC_DATA_CON
15 DDC_CLK_CON

Hsync & Vsync level shift

1
2

C25
SCD1U16V2ZY-2GP

10

14
9

28

DCBATOUT

TSAHCT125PW-GP
RN3
1
2

VSYNC_5_1

11

RJ45-4
RJ45-6
RJ45-3
RJ45-2
RJ45-1

28
28

HSYNC_5_1

13

14
12

9,15 GMCH_VSYNC

39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3

RJ45-7

28
28

DOCK_IN# 31

DOCK_IN#
U5C

40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4

SA
28

9,15 GMCH_HSYNC

43

DOCK_HS
DOCK_VS
USB_7USB_7+

5V_S0

4
3

AD+

46
NP2
44

42
NP1
45

DOCK_HS
DOCK_VS

AD+

EC50
SCD1U25V3ZY-1GP

PR_INSERT

TV_LUMA 15
TV_CRMA 15
TV_COMP 15
CIR_PR
PWR_ON
EAPD#_1
R46
PWR_BTN# 31 R44
JACK_DETECT# 29
VOL_UP_DK# 31
VOL_DWN_DK# 31

SPDIF_DOCK

1
1

2
EAPD# 32
2 0R2J-2-GP MUTE_LED# 31,32
0R2J-2-GP

DY

AUD_AGND

DK_SPKR_R_1
DK_SPKR_L_1
DK_MIC_R_CN_1
DK_MIC_L_CN_1

AUD_AGND
DOCK_PRESENT

1
EC44
1
EC25
1
EC18

2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

1
EC28
1
EC20
1
EC59
PWR_ON
1
EC21
VOL_UP_DK#
1
EC58
VOL_DWN_DK#
1
EC24

2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SC100P50V2JN-3GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

AUD_AGND

41
EAPD#

SRN33J-5-GP-U
7

U5D

TSAHCT125PW-GP

FOX-CONN40-1-GP-U1
DOCK_PRESENT
20.B0045.040

PWR_BTN#
CIR_PR
1

CIR
CIR_PR

R300
2
0R2J-2-GP
R298
2
0R2J-2-GP

1D5V_S0
CIR_SENSE 31

29

1
5V_S0

2
0R0402-PAD

R54

USB_7+

USB20_P7

R314

29

SPDIF

20

DY

EC63
SC470P50V2KX-3GP

EC64
SC470P50V2KX-3GP

2
0R0402-PAD

U8

1
L29

DK_SPKR_R_1
2
0R3-0-U-GP

EC61
SC100P50V2JN-3GP

PR_INSERT

29 DK_MIC_R_CN
2

DK_SPKR_R

29

5V_S0

R23
10KR2J-3-GP
15

1
USB_7-

USB20_N7
R52

R290
100KR2J-1-GP

SPDIF_DOCK

2
BLM18PG600SN-2GP

1
L28
DY

2
33R2J-2-GP

1
R289

R313
220R2J-L2-GP

DOCK_PRESENT
2

DY

L-63UH-GP

DOCK_IN# 31
1

Q21
CH3904PT-GP
B

330R2J-3-GP

TR1
2N7002DW-1-GP

R287
10KR2J-3-GP

20

R311
33R3J-2-GP

2 DK_MIC_R_CN_1
0R3-0-U-GP

1
L6
EC26

SC100P50V2JN-3GP

3D3V_S5

5V_S0

Q18
CH3906PT-GP
1
R294

3
2
1KR2J-1-GP

C
D
G

PWR_ON

Place near Dock connector


Place near Codec

1
BAS40CW-GP
R295
10KR2J-3-GP

S0 = 4V
S3 = 2.5V
S5 = 0V

<Core Design>

Wistron Corporation

PM_SLP_S4#

EC27
SC100P50V2JN-3GP

U12

E
2

R304
2
B
22KR2J-GP

Q20
2N7002-11-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

20,28,31,36,37,38

2 DK_MIC_L_CN_1
0R3-0-U-GP

1
L8

2
1

29 DK_MIC_L_CN

EC65
SC100P50V2JN-3GP

R305
22KR2J-GP

DK_SPKR_L

DK_SPKR_L_1
2
0R3-0-U-GP
2

29

3D3V_S5

1
L30

Title

Board to board conn/ Docking


Size
A3

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet
E

17

of

41

PCI_AD[0..31]

24 PCI_AD[0..31]

RN61
D

PCI_FRAME#
PCI_GNT1#
PCI_REQ1#
PCI_REQ2#

8
7
6
5

SRN8K2J-4-GP
RN65
1
2
3
4

PCI_GNT3#
PCI_REQ3#
PCI_SERR#
PCI_PIRQG#

8
7
6
5

SRN8K2J-4-GP
RN68
1
2
3
4

PCI_GNT#0
PCI_PIRQA#
PCI_PLOCK#
PCI_PERR#

8
7
6
5

1
2
3
4

SRN8K2J-4-GP
RN70
8 PCI_PIRQH#
PCI_PIRQC#
7
PCI_PIRQB#
6
5 PCI_REQ#0

1
2
3
4

SRN8K2J-4-GP
RN67
PCI_IRDY#
8
7 PCI_TRDY#
6 PCI_PIRQE#
PCI_PIRQD#
5

1
2
3
4

SRN8K2J-4-GP
RN63
8 PCI_PIRQF#
7 PCI_GNT2#
6 PCI_DEVSEL#
5 PCI_STOP#

24

PCI_PIRQA#

24

PCI_PIRQC#

U25C 3 OF 6
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

3D3V_S0

1
2
3
4

D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
GNT3#/GPIO55
REQ3#/GPIO54

A4
D7
E18
C18
B19
F18
C10
A11

C/BE0#
C/BE1#
C/BE2#
C/BE3#

C17
E15
F16
E17

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
FRAME#
PLOCK#
SERR#
STOP#
TRDY#

C8
D9
G6
D16
A7
A17
B7
F10
C16
C9

PCI_IRDY#
PCI_PAR
PCI_PCIRST#
PCI_DEVSEL#
PCI_PERR#
PCI_FRAME#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#

PLTRST#
PCICLK
PME#

AG24
B10
G7

PCI_PLTRST#
CLK_PCI_ICH

PCI

PIRQA#
PIRQB#
PIRQC#
PIRQD#

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

F8
G11
F12
B3

PCI_REQ#0 24
PCI_GNT#0 24
TP70
D

TP72
TP83
PCI_C/BE#0
PCI_C/BE#1
PCI_C/BE#2
PCI_C/BE#3

R415
1

Interrupt I/F

F9
B5
C5
A10

PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_GNT3#
PCI_REQ3#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

24
24
24
24

PCI_IRDY# 24
PCI_PAR 24
PCI_DEVSEL# 24
PCI_PERR# 24
PCI_FRAME# 24
PCI_SERR# 24,31
PCI_STOP# 24
PCI_TRDY# 24
CLK_PCI_ICH 3
ICH_PME# 24
8K2R2J-3-GP
2

3D3V_S5

12/18

ICH8-M-1-GP-U

0921 P/N CHANGE TO 71.0ICH8.M08


3D3V_S5

U36A

14

SRN8K2J-4-GP

PCI_PCIRST#

1
3

PCIRST1# 24,27

DY

PCI_GNT3#

2
SSLVC08APWR-GP

R214
100KR2J-1-GP

R192
1KR2J-1-GP

R212
1
0R2J-2-GP

Boot BIOS Strap

DY
B

PCI_GNT0#

SPI_CS#1

Boot BIOS Location


3D3V_S5

SPI

PCI

U36B

14

0
A16 swap override Strap

4
6

Low= A16 swap override Enable


High= Default *

LPC *

PLT_RST1#

PLT_RST1# 7,20,26,28,31,33,34
1

5
7

PCI_GNT3#

PCI_PLTRST#

DY

SSLVC08APWR-GP

Place closely pin B10


1

33R2J-2-GP

R194
R191
10R2J-2-GP

1KR2J-1-GP

DY

1 1
2

SC8P250V2CC-GP

DY
C215

R393
10KR2J-3-GP

DY

PCI_PLTRST# 23

CLK_PCI_ICH

R217
3D3V_S5

PCI_GNT#0

R221
100KR2J-1-GP

20

SPI_CS1#

SPI_CS1#
A

<Variant Name>

DY

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH8(1/4)-PCI/INT
Size
A3

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet
1

18

of

41

+RTCVCC

RN64

+RTCVCC
U25A 1 OF 6

RTCRST#

AD22

INTRUDER#

ICH_INTVRMEN
LAN100_SLP

GLAN_CLK

D22

LAN_RSTSYNC

C21
B21
C22

LAN_RXD0
LAN_RXD1
LAN_RXD2

D21
E20
C20

LAN_TXD0
LAN_TXD1
LAN_TXD2

SB
C191
SC15P50V2JN-2-GP

AH21

1D5V_S0

SB
29 HDA_BITCLK_CODEC
29 HDA_SYNC_CODEC

R525 1
R526 1

R383
2
24D9R2F-L-GP

GLAN_COMP

HDA_BITCLK

2
2 47R2J-2-GP
33R2J-2-GP

29 HDA_RST#_CODEC
29

HDA_SDIN0

29 HDA_SDOUT_CODEC

1
2

4
3

RN66

SRN33J-5-GP-U

GAP-OPEN TP76
16

C231 1
C232 1

SATA_LED#

2SC3900P50V2KX-2GP
2SC3900P50V2KX-2GP

D25
C25

SATA_TXN0_C
SATA_TXP0_C

3 CLK_PCIE_SATA#
3 CLK_PCIE_SATA
R202
1
2

GLAN_DOCK#/GPIO13
GLAN_COMPI
GLAN_COMPO

AJ16
AJ15

HDA_BIT_CLK
HDA_SYNC

AE14

HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

AE13

HDA_SDOUT

AE10
AG14

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6
AF5
AH5
AH6

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

AG3
AG4
AJ4
AJ3

SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP

AF2
AF1
AE4
AE3

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

AB7
AC6

SATA_CLKN
SATA_CLKP

AG1
AG2

SATARBIAS#
SATARBIAS

24D9R2F-L-GP

FWH4/LFRAME#

C4

LPC_LFRAME#

G9
E6

LPC_DRQ0#

LDRQ0#
LDRQ1#/GPIO23

1D05V_S0
R389
H_FERR#

TP84
TP85

AF26
AE26

FERR#

AD24

H_DPSLP#
H_FERR#

CPUPWRGD/GPIO49

AG29

H_PWRGOOD

H_PWRGOOD 5

IGNNE#

AF27

H_IGNNE#

H_IGNNE# 4

INIT#
INTR
RCIN#

AE24
AC20
AH14

H_INIT#

NMI
SMI#

AD23
AG28

H_NMI

H_NMI 4
H_SMI# 4

STPCLK#

AA24

H_STPCLK#

H_STPCLK# 4

AE27

THRMTRIP_ICH#
1
R146

KBGA20 31
H_A20M# 4

H_A20M#

H_DPRSTP#

H_DPRSTP#

TP56

H_DPRSTP# 5,7

H_DPSLP# 5
H_FERR# 4

H_DPSLP#

TP59

within 2" from R184

H_INIT# 4
H_INTR 4
KBRST# 31

KBRST#

56R2J-4-GP

DPRSTP#
DPSLP#

Within 500 mils

LPC_LFRAME# 31,33,34

AF13
AG26

TP8

4
3
SRN10KJ-5-GP

A20GATE
A20M#

THRMTRIP#

AJ17
AH17
AH15
AD13
G66
1

23 SATA_RXN0_C
23 SATA_RXP0_C
23 SATA_TXN0
23 SATA_TXP0

INTVRMEN
LAN100_SLP

B24

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

CPU

X2
RESO-32D768KHZ-GP

C187
SC15P50V2JN-2-GP

AF25
AD21

E5
F5
G8
F6

IDE

SC1U10V3KX-3GP

AF23

SM_INTRUDER#

ICH_RTCX2
1
2
R157 10MR2J-L-GP

ICH_RTCRST#

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

1
2

1D05V_S0
1

G63
GAP-OPEN

C468

RTCX1
RTCX2

KBGA20
KBRST#

31,33,34

R138
56R2J-4-GP

2
20KR2J-L2-GP
1

1
R394
ICH_RTCX1

AG25
AF24

LPC

ICH_RTCX1
ICH_RTCX2

LPC_LAD[0..3]

RTC

ICH_INTVRMEN
2
330KR2F-L-GP

LAN/GLAN

SM_INTRUDER#
2
1MR2J-1-GP

1
R384

IHDA

LAN100_SLP
2
330KR2F-L-GP

1
R390

SATA

1
R395

3D3V_S0

H_THERMTRIP# 4,7

24R2J-GP

AA23
IDE_PDD[0..15]

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15

V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6

DA0
DA1
DA2

AA4
AA1
AB3

IDE_PDA0 23
IDE_PDA1 23
IDE_PDA2 23

DCS1#
DCS3#

Y6
Y5

IDE_PDCS1# 23
IDE_PDCS3# 23

DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ

W4
W3
Y2
Y3
Y1
W5

IDE_PDIOR# 23
IDE_PDIOW# 23
IDE_PDDACK# 23
INT_IRQ14 23
IDE_PDIORDY 23
IDE_PDDREQ 23

23

placed within 2" from ICH8M

3D3V_S0

IDE_PDIORDY

1
R431

2
4K7R2J-2-GP

INT_IRQ14

1
R418

2
8K2R2J-3-GP

ICH8-M-1-GP-U

3D3V_AUX_S5

RTC1
5

SB
+RTCVCC

U18

BATT1.1

3
2
1

W=20mils

1
R388

W=20mils

W=20mils R161
1
CH715FPT-GP

W=20mils

1KR2J-1-GP

ACES-CON3-1-GP

C469
SC1U10V3ZY-6GP

2
100R2J-2-GP

XOR CHAIN ENTRANCE STRAP : RSVD

<Variant Name>

3D3V_S0

Wistron Corporation
R411

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

1KR2J-1-GP
1

HDA_SDOUT_CODEC

Title

ICH8(2/4) LAN,HD,IDE,LPC

DY

Size
A3

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007


5

-1
Sheet
1

19

of

41

3D3V_S0

3D3V_S5

Place closely pin G5

Place closely pin AG9

RN47
CLK_48M_ICH

PM_BMBUSY#

AG12

OCP#

AG22

H_STP_PCI#
H_STP_CPU#

AE20
AG18

OCP#

H_STP_PCI#
H_STP_CPU#

26,27,28,31 PCIE_WAKE#
24,31,34 INT_SERIRQ

AE17
AF12
AC13

INT_SERIRQ
THERM_SCI#

RN30

3,28
31
31
31

1
2
3
4

SMB_LINK_ALERT#
OCP#
ECSMI#
GPIO22

8
7
6
5

DY
DY TP902
1

CPPE#
ECSCI#
ECSMI#
EC_SWI#

R417
ECSMI#

GPIO1
CPPE#1
ECSCI#

0R2J-2-GP

GPIO17
NEWCARD_RST#
GPIO20
GPIO22

TP88
28 NEWCARD_RST#

TP81

SRN10KJ-6-GP

TP57
TP74
C

R399

DPRSLPVR
100KR2J-1-GP
ICH_RSVD
1KR2J-1-GP

R410

DY

CLKSATAREQ#
GPIO38
GPIO39
IDE_RESET#

CLKSATAREQ#
TP87
TP80
TP82
29

AJ20
AJ22
AJ8
AJ9
AH9
AE16
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AJ11
AD10

SB_SPKR

SB_SPKR

AD9

MCH_ICH_SYNC# AJ13

7 MCH_ICH_SYNC#

ICH_RSVD

32K suspend clock output

AJ21

Low--> default

3D3V_S0

TP7
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ#/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48

BATLOW#

SPKR
MCH_SYNC#
TP3

AH27

GPIO26

AE23

PM_PWROK

AJ14

DPRSLPVR

AE21

PM_BATLOW#_R

PM_PWROK 7,22

CK_PWRGD

AG27

1
2
R403
0R0402-PAD
EC_RMRST#

E1

CK_PWRGD_R

E3

VGATE_PWRGD

SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1

AJ25

SLP_M#

F23
AE18

CL_CLK0
CL_CLK1

F22
AF19

CL_DATA0
CL_DATA1

D24
AH23

CL_VREF0_ICH
CL_VREF1_ICH

CL_DATA0 7
TP65

R398
1

GPIO24
GPIO10
GPIO14
GPIO9

C474

TP55
TP60
TP63
TP66

14

G792_CLK 22

32KHZ

1
2
R518 10R2J-2-GP

TSLCX08MTCX-GP

TPM_32K_CLK 34

DY

3D3V_S0

28
28

LAN

27
27

4
3

New Card

Mini Card 1

RN28
SRN2K2J-1-GP

1
2

Mini Card 2

26
26

10KR2J-3-GP
SB_SPKR
2

DY

PCIE_RXN1
PCIE_RXP1
PCIE_TXN1
PCIE_TXP1

27
27

PCIE_RXN2
PCIE_RXP2
PCIE_TXN2
PCIE_TXP2

26
26

PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3

26
26

PCIE_RXN4
PCIE_RXP4
PCIE_TXN4
PCIE_TXP4

SMB_CLK

26,28 SMB_CLK

SMB_DATA

2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP

1C167
1C168

PCIE_C_TXN2
PCIE_C_TXP2

M27
M26
L29
L28

2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP

1C183
1C182

PCIE_C_TXN3
PCIE_C_TXP3

K27
K26
J29
J28

PERN3
PERP3
PETN3
PETP3

2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP

1C180
1C181

PCIE_C_TXN4
PCIE_C_TXP4

H27
H26
G29
G28

PERN4
PERP4
PETN4
PETP4

F27
F26
E29
E28

PERN5
PERP5
PETN5
PETP5

D27
D26
C29
C28

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

C23
B23
E22

SPI_CLK
SPI_CS0#
SPI_CS1#

D23
F21

SPI_MOSI
SPI_MISO

SMB_DATA 26,28

ICH_SMBCLK 3,13,14

SPI_CS1#

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9

RN46

SRN10KJ-6-GP
RN45
USB_OC#0
1
USB_OC#9
2
USB_OC#8
3
USB_OC#7
4

8
7
6
5

3D3V_S5

8
7
6
5

8
7
6
5

RN37

SRN10KJ-6-GP

1
2
3
4

SMB_LINK_ALERT#
SMLINK0
SMLINK1
PCIE_WAKE#

AJ19
AG16
AG15
AE15
AF15
AG17
AD12
AJ18
AD14
AH18

PERN2
PERP2
PETN2
PETP2

OC0#
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
OC8#
OC9#

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

DMI_RXN0
DMI_RXP0
DMI_TXN0
DMI_TXP0

7
7
7
7

Y27
Y26
W29
W28

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

DMI_RXN1
DMI_RXP1
DMI_TXN1
DMI_TXP1

7
7
7
7

DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP

AB26
AB25
AA29
AA28

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

DMI_RXN2
DMI_RXP2
DMI_TXN2
DMI_TXP2

7
7
7
7

DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP

AD27
AD26
AC29
AC28

DMI_RXN3
DMI_RXP3
DMI_TXN3
DMI_TXP3

DMI_RXN3 7
DMI_RXP3 7
DMI_TXN3 7
DMI_TXP3 7

DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP

DMI_CLKN
DMI_CLKP

T26
T25

DMI_ZCOMP
DMI_IRCOMP

Y23
Y24

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2

USBRBIAS#
USBRBIAS

F2
F3

USB

CLK_PCIE_ICH#
CLK_PCIE_ICH

USBRBIAS

R405

Within 500 mils


2
24D9R2F-L-GP
USB_PN0 23
USB_PP0 23
USB_PN1 28
USB_PP1 28
USB_PN2 23
USB_PP2 23
USB_PN3 23
USB_PP3 23
USB_PN4 32
USB_PP4 32
USB_PN5 32
USB_PP5 32
USB_PN6 26
USB_PP6 26
USB20_N7 17
USB20_P7 17
USB20_N8 34
USB20_P8 34
TP94
TP92

USB20_N8
USB20_P8
USB20_N9
USB20_P9

1
R200

CLK_PCIE_ICH# 3
CLK_PCIE_ICH 3

DMI_IRCOMP 1
R391

1D5V_S0
3D3V_S0

USB1
New Card
USB2
USB3
CAMERA
BT
35
MINICARD
1 CLK_EN#
DOCK
Finger Printer
<Core Design>

R189 1
0R2J-2-GP
R402 1
0R2J-2-GP

CK_PWRGD

VRMPWRGD

Q11
2N7002-11-GP

G
A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

ICH8(3/4) PM,USB,GPIO
Size
Custom

10KR2F-2-GP

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007


5

DY

Title

10KR2F-2-GP

2
R404

R400
330R2J-3-GP

2
22D6R2F-L1-GP

Within 500 mils

USB_OC#5 1

3D3V_S5

SRN10KJ-6-GP
ICH8-M-1-GP-U

USB_OC#3 1

V27
V26
U29
U28

DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP

1C169
1C170

18

1
2
3
4

PERN1
PERP1
PETN1
PETP1

2
SCD1U16V2KX-3GP
2
SCD1U16V2KX-3GP

2N7002DW-1-GP

USB_OC#4
USB_OC#2
USB_OC#1
USB_OC#6

P27
P26
N29
N28

PCIE_C_TXN1
PCIE_C_TXP1

U19

2
3K24R2F-GP

R396
453R2F-1-GP

U25B 2 OF 6

28
28

26
26

5V_S0

1
R414

PCI-Express

1
2
R517 10R2J-2-GP

Direct Media Interface

32KHZ

R397

SPI

1
2

3D3V_S0

6
5

3D3V_S0

R392
453R2F-1-GP

1
C478

3,13,14 ICH_SMBDATA

3K24R2F-GP

ICH8-M-1-GP-U

High--> No boot

ICH_SUSCLK

CL_CLK0 7
TP67

3D3V_S5
R519
10KR2J-3-GP
U61B

1 2

SB_RSMRST# 31

VGATE_PWRGD 7,35

CL_RST# 7

AJ27
AJ24
AF22
AG19

CLGPIO0/GPIO24
CLGPIO1/GPIO10
CLGPIO2/GPIO14
CLGPIO3/GPIO9

10KR2J-3-GP
2

R144 1

CK_PWRGD 3

TP58

AJ23

CL_RST#

1 2

2/9
1
2
R148
100R2J-2-GP
CK_PWRGD
2
0R0402-PAD

1
R433

CLPWROK

2 R147
10KR2J-3-GP

SB_PWR_BTN# 31

AH20

RSMRST#

DY
D

DPRSLPVR 7,35

C2

PWRBTN#
LAN_RST#

GPIO

SATA

SMB

VRMPWRGD

DPRSLPVR/GPIO16

C218
SC4D7P50V2CN-1GP

SRN10KJ-6-GP
RN34

VRMPWRGD
2
0R2J-2-GP
SST_CTL
TP62

1
R401

7,35 VGATE_PWRGD

WAKE#
SERIRQ
THRM#

DY

ICH_RI#
PM_BATLOW#_R
XDP_DBRESET#
GPIO26

8
7
6
5

CLKRUN#

PWROK

DY

C230
SC4D7P50V2CN-1GP

PM_SLP_S3# 22,27,28,31,34,37,38
PM_SLP_S4# 17,28,31,36,37,38

1
2
3
4

S4_STATE#/GPIO26
STP_PCI#
STP_CPU#

DY

DY

SMBALERT#/GPIO11

R193
10R2J-2-GP

R179

AH11

24,31,34 PM_CLKRUN#

R201
10R2J-2-GP

PCIE_WAKE#
1KR2J-1-GP

AG23
AF21
AD18

SLP_S3#
SLP_S4#
SLP_S5#

BMBUSY#/GPIO0

ICH_SUSCLK

SCD1U16V2KX-3GP
2
1

3
3

SUSCLK

D3

SRN10KJ-6-GP3
CLK_14M_ICH
CLK_48M_ICH 3

11/08

SUS_STAT#/LPCPD#
SYS_RESET#

CLK_14M_ICH
CLK_48M_ICH

1
2
3
4

7 PM_BMBUSY#
4

1
2

DY

XDP_DBRESET#

RI#

AG9
G5

8
7
6
5

SCD1U16V2KX-3GP
2
1

3D3V_S5

34
LPC_PD#
4 XDP_DBRESET#

CLOCKS

4
3
RN43
SRN2K2J-1-GP

F4
AD15

SYSGPIO

AF17

CLK14
CLK48

POWER MGT

ICH_RI#

SATA0_R0
SATA0_R1
SATA0_R2
SATA0_R3

AJ12
AJ10
AF11
AG11

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
GPIO37

GPIO

3D3V_S0

SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1

Controller Link

R188

AJ26
AD19
AG21
AC17
AE19

MISC

1
2

RN48
SMB_CLK
SMB_DATA
SMB_LINK_ALERT#
SMLINK0
SMLINK1

NEWCARD_RST#
10KR2F-2-GP

3D3V_S0

U25D 4 OF 6

SRN10KJ-6-GP

CLK_14M_ICH

RN27
SRN2K2J-1-GP

INT_SERIRQ
PM_CLKRUN#
CLKSATAREQ#
THERM_SCI#

8
7
6
5

4
3

1
2
3
4

-1
Sheet

20

of

41

+RTCVCC

U25F

6 OF 6

20 mils

SCD1U16V2ZY-2GP

C455

1D05V_S0

C511
SCD1U16V2ZY-2GP

1D5V_S0
TP73
TP69

3D3V_S0

VCC_LAN1_05_INT_ICH_1
VCC_LAN1_05_INT_ICH_2

BLM18PG121SN-1GP
C176
SC4D7U10V5ZY-3GP
3D3V_S0

1D5V_S0_GLANPLL
L35
C463
1
1D5V_S0

SC10U10V5ZY-1GP

C165

BLM18PG121SN-1GP

SC2D2U10V3ZY-1GP

1D5V_S0

L13

C522
SCD1U16V2ZY-2GP

1
2

SCD1U16V2ZY-2GP

1
SCD1U16V2ZY-2GP

2
1
2

AC8
AD8
AE8
AF8

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

AA3
U7
V7
W1
W6
W7
Y7

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11

(SATA)
C500

VCC1_5_A
VCC1_5_A

VCCSUSHDA

AD11

AA5
AA6

VCC1_5_A
VCC1_5_A

VCCSUS1_05
VCCSUS1_05

J6
AF20

G12
G17
H7

VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCSUS1_5

AC16

VCCSUS1_5_ICH_1

VCCSUS1_5

J7

VCCSUS1_5_ICH_2

AC7
AD7

VCC1_5_A
VCC1_5_A

VCCSUS3_3

C3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

AC18
AG20
AC21
AC22
AH28

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

P6
P7
N7
C1
P1
R1
P2
P3
R3
P4
P5
R5
R6

VCCCL1_05

G22

VCCCL1_5

A22

VCCCL3_3
VCCCL3_3

F20
G21

C461

VCC1_5_A

F17
G18

VCCLAN1_05
VCCLAN1_05

F19
G20

VCCLAN3_3
VCCLAN3_3

A24

VCCGLANPLL

A26
A27
B26
B27
B28

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

B25

VCCGLAN3_3

SCD1U16V2ZY-2GP

3D3V_S5

TP86

C521
C444

TP71

3D3V_S0

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP89
TP64

3D3V_S5

C482

SCD1U16V2ZY-2GP
C510
SCD1U16V2ZY-2GP

W23

C480
SCD1U16V2ZY-2GP

C438

VCCHDA

AC12

AC10
AC9

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

3D3V_S0

AC1
AC2
AC3
AC4
AC5

VCCUSBPLL

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

F1
L6
L7
M6
M7

C498

C524
SCD1U16V2ZY-2GP

AE7
AF7
AG7
AH7
AJ7

D1

C506
SCD1U16V2ZY-2GP

1
2

C493
SC4D7U6D3V3KX-GP

(DMI)
C512

3D3V_S0
3D3V_S0

3D3V_S0

CORE

VCC3_3
VCC3_3
VCC3_3
VCC3_3

SCD1U16V2ZY-2GP 3D3V_S0
SCD1U16V2ZY-2GP

1D5V_S0
C517

AD2

3D3V_S5

1D5V_S0

SCD1U16V2ZY-2GP

AF29

VCC3_3

VCCCL1_05_ICH

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24

ICHGND1
A1
R429
A2
A28
A29 ICHGND2
R380
AJ28
AH1
AH29
AJ1 ICHGND3
R428
AJ2
AJ29
ICHGND4
B1
R432
B29

DY

2
0R2J-2-GP

DY

2
0R2J-2-GP

DY

2
0R2J-2-GP

DY

2
0R2J-2-GP

ICH8-M-1-GP-U

C519

SC1U10V3ZY-6GP

VCC3_3

1D05V_S0

C513

C175
SC22U6D3V5MX-2GP

1D5V_S0
B

AE28
AE29
AC23
AC24

SC4D7U6D3V3KX-GP

SC1U10V3ZY-6GP

VCC_DMI
VCC_DMI

VCCSATAPLL

C527

1D5V_S0

C228

SC10U10V5ZY-1GP

C516

BLM18PG121SN-1GP

AJ6

1D5V_S0

C184
SC10U10V5ZY-1GP

1D25V_S0

1D5V_S0_SATAPLL

SC1U10V3ZY-6GP

1D5V_S0

SCD01U16V2KX-3GP

L38

C443

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

TP61

3D3V_S0
C476

20 mils
ICH_V5REF_SUS
C520
SCD1U16V2ZY-2GP

L12
1
2
IND-1UH-36-GP

1D5V_DMIPLL_S0

D19
RB751V-40-2-GP

C509

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

<Variant Name>

ICH8-M-1-GP-U
SC1U10V3ZY-6GP

R204
100R2J-2-GP

C458

V_CPU_IO
V_CPU_IO

VCCP CORE

VCCDMIPLL

IDE

3D3V_S5

R29

PCI

1
SC2D2U10V3ZY-1GP

2
5V_S5

ATX

20 mils
ICH_V5REF_RUN
C492
SCD1U16V2ZY-2GP

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

VCCPSUS

100R2J-2-GP

1
2

D16
RB751V-40-2-GP

V5REF_SUS

USB CORE

R190

C177

SC10U10V5ZY-1GP

3D3V_S0
A

5V_S0

C179

SC10U10V5ZY-1GP

1
2

ST220U2VBM-3GP

C166

A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

VCCA3GP

C464

BLM18PG121SN-1GP

G4
AA25
AA26
AA27
AB27
AB28
AB29
D28
D29
E25
E26
E27
F24
F25
G24
H23
H24
J23
J24
K24
K25
L23
L24
L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T23
T24
T27
T28
T29
U24
U25
V23
V24
V25
W25
Y25

ARX

ICH_V5REF_SUS
1D5V_A3GP_S0

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

V5REF
V5REF

VCCPUSB

L37
1

1D5V_S0

5 OF 6

VCCRTC

T7
A16

U25E
AD25
ICH_V5REF_RUN

GLAN POWER

SCD1U16V2ZY-2GP

C472

A23
A5
AA2
AA7
A25
AB1
AB24
AC11
AC14
AC25
AC26
AC27
AD17
AD20
AD28
AD29
AD3
AD4
AD6
AE1
AE12
AE2
AE22
AD1
AE25
AE5
AE6
AE9
AF14
AF16
AF18
AF3
AF4
AG5
AG6
AH10
AH13
AH16
AH19
AH2
AF28
AH22
AH24
AH26
AH3
AH4
AH8
AJ5
B11
B14
B17
B2
B20
B22
B8
C24
C26
C27
C6
D12
D15
D18
D2
D4
E21
E24
E4
E9
F15
E23
F28
F29
F7
G1
E2
G10
G13
G19
G23
G25
G26
G27
H25
H28
H29
H3
H6
J1
J25
J26
J27
J4
J5
K23
K28
K29
K3
K6

Wistron Corporation

DY

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

ICH8(4/4) POWER&GND
Size
Custom
Date:
5

Document Number

Rev

Pamirs

-1
Sheet

Wednesday, February 14, 2007


1

21

of

41

FAN1_VCC

5V_S0

2
D11
1N4148W-7-F-GP

R32
10KR2J-3-GP

C40
SC10U10V5ZY-1GP

1
2

C35
SCD1U16V2ZY-2GP

*Layout* 15 mil

EAN1
2

RN51

3D3V_S0

4
3

G792_SCL
G792_SDA

1
2

FAN1_FG1

3
2
1

FAN1_VCC

SRN10KJ-5-GP

*Layout* 15 mil

C34
SC1000P50V3JN-GP

4
ACES-CON3-1-GP
20.F0735.003

5V_S0

6
20

VCC
DVCC

7
9
11

DXP1
DXP2
DXP3

15
13
3
2

ALERT#
THERM#
THERM_SET
RESET#

C329
SCD1U16V2ZY-2GP

FAN1
FG1
CLK
SDA
SCL
NC#19

1
4
14
16
18
19

DGND
DGND

5
17

SGND1
SGND2
SGND3

8
10
12

G792_CLK 20

G792_SDA
G792_SCL

G792_DXP2

EC_RST# 1

THRM#
R435
2
0R2J-2-GP

THRM#
HW_THRM_SHDN#
V_DEGREE

Setting T8 as
100 Degree

31

R299
100KR2F-L1-GP
G792SFUF-GP

3D3V_S5

V_DEGREE
=(((Degree-72)*0.02)+0.34)*VCC

G792_DXN2

Q4
PMBS3904-1-GP

C331
SC1U10V3ZY-6GP

R302
10KR2F-2-GP
C330
SC4D7U10V5ZY-3GP

5V_G792_S0

R303
2
200R2F-L-GP
1

C57
SC2200P50V2KX-2GP

*Layout* 30 mil

5V_S0

U14

G10

13

G792_RST#

11

7,20 PM_PWROK

TSLCX08MTCX-GP

DXP1:108 Degree
DXP2:H/W Setting
DXP3:88 Degree

H_THERMDA 4

PM_SLP_S3# 20,27,28,31,34,37,38

Place near chip as close


as possible

14

GAP-CLOSE

U61D
12

C49
SC2200P50V2KX-2GP

H_THERMDC 4

R266

100KR2J-1-GP

D33
1N4148W-7-F-GP

31,32 KBC_SCL1

KBC_SDA1 31,32
34,36 PWR_S5_EN#
G792_SCL

VCC

B
A
GND

1
2
3

EC_RST#

EC_RST# 31
S5_ENABLE 31

U54

C525
SC1U10V3ZY-6GP

G792_SDA

R434
100KR2J-1-GP
1

3D3V_S0

5V_AUX_S5
3D3V_S0
U43

KBC_3D3V_AUX

74AHCT1G00GW-GP
73.01G00.0BG

2N7002DW-1-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

Thermal/Fan Controllor G792


Size
Custom

Document Number

Date: Wednesday, February 14, 2007

Rev

Pamirs
Sheet

-1
22

of

41

IDE_PDD[0..15]

SATA HD Connector

CD-ROM CONNECTOR

3D3V_S0

1
2

C501
SC10U10V5ZY-1GP

SCD1U16V2ZY-2GP

C514
2

C502
SC10U10V5ZY-1GP

5V_S0

CDROM_LED# 1
R443

2
4K7R2J-2-GP
3D3V_S0

INT_IRQ14

2
8K2R2J-3-GP

5V_S0

19

1
R224

C213
SCD1U16V2ZY-2GP
CDROM1

HDD1

51

10
12

19 IDE_PDDREQ
19 IDE_PDIOR#

13
14
15

19 IDE_PDDACK#

16
17
18

19 IDE_PDA2
19 IDE_PDCS3#

19
20
21
22

5V_S0

24

C528
SC10U10V5ZY-1GP

SYN-CONN22A-GP-U2
20.F0817.022

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
52

CD_AUDL 29
CD_AGND 29

RSTDRV#_5
IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4
IDE_PDD3
IDE_PDD2
IDE_PDD1
IDE_PDD0

3D3V_S0
1

C523

8
9
11

2SC3900P50V2KX-2GP SATA_RXP0_C 19

SATA_RXP0 1

6
SC3900P50V2KX-2GP

4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
IDE_PDA2
34
36
38
40
42
44
DY
46
C529
C530
48
50
SCD1U16V2ZY-2GP SCD1U16V2ZY-2GP NP2
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

4
5

3
2SATA_RXN0

C526 1

19 SATA_RXN0_C

SATA_TXP0 19

2
19 SATA_TXN0

NP1
2

29 CD_AUDR

R226
4K7R2J-2-GP
2

23
1

IDE_PDIOW#

19
IDE_PDIORDY

19

INT_IRQ14 19
IDE_PDA1 19
IDE_PDA0 19

IDE_PDA1
IDE_PDA0

IDE_PDCS1# 19
CDROM_LED# 16
5V_S0

primary channel:low

FOX-CONN50-4R-GP-U
20.80353.050

USB PORT

100 mil

5V_S0

5V_S3

12
13

RSTDRV#_5

11
18

C417

C415

PCI_PLTRST#

TC19
SE100U16VM-L1-GP

FUSE-1D1A6V-8GP

U59D

14

100 mil

C318
SCD1U16V2ZY-2GP

TSAHCT08PWR-1GP

SCD1U16V2ZY-2GP SC1000P50V3JN-GP

High limit under 2.5 mm

5V_USB2_S3
1
5V_USB1_S3

2
0R0402-PAD

R139

DY
12

5V_S3
1
R297

2
150R2J-L1-GP-U

10
9
8
7
6
5
4
3
2

2
3
4
5
7

L-63UH-GP
TR3

20

USB_PN3
USB_PP3
USB_PN2
USB_PP2

8
6
1

USB1

20
20
20
20

SKT-USB-131-GP-U
USB_1-

USB_PN0
1

20

FUSE-2A8V-3GP

5V_USB2_S3

F3

2
1

5V_S3

100 mil

5V_USB1_S3
F2

USB_1+

USB_PP0

USB2
1
R140

2
0R0402-PAD
22.10218.N21

1
Q19

11
C

31

NUMLK_LED

R1
E

R2
PDTC124EU-1-GP

NUMLK_LED#
ACES-CON10-5-GP
20.F0735.010
<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

HD/CDROM/USB
Size
A3

Document Number

Date: Thursday, March 08, 2007

Rev

Pamirs
Sheet

-1
23

of

41

PCI_AD25

18
18

PCI_REQ#0
PCI_GNT#0
18 PCI_FRAME#
18
PCI_IRDY#
18
PCI_TRDY#
18 PCI_DEVSEL#
18
PCI_STOP#
18
PCI_PERR#
18,31 PCI_SERR#

1 2

R495
10KR2J-3-GP

C565
SCD1U16V2ZY-2GP

GBRST#
18,27 PCIRST1#
PCLK_PCM
2

ICH_PME#

20,31,34 PM_CLKRUN#

R508
1
R478

1
DY 0R2J-2-GP

0R0402-PAD

GBRST#
PCIRST#

121

PCICLK

70
117

PME#

R477
10KR2J-3-GP

HWSPND#

69

MSEN

58

XDEN

55

UDIO5

57

UDIO3
UDIO4

65
59

UDIO2

56

UDIO1

60

UDIO0/SRIRQ#

72

3D3V_S0

RN76
1
R513

1
2
3
4

2
3D3V_S0
100KR2J-1-GP

8
7
6
5

DY
EC90
SCD1U16V2ZY-2GP

SRN10KJ-6-GP

INT_SERIRQ

20,31,34

INTA#

115

PCI_PIRQA# 18

INTB#

116

PCI_PIRQC#

TEST

66

18

1394 : INTA#
4in1 : INTB#

CLKRUN#
R509
100KR2J-1-GP

R504
4K7R2J-2-GP

R479
1KR2J-1-GP
DY
R5C833-GP

DY

C
3D3V_S0

71
119

99
102
103
107
111

REQ#
GNT#
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
PERR#
SERR#

AGND1
AGND2
AGND3
AGND4
AGND5

124
123
23
24
25
26
29
30
31

4
13
22
28
54
62
63
68
118
122

18

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
PAR
C/BE3#
C/BE2#
C/BE1#
C/BE0#
IDSEL

86

GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10

SHIELD
GND

125
126
127
1
2
3
5
6
9
11
12
14
15
17
18
19
36
37
38
39
40
42
43
44
46
47
48
49
50
51
52
53
33
7
21
35
45
8

C588
SC10U10V5ZY-1GP

VCC_ROUT1
VCC_ROUT2
VCC_ROUT3
VCC_ROUT4
VCC_ROUT5

D
C556

PCI_C/BE#3
PCI_C/BE#3
PCI_C/BE#2
PCI_C/BE#2
PCI_C/BE#1
PCI_C/BE#1
PCI_C/BE#0
PCI_C/BE#0
R5C834_IDSEL
1
2
R486
10R2J-2-GP

67

3D3V_S0

18
18
18
18

VCC_RIN

16
34
64
114
120

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

18 PCI_AD[0..31]

PCI_PAR

61

VCC_3V

VCC_MD

18

VCC_PCI1
VCC_PCI2
VCC_PCI3
VCC_PCI4
VCC_PCI5
VCC_PCI6

PCI / OTHER

SCD01U16V2KX-3GP

SCD47U16V3ZY-3GP

C589

SCD1U16V2ZY-2GP

C586

SCD47U16V3ZY-3GP

1
2

C549

SCD01U16V2KX-3GP
2
1

1
2

C559

10
20
27
32
41
128

SCD01U16V2KX-3GP

1
2

C585

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

C584

VCC_ROUT
C547

C552
SC10U10V5ZY-1GP
DY

C557

3D3V_S0

SCD01U16V2KX-3GP
2
1

C570

SCD01U16V2KX-3GP
2
1

SCD01U16V2KX-3GP
2
1

C576

3D3V_S0

IC1B

C572
SC10U10V5ZY-1GP

3D3V_S0

C548
SC10P50V2JN-4GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

R5C832/PCI
Size
A3

Document Number

Date: Wednesday, February 14, 2007

Rev

Pamirs
Sheet

-1
24

of

41

IC1A
3D3V_PHY
3D3V_S0

XO

105

TPB0P

TPAN0

108

TPA0N

TPAP0

109

TPA0P

TPBP0

1
R474

RICHO_FILO
2
SCD01U16V2KX-3GP

96

2RICHO_REXT
10KR2F-2-GP

101

RICHO_VREF
2
SCD01U16V2KX-3GP

100

IEEE1394/SD

SC15P50V2JN-2-GP

FIL0

REXT

VG#5
VG#6
VG#7
VG#8

TPA
TPA*
TPB
TPB*

1
TPB0+

R480

CLOSE TO CHIP

R178

2
0R0402-PAD

R182

2
0R0402-PAD

SKT-1394-4P-13GP-U

3L18
TPB0-

R481

TPBIAS0
TPA0P
TPA0N
TPB0P
TPB0N

SCD33U10V3KX-3GP

DY
1
DLW21HN900SQ2LGP
1

1
R483

1
R482

1
2 R473
5K11R2F-L1-GP
1394_TPB1_R
1
2 C543
SC270P50V2JN-2GP

2
0R0402-PAD

R186
1
C546

C544

C542
SCD01U16V2KX-3GP

4
3
2
1

95

5
6
7
8

1394_XO

3L15

DY
2
1
DLW21HN900SQ2LGP

TPA0-

11

TPB0N

104

2
0R0402-PAD

R176

TPA0+

TPBN0

1
C553

SCD1U16V2ZY-2GP

XI

94
X6
X-24D576MHZ-57GP
C554
1

C541
SC10U10V5ZY-1GP

TPBIAS0

113

TPBIAS0

C550
SCD01U16V2KX-3GP

10/27

Reserve R547,R548,R550,R551 for co-layout

C551

SC15P50V2JN-2-GP
1394_XI
2

2
MLB-160808-18-GP

C555
1

1
L39

GUARD GND
4

3D3V_PHY

98
106
110
112

AVCC_PHY1
AVCC_PHY2
AVCC_PHY3
AVCC_PHY4

VREF

GUARD GND

MDIO17

87

XD_DATA7

MDIO16

92

XD_DATA6

MDIO15

89

XD_DATA5

DY

MDIO14

91

XD_DATA4

C508

MDIO13

90

SD/XD/MS_DATA3

MDIO12

93

SD/XD/MS_DATA2

MDIO11

81

SD/XD/MS_DATA1

MDIO10

82

SD/XD/MS_DATA0

MDIO05

75

XD_WP#

MDIO08

88

SD/XD/MS_CMD

MDIO19

83

XD_ALE

MDIO18

85

XD_CLE

MDIO02

78

XD_CE#

MDIO03

77

SD_WP#(XDR/B#)

MDIO00

80

SD_CD#

MDIO01

79

MDIO09

84

3D3V_CARD

76

MDIO06

74

XD/MS_CD#

MC_PWR_CTRL_0
MS_LED#

MDIO07

SD_VCC

28
38

MS_VCC
MS_VCC

19

VCC

SD/XD/MS_CMD_1
SD/XD/MS_CLK_1

36
27

SD_CMD
SD_CLK

SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1

23
22
41
39

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

SD_CD#
SD_WP#(XDR/B#)

42
21

SD_CD_DETECT
SD_WP_PROTECT

SD/XD/MS_CLK_1

RN75
XD_DATA4
XD_DATA5
XD_DATA6
XD_DATA7

33R2J-2-GP
R487
100KR2J-1-GP

73

8
7
6
5

1
2
3
4

XD_DATA4_1
XD_DATA5_1
XD_DATA6_1
XD_DATA7_1

SRN47J-5-GP

R5C833-GP

SD_WP#(XDR/B#)

45
44

SD_WP1
SD_WP2

SD/XD/MS_CMD_1
SD/XD/MS_DATA0_1
MS_INS#
SD/XD/MS_CLK_1

26
30
34
37

MS_BS
MS_SDIO
MS_INS
MS_SCLK

SD/XD/MS_DATA3_1
SD/XD/MS_DATA2_1

35
32
29

MS_RESERVED#MS_7
MS_RESERVED#MS_5
SD_I/O

RN73
SD/XD/MS_DATA0 8
SD/XD/MS_DATA1 7
SD/XD/MS_DATA2 6
SD/XD/MS_DATA3 5

1SD/XD/MS_DATA0_1
2SD/XD/MS_DATA1_1
3SD/XD/MS_DATA2_1
4SD/XD/MS_DATA3_1

TP79
1

SRN47J-5-GP

IN
ON#

XD_ALE
SD/XD/MS_CMD

For SD Card Power

SCD1U16V2ZY-2GP
R471
10KR2J-3-GP

2
1

3
4

XD_ALE_1
SD/XD/MS_CMD_1

SRN33J-5-GP-U

3D3V_S0

NP1
NP2
NP3
NP4
NP5
NP6

CD
ALE

2
7

XD_SW#
XD_ALE_1

R/B#
RE#
CE#
CLE
WE#
WP#

3
4
5
6
8
9

SD_WP#(XDR/B#)
SD/XD/MS_CLK_1
XD_CE#_1
XD_CLE_1
SD/XD/MS_CMD_1
XD_WP#

D0
D1
D2
D3
D4
D5
D6
D7

11
12
13
14
15
16
17
18

SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1
SD/XD/MS_DATA2_1
SD/XD/MS_DATA3_1
XD_DATA4_1
XD_DATA5_1
XD_DATA6_1
XD_DATA7_1

SD_CO2
SD_CO1

51
50

SD_CD#

SD_3P
SD_6P
SD_7P
SD_8P

49
48
47
46

MS_VSS

25

SD_VSS
SD_VSS

33
24

GND
GND
GND
GND
GND
GND
GND
GND

1
20
40
10
43
52
53
54

SD/XD/MS_DATA0_1
SD/XD/MS_DATA1_1

TAI-CON43-GP-U4

XD_CE#
XD_CLE

R489
100KR2J-1-GP
U57
2N7002DW-1-GP

2
1

3
4

20.I0030.001

XD_CE#_1
XD_CLE_1

SRN33J-5-GP-U

RB731U-2-GP

XD_SW#

RN78
MC_PWR_CTRL_1

R454
AAT4610AIGV-GP
15KR2J-1-GP

NP1
NP2
NP3
NP4
NP5
NP6

TPAD28

RN77

C535
1
2
1

OUT
GND
SET

1
2
3

R469 C536
10KR2J-3-GP
SC1U10V3ZY-6GP

3D3V_S0

U56

20mil

3D3V_CARD

R488
1

MS_LED# 16

C505
SC2D2U10V3ZY-1GP

CARD1

SD/XD/MS_CLK

MDIO04

RSV

SCD1U16V2ZY-2GP

31
SD/XD/MS_DATA1_1

97

C507
2

C540
SCD1U16V2ZY-2GP

DY

SCD1U16V2ZY-2GP
2

MS_INS#

<Core Design>

11/1

XD/MS_CD#

XD_SW#_11

SD_CD#

Wistron Corporation
0707

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

R5C832/IEEE1394/SD

D34
Size
Custom

MC_PWR_CTRL_0

Date:
A

Document Number

Rev

Pamirs

Wednesday, February 14, 2007

Sheet
E

-1
25

of

41

Mini Card Connector


Mini Card Connector 1(WWAN)

Mini Card Connector 2(802.11a/b/g)


3D3V_S0

3D3V_S0

DY

3D3V_S5

1.5V

3.3V

28
48

+1.5V
+1.5V

52

+3.3V

24

+3.3VAUX

3
5
8
10
12
14
16
17
19
20
37
39
41
43
45
47
49
51

RESERVED#3
RESERVED#5
RESERVED#8
RESERVED#10
RESERVED#12
RESERVED#14
RESERVED#16
RESERVED#17
RESERVED#19
RESERVED#20
RESERVED#37
RESERVED#39
RESERVED#41
RESERVED#43
RESERVED#45
RESERVED#47
RESERVED#49
RESERVED#51

REFCLK+
REFCLK-

13
11

PERN0
PERP0

23
25

PETN0
PETP0

31
33

USB_DUSB_D+

36
38

SMB_CLK
SMB_DATA

30
32

WAKE#
CLKREQ#
PERST#

1
7
22

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

4
9
15
18
21
26
27
29
34
35
40
50
53
54

DUMMY-R2
WL_PRIORITY
BT_PRIORITY

1
R330 1
R333
DUMMY-R2

2WL_PRIORITY1
2BT_PRIORITY1

2/9
E51_RXD
E51_TXD
31 M_WXMIT_OFF#

M_WXMIT_OFF#

3D3V_MINI1_S0

SB

5V_AUX_S5
TPAD30

TP29

LED_WWAN#
WLANONLED
LED_WPAN#

42
44
46

CLK_PCIE_MINI2 3
CLK_PCIE_MINI2# 3

PCIE_TXN4 20
PCIE_TXP4 20
DUMMY-R2
DUMMY-R2
1
R528 1
R529

USB_PN6 20
USB_PP6 20
32 WL_PRIORITY
32 BT_PRIORITY
SMB_CLK 20,28
SMB_DATA 20,28
1

LED_WWAN#
LED_WLAN#
LED_WPAN#

3D3V_S5

PCIE_RXN4 20
PCIE_RXP4 20

R331
1

2
DUMMY-R2
TP54 TPAD30

2WL_PRIORITY1_1
2BT_PRIORITY1_1

PCIE_WAKE# 20,27,28,31

PLT_RST1# 7,18,20,28,31,33,34
31

31
E51_RXD
31
E51_TXD
WIFI_RF_EN
3D3V_MINI2_S0

10/23

5V_AUX_S5
1

33

WLANONLED

TPAD30 TP78
1
TPAD30 TP77

NP1
NP2

TPAD30

TP75

MLB201209-0600P-GP

1.5V

3.3V

28
48

+1.5V
+1.5V

REFCLK+
REFCLK-

52

+3.3V

24

+3.3VAUX

3
5
8
10
12
14
16
17
19
20
37
39
41
43
45
47
49
51

RESERVED#3
RESERVED#5
RESERVED#8
RESERVED#10
RESERVED#12
RESERVED#14
RESERVED#16
RESERVED#17
RESERVED#19
RESERVED#20
RESERVED#37
RESERVED#39
RESERVED#41
RESERVED#43
RESERVED#45
RESERVED#47
RESERVED#49
RESERVED#51

42
44
46

LED_WWAN#
LED_WLAN#
LED_WPAN#

62.10043.341

NP1
NP2

62.10043.341

13
11

PERN0
PERP0

23
25

PETN0
PETP0

31
33

USB_DUSB_D+

36
38

SMB_CLK
SMB_DATA

30
32

WAKE#
CLKREQ#
PERST#

1
7
22

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

4
9
15
18
21
26
27
29
34
35
40
50
53
54

CLK_PCIE_MINI1 3
CLK_PCIE_MINI1# 3
PCIE_RXN3 20
PCIE_RXP3 20
PCIE_TXN3 20
PCIE_TXP3 20

SMB_CLK
SMB_DATA

1
PLT_RST1#

1
R371
TP40 TPAD30

PCIE_WAKE#
2
DUMMY-R2

NP1
NP2

MLB201209-0600P-GP

12/11

1D5V_S0
MINI2

2
MINI1

31
31

3D3V_MINI2_S0

L22

1D5V_S0
3D3V_MINI1_S0

L9

DY

NP1
NP2

SKT-MINI52P-7-GP

SKT-MINI52P-7-GP

12/11

3D3V_MINI2_S0

5V_AUX_S5

1D5V_S0

3D3V_S5

C494

SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

C495
SCD1U16V2ZY-2GP

1
C497

DY

DY

DY

2
3D3V_S5

DY

DY

SC10U10V5ZY-1GP
1

1
2

C332

C326

C89
2

SC10U10V5ZY-1GP

C325
2

C810
SCD01U16V2KX-3GP

C592

DY
2

SCD1U16V2ZY-2GP

1D5V_S0

12/11
1

5V_AUX_S5

SCD1U16V2ZY-2GP
C496

C499

SCD1U16V2ZY-2GP
3D3V_MINI1_S0

12/11

C591

DY

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

C333
SCD1U16V2ZY-2GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

MINI CARD CONN .


Size
A3

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007


A

-1
Sheet
E

26

of

41

R158
DY
1
2
10MR2J-L-GP
X3

Y41.-1

R166 1K91R2F-1-GP
TPAD30 TP19
TPAD30 TP20

24
25

HSDACP
HSDACN

LOM_DISABLE#
1

18
21
27
31

88E8039-A0-GP
R647
DUMMY-R2
PM_LAN_ENABLE

4,37,38

2N7002DW-1-GP

PM_SLP_S3#

PM_SLP_S3#

28
28

MDI0MDI1-

MDI0MDI1-

MDI0+
MDI1+

MDI0+
MDI1+

28
28

PM_LAN_ENABLE#

33
39
44
48
58
2
7
13
PCIE_RXN
PCIE_RXP

53
54

LED_LINK#
NC#62
LED_SPEED#
LED_ACT#

63
62
60
59

XTALI
XTALO

15
14

LAN_RXN1 C504 1
LAN_RXP1 C503 1

3D3V_LAN_S5
3D3V_LAN_S5

2SCD1U10V2KX-4GP
2SCD1U10V2KX-4GP

PCIE_TXN2
PCIE_TXP2

PCIE_RXN2
PCIE_RXP2

20
20

20
20

DY

R408
4K7R2J-2-GP

0R2J-2-GP

U24
1
2
3
4

LAN100M_LED# 28
ACT_LED#

R409
4K7R2J-2-GP

50
49

1
1

64
23
VDD25
AVDD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
PCIE_TXN
PCIE_TXP

PCIE_WAKE# 20,26,28,31
PCIRST1#
18,24
CLK_PCIE_LAN 3
CLK_PCIE_LAN# 3

A0
A1
A2
GND

VCC
WP
SCL
SDA

8
7
6
5

EEWP
VPD_CLK
VPD_DATA

R174
EEWP
R185
0R2J-2-GP

AT24C08AN-1-GP

28

LANX1
LANX2

Pull up for AT24C08 another pull low

TP21

3D3V_LAN_S5
R521

1
TPAD30

VPD_CLK
VPD_DATA

6
5
55
56

1LANHP
1LANHN

RXN
TXN
NC#27
NC#31

1LANSC
LANPWR
1LANSV
LANRSET
CTRL12
CTRL25

WAKE#
PERST#
REFCLKP
REFCLKN

TP18

TPAD30 TP17
2

LOM_DISABLE#
VAUX_AVLBL
SWITCH_VCC
VMAIN_AVLBL
SWITCH_VAUX
RSET
CTRL12
CTRL25

TPAD30

10/26

10
12
11
47
9
16
3
4

C192
SC27P50V2JN-2-GP

GND

Marvell recommend:
3D3V_LAN_S5 LOM_DISABLE#
2K Ohm

PU_VDDO_TTL#42
PU_VDDO_TTL#43

NC#36
NC#37

2 LANX1

65

NC#34
NC#35

36
37

42
43

34
35
R376

TSTPT
TESTMODE

29
46

2
4K7R2J-2-GP

VPD_DATA
VPD_CLK

LANPWR

RXP
TXP
NC#26
NC#30

3D3V_LAN_S5

1
2
R407 0R2J-2-GP
1
2
R406 0R2J-2-GP

17
20
26
30

3D3V_S0

41
38

DY

3D3V_LAN_S5

VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL
VDDO_TTL

AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL
AVDDL

U23

1
8
40
45
61

57
52
51
32
28
22
19

XTAL-25MHZ-74GP
C188
SC27P50V2JN-2-GP

1D2V_LAN_S5

LANX2 1

3D3V_LAN_S5

2
2

2D5V_LAN_S5

2
4K7R2J-2-GP

SB

12/18
U70

3D3V_S5

MDI0+

SB

3D3V_S5

MDI0-

DY

MDI1+
14

R524
10KR2J-3-GP

AC_IN#

AC_IN#

3D3V_LAN_S5

2
2

2D5V_LAN_S5
1
1

1
C462
1

PM_LAN_ENABLE#

10

DY C452

TSLCX08MTCX-GP

1
C453

31,39

MDI1-

U61C

MDIS0_LAN
1
2 C456
49D9R2F-GP
SCD01U16V2KX-3GP
49D9R2F-GP
2 MDIS1_LAN
1
2 C471
49D9R2F-GP
SCD01U16V2KX-3GP
2
49D9R2F-GP

1
R167
1
R170
1
R172
1
R175

2 C486
SC1000P50V2JN-GP
2 C488
SC1000P50V2JN-GP
2
SC1U10V2KX-GP
2
SC1U10V2KX-GP
2
SC1U10V2KX-GP

1
C489
1

C201
SC4D7U6D3V5KX-3GP
SCD1U10V2KX-4GP

3
2

CTRL12

Q10
2SB772PT-1-GP
1D2V_LAN_S5

1
2

Q27
2SB772PT-1-GP

1
2

CTRL25

C203

R165
4K7R2J-2-GP
3

R358
4K7R2J-2-GP

C485

8053:2.5V.
8055:1.8V.

SCD1U10V2KX-4GP

C460

C209
<Core Design>

SC10U10V5KX-2GP

C428

2D5V_LAN_S5

8053:CTRL25.
8055:CTRL18.

C205

C449

1
G

2
D
G

PM_LAN_ENABLE
1

DY

2
SC1U10V2KX-GP
2
SC1U10V2KX-GP
2 C490
SC1000P50V2JN-GP
2 C451
SC1000P50V2JN-GP
2
SC1U10V2KX-GP
2 C450
SC1000P50V2JN-GP
2
SC1U10V2KX-GP
2 C470
SC1000P50V2JN-GP

3D3V_LAN_S5

0R5J-6-GP
C204

Q32
2N7002EPT-GP

1
C454
1
C487
DY 1

PLACE PNP TO CHIP ACAP


CTRL12 PIN TRACE IS 25MIL

3D3V_LAN_S5

R643
10KR2J-3-GP

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
2
1

C447

3D3V_LAN_S5

R644
1

C436

S
D

SCD1U10V2KX-4GP
2
1

3D3V_S5

1
1
C479
DY C4831

2
SCD1U10V2KX-4GP
2
SCD1U10V2KX-4GP
2 C467
SC1000P50V2JN-GP
2 C477
SC1000P50V2JN-GP
2
SC1U10V2KX-GP
2
SC1U10V2KX-GP

1
C491
1

PLACE PNP TO CHIP ACAP


CTRL25 PIN TRACE IS 25MIL

SC4D7U6D3V5KX-3GP

Q33
AO3403-GP

SCD1U10V2KX-4GP
2
1

3D3V_LAN_S5_1

R645
1

DY 0R3-0-U-GP

1D2V_LAN_S5

1
C473
1
DY
C481
1

SCD1U10V2KX-4GP SC10U10V5KX-2GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

12/4
Title

LAN MARVELL
Size
A3

Document Number

Rev

Pamirs

Date: Wednesday, February 14, 2007


A

-1
Sheet
E

27

of

41

1 R532

10/100M Lan Transformer

27

RJ45-1

17

RJ45-2

RJ45-1

RJ45-1_L

MDI1+

MDI1-

16

RJ45-3

2
3

15
14

RJ45-6

10

RJ45-1

R523
0R2J-2-GP
1

R522
0R2J-2-GP

17

PIN09 : GREEN
PIN11 : ORANGE
PIN13 : YELLOW

1.route on bottom as differential pairs.


2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.

XF1

2D5V_LAN_S5

2 0R0402-PAD

XRF_RDC

27
27

MDI0+

RJ45-2

RJ45-2_L

XFR_RXC

17

RJ45-7

1 R534

2 0R0402-PAD

1 R535

2 0R0402-PAD

RJ45-3

RJ45-3

RJ1
27 LAN100M_LED#
3D3V_LAN_S5

R338

9
10
11
1

RJ45-2_L
RJ45-3_L
RJ45-4

2
3
4
5
6
7
8
12
13

RJ45-3_L

RJ45-4

8
6
4
5

MDI0-

XFORM-257-GP

C345

DY

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C93

17

RJ45-4

17

RJ45-7

RJ45-6_L

RN14
SRN75J-1-GP

27
17

R345 2
1
470R2J-2-GP

3D3V_LAN_S5
ACT_LED#

14

RJ45-6_L

RJ45-6
1 R536

2 0R0402-PAD

RJ45-112-GP-U

Green : Link up
Blinking : TX/RX activity

5
6
7
8

DY

RJ45-2
XFR_CMT

9
11
12
13

4
3
2
1

27
XRF_TDC

15

LAN100M_LED#
1
2
470R2J-2-GP
RJ45-1_L

LAN_TERMINAL 1
C88

2
SC1500P2KV8KX-3GP

NEW1

NEWCARD Connector

28

Place them Near to Connector


20 PCIE_TXP1
20 PCIE_TXN1

Place them Near to Chip


3D3V_NEW_S0

12/12

SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP

3 CLK_PCIE_NEW
3 CLK_PCIE_NEW#
3,20
CPPE#
3 NEWCARD_CLKREQ#
3D3V_NEW_S0

NP1
C235
SCD1U16V2ZY-2GP

PCIE_RXP1
PCIE_RXN1

20 PCIE_RXP1
20 PCIE_RXN1

C229
2

C233

1
C236

C243
SC10U10V5ZY-1GP

C574
DY
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SKT1

3D3V_NEW_LAN_S5
1

1
2

DY C579

1D5V_NEW_S0

1D5V_S0

3D3V_S5

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

CARDBUS2P-11-GP

NEWCARD_CLKREQ#
PERST#

3D3V_NEW_LAN_S5
20,26,27,31 PCIE_WAKE#

For Newcard socket

1D5V_NEW_S0

20,26 SMB_DATA
20,26 SMB_CLK
3D3V_NEW_S0

SMB_DATA
SMB_CLK
1CONN_TP2
1CONN_TP3
CPUSB#

TPAD30 TP24
TPAD30 TP22

1D5V_NEW_S0

11
13

NC#16

16

3D3V_S0
1
2
R491
DUMMY-R2
3D3V_S5
3D3V_NEW_LAN_S5

NEWCARD_RST#

SCD01U16V2KX-3GP

20

62.10024.681

SC4D7U10V5ZY-3GP

C573

18
17
15

1.5VOUT
1.5VOUT

21

RCLKEN
AUXIN
AUXOUT

C219

C288

DY
SCD1U16V2ZY-2GP

12
14

2
4

R5538D001-TR-FGP

GND

THERMAL_PAD

PM_SLP_S4#

STBY#
SYSRST#
PERST#
CPUSB#
CPPE#
OC#
SHDN#

3.3VIN
3.3VIN

17,20,31,36,37,38

1
6
8
9
10
19
20

1
2
PERST#
R500
33R2J-2-GP
CPUSB#
2
CPPE#
SC22P50V2JN-4GP
TPAD30 TP100
1NEWCARD_OC#

1
C561

1
27
TYCO-CON26-1-GP

PLT_RST1#

1.5VIN
1.5VIN

7,18,20,26,31,33,34

PM_SLP_S3#

3.3VOUT
3.3VOUT

U58
20,22,27,31,34,37,38

3
5

20 USB_PP1
20 USB_PN1

3D3V_S0

1D5V_S0

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

LAN connector/NEW CARD/SIM


Size
A3

Document Number

Rev

Pamirs

Date: Friday, March 02, 2007


A

CLOSE TO
TRANSFORMER

-1
Sheet
E

28

of

41

U41

VSS_IO
VSS_IO
DVSS

12
25
32
40

AVSS
AVSS
AVSS
AVSS_HP

DVDD_M

1
2
2

DK_MICR_C

DK_MICL_C

R462
1

MICBIAS_L

2
2
R258

MICBIAS_L
MICBIAS_R

29
30

MICBIAS_R

SENSE

13

AUDIO_SENSE

VC_REFA
VREF_HI
VREF_LO

28
26
27

AUDIO_REFA
AUDIO_VREF_HI
AUDIO_VREF_LO

MICL_AMP
1
3K9R2J-1-GP
MICR_AMP
1
3K9R2J-1-GP

R460
1

2
0R0402-PAD

C273

C279

C270

C271

CDAUD_R
2 C265
SC1U10V3ZY-6GP

CDAUD_GND
2 C264
SC1U10V3ZY-6GP

C274
SCD1U16V2ZY-2GP

5V_AUX_S5

ACES-CON15-3-GP

AUD_AGND

17
R505
10KR2J-3-GP

17
15
14
13
12
11
10
9
8
7
6
5
4
3
2

CIR

CIR

30 MICR_AMP
30 MIC_INT_R
30 MICL_AMP
30 MIC_INT_L
17 DK_SPKR_L

R499
330KR2F-L-GP

17 DK_SPKR_R

HP_OUT_L
DK_SPKR_L
HP_OUT_R
DK_SPKR_R
JACK_DETECT#
3D3V_S0

U63

R236
47KR2J-2-GP

3D3V_AUD_S0
1
2
3

R241
R249
47KR2J-2-GP 47KR2J-2-GP
2

CDAUD_L
2 C263
SC1U10V3ZY-6GP

CDAGND

2
0R0402-PAD
1

1
R245

23 CD_AGND

CDAUDR

1
2
EC46
SCD1U16V2ZY-2GP
1
2
EC89
SC100P50V2JN-3GP
JACK_DETECT#
1 DY 2
12/18 EC22 SCD1U16V2ZY-2GP
3D3V_S0
1
2
EC45
SCD1U16V2ZY-2GP
CIR

SB

C272

5V_AUX_S5

3D3V_AUD_S0
2
5K1R2F-2-GP

23 CD_AUDR

1
R247

CDAUDL

DK_MIC_IN#
2
10KR2F-2-GP

R459
1

02/07

JACK_DETECT# 17

MIC_IN#
2
20KR2F-L-GP

2
0R0402-PAD

2
5K1R2F-2-GP

R461
1

MICBIAS_L 30
MICBIAS_R 30

R257

MICBIAS_R
1
R238

AUD_AGND
C266 1

C267
SC1U10V3ZY-6GP

AUD_AGND

23 CD_AUDL

1
EC87

DK_SPKR_R

SC1U10V3ZY-6GP

AUD_AGND

HP_OUT_R
EC85

HP_OUT_L
HP_OUT_R
DK_MIC_L
DK_MIC_R

CX20549-12Z-GP-U

2N7002DW-1-GP
AUD_AGND

1
EC86

42
46
6

1
EC88

DK_SPKR_L

12/4

DY

MIC_IN

33
34
14
15

MICL
MICR
CDAUD_L
CDAUD_GND
CDAUD_R

SC1U10V3ZY-6GP

DK_MIC_IN#

1
3

PORT-A_BIAS_L
PORT-A_BIAS_R
PORT-B_BIAS_L
PORT-B_BIAS_R

DVDD

45

C531
SCD1U16V2ZY-2GP

VDD_IO

HP_OUT_L

17

C256
SC470P50V2KX-3GP

AVDD_HP

PORT-A_L
PORT-A_R
PORT-B_L
PORT-B_R

AUD_LOL 30
AUD_LOR 30

37

3D3V_AUD_S0

MICR_C

IN+
VSS
IN-

VDD

OUT

1
16
AUD1

R230
1

SB_SPKR

2
7K5R2J-GP

2
4K7R2J-2-GP

AUD_AGND
1

AUD_AGND

DYEC108

DK_MIC_R_C
DK_MIC_L_C

MICR_C 30

DK_MICR_C
DK_MICL_C

4
3

DK_MIC_IN

MICL_C 30
R476
1KR2J-1-GP

R514
47KR2J-2-GP

DK_MIC_R_CN

DK_MIC_L_CN
SC1U10V3ZY-6GP

DK_MIC_R_CN

AUD_AGND

<Core Design>

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

DK_MIC_L_CN 17

AUD_AGND

AUD_AGND

AUDIO CODEC CX20549-12Z


Size
A3

Put near Codec

C537

Document Number

Date: Wednesday, February 14, 2007


A

Wistron Corporation

C587
SCD1U16V2ZY-2GP

17
AUD_AGND

DK_MIC_L_C 1

DK_MIC_R_CN
SC1U10V3ZY-6GP

2
GAP-CLOSE-PWR

R475
1KR2J-1-GP

2
2

R512
10KR2J-3-GP

SRN10KJ-5-GP

SC1U10V3KX-4GP
1
2 MICL_AMP
0R2J-2-GP
R496
C538
DK_MIC_R_C1

1
2

C276 SC1U10V3KX-4GP
MICL_C

2
SCD1U16V2ZY-2GP

G70

CUT MOAT

RN74

2 MICR_AMP
0R2J-2-GP

1
R501
MICR_C

C275
MICR
MICL

AUD_PC_BEEP

SB

02/07

C254
AUD_BEEP
1
R229
1

20.K0013.015

AUD_AGND

G1214TAUF-GP-U

20

SCD1U16V2ZY-2GP

MIC_IN

AUD_AGND

10/26

2
SCD01U16V2KX-3GP
2
SCD01U16V2KX-3GP
2
SC100P50V2JN-3GP
2
SC100P50V2JN-3GP
2
SC100P50V2JN-3GP
2
SC100P50V2JN-3GP

1
EC43

AVDD
AVDD

MIC_INT_L
SPDIF

AUD_PC_BEEP

20
31

MIC_IN#

C566

EC42

SB

DK_MIC_IN

AUD_AGND

MIC_INT_R

SCD1U16V2ZY-2GP

3D3V_AUD_S0

38
39
23
24

AMOM_DIPN
2
0R0402-PAD

DY

RESERVED#1
RESERVED#2
RESERVED#16

1
R250

2
47KR2J-2-GP

EAPD

1
2
16

AMOM_DIPP
2
0R0402-PAD

SC10U10V5ZY-1GP

1
R243

48
11
35
36
21
22
17
18
19

1
R248

47

S/PDIF
PCBEEP
LINE_OUT_L
LINE_OUT_R
MIC_L
MIC_R
CD_L
CD_GRD
CD_R

SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
RESET#

9
5
4
7
10

RC_OSC

AMOM_DIBP_R
AMOM_DIBP_N

HDA_SDOUT_CODEC
HDA_SDATAIN0_CODEC

2
22R2J-2-GP

DIBP
DIBN

44
43

SCD1U16V2ZY-2GP

41

2
240KR2J-1-GP

SC10U10V5ZY-1GP

1
R468

EAPD

U67

OUT

01/02

R227 1

3D3V_S5

AUD_AGND

19 HDA_SYNC_CODEC
19 HDA_BITCLK_CODEC

30,31,32

SET

G913CF-GP

20.E0077.204

DY3D3V_AUD_S0

19 HDA_SDOUT_CODEC
19 HDA_SDIN0
19 HDA_RST#_CODEC

C558
SC1U10V3ZY-6GP

SHDN#
GND
IN

C545
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C533

SCD1U16V2ZY-2GP

C534
SC1U10V3ZY-6GP
2

C539

1
2
3

SYN-CONN8E-GPU

DY

11/08

AMOM_DIPP
AMOM_DIPN

1 R472
0R3-0-U-GP

3D3V_S0

3D3V_LDO_S0

U60

8
NP1
7
6
NP2
5

2
3

3D3V_AUD_S0

1 R484
0R3-0-U-GP

1
3D3V_LDO_S0

5V_S0

MDC1

SC10U10V5ZY-1GP

11/08

Rev

-1

Pamirs
Sheet
E

29

of

41

5V_S0

5VA_OP_S0

R494
1 C563
SC1U10V3ZY-6GP

EC_BEEP

G37

47KR2J-2-GP
C280
4

29

AUD_LOL

0303

2
GAP-CLOSE-PWR

R264
L_LINE_IN_1

L_LINE_IN

1KR2J-1-GP

SCD47U16V3ZY-3GP

31

R259
DUMMY-R2

5V_S0

R503
100KR2J-1-GP

AUD_AGND
2

5VA_OP_S0
U45

PVDD
PVDD

1
2

R502 0R2J-2-GP
1
2
5VA_OP_S0
1 R490
2 10KR2J-3-GP 2
AUD_AGND
DY
1
2
3
5VA_OP_S0
R498 DY
0R2J-2-GP
SPKR_L+
1
2
4
AUD_AGND
SPKR_LR497 0R2J-2-GP
8

SC1U10V3ZY-6GP
C283
SC4D7U10V5ZY-3GP

1
C286

RIN+
R_LINE_IN

2
SC1U10V3ZY-6GP

7
17

AUD_AGND

12

19
10

SHUTDOWN#
BYPASS

9
5

LIN+
LIN-

GAIN0
GAIN1

ROUT+
ROUT-

18
14

GND
GND
GND
GND
GND

1
11
13
20
21

BYPASS

1
C289
LIN+
1
L_LINE_IN C287

KBC_MUTE# 31

2
SC1U10V3ZY-6GP
2
SC1U10V3ZY-6GP

D
3

VDD

15
6

SPKR_R+
SPKR_RAUD_AGND

1
Q29
2N7002PT-U

LOUT+
LOUTRIN+
RINNC#12
G1431F2U-GP

DY

1
2

C282

16

0324

EAPD

29,31,32

S
3

AUD_AGND

R492
2

EC_BEEP

1 C562
SC1U10V3ZY-6GP

47KR2J-2-GP
C281
29

AUD_LOR

0303

R263
R_LINE_IN_1

R_LINE_IN

1KR2J-1-GP

SCD47U16V3ZY-3GP

31

R261
DUMMY-R2

AUD_AGND
EC73
1

MIC_INT_R
3D3V_AUD_S0

MIC_INT_L

MICBIAS_R

DY

AUD_AGND

IN+
VSS
IN-

VDD

C583
SCD1U16V2ZY-2GP

OUT

AUD_AGND
MICR_C 29

SRC100P50V-2-GP

SB

2
SC680P-GP
2
100KR2J-1-GP

SCD22U16V3ZY-GP

DY

DUMMY-C2
2

SB

AUD_AGND

DY

IN+
VSS
IN-

U64
1
2
3

20.D0197.104

6
C580
SCD1U16V2ZY-2GP

Speaker

OUT

1
R372

2
0R0402-PAD

4
3
2
AUD_AGND

SPKR_R+

DY

VDD

SPKR_LSPKR_L+
SPKR_R-

ACES-CON4-1-GP
SPKR1

AUD_AGND
MICL_C 29

<Core Design>

Wistron Corporation

20.D0197.104

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

G1214TAUF-GP-U
1
C568

2
SC680P-GP

SB

Title

AUDIO AMP/SPEAKER

DY
1
R506

AUD_AGND
A

2
3
4

10KR2J-3-GP
C567

DY

2
1
R507

MICL_AMP

C575
SC100P50V2JN-3GP

DY

12/18
29

MIC_INT_R
MIC_INT_L

MIC_INT_R
MIC_INT_L

3D3V_AUD_S0

MICBIAS_L

C560
1
2

MIC1
ACES-CON4-1-GP

1
29
29

DY

AUD_AGND

8
7
6
5

DY
1
R511

29

AUD_AGND

1
2
3
4

AUD_AGND

1
C571

DUMMY-C2
2

12/14

SC100P50V2JN-3GP

DY

RC1
SPKR_R+
SPKR_RSPKR_L+
SPKR_L-

G1214TAUF-GP-U
C569

SB

SC100P50V2JN-3GP

10KR2J-3-GP

SCD22U16V3ZY-GP
EC150

DY

DY
1
2
3

R510

C564 DY
1
2

MICR_AMP

SC100P50V2JN-3GP
2

DY

U65

DY

29

1
DY

C578
SC100P50V2JN-3GP

29

EC72

Size
A3

2
100KR2J-1-GP

DY

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet
E

30

of

41

2
GAP-CLOSE-PWR

33

KBC_D[0..7]

KBC_D0 138
KBC_D1 139
KBC_D2 140
KBC_D3 141
KBC_D4 144
KBC_D5 145
KBC_D6 146
KBC_D7 147

G65
E51_TXD
2
GAP-CLOSE-PWR

Add Label "TXD"


33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33
33

G64
E51_RXD
2
GAP-CLOSE-PWR

Add Label "RXD"


5V_S0

0126
G67
1

2
GAP-CLOSE-PWR

32
5V_S0
RN49 32
4
3
2
1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

TDATA_5
TCLK_5
5
6
7
8
SRN10KJ-6-GP

PSDAT3
PSCLK3
PSDAT2
PSCLK2
PSDAT1
PSCLK1

R419
10KR2J-3-GP
2

R424
DUMMY-R2

KB3910

PS/2

KBC_3D3V_AUX

KBC_MATRIX1
KBC_MATRIX0

GPIO29
GPIO28
GPIO27
GPIO26
GPIO25
GPIO24
GPIO23
GPIO22
GPIO21
GPIO20
GPIO19
GPIO18
GPIO17
GPIO16
GPIO15
GPIO14
GPIO13
GPIO12
GPIO11
GPIO10
GPIO09
GPIO08
GPIO07
GPIO06
GPIO05
GPIO04
GPIO03
GPIO02
GPIO01
GPIO00

155
149
148
119
118
109
108
107
106
105
86
85
75
70
69
63
62
55
54
48
22
21
20
12
11
8
6
5
4
3

GPIO0F
GPIO0E
GPIO0D
GPIO0C
GPIO0B
GPIO0A

41
28
27
25
24
23

DOCK_IN# 17
ECSMI# 20
WIFI_RF_EN 26
PM_CLKRUN# 20,24,34
BLON_OUT 16
NUMLK_LED 23

GPIO1F
GPIO1E
GPIO1D
GPIO1C
GPIO1B
GPIO1A

98
97
94
93
92
91

BLUETOOTH_EN 32

GPIOI2D
GPIO2F
GPIO2E
GPIO2C
GPIO2B
GPIO2A

168
175
171
165
162
156

TP97
TP99
TP_BTN# 32
CHG_ON# 39
AD_OFF 40
EAPD
29,30,32
E51_TXD 26
E51_RXD 26

E51_TXD
E51_RXD
E51CS#

GPIO13

R425
2
10KR2J-3-GP

E51CS#

R437
2
10KR2J-3-GP

BT_TH

1
R453

2
DUMMY-R2
TP96 TP_LED 16
Pull-up by devided-resistor to MAX8725_LDO
PWR_LED 16
3D3V_S5
VOL_DWN_DK# 17
VOL_UP_DK# 17
SB_PWR_BTN# 2
1
PM_SLP_S4# 17,20,28,36,37,38
R198
DY 10KR2J-3-GP

GPIO13

ICH7 integrated pull-up


CAPS_LED 16
CAP_ACK 32
CAP_XPRES 32
CAP_DAT 32

S5_ENABLE

FAN3FB
FAN3PWM

R199
2
10KR2J-3-GP

KBC_3D3V_AUX
WIRELESS_BTN# 33
KBRST# 19
KBGA20 19
BT_DET# 32
BT_TH 39,40

RN72
4 KBC_SCL0
3 KBC_SDA0

1
2
KBC_3D3V_AUX
SRN4K7J-8-GP
RN71
1
2

4 KBC_SCL1
3 KBC_SDA1

SRN10KJ-5-GP
3D3V_S5

R253
100KR2J-1-GP.Normal

MUTE_LED# 17,32

WLANONLED_KBC

CHG_LED 16

TP23

SB_RSMPWR
1
2
R234
0R2J-2-GP

PCI_SERR# 18,24
KBC_MUTE# 30
PLT_RST1# 7,18,20,26,28,33,34

THRM#_R 1 R464
2
0R2J-2-GP

BLON_IN 9

C268
SC1U10V3ZY-6GP

R254
100KR2F-L1-GP

THRM# 22

2
GND
GND
GND
GND
GND
GND
17
35
46
122
137
167

AGND
BATGND

ECRST#
ECSCI#

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7

DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7

3D3V_S0
KB3910SF-2-GP

EC_SWI#

20 SB_PWR_BTN#
20 SB_RSMRST#
22 S5_ENABLE
16 BRIGHTNESS

1
R197

TP95

20,22,27,28,34,37,38 PM_SLP_S3#
17
PWR_BTN#
33 KBC_PWR_BTN#
27,39
AC_IN#
R218
33
LID_CLOSE#
10KR2J-3-GP R211
17
CIR_SENSE
10KR2J-3-GP
32 INSTANT_ON_BTN#
20,26,27,28 PCIE_WAKE#

4
3

VOL_UP_DK#
VOL_DWN_DK#

SRN10KJ-5-GP
1 D18
1N4148W-7-F-GP
ECSCI# 20
EC_RST#
EC_RST# 22
AD_IA
AD_IA 39
2

KBC_3D3V_AUX
1
1

PCB_VER2
PCB_VER1
PCB_VER0
BT_SENSE
AIRLINE_VOLT

2
0R0402-PAD

CHG_I_SEL

12/18

0823 SB add to WWAN

PWR_BTN#
R205
2
10KR2J-3-GP
CHG_ON#
R210
2
10KR2J-3-GP

3D3V_S5

AIRLINE_VOLT 39

CHG_I_PRE_SEL 39
CHG_I_SEL 39
CHG_4CELL 39
4CELL# 39
PM_LAN_ENABLE

BT+

CIR_SENSE
R195
2
10KR2J-3-GP

BT_DET#
R232
2
10KR2J-3-GP

3D3V_S5

R426
560KR2F-GP

12/4

<Core Design>

M_WXMIT_OFF# 26

KBRST#
2
DY R222
10KR2J-3-GP

2 PM_CLKRUN#
DY R208
10KR2J-3-GP

R648

SB_RSMRST#

DUMMY-R2
Intel
checklist suggest no
external resistor needed

1
R203

2
100KR2J-1-GP

ECSMI#

1
R430

2
100KR2J-1-GP

EC_SWI#

Wistron Corporation

BT_SENSE

1
R427

2
100KR2F-L1-GP

AD_IA

1
C223

2
SCD1U16V2ZY-2GP

A4 for DMRP==>High=Disable,Low=Enable

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

A5 for EMWB==>High=Enable,Low=Disable
GPIO05 for Clock test mode==>High=test Mode,Low=32KHz clock in normal running(Recommended)
GPIO06 for DPLL test mode==>High=Test Mode,Low=Normal operation(Recommended)

KBC_ENE K3910SF
Size
A3

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

3D3V_S5

2
0R2J-2-GP
M_WXMIT_OFF#

ECSCI#
2
100KR2J-1-GP
KBGA20
2
DY R447
10KR2J-3-GP

5V_AUX_S5

1
R646

1
R196
1

RN69
1
2

BRIGHTNESS_PWM

1
2

2
1
2

DUMMY-R2

DUMMY-R2

2
1
R444

R213
DUMMY-R2

1
2
1
2

DUMMY-R2

R450

20

R441
R215
10KR2J-3-GP

FAN3PWM
FAN3FB

EC_BEEP

PM_LAN_ENABLE1

30
R446
10KR2J-3-GP

3D3V_S0

1KR2J-1-GP
3D3V_AUX_S5

A5
A4

96
159

EXT_FWH# 33

19
31

81
82
83
84
87
88
89
90

43
40
39
38
37
36
33
32

A5

99
100
101
102
1
42
47
174

R455
2

GPWU0
GPWU1
GPWU2
GPWU3
GPWU4
GPWU5
GPWU6
GPWU7

DY

R456
1

100KR2J-1-GP

2
26
29
30
44
76
172
176

PWM7
PWM6
PWM5
PWM4
PWM3
PWM2
PWM1
PWM0

DY
3D3V_AUX_S5

X-bus
ROM

1
R420
DUMMY-R2

XCLKO
XCLKI

LPC

D0
D1
D2
D3
D4
D5
D6
D7

117
116
115
114
111
110

160
158

163
164
169
170
SCL1
SDA1
SCL2
SDA2

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7

KB Matrix

RD#
WR#
MEMCS#
IOCS#

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19

2
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16

KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8

U35

LFRAME#
LCLK
SERIRQ

124
125
126
127
128
131
132
133
143
142
135
134
130
129
121
120
113
112
104
103

PCB_VER0
PCB_VER1
PCB_VER2

2
SC15P50V2JN-2-GP

TP98

G68

KBCBIOS_RD# 150
KBCBIOS_WE# 151
KBCBIOS_CS# 173
152

Add Label "VCC"

1
C258

33 KBCBIOS_RD#
33 KBCBIOS_WE#
33 KBCBIOS_CS#

Planar
ID(2,1,0)
SA: 0,0,0
SB: 0,0,1
SC: 0,1,0
-1: 0,1,1
-2: 1,0,0
-3: 1,0,1

R422
DUMMY-R2

5V_AUX_S5

R423
10KR2J-3-GP

9
18
7

19,33,34 LPC_LFRAME#
3
PCLK_KBC
20,24,34 INT_SERIRQ

LAD0
LAD1
LAD2
LAD3

R421
10KR2J-3-GP

LPC_LAD015
LPC_LAD114
LPC_LAD213
LPC_LAD310

KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCA
19,33,34 LPC_LAD[0..3]

KBC_3D3V_AUX

SC15P50V2JN-2-GP
2

X4
RESO-32D768KHZ-GP
3

2
GAP-CLOSE-PWR

49
50
51
52
53
56
57
58
59
60
61
64
65
66
67
68
153
154

G69
1

KBC_XO

KBC_XI

VCCBAT

C225
C226
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP

3D3V_AUX_S5

KBC_3D3V_AUX

SCD1U16V2ZY-2GP

161

SCD1U16V2ZY-2GP

L19
1
23D3V_KBC_AUX_S5
BLM11P600S

SCD01U16V2KX-3GP

DY

2
16
34
45
123
136
157
166
95

C261

C249
2

SC10U10V5ZY-1GP

C245

C518

C259
1

11/08

22,32 KBC_SDA1
22,32 KBC_SCL1
40
KBC_SDA0
40
KBC_SCL0

KCOL[1..16] 32
KROW[1..8] 32

4
KBC_3D3V_AUX

71
72
73
74
77
78
79
80

KBC_3D3V_AUX

Sheet

31

of

41

CAMERA
3D3V_S0

3D3V_CAM_S0

3D3V_CAM_S0

11/09

1
1

1
1

R642
31K6R2F-GP

SC10U10V5ZY-1GP

20.F0772.008
ACES-CON8-4-GP
BT_PRIORITY
WL_PRIORITY
BT_LED

2
0R0402-PAD

R89

10

1
2

G913CF-GP

USB_4-

USB_PN4

EC95
SCD1U16V2ZY-2GP
DY

26

3D3V_BT_S0

EC93
DY

EC94
DY

SCD1U16V2ZY-2GP

ACES-CON24-2-GP

SCD1U16V2ZY-2GP

L-63UH-GP

20.K0220.024
20

DY

Close to CN8
0717Change from S5

USB_4+

USB_PP4
1

2
0R0402-PAD

R90

5V_S3

DY

C582
SC1U10V3ZY-6GP

MAX 150mA

U66

C581
SC4D7U10V5ZY-3GP

3D3V_BT_S0

2
3
4
6

20

CAP_ACK 3
USB_5+

USB_PP5
1
3D3V_AUX_S5
D17

CAPACITY BUTTON

2
0R0402-PAD

R267

BAV99W-1-GP

3D3V_AUX_S5

D6
3D3V_AUX_S5

3D3V_S0

EC7
SCD1U16V2ZY-2GP

2
TP_BTN_1#

DY

FOX-CON4-12-GP

13
1
2
DY 1
3
DY 1 0R2J-2-GP
4
DY 1 0R2J-2-GP
0R2J-2-GP
5
6
7
8
MUTE_LED_1#
9
10
EC149
11
DY
12

BAV99W-1-GP
KCOL3
KCOL5
KCOL8
KCOL9

KROW2
KROW8
KROW7
KCOL10

EAPD#

EAPD# 17

KROW4
KCOL6
KCOL2
KROW1

3D3V_S0

SW1
SW-TACT-68-GP-U
1

62.40009.451

100R2J-2-GP
R413
3
6

1
2
3
4

4
1
2
3
4

BAV99W-1-GP

2
2

RC4
SRC100P50V-2-GP

2/12

TP_BTN_1#

8
7
6
5

8
7
6
5
RC3
SRC100P50V-2-GP

R416
10KR2J-3-GP

TOUCH-PAD SWITCH

D5
3D3V_AUX_S5

TP_BTN# 31

<Core Design>

Wistron Corporation

KCOL7
KCOL4
KCOL13
KCOL14

2
2

for EMI
KCOL15
KCOL12
KCOL11
KCOL16

for EMI

31 CAP_XPRES
R276
22,31 KBC_SCL1
R275
22,31 KBC_SDA1
BAV99W-1-GP
R274
31
CAP_ACK
31
CAP_DAT
31 INSTANT_ON_BTN#
2
1
DY
5V_S0
R278
1
2 0R2J-2-GP
3D3V_S0 R279
0R2J-2-GP
EAPD#
1
2
R49 1 0R2J-2-GP
2
17,31 MUTE_LED#
R48 DY 0R2J-2-GP
14
SCD1U16V2ZY-2GP
5V_S0
12/14
D7
ACES-CON12-4-GP
3D3V_AUX_S5
1
2
EC49
SCD1U16V2ZY-2GP
20.K0228.012
CAP_ACK
2
1
2
CAP_DAT
EC10
SC100P50V2JN-3GP
1
2
INSTANT_ON_BTN# 3
INSTANT_ON_BTN#
EC13
SC100P50V2JN-3GP
1
2
EAPD#
EC11
SC100P50V2JN-3GP
1
2
EC6
SCD1U16V2ZY-2GP
1
1

EAPD

2
2
2

8
7
6
5

29,30,31
RC7
SRC100P50V-2-GP

1
2
3
4

RC5
SRC100P50V-2-GP
1
2
3
4

RC2
SRC100P50V-2-GP
1
2
3
4

1
2
3
4

8
7
6
5

8
7
6
5

8
7
6
5

Q2
2N7002-11-GP

RC6
SRC100P50V-2-GP

CAP1

CAP_DAT 3

R14
10KR2J-3-GP

KROW5
KROW6
KCOL1
KROW3

C577
SCD1U16V2ZY-2GP

1
2

OUT

5
1

C432
SC33P50V2JN-3GP

1
2

TPAD1

TDATA_5
TCLK_5

C431
SC33P50V2JN-3GP

DY

R354
R355
10KR2J-3-GP
10KR2J-3-GP

BAV99W-1-GP

SET

G913CF-GP

TR4
L-63UH-GP

31
31

3D3V_AUX_S5
D8

SHDN#
GND
IN

C433
SC1U10V3ZY-6GP

DY

1
2
3

31 BLUETOOTH_EN

USB_PN5

1
2

5V_S3

C430
SCD1U16V2ZY-2GP

TCLK_5

20
1

USB_53

5V_S3
D32
3D3V_AUX_S5

2
0R0402-PAD

R268

TouchPad Connector

BAV99W-1-GP

EC96
DY
SCD1U16V2ZY-2GP

TR2

3D3V_AUX_S5
D31

TDATA_5 3

SC1U10V3ZY-6GP
2

1
20.D0197.105

2
3
4
5
6
7
8

USB_5+
USB_533
BT_LED
26 WL_PRIORITY
C808 26 BT_PRIORITY
31
BT_DET#

5
4

SET
OUT

MATRIXID2#

C335
SCD1U16V2ZY-2GP

C337
SC4D7U10V5ZY-3GP

SHDN#
GND
IN

USB_4+

1
2
3

C809

CAM1

20

3D3V_BT_S0

U71

MATRIXID1#

DY

USB_4-

1
6

BT1
9

5V_S0

0R5J-6-GP

Jap

7
5
4
3
2

R641
68KR2F-GP

Eur

0R5J-6-GP
ACES-CON5-1GP DY

Keyboard matrix ( from vendor )

KROW8
KROW7
KCOL10
KROW5
KROW6
KCOL1
KROW3
KROW4
KCOL6
KCOL2
KROW1
KCOL3
KCOL5
KCOL8
KCOL9
KCOL7
KCOL4
KCOL13
KCOL14
KCOL15
KCOL12
KCOL11
KCOL16

Blue thumb

(3.93V)

12/4

31 KCOL[1..16]

KROW2

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

31 KROW[1..8]

R11

R9

Internal KeyBoard Connector

US

KB1
25

5V_S0

C515
SC1000P50V3JN-GP
DY

EAPD#

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

3
1

Title

BAV99W-1-GP

Size
A3

KeyBoard-CONN
Document Number

for EMI
Date: Thursday, February 15, 2007

Rev

Pamirs
Sheet

-1
32

of

41

GOLDEN FINGER FOR DEBUG BOARD

TOP VIEW

5V_S0_LPC

5V_S0_LPC
U68

31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31
31

A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1

31 KBCBIOS_CS#
31 KBCBIOS_RD#
31 KBCBIOS_WE#

VCC

16
17
48
1
2
3
4
5
6
7
8
18
19
20
21
22
23
24
25

A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

26
28
11
47
12

CE#
OE#
WE#
BYTE#
RESET#

R458
2
10KR2J-3-GP
R440
2
10KR2J-3-GP

1
3D3V_AUX_S5

37

Q15/A-1
Q14
Q13
Q12
Q11
Q10
Q9
Q8
Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0

45
43
41
39
36
34
32
30
44
42
40
38
35
33
31
29

RY/BY#

15

NC#14
NC#13
NC#10
NC#9

14
13
10
9

GND
GND

46
27

A0

31

KBC_D[0..7]

KBC_D7
KBC_D6
KBC_D5
KBC_D4
KBC_D3
KBC_D2
KBC_D1
KBC_D0

31

A15

(B1)

A14

(B2)

PLT_RST1#_1
LPC_LFRAME#_1
LPC_GND
PCLK_FWH_1

....

U55

....

3D3V_AUX_S5

A2

(B14)

A1

(B15)

LPC_LAD3_1
LPC_LAD2_1
LPC_LAD1_1
LPC_LAD0_1
EXT_FWH#_1
3D3V_S0_LPC

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

(BOTTOM VIEW)

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15

PLT_RST1#_1
LPC_LFRAME#_1
LPC_GND
PCLK_FWH_1

LPC_LAD3_1
LPC_LAD2_1
LPC_LAD1_1
LPC_LAD0_1
EXT_FWH#_1
3D3V_S0_LPC

FOX-GF30
ZZ.GF030.XXX

Boot Device must have ID[3:0] = 0000


Has internal pull-down resistors
All may be left floated
FPET7 Elec. P3-46
5V_S0

G75
1

5V_S3
LPC_LAD[0..3]

19,31,34
7,18,20,26,28,31,34

MX29LV800CBTC-GP

PLT_RST1#

19,31,34 LPC_LFRAME#

5V_S0_LPC
2

GAP-OPEN-PWR
G71
PLT_RST1#_1
2

PLT_RST1#

LPC_LFRAME#

GAP-OPEN-PWR
G72
LPC_LFRAME#_1
1
2

PCLK_FWH

Q1
R2
B

PWR_LED#

R8

SCD1U16V2ZY-2GP

GAP-OPEN-PWR

R3
10KR2J-3-GP

0126

LID_CLOSE# 31

G31

3
2
1

R42
100R2J-2-GP

EC1

4
2

20.D0197.102
ACES-CON3-1-GP
20.F0735.003

3D3V_S0

C298
SCD22U16V3ZY-GP

KBC_PWR_BTN# 31

C4
SC1000P50V3JN-GP
DY

3D3V_S0

GAP-OPEN-PWR
G33
LPC_LAD1_1
2

LPC_LAD0

GAP-OPEN-PWR
G34
LPC_LAD0_1
2

EXT_FWH#

EXT_FWH#

GAP-OPEN-PWR
G35
EXT_FWH#_1
2

31

3D3V_S0

WLANONLED 26

LPC_LAD3_1

GAP-OPEN-PWR
3D3V_S0_LPC
G36
2

1
EC34

GAP-OPEN-PWR
G74
2

BT_LED 32
1

LPC_LAD1

2
D

R359
100KR2J-1-GP

WLAN1
ACES-CON4-1-GP

LPC_LAD2

GAP-OPEN-PWR
G32
LPC_LAD2_1
1
2

0119

Q28
2N7002-11-GP

5V_S0

SCD1U16V2ZY-2GP

R356
100KR2J-1-GP

WIRELESS SWITCH

LPC_LAD3

1
1

1
2

2
2

ACES-CON2-1-GP-U

C301
SC1000P50V3JN-GP
DY

SCD1U16V2ZY-2GP
EC3

R273
2
100R2J-2-GP

COVER_SW

2
4

GAP-OPEN-PWR
G73
PCLK_FWH_1
2

02/06 560R2J-3-GP
1

POWER SWITCH

PWR1
3
1

3 PCLK_FWH

PDTA124EU-1-GP

R272
10KR2J-3-GP

LID1

KBC_3D3V_AUX

2
EC5

COVER SWITCH

16

R1

KBC_3D3V_AUX

SCD1U16V2ZY-2GP

3D3V_S0
R370
1KR2J-1-GP

Put near board edge

LPC_GND

GAP-OPEN-PWR

2
3
4

R374
10KR2J-3-GP

<Core Design>

20.D0197.104

2
100R2J-2-GP

Wistron Corporation

WIRELESS_BTN# 31

1
R375

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

C437
SC1000P50V3JN-GP
DY

Title

FWH and Debug


Size
A3

Document Number

Date: Wednesday, February 14, 2007


A

Rev

Pamirs
Sheet
E

-1
33

of

41

3D3V_S0

R256
PP

TPM 1.2

5V_AUX_S5 TO 5V_S5

DY

4K7R2J-2-GP
3D3V_S0

3D3V_S5

R255
0R2J-2-GP

PWR_S5_EN_2

1
VSB
VDD
VDD
VDD

13
14

XTALI/32K_IN
XTALO

TPM_XTALO

DY

3 CLK_PCI_TCG
20 LPC_PD#

SC10P50V2JN-4GP
19,31,33 LPC_LFRAME#
7,18,20,26,28,31,33 PLT_RST1#

C291

19,31,33
19,31,33
19,31,33
19,31,33

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

21
28
22
16

LCLK
LPCPD#
LFRAME#
LRESET#

26
23
20
17

LAD0
LAD1
LAD2
LAD3

DY

20 TPM_32K_CLK

R269

6
2
9
8

PP
CLKRUN#
SERIRQ

7
15
27

NC#1
NC#3
NC#12

1
3
12

GND
GND
GND
GND

4
11
18
25

9636GPIO
9636GPIO21
1
TESTB1
TEST1_1
1
R260 PP

R265
4K7R2J-2-GP

DY

TP28
TP27

DY

2
0R2J-2-GP
PM_CLKRUN# 20,24,31
INT_SERIRQ 20,24,31

DY

R262
4K7R2J-2-GP

DY

SLB9635TT1D1-GP
1

GPIO
GPIO2
TESTBI/BADD
TESTI

5
10
19
24

SCD1U16V2KX-3GP

TPM_XTALI
TPM_XTALO

D20
2

3D3V_S0

1
2

SC4D7U10V5KX-1GP

SCD1U16V2KX-3GP

1 C246
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

R209

C277
SCD1U16V2KX-3GP

RESO-32D768KHZ-GP

C234
C240

G
2
R206
100KR2J-1-GP

47KR2J-2-GP

22,36 PWR_S5_EN#

R270
10MR2J-L-GP

DY

SC1U10V3KX-3GP

X5
3

SCD1U16V2KX-3GP

C237

DY

DY

U44
TPM_XTALI

1
1

DY
C239

C284 C285

DY

DY C290

5V_S5

C278

DY

SC10P50V2JN-4GP
SI2301BDS-T1-GP
Q12

5V_AUX_S5

DY

2 TPM_XTALI
0R2J-2-GP

1N4148W-7-F-GP

12/18

3D3V_S0
5V_S3

Q14
TP0610K-T1-GP

2
330KR2J-L1-GP
R251
1KR2J-1-GP
2

Q15
C

DY
R252
330KR2J-L1-GP

D
D
D
D

8
7
6
5

U39
S
S
S
G

D
D
D
D

6
4
3
2

3D3V_S5
1
2
3
4

R649
DUMMY-R2

FOX-CON4-12-GP

USB_8USB_8+

1
5

8
7
6
5

CN2

11/2

AO4422-1-GP
PM_SLP_S3#_Z12V

PM_SLP_S3#_Z12V

R13
20

2
0R0402-PAD
USB_8-

USB20_N8

3D3V_S0
3

20

USB_8+

USB20_P8
1

U42
2N7002DW-7F-GP
R242
100R5J-3-GP
5

R2
PDTC124EU-1-GP

U40
S
S
S
G

AO4422-1-GP
D21
RLZ12B-1-GP 3D3V_S0
DY

R1

PM_SLP_S3#

R537
537

1
R244

C269
2R

1
20KR2J-L2-GP

0R2J-2-GP
2

RUN_PWR_CTLR
SCD22U25V3KX-GP

R246

SB

1
2
3
4

SB
D

Z_12V

12/18

5V_S0
DCBATOUT

20,22,27,28,31,37,38

3D3V_S5

Finger Printer

Run Power

R15

2
0R0402-PAD

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

PWRPLANE&RESETLOGIC
Size
A3

Document Number

Date: Wednesday, February 14, 2007

Rev

Pamirs
Sheet

-1
34

of

41

29

CSP3

10

CSN3

GNDS

11

2
VCC_SENSE

2
1

1
Q9

2
3

4
3
2
1

1
FDS6676AS-G

1
2

2
1

FDS6676AS-G

R118
2 1

3K3R3F-GP
1
C44

DY
MAX8552ETB-1-GP

G15

GAP-CLOSE-PWR

R119

MAX8552_DL

C189
SC1000P50V2JN-GP

DY
C152

L-D36UH-1-GP
R117
2KR3F-L-GP

5
6
7
8
Q25

4
3
2
1

DL
PGND

4
3
2
1

1
2

Q7

EN
PWM

5
6
7
8

MAX8552_LX

4
3
2
1

1
PWM2

MAX8552_DH

S
S
S
G

LX

S
S
S
G

DRSKP#

DH

BST

L32
1

2
MAX8552_AGND

VCC

DLY

MAX8552_BST

FDS8880-NL-G

C193
SCD22U16V3KX-2-GP

D
D
D
D

10

FDS8880-NL-G

D
D
D
D

GND

U20

0R3-0-U-GP

4
R164
1
1KR2F-3-GP

R145

C178
SC2D2U10V3ZY-1GP

R_ILIMPK=402K ohm , Iocp=28/phase

Q26

K
SS0530-GP

R_OSC=143K ohm , Fsw=300K Hz

SCD1U50V3KX-GP

2/12

S
S
S
G

1
2
MLB1608080220P-GP

EC56
2

5
6
7
8

C426
SCD1U50V3KX-GP

5V_8552_S0
D14

L41

GAP-CLOSE-PWR

C29
SC1000P50V3JN-GP

5
6
7
8

MAX8736_FBS

D
D
D
D

DY
DY

C811
SC10U10V5KX-2GP

GND

12

G51

DCBATOUT

2
9K53R3F-2-GP

C427
SC10U10V5KX-2GP

1
R38

MAX8736AGTL-GP-U

2
4
3
2
1

2
NTC-10K-9-GP

SCD01U16V2KX-3GP

MAX8736_VPS

VSS_SENSE

R39
C164
SC10U10V5KX-2GP
2
1

13

R41
1
2
10R2J-2-GP
C39
SC1000P50V3JN-GP

VPS

MAX8736_GNDS

20

2/14

2
1

5
6
7
8

5
6
7
8
4
3
2
1

C42
SC1000P50V2JN-GP

10R2J-2-GP

C812
SC10U10V5KX-2GP

C344
SC10U10V5KX-2GP

C339
SC10U10V5KX-2GP
2
1

C74

SC10U10V5KX-2GP
2

C73

SC10U10V5KX-2GP
2

5
6
7
8

C72

1
2

5
6
7
8
4
3
2
1

4
3
2
1

C163
SC10U10V5KX-2GP
2
1

GND

FBS

TC17

DY

5V_S0
1

5V_S0

41

PWM3

TC4

Panasonic , 330uF/2V
ESR = 9m ohm
7.3*4.3*1.9

MAX8736_CSN2
MAX8736_CSP2

S
S
S
G

SCD1U10V2MX-3GP

1
2

D
D
D
D

DY

CSP2

C147

SCD22U10V3KX-2GP

PSI#

GAP-CLOSE-PWR
R53
1KR2J-1-GP
SB
1
2MAX8736_IMVPOK
24 IMVPOK
R533 1
C593 1
2
2
7,20 VGATE_PWRGD
33R2J-2-GP
SCD47U10V3KX-3GP
1R309
2MAX8736_CLKEN#
1 CLKEN#
3D3V_S0
10KR2J-3-GP
1
2
22 VRHOT#
20
CLK_EN#
G52
GAP-CLOSE-PWR
23 THRM
1
2 MAX8736_PWR
4 CPU_PROCHOT#
R50
10R2J-2-GP
C41
DY
R47
10KR2J-3-GP

DY

C47
1
2 C43
SC1000P50V2JN-GP

2
NTC-10K-9-GP

C137

PWM2

28

CSN2

R94
2 1

3K3R3F-GP

DPRSLPVR

C129

SHDN#

R88

FDS6676AS-G

MAX8736_CSP1

1
PWM2

FDS6676AS-G

DRSKP#

C116
G11
GAP-CLOSE-PWR

Q23

C162
SC10U10V5KX-2GP
2
1

CSN1

2
DRSKP#
CSP1

33
6

31

3D3V_S0

1
2
1

D0
D1
D2
D3
D4
D5
D6

PGND

Q6
DY
C64
SC1000P50V2JN-GP

470R2J-2-GP

1
2
30
VDD

21
VCC
2

MAX8736_DL1

SE330U2VDM-L-GP

G7
1

32

R93
2KR3F-L-GP

SE330U2VDM-L-GP

7,20 DPRSLPVR

DL1

L-D36UH-1-GP

TRC

GAP-CLOSE-PWR

PSI#

MAX8736_LX1

3/5

L31
1

SE330U2VDM-L-GP

18

R527

MAX8736_DH1

26

36A/44A
VCC_CORE_S0

S
S
S
G

36,37,38 CPUCORE_ON

27

LX1

Q22

FDS8880-NL-G

SE330U2VDM-L-GP

REF

DH1

SE330U2VDM-L-GP

19

G4
1

2/12

SE330U2VDM-L-GP

ILIMPK

25

C83
SCD1U50V3KX-GP

D
D
D
D

CPU_VID[0..6]

DY

S
S
S
G

34
35
36
37
38
39
40

CCV

16

MAX8736_BST1

BST1

Q5

FDS8880-NL-G

S
S
S
G

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

TIME

17

R56
0R3-0-U-GP

U13

OSC

15

EC52
SCD1U50V3KX-GP
C50

D
D
D
D

C36

14

C52
SC2D2U10V3ZY-1GP

S
S
S
G

R36
1

10/24

MAX8736_OSC
2
140KR3F-GP
MAX8736_TIME
2
100KR2F-L1-GP
1
2 MAX8736_CCV
C38
SC680P50V2KX-2GP
MAX8736_ILIMPK
2
360KR3F-GP
MAX8736_REF
2
SCD22U10V2KX-1GP
1
2MAX8736_TRC
R45
1K47R2F-GP

1
1
2
1
2

C37

SCD22U16V3KX-2-GP

D28
SSM5818SLPT-GP

R40

SC10U10V5KX-2GP
2

MLB1608080220P-GP

SC1U10V3ZY-6GP

1
R19
1
R37

DY

R57

100KR2J-1-GP
CPU_VID6
2

100KR2J-1-GP
2
CPU_VID5

100KR2J-1-GP
2

100KR2J-1-GP
2
CPU_VID2

R59

CPU_VID4

100KR2J-1-GP
2

100KR2J-1-GP
CPU_VID3
2

100KR2J-1-GP
2

R61

D
D
D
D

CPU_VID1

R66

D
D
D
D

CPU_VID0

R77

10R3J-3-GP

R79

DCBATOUT

1
R82

5V_S0

L40

5V_8736_S0

2/14

C429
SC10U10V5KX-2GP
2
1

5V_S0

MAX8736_CSN2
2
SCD22U10V3KX-2GP
MAX8736_CSP2
A

<Core Design>

G16
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

GAP-CLOSE-PWR
MAX8552_AGND

Title

DC-DC VCCCPUCORE
Size
A3

Document Number

Date: Thursday, March 08, 2007


5

Rev

-1

Pamirs
Sheet
1

35

of

41

51120_V5FILT

DCBATOUT
1

PWR_S5_EN_1

Q13
2N7002-11-GP
51120_AGND

DCBATOUT

1
7
2

25
16

51120_DRVL1
51120_DRVL2

27
14

51120_DRVH1
51120_DRVH2

51120_TONSEL 1

51120_VREF2
R451
2
0R2J-2-GP

R448
0R2J-2-GP

DY

U33
AO4468-GP

Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm

5
6
7
8

2N7002DW-7F-GP

DY

AUTOSKIP
/FAULTS
OFF

PWM

N/A

N/A

CURRENT
MODE

D-Cap
MODE

TONSEL

380k/CH1
590k/CH2

290k/CH1
440k/CH2

220k/CH1
330k/CH2

180k/CH1
280k/CH2

VFB1

N/A

not use

ADJ.

VFB2

N/A

not use

ADJ.

5V
Fixed Output
3.3V
Fixed Output

not use

Swithchr ON

Switcher ON

DY

COMP

DY

LDO OFF

not use

LDO ON

VREG3 on

1
1

G30
1

GAP-CLOSE-PWR

C250
SC1000P50V3JN-GP

51120_AGND

DY

51120_COMP2

DY

DY
1 1

C257
SC390P50V3JN-GP

R235
22KR2J-GP

EN3,EN5

DY

Vout=1V*(R1+R2)/R2
51120_AGND

51120_AGND

EN1,EN2 Switcher OFF

R239
13K3R2F-L1-GP
2

C253
SC390P50V3JN-GP

1 2

PWM

NEC 220uF ,V size


ESR=25mohm
Iripple=2.2A

DY

AUTOSKIP

SKIPSEL

GAP-CLOSE-PWR

DY
R231
0R2J-2-GP

R228
22KR2J-GP

V5FILT
1

FLOAT

GAP-CLOSE-PWR
G25
1
2

R237
TC9
30K9R3F-GP ST220U6D3VDM-15GP

1 2

DY

51120_VFB2
51120_COMP1

VREF2

2 2

GAP-CLOSE-PWR
G28
1
2

51120_DRVL2

51120_AGND

51120_AGND

GND

GAP-CLOSE-PWR
G29
1
2

IND-2D2UH-46-GP-U

C255
SC33P50V2JN-3GP

GAP-CLOSE-PWR
G23
1
2

GS 10*10*4 4D7uH
3D3V_PWR
DCR=25mohm, Isat=6A

U34
AO4422-1-GP

Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm

3D3V_S5

GAP-CLOSE-PWR
G22
1
2

51120_AGND
51120_AGND

GAP-CLOSE-PWR
G26
1
2

3D3V_PWR

C221
C224
SC10U25V6KX-1GP
SCD1U25V3ZY-1GP

1
2

S
S
S
G

PM_SLP_S4_1#
C252
SC3900P50V3KX-GP

L20

51120_DRVH2
51120_LL2

10/24

R219
100KR2J-1-GP
PM_SLP_S4_1

3D3V Iomax=4A
OCP>8A

4
3
2
1

DCBATOUT
C227

1
6

G27
1

GAP-CLOSE-PWR
G24
1
2

74.51120.073

R223
0R2J-2-GP

35,37,38

D
D
D
D

PM_SLP_S4#

CPUCORE_ON

SKIPSEL
TONSEL

DRVL1
DRVL2

51120_AGND
17,20,28,31,37,38

2 0R0402-PAD
2 0R0402-PAD

51120_AGND

DRVH1
DRVH2

5V_AUX_S5
U38

4
3
2
1

DY
51120_PGOOD1 1 R442
51120_PGOOD2 1 R457

S
S
S
G

51120_CS2
2
16KR3F-GP

NEC 220uF ,V size


ESR=25mohm
Iripple=2.2A

DY

1
30
11

51120_AGND
51120_CS1
2
18KR3F-GP

51120_VFB1

TC10
ST220U6D3VDM-15GP

R466
7K5R3F-GP

D
D
D
D

51120_V5FILT

51120_SKIPSEL 32
31

8/10

DY

20
22
V5FILT
VIN

COMP2
COMP1
PGOOD1
PGOOD2

24
17
5
33

CS1
CS2

1
2

51120_AGND

1
R438

15
26

VREF2

C260
SC1000P50V3JN-GP
TPS51120RHBR-GPU1

1
R439

LL2
LL1

R463
30KR2F-GP
R465
0R2J-2-GP

51120_DRVL1

VO1
VO2

DY

R445
100KR2J-1-GP
51120_LL2
51120_LL1

1
8

3D3V_S0

SC10U25V6KX-1GP

5V_S3
3D3V_PWR

C532
SC33P50V2JN-3GP

U37

5
6
7
8

VFB2
VFB1

51120_VREF2

R225
2
0R3-0-U-GP

4
3
2
1

6
3

Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm

51120_VFB2
51120_VFB1

28
13

19
21
EN1
EN2
EN3
EN5

VBST1
VBST2

VREG3
VREG5
29
12
10
9

23
18

R240
2
0R3-0-U-GP
R467
2
0R3-0-U-GP

1
1

2 0R0402-PAD 51120_EN1
2 0R0402-PAD 51120_EN2
TP25
1TPAD28
TP26
1TPAD28

PGND1
PGND2
GND
GND

51120_V5FILT

51120_COMP1 1

DY

U31
AO4422-1-GP

0R3-0-U-GP
2

1
2
PWR_S5_EN_1

1 R449
1 R452

SC10U10V5ZY-1GP

PM_SLP_S4_1#

R233
51120_COMP2 1

5V Iomax=5A
OCP>10A

2
IND-3D3UH-42-GP-U1

S
S
S
G

SC10U10V5ZY-1GP

0707 Change 5V_S5 to 5V_S3


0718 Change 3D3V_AUX_S5 to 3D3V_S5

L21
1

51120_V5FILT

C241 C244 3D3V_AUX_S5

SCD1U25V3ZY-1GP

51120_DRVH1
51120_LL1

C242
SCD1U25V3ZY-1GP

D
D
D
D

R216
2 51120_VBST1
0R3-0-U-GP
5V_AUX_S5

GS 10*10*4 4D7uH
5V_S3
DCR=25mohm, Isat=6A

5
6
7
8

51120_VBST1_11

51120_AGND

C248
51120_LL1 1

0707

4
3
2
1

51120_AGND
R220
2 51120_VBST2
0R3-0-U-GP

51120_VBST2_11

SCD1U25V3ZY-1GP

C222
SCD1U25V3ZY-1GP

S
S
S
G

C247
51120_LL2 1

Iomax=11A
10/24
Qg=9.8nC,
Rdson=20~25mohm

8/10

C220
SC10U25V6KX-1GP

U32
AO4468-GP

22,34 PWR_S5_EN#

D
D
D
D

SC1U10V3ZY-6GP

5
6
7
8

C238

C251
SC3900P50V3KX-GP

1
2
5D1R3F-GP

5V_AUX_S5

R207

C262
SC1000P50V3JN-GP

For TPS51120,
Vout=5V
1. If you use
2. If you use
3. If you use
Vout=3.3V
1. If you use
2. If you use
3. If you use

a 6.8uH inductor, the minimum ESR is 70m ohm.


a 4.7uH inductor, the minimum ESR is 48m ohm.
a 3.3uH inductor, the minimum ESR is 34m ohm.

<Core Design>

Wistron Corporation

a 4.7uH inductor, the minimum ESR is 51m ohm.


a 3.3uH inductor, the minimum ESR is 36m ohm.
a 2.5uH inductor, the minimum ESR is 27m ohm.

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

DY

5V_S3/3D3V_S5
Size
A3

51120_AGND

Document Number

Date: Friday, March 02, 2007

Rev

-1

Pamirs
Sheet

36

of

41

Iocp=7.0* 2 = 14A
Rds,on=17m ohm
Vcs1=Iocp*Rds,on=238mV
VILIM=Vcs1/0.1=2.38V

Iocp=7.0*2 = 14A
Rds,on=17m ohm
Vcs2=Iocp*Rds,on=28mV
VILIM2=Vcs2/0.1=2.38V

5V_MAX8743_VCC
5V_S5
R168
1

DUMMY-R2
2

5V_S3

R171
1

2
0R3-0-U-GP

5V_MAX8743_VCC

0721

1D8V_PWR

10R3J-3-GP

D15

1
2

8/18

DCBATOUT
MAX8743_BST2

DCBATOUT

BAW56-7-F-GP
G57

MAX8743_VCC

DH2
LX2
DL2

18
17
20

28

CS1

CS2

16

1
2

1
2

SC10U25V6KX-1GP

1
2

5
6
7
8

SCD1U25V3ZY-1GP

1
2

1D5V_S0/5A
OCP>=10A

C214
SC10U25V6KX-1GP
1D5V_PWR

1
GAP-CLOSE-PWR

OVP

SKIP#

MAX8743_ON2

C194

MAX8743_PGOOD

SCD1U25V3ZY-1GP

Panasonic 220uF/2V
ESR=15m ohm
Iripple=2.7 A

12

PGOOD

R156
5K11R2F-L1-GP

Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm

MAX8743EEI-1-GP
74.08743.A79

ON2

TON
REF

TC7
SE220U2VDM-8GP

ON1

DY

R366
1

DUMMY-R2
2

0205

R368
DUMMY-R2
MAX8743_ON2
2
5K1R2-GP

PM_SLP_S3#1

MAX8743_SKIP#

220KR2J-L2-GP

460
355

OPEN
VCC

345
235

255
170

<Core Design>

Wistron Corporation

R169
C202
0R2J-2-GP
SC1000P50V3JN-GP
2

620
485

AGND
REF

35,36,38

DY R364
PM_SLP_S4#1
2

Frequency (Out2)KHz

CPUCORE_ON

220KR2J-L2-GP

Frequency (Out1)KHz

2
0R0402-PAD
R365

R373

PM_SLP_S3#

R361
1

MAX8743_ON1
2
5K1R2-GP

Voutsetting=1.511V

8/18
DY

R360
1

PM_SLP_S4#

0830 SB

Ton

Vout=Vfb*(1+(R1/R2))
Where Vfb=1.0V,R2=10Kohm

2
20,22,27,28,31,34,38

MAX8743_FB2

R367
0R2J-2-GP

MAX8743_VREF

17,20,28,31,36,38

R162
10KR3F-L-GP

C435
SCD1U25V3ZY-1GP

5V_MAX8743_VCC

MAX8743_FB1
R181
10KR3F-L-GP

Voutsetting=1.820V

GAP-CLOSE-PWR

5
10

2
G20

DY

11

MAX8743_TON
MAX8743_VREF

U29
FDS6690DS-GP

2
G21

1
1

MAX8743_ON1

C434
SCD47U10V3KX-3GP

14

GAP-CLOSE-PWR

Iomax=11A
Qg=9.8nC,
Rdson=19.6~24mohm

15

FB2

2
G18

GAP-CLOSE-PWR

IND-2D2UH-46-GP-U

OUT2

GAP-CLOSE-PWR

5
6
7
8
FB1

1 S
2 S
3 S
4 G

OUT1

2
G17

L17

MAX8743_DH2
MAX8743_LX2
MAX8743_DL2

1D5V_S0

G19

NEC
Irms=7.5A(Isat=10.4A)
DCR=13mohm
12*12*5.5

4
3
2
1
DH1
LX1
DL1

26
27
24

MAX8743_ILIM2

21
4
VDD
V+

22

MAX8743_DH1
MAX8743_LX1
MAX8743_DL1

MAX8743_BST2R

4
3
2
1

D
D
D
D
1
2

SCD1U25V3ZY-1GP

SE220U2D5VDM-3GP
2
1

BST1

220uF/2D5V
ESR=15m ohm
Iripple=2.7 A

ILIM1

25

U30
AO4468-GP
C196
SCD1U25V3ZY-1GP

EC82

S
S
S
G

R180
8K2R3F-GP
Panasonic

BST2

19

MAX8743_BST1R

U27
FDS6690DS-GP

C197

DY

13

R387
0R3-0-U-GP

90K9R3F-GP

D
D
D
D

TC8

ILIM2

R357

10/24

8
7
6
5

IND-2D2UH-46-GP-U

GAP-CLOSE-PWR

SC1U10V3ZY-6GP

UVP

VCC

1
1
2

9
MAX8743_ILIM1

GND

GAP-CLOSE-PWR
G62
1
2

8
7
6
5
D
D
D
D
S
S
S
G

Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm

L16
1

U22

23

GAP-CLOSE-PWR
G55
1
2

R363
90K9R3F-GP

C210
SCD1U25V3ZY-1GP

Iomax=11A
Qg=9.8nC,
Rdson=20~25mohm

S
S
S
G

NEC
Irms=7.5A(Isat=10.4A)
DCR=13mohm
12*12*5.5

GAP-CLOSE-PWR
G61
1
2

R177
2
0R3-0-U-GP

1
2
3
4

GAP-CLOSE-PWR
G58
1
2

10/24
U26
AO4468-GP

C216
R362
100KR2F-L1-GP

C208

D
D
D
D

SCD1U25V3ZY-1GP

GAP-CLOSE-PWR
G59
1
2

R369
100KR2F-L1-GP
2

C217 EC77
SC10U25V6KX-1GP

GAP-CLOSE-PWR
G60
1
2

MAX8743_BST1

GAP-CLOSE-PWR
G56
1
2

C207
SC1U25V5ZY-4GP

1D8V_S3

C211
SCD1U10V2MX-3GP

R173

SCD1U10V2MX-3GP

5V_MAX8743_VCC

1D8V / 7.0A
OCP>=14A

C198
SC1U10V3ZY-6GP

DCBATOUT
C199

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

DY

Title

1D8V_S3/1D5V_S0
Size
A3

Document Number

Rev

-1

Pamirs

Date: Wednesday, February 14, 2007

Sheet

37

of

41

Iomax=7A,OCP>14A

R638
10R2F-L-GP

2
2

D
D
D
D

C20

U48
AO4468-GP

C302
C309
SC10U25V0KX-3GP
SC10U25V0KX-3GP

G44
1

G46

SC411_LX

C803
SC100P50V2JN-3GP

GND

11/27

SC411_VFB

SC411_DL
1

VSSA

PGND

SC411_DL

R21
11KR2F-L-GP

17

DL

12/21

S
S
S
G

22KR2F-GP

SC411MLTRT-GP

4
3
2
1

R640
SC411_LX_L 1

G48

2
IND-1D5UH-23-GP

FB

U49
AO4406-1-GP

Vout Setting:
0.5V/Rlow=(Vout-0.5V)/Rhigh

G49
1

GAP-CLOSE-PWR
G50
1

GAP-CLOSE-PWR
3

R26
10KR2F-2-GP

1
C323
SC10U10V5ZY-1GP

1
C319
SC1U10V3ZY-6GP

1D5V_S0

5V_S3

GAP-CLOSE-PWR

TC12
ST330U2D5VDM-13GP

10

12/20

SC411_VFB

ILIM

TON

VOUT

11

GAP-CLOSE-PWR

L26

SC411_LX

C821
SCD1U16V2KX-3GP

SC411_LX

G47

11/27
SC411_DH

LX

SCD1U16V2KX-3GP

16

1D05V_PWR

SC1U10V3ZY-6GP
SC411_DH

12

C806

1D05V_PWR

4
3
2
1

1MR2F-GP
C807
SC1KP50V2KX-1GP

SC411_TON

5V_S5
1

DH

R637

13
9

VDDP

GAP-CLOSE-PWR

D
D
D
D

DCBATOUT_SC411

BST

PM_SLP_S3#

20,22,27,28,31,34,37

R639

4 PGD
R20
1
2SC411_EN_1D05
15 EN/PSV
8K2R2J-3-GP
C590
SC1U10V2KX-GP
5 NC#5
14 NC#14

GAP-CLOSE-PWR

C805
2SC411_LX

2SC411_BST 1
0R2J-2-GP

SC411_BST_L
1

U7

5
6
7
8

0R2J-2-GP

VCCA

R10

S
S
S
G

CPUCORE_ON 1

35,36,37 CPUCORE_ON

G41

C317
SC10U10V5ZY-1GP

1D25V_S0
Iomax=2A

EN

VOUT
VOUT

3
4

FB

3/6

DDR_VREF_S0

PM_SLP_S4#

R348
1

PM_SLP_S3#

R349

1
10
9
8
7
6

VIN
VDDQSNS
S5
VLDOIN
GND
VTT
S3
PGND
VTTREF VTTSNS

2
2

GAP-CLOSE-PWR
G13
1
2

Trace Length=3cm
Trace Width=5mils
KEMET NTD:5.615
Trace Resistance>80mohm
100uF, 4V, B2 Size
Iripple=1.1A, ESR=70mohm

Vo=0.8*(1+(R1/R2))

GAP-CLOSE-PWR
1

<Core Design>

TPS51100DGQR-GP

Wistron Corporation

C141
SC10U10V5ZY-1GP

1
2

74.51100.079

11

1
2

SCD1U16V2ZY-2GP

C143
SC10U10V5ZY-1GP
2

C138

DDR_VREF_S3

C327
SC22U10V6ZY-2GP

GAP-CLOSE-PWR
G12
1
2

1
2
3
4
5

GND

17,20,28,31,36,37
20,22,27,28,31,34,37
1

2
0R0402-PAD
2
0R0402-PAD

R301
68KR2F-GP

G14
1

C409
SC1U10V3ZY-6GP
C398
SC10U10V5ZY-1GP
U17

C328
R296
39KR2F-GP

5912_FB

SO-8-P

0D9V_PWR

APL5912-KAC-GP
74.05912.A71

1D8V_S3

5V_S3

GND

0D9V
Iomax=1A

1D25V_S0

2
8
0R0402-PAD

5
9

OCP=6A

Vo(cal.)=1.26V
VIN
VIN

R291

POK

7
0R2J-2-GP

SC33P50V2JN-3GP

PM_SLP_S3#

DY

2
R292

VCNTL

U50

DY

35,36,37 CPUCORE_ON

GAP-CLOSE-PWR

1
GAP-CLOSE-PWR

1D05V_S0

G45

GAP-CLOSE-PWR

D38
CH521S-30-GP-U1

C804
SC1U10V3ZY-6GP

G40
1

SCD1U25V3KX-GP
2
1

SC_VCC
2

GAP-CLOSE-PWR

5
6
7
8

1 2

12/18

G39
4

1D05V_PWR
1

GAP-CLOSE-PWR

DCBATOUT_SC411

5V_S5

DCBATOUT_SC411

G38
1

5V_S5
DCBATOUT

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

C140
SC10U10V5ZY-1GP
Title

0D9V_LDO/1D25V_LDO/1D05V
Size
A3

Document Number

Date: Tuesday, March 06, 2007


A

Rev

Pamirs

-1

Sheet
E

38

of

41

C310
1

D22
2

SCD1U25V3ZY-1GP
1
2
R282
15K4R2F-GP

AIRLINE_VOLT 31

AD<=17V, disable
charger function

R283
100KR2F-L1-GP

BAV99W-1-GP

DY
2

AD+

U3

R319
100KR2F-L1-GP

8
7
6
5

D
D
D
D

S
S
S
G

DCBATOUT

Rx1

12/7

R18

AD+_TO_SYS

1
2
3
4

1
2
3
4

D01R2512F-4-GP
MAX1909_PDL

AO4407-1-GP

U4
S
S
S
G

D 8
D 7
D 6
D 5

BT+

AO4407-1-GP
1

3D3V_S5

DY
C300
SCD1U25V3ZY-1GP

AD+ > 13V


ACOK is H

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G2

C94

DHI

23

MAX1909_DHI

DLO

20

MAX1909_DLO

PGND

19

BT_TH

PKPRES

PGND

29

CSIP

18

CSIN
BATT
GND

17
16
15

1
2

1
2

C324
SC10U25V0KX-3GP

1
2

SCD1U25V3ZY-1GP

4
3
2
1

D01R2512F-4-GP

IND-10UH-110-GP

12/14

G9
GAP-CLOSE-PWR

G8
GAP-CLOSE-PWR

EC4

C48
SC10U25V0KX-3GP

ACOK

EC152
SCD1U16V2ZY-2GP

U10
SI4800BDY-T1

R78
49K9R2F-L-GP

CLS

5
6
7
8

IINP

BT+

R51
2 CHG_PWR-3

DY

D
D
D
D

ACIN

CHG_PWR-2

DY

Rx2

L27

C81
SC1U10V3ZY-6GP

4 G
3 S
2 S
1 S

2
3

AC_OK

VCTL
ICTL
MODE

MAX1909_CLS 9

MAX1909_IINP

R307
1
2
31K6R2F-GP
Q3
2N7002PT-U

4CELL#

01/02

1
2

MAX1909_ACIN
MAX1909_LDO

31

Near MAX1909
Pin 21
MAX1909_DLOV

21

MAX1909_VCTL
11
MAX1909_ICTL 10
MAX1909_MODE
7
R63
49K9R2F-L-GP
DY

DY

U11
SI4431BDY-E3-GP

SCD1U25V3ZY-1GP
2

DLOV

1122
3

R75
0R2J-2-GP

R86
33R2J-2-GP

C45
SC10U25V0KX-3GP
2
1

22
28
2

C26

5
6
7
8

CSSN
DHIV
PDL
LDO

PDS
SRC
DCIN

MAX1909_PDS
27
AD+_TO_SYS 24
MAX1909_DC_IN
1

1
2

1
2
25

26
CSSP

1
2

SCD1U25V3ZY-1GP

1
2

U15

D
D
D
D

R308
100KR2F-L1-GP
DY

C90
1

SC1U10V3ZY-6GP

S
S
S
G

R64
0R2J-2-GP

C348

Near MAX8725
Pin 2

C97

MAX1909_DHIV

MAX1909_LDO

MAX1909_LDO

SCD1U25V3ZY-1GP

2/24
Close to
MAX1909
pin 24

K
RB521S-30-2-GP

C100AD+_TO_SYS
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP

2
D29
A

AD+

DCBATOUT

C101
SCD1U25V3ZY-1GP

C322
SC10U25V0KX-3GP

R318
19K1R2F-GP

2
1

AC_IN Threshold 2.089V Max.


AC_IN > 2.089V --> AC DETECT

G1

13
12
14

MAX8725_CSIP
MAX8725_CSIN

REF

BT+SENSE 40

C76
SCD01U16V2KX-3GP

MAX8725ETI-GP-U

3D3V_AUX_S5
1

MAX1909_CLS

ISOURCE_MAX =
(0.075/Rx1)*(VCLS/VREF) = 3.16A
So,Constant Power=18.5*3.16=58.46W (90%)

R81
100KR2J-1-GP
2

C80
SC1U10V3ZY-6GP

V_REF :4.2235V (<500uA)


R85
49K9R2F-L-GP

1
2

R87
36K5R3F-2-GP

31,40

BT_TH

C71

C69
SCD01U16V2KX-3GP
2
1

1
2

R62
20KR2F-L-GP

CCV
CCI
CCS

MAX1909_REF

SCD1U25V3ZY-1GP
2

C51

GAP-CLOSE-PWR

Detect adaptor
input current

MAX1909_CCV
MAX1909_CCI
MAX1909_CCS
R80
10KR2J-3-GP

SCD1U25V3ZY-1GP

AD_IA

G53
31

G54
1

GAP-CLOSE-PWR

KBC_3D3V_AUX

R322
100KR2J-1-GP
2

MAX1909_REF

27,31

D
Q24
2N7002-11-GP

2
2

MAX1909_ICTL

R312
43K2R2F-L-GP
2

2N7002DW-7F-GP
U51
4

DY
5

2
5

2N7002DW-7F-GP
U52
6

AC_OK

S
1

R58
100KR2F-L1-GP
31 CHG_4CELL

DY

DY

CHG_ON#

R310
86K6R3F-GP

31

R315
3K65R3F-GP

10/23

DY

AC_IN#

R317
100KR2F-L1-GP

R320
100KR2J-1-GP

SET CHG OFF :


BAT_CHG_I = (0.075/Rx2)*(VICTL/3.6)
LI BAT :
CHG_I_SET = H(6cell),
Charge current = 3.0A
CHG_I_SET = L(12cell),
Charge current = 5.0A

<Core Design>

Wistron Corporation

Pre-Charge :
MAX8725 : CHG_I_PRE_SEL = H,
Pre-Charge current = 300mA

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.
Title

CHARGER MAX8725ETI
31 CHG_I_PRE_SEL

31

Size
C

CHG_I_SEL

Document Number

Rev

-1

Akita 2.0

Date: Thursday, March 08, 2007


A

Sheet
E

39

of

41

Adaptor in to generate DCBATOUT

2
3
4
5

AD+
2

4K7R2J-2-GP
AD_JK
1

R1

2
IN

AD_OFF

1
C303
SCD1U25V3ZY-1GP

2
SCD1U25V3ZY-1GP

R2
31

8
7
6
5

C315
1

AD_OFF#

D
D
D
D

C299
SCD1U25V3ZY-1GP

PDTA124EU-1-GP
E
R288
100KR2J-1-GP

Q17

Q16

U47
S
S
S
G

AO4407-1-GP

R277
200KR2J-L1-GP
2
1

1
C311
SC1000P50V3JN-GP

SCD1U25V3ZY-1GP

1
2

C312
SCD1U25V3ZY-1GP

SCD1U25V3ZY-1GP
2

DY
EC53 EC9

SCD1U25V3ZY-1GP
2
1

20.80399.005

AD+_2

EC55

ACES-CON5-5-GP

1
2
3
4

AD+

R293

DCIN1
1

3 OUT

R1
1 GND
R2
DTC114EUA-1-GP

BATTERY CONNECTOR
3D3V_AUX_S5

7
1

D23

31
KBC_SCL0
31
KBC_SDA0
31,39
BT_TH

BAV99W-1-GP

BAV99W-1-GP

BAV99W-1-GP

G3
39

BT+SENSE

20.80345.006

BT_TH

2
GAP-CLOSE

KBC_SDA0

2
3
4
5
6
8

2
BT+

KBC_SCL0

C15
SCD1U25V3ZY-1GP

BAT1

3D3V_AUX_S5

3D3V_AUX_S5
D24

D25

C321
SC1000P50V3JN-GP

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title

AD/BATT CONN
Size
A3

Document Number

Rev

-1

Akita 2.0

Date: Wednesday, February 14, 2007

Sheet
1

40

of

41

12/18

SPR11
SPRING-18-U

SPR3
SPRING-18-U
SPR8
SPRING-18-U

SPR13
SPR12
SPRING-18-U

SPR7
SPR14

34.4F622.001

<Core Design>

DY
DY

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

1
1

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP
2

EC29 EC39

Size
A3

SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2

DY
DY
EC104 EC97

1D5V_S0

DY
DY
DY
DY
EC84 EC98 EC99 EC103

Date: Thursday, March 08, 2007


Sheet
E

41

SCD1U16V2ZY-2GP

SCD1U25V3ZY-1GP
2

1
1
1
1
1
1
1
1
1
1

SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP
2
SCD1U25V3ZY-1GP

2
SCD1U25V3ZY-1GP
2

EC66 EC62 EC17 EC60 EC32 EC70 EC14 EC80 EC81 EC36 EC23

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY
EC105
2

1
SCD1U25V3ZY-1GP
2

SCD1U25V3ZY-1GP

1
SCD1U25V3ZY-1GP
2

Document Number
of

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
2

DY
EC57 EC91 EC47 EC2

1D05V_S0

SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP

DY
DY
EC107 EC106

SCD1U16V2ZY-2GP

1
SCD1U16V2ZY-2GP
2

HOLE

2
SCD1U25V3ZY-1GP
2

SCD1U16V2ZY-2GP

34.4F622.001
SCD1U16V2ZY-2GP
2

SPR15
SPRING-18-U
1

DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
EC38 EC79 EC69 EC92 EC78 EC40 EC83 EC74 EC71 EC37 EC126 EC127 EC128 EC129 EC130 EC131 EC132 EC133 EC134
SCD1U16V2ZY-2GP
2

87.66383.251

SCD1U16V2ZY-2GP
2

For SKT2
1
EC33 EC30 EC31 EC68 EC76 EC67

H19

3/2

H18

SCD1U16V2ZY-2GP
2

87.66293.211 87.66383.251

DY

H16

SCD1U16V2ZY-2GP
2

H6
HOLE

DY
EC48 EC51 EC12 EC16 EC15

SCD1U16V2ZY-2GP
2

H29
H28
HOLE

H24
HOLE

1
SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP

2
SCD1U16V2ZY-2GP
2

AD+

H26

DY
DY
EC146 EC147 EC148

H5
HOLE

H15

1
SCD1U16V2ZY-2GP
2

H27

14

1
SCD1U16V2ZY-2GP
2

SCD1U16V2ZY-2GP

2
SCD1U16V2ZY-2GP
2

KBC_3D3V_AUX

TSLCX08MTCX-GP
7

11

H17

U61A

HOLE

13

HOLE

12

H9

H25

H22
HOLE

SSLVC08APWR-GP

HOLE

U36D

HOLE

3D3V_S5

SPR10
1

14

DY DY
DY
DY
EC142 EC143 EC144 EC145

SPRING-13-GP
SPR6
SPRING-18-U
HOLE

H3
1

H23

SPR5
SPRING-18-U
H8

DY

H21

H12
HOLE

HOLE

H4

HOLE

H11
1

H30

SSLVC08APWR-GP

HOLE

U36C

HOLE

HOLE

HOLE
3D3V_S5

SPR9
1

3D3V_S5

SPRING-24-GP SPRING-13-GP
1

2
SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY
EC140

SPR4
SPRING-18-U
1

H20

H7
HOLE

HOLE

14

SCD1U16V2ZY-2GP
2

5V_S3

SPR1
HOLE

HOLE

10

SPR2
SPRING-18-U
1

H10

HOLE

H14

H2

HOLE

H13
HOLE

HOLE

H1

DY

SCD1U16V2ZY-2GP
2

3D3V_AUX_S5

DY
DY
DY
EC135 EC136 EC137 EC138
SCD1U16V2ZY-2GP
2

A
E

DCBATOUT

DY
DY
DY
DY
EC54 EC109 EC110 EC111EC112 EC113 EC114 EC115 EC116

3D3V_S5

2
3

DDR_VREF_S0
1D8V_S3

DY
DY
EC102 EC100

DY
5V_S0

DY
DY
DY
DY
DY
DY DY
DY
DY
DY
DY
EC35 EC75 EC117 EC118 EC119 EC120 EC121 EC122 EC123 EC124 EC125

87.66383.251

DY
3D3V_S0
2

SPRING-24-GP

12/15

SPRING-24-GP SPRING-24-GP
5V_AUX_S5
DY
EC151
SCD1U16V2ZY-2GP

Title

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

MISC
Pamirs
Rev
41

-1