VLSI Arithmetic

Lecture 9: Multipliers Prof. Vojin G. Oklobdzija University of California

http://www.ece.ucdavis.edu/acsel

Multiplication Algorithm*

*from Parhami
2 11 May 2004

Multiplication Algorithm*

*from Parhami
3 11 May 2004

Multiplication Algorithm*

*from Parhami
4 11 May 2004

*from Parhami
5 11 May 2004

Multiplication*

*from Parhami
6 11 May 2004

Multiplication*

*from Parhami
7 11 May 2004

*from Parhami
8 11 May 2004

*from Parhami
9 11 May 2004

Multiplier Recoding*

*from Parhami

10

11 May 2004

*from Parhami
11 11 May 2004

Multiplication by Constants

*from Parhami
12 11 May 2004

Multiplication by Constants

13

*from Parhami
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Fast Multipliers

14

*from Parhami
11 May 2004

Using Higher Radix Multiplier

15

*from Parhami
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Using Higher Radix Multiplier

16

*from Parhami
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Higher Radix Multiplier

*from Parhami
17 11 May 2004

*from Parhami
18 11 May 2004

Booths Recoding

*from Parhami
19 11 May 2004

Booths Recoding

*from Parhami
20 11 May 2004

Booths Recoding

*from Parhami
21 11 May 2004

*from Parhami
22 11 May 2004

Modified Booth Recording Implementation Multiplicand Y

-2Y

-Y

2Y

Multiplier

Encoding

Selectors

11 May 2004

Multiplier Design

23

Higher Radix Multipliers

*from Parhami
24 11 May 2004

Tree and Array Multipliers

*from Parhami
25 11 May 2004

Tree and Array Multipliers

26

*from Parhami
11 May 2004

Tree Multipliers

*from Parhami
27 11 May 2004

Tree Multipliers

*from Parhami
28 11 May 2004

Generating Partial Products

29

*from G. Bewick

11 May 2004

Generating Partial Products

*from G. Bewick

30

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Generating Partial Products using Booths Recoding

*from G. Bewick
31 11 May 2004

Generating Partial Products using Booths Recoding

*from G. Bewick
32 11 May 2004

Booth Partial Product Selector Logic

*from G. Bewick
33 11 May 2004

Radix-2 Booth Recoded Multiplier with Negative Partial Products

*from G. Bewick
34 11 May 2004

Radix-2 Booth Recoded Multiplier with Summed Sign Extension

*from G. Bewick
35 11 May 2004

Radix-2 Booth Recoded Multiplier with Summed Sign Extension

*from G. Bewick
36 11 May 2004

Radix-2 Booth Recoded Multiplier with Summed Sign Extension and Reduced Logic Depth

*from G. Bewick
37 11 May 2004

Complete Signed Radix-2 Booth Recoded Multiplier

*from G. Bewick
38 11 May 2004

Tree Multipliers

*from Parhami
39 11 May 2004

Reduction using 4:2 Compressors

*from G. Bewick

40

11 May 2004

Tree Multipliers

*from Parhami
41 11 May 2004

Multiplier Placement in a Standard Grid Topology

*from G. Bewick
42 11 May 2004

Floor Plan of a Multiplier

*from G. Bewick
43 11 May 2004

Delay Components of a Booth Recoded Parallel Multiplier

*from G. Bewick
44 11 May 2004

Hollywood

THE END

11 May 2004

Multiplier Design

46