GOPALAN COLLEGE OF ENGINEERING AND MANAGEMENT

Department of ECE - Course Plan

Name 5 Name Name No. of of the Course: BE of the Subject and Subject Code: Analog Electronics circuits - 10EC32 of the Course Instructor: KAVITHA M.V input sessions: 52 Maximum Marks: 100 IA Marks: 25
Cla ss es 1 2 3 1 Topics Planned & Brief objectives Reference/ text/ Journals/ web etc. Date on which planned 02.08.12 03.08.12 06.08.12 07.08.12 09.08.12 10.08.12 Date execut ed Deviat ion reaso ns thereo f How made good & date Remarks and observati ons of HoD & Principal

Semester:

S. No .

Units as per Syllbus

Diode circuits:Diode Resistance, Diode equivalent circuits, Transition and diffusion capacitance, Reverse recovery time, Load line analysis, Rectifiers, Clippers a clampers

1. Electronic
Devices and Circuit Theory, Robert L. Boylestad and Louis Nashelsky, PHI/Pearson Eduication. 9TH Edition.

UNIT - 1

4 5 6

2.

14.08.12 1 2

Transistor Biasing: Operating point, Fixed bias circuits, Emitter stabilized biased circuits Voltage divider biased, DC bias with voltage feedback, Miscellaneous bias configurations, Design operations, Transistor switching networks PNP transistors, Bias stabilization.
16.08.12 17.08.12 21.08.12 &23.08.1 2 24.08.12 27.08.12

UNIT - 2

3 4 5 6 7

Power Amplifiers: Definitions and amplifier types,

1. 2. 3. 3 28.08.12 30.08.12 31.08.12 03.09.12 04.09.12 06.09.12

series fed class A amplifier Transformer coupled Class A amplifiers, Class B amplifier operations, Class B amplifier circuits, Amplifier distortions. Amplifier distortions. Oscillators: Oscillator operation, Phase shift Oscillator Phase shift Oscillator Wienbridge Oscillator Tuned Oscillator circuits Tuned Oscillator circuits Crystal Oscillator FET Amplifiers: FET small signal model, FET Biasing of FET, Common drain common gate configurations, MOSFETs, MOSFETs, amplifier networks. amplifier networks. Transistor at Low Frequencies: BJT transistor modeling, CE Fixed bias configuration,

UNIT - 6
4. 5. 6. 7. 1. 2. 3.

07.09.12 10.09.12 11.09.12 13.09.12 14.09.12 17.09.12 18.09.12 20.09.12 21.09.12 27.09.12 28.09.12 01.10.12 &04.10.1 2 05.10.12 08.10.12 09.10.12

UNIT 7

4. 5. 6 1. 2. 3. 4. 5. 6 7

UNIT - 8 INTRODUCTI ON TO ERROR CONTROL CODING

UNIT - 3

1. 2.

3. 4. 5. 6.

Voltage divider bias, Emitter follower, CB configuration, Collector feedback configuration Analysis of circuits re model; analysis of CE configuration using h- parameter model, Relationship between hparameter model of CE,CC and CE configuration.

11.10.12 12.10.12 16.10.12

18.10.12

7.

S. No .

Units as per Syllbus

Cla ss es 1. 2. 3. 4.

Topics Planned & Brief objectives

Reference/ text/ Journals/ web etc.

Date on which planned 19.10.12 22.10.12 25.10.12 29.10.12 30.10.12 02.11.12 05.11.12 06.11.12

Date execute d

Deviatio n reasons thereof

How made good & date

Remarks and observat ions of HoD & Principal

(a) General Amplifiers: Cascade connections, Cascode connections, Darlington connections. (b) Feedback Amplifier: Feedback concept, Feedback connections type, Practical feedback circuits. Design procedures for the feedback amplifiers. Transistor Frequency Response: General frequency considerations, Low frequency response Miller effect capacitance, High frequency response,

UNIT - 5

5. 6. 7. 1. 2. 3.

08.11.12 09.11.12 13.11.12 15.11.12 16.11.12

UNIT - 4

4. 5. 6.

multistage frequency effects. multistage frequency effects.

Signature of the Faculty

HOD

Principal