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Name:hiei\ii? [, ll T t Device
Determinethis Device'soutput for the conditionsgiven below:
A i r . s i t ^
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Fxx,y.,z) F3(X,,Y,,L',) F . { 4 )
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F1(X,y,Z)
= i A " 8* e
fr,+ $-Z
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F2(X,y,Z) - Fl NAND Z
(d) Fill in the Truth Table for the following Booleanfunction: (HINT. If you needmore than I minute to do this, comeback to it later.)
F,(x,y, - (x.y.z)+(X.f.z)+(X.y.z) z)
lc 1 -'6 f i - rf I
EEICPE i)9
2012-Midterm #1 Spring
n Use as few gatesas possible(butdo not try to reducethisexpression further). gatesare o Every one of yourlogicgates must have4 inputs (no 1, 2 or 3-input youaredoingwith anyunusedgateinputs! what Be available). sureto indicate (i.e.74xx138), lC pin#'s are notrequired. & (U1 iC f,r's , U2),lC identifiers
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K- },IA , P
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3) [25 points] Using the K-Maps below, determine the indicated minimized form of the mapped logic functions. Show vour sroupings in the K-Maps.
cD
A
FI
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0
ol
ll
lo
C D
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n rB * D .) { a * b * A \ [, c " - [ + n
. [ n * B + z .) ( L + D + f t ) [ t r+ B + D )
-5-
(d) Show the K-Map groupines you would use to create the Best HazardFree Minimum Sum-of-Products Logic Expressions for the same function F3as in Part (a) [below left *]; and for new function F5 [below right 9]:
\c
etc etc etc.
cD
A
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t"t". in theusualorder
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=l---\l
l--l
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0 0 ( 1 0
00
etc etc etC.
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l l
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(You do NOT have to detetmine the Hazard-Free Logic Expressions. Just show the K-Map groups you would use to creqte theseexpressions.)
(e) Using the K-Map for F3(A,B,C,D)[aboveleft 6], write out a Truth Table for the logic function F3:
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4) [20 points] Perform the following number conversions. You may assume the numbers are all positive (unsigned) integers.
( (a) (22)rc2 L l ( Y t l z \
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1 o l { o
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(b) (44)n: (
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EF,ICPEl29 Spring2012Midterm#1
A
F(A,B,C,D)
(a) Write a Boolean logic expression for the output function F(A,B,C,D) fiom the circuit above,in a form that exactlv matches the implementation shown above. (You should NoT simplify or minimize the expressions.) Your answershould make it obvious exactly what tlpe of logic gateswere actually used above.
( A * E"l
F"inu;1(A,B,C,D) :
' ( B ' r . ).
7 i i ^ , - i l l
T '
ll\+lJ)'IHt*tj'v
b) Write a standard version of the Boolean logic function F in sum-of-products or productpI-Sg4t!-fo@, using Boolean Algebra theorems(DeMorgan's, etc.) and propertiesto accomphsh the requiredtransfotmation,(Createan expressionthat only usesAND' OR, and singleSHQW HOW YOU variable NOT operations,no NAND, NOR, XOR, XNOR terrns all^owed).
ARRIVEDATYqURANSWER.
I =*----::U-a-
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F"6r4ur4(A,B,C,D) =
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(a) The Timing Diagram below shows the operation of the circuit drawn above. Using the Timing Diagram, determine the missing values for the various gate propagation delays in the table below. (You do NOT needto label theseon the diagram.) (Assumethat the input signalshavebeen steadyat their prior initial values shown for )> 2Onsec. to the beginning of this diagram.) Gate:
toHL
toLII
AND
l0 5 nsec nsec
XOR
-7-S
nsec
nsec
X Y :
H
Z L
F
0 10
15
20
25
30
35
40
45 nsec
Problem
Score
Max
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)
ltLO
3 4
5
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()
6 Total
q q
12 20 25 20 15 8 100