CHAPTER 1

EMBEDDED SYSTEM

Combination of Software and hardware, designed to perform a particular task. Examples : Printer, Timers, Remote controls, Digital locks, Lighting control, Key-

board.

COMPONENTS:
Embedded system is a combination of hardware and software. Hardware may be a linear or digital integrated circuit. Software part consists of any the languages that is may be machine level or assembly

level or high level language.

CHARACTERISTICS:
Perform a single set of functions. Works in a time constrained environment. Provides high performance and reliability. Mostly embedded systems have low cost because they are mass produced in millions. Some embedded systems have mechanical moving parts like disk drives as they are

less reliable as compared to solid state parts such as flash memory.

HARDWARE

Digital Circuits Digital Circuits Decoder, latches Decoder, latches etc. etc. Passive Passive components components Resistance, Resistance, Capacitance, Capacitance, Transistors etc. Transistors etc. Hardware Hardware

Analog Circuits Analog Circuits OPAMP, ADC, OPAMP, ADC, DAC DAC etc. etc.

Printed Printed Circuit Circuit Boards Boards (PCBs) (PCBs)

ElectroElectromechanical mechanical Motors, Motors, Valves etc. Valves etc.

Fig 1.1

SOFTWARE

Machine Machine Language Language

Java/J2EE Java/J2EE

Software Software

Assembly Assembly Language Language

Embedded C, Embedded C, C++ C++

Fig 1.2

1.3 GOAL OF STUDY: To study the various components of Embedded Systems, their implementation, architecture and applications, was the main goal of this training. 1.4 APPLICATIONS OF EMBEDDED SYSTEMS:
Automatic teller machines (ATM). Avionics, such as inertial guidance systems, flight control hardware/software and othCellular telephones and telephone switches. Engine controllers and antilock brake controllers for automobiles. Home automation products, such as thermostats, air conditioners, sprinklers, and seHousehold appliances, including microwave ovens, washing machines, television Handheld computers.

er integrated systems in aircraft and missiles.

curity monitoring systems. sets, DVD players.

Video game consoles. Even computer peripherals themselves such as routers and printers have embed-

ded processors.

Fig. 1.3

EMBEDDED PRESENCE IN INDUSTRY:

TELECOM: To have attractive, easy-to-use, multi functional devices, or to have

the most reliable infrastructure where system down time is never issue are just some of hurdles the telecommunications sector is facing today.

INDUSTRIAL AUTOMATION:

Fig 1.4

Fig 1.5

ROBOTICS:

Fig 1.6

OTHER APPLICATIONS:

Fig 1.7

10

CHAPTER 2

INFORMATION ABOUT THE COMPANY

INCOS INFOTECH is a professional training and development firm situated in Haryana. INCOS INFOTECH, founded in 2012, is a company specializing in Embedded System, Test and measuring service, utility operation and maintenance support service. Their project support includes both domestic and commercial projects. INCOS INFOTECH team comprises leading edge technologist and business experts with extensive experience in product and software development, implementation and system integration. Their schedules for educational programs are Industrial Training Programs Six weeks Six months Embedded System Design Digital Signal Processing Micro Controller Design

MICROCONTROLLER BASED DESIGN Introduction Architecture Assembly Based Designs Interfacing with Devices Tools

Keil ,Multi Sim & Ulti Board. EMBEDDED SYSTEM DESIGN

Introduction Architecture Theory of Embedded System Design Implementation Strategies

11

CHAPTER 3 MICRONTROLLER 3.1 INTRODUCTION

Microcontrollers are single chip computers. The Intel 8051 is a single chip microcontroller (C) which was developed by Intel in 1980 for use in embedded systems. Intel's original versions were popular in the 1980s and early 1990s, but has today largely been superseded by a vast range of faster and/or functionally enhanced 8051-compatible devices manufactured by more than 20 independent manufacturers including Atmel, Infineon Technologies (formerly Siemens AG), Maxim Integrated Products (via its Dallas Semiconductor subsidiary), NXP (formerly Philips Semiconductor), Winbond, ST Microelectronics, Silicon Laboratories (formerly Cygnal), Texas Instruments and Cypress Semiconductor. Intel's official designation for the 8051 family of Cs is MCS 51.Intel's original 8051 family was developed using NMOS technology, but later versions, identified by a letter "C" in their name, e.g. 80C51, used CMOS technology and were less power-hungry than their NMOS predecessors - this made them eminently more suitable for battery-powered devices.

3.2 IMPORTANT FEATURES

It provides many functions (CPU, RAM, ROM, I/O, interrupt logic, timer, etc.) in a

single package . 8-bit data bus - It can access 8 bits of data in one operation (hence it is an 8-bit

microcontroller). 16-bit address bus - It can access 216 memory locations - 64 kB each of RAM and

ROM . On-chip RAM - 128 bytes ("Data Memory") On-chip ROM - 4 kB ("Program Memory"). Four byte bi-directional input/output port. UART (serial port). Two 16-bit Counter/timers. Two-level interrupt priority.

12

3.3 RELATED PROCESSORS

The 8051's predecessor, the 8048, was used in the keyboard of the first IBM PC, where it converted keypresses into the serial data stream which is sent to the main unit of the computer. The 8048 and derivatives are still used today for basic model keyboards.The 8031 was a cut down version of the original Intel 8051 that did not contain any internal program memory (ROM). To use this chip external ROM is to be added that will contain the program that the 8031 will fetch and execute.The 8052 was an enhanced version of the original Intel 8051 that featured 256 bytes of internal RAM instead of 128 bytes, 8 kB of ROM instead of 4 kB, and a third 16-bit timer. The 8032 had these same features except for the internal ROM program memory. The 8052 and 8032 are largely considered to be obsolete because these features and more are included in nearly all modern 8051 based microcontrollers.

Fig. 3.1

13

DIFFERENCE BETWEEN P & C

MICRPROCESSOR
1. Contains no on chip RAM, ROM, I/O, TIMER, Serial port . 2. Used in General Purpose applications 3. Dont provide data storage facility. 4. The structure of uP is as given below
Data Bus CPU Gene ral purp ose uP R A M R O M I/ O
TIM ER SE RIA L CO M PO RT

MICRCONTROLLER
1. Contains on chip RAM, ROM, I/O, TIMER, Serial port . 2. Used in Specific Purpose applications 3. Provides data storage facility. 4. The structure of uC is as given below
CPU RAM ROM

I/O

TIMER

SERIAL
COM PORT

Address Bus

Table 3.1 In short microcontroller can be defined as: True computer on a chip. Specific-purpose digital computers. Design incorporates all the features of a microprocessor like ALU, PC, SP and regis-

ters along with RAM ROM, parallel I/O, serial I/O,, timers, clock circuits ADC etc.

3.4 TYPES OF MICROCONTROLLER: 4 BIT MICROCONTROLLERS: It is the most popular microcontroller made in terms
of production. It is most economical and cheaper. It is mainly applicable to toys and small appliances.

8 BIT MICROCONTROLLERS:It represents the transition zone between dedicated,

high volume, 4 bit microcontrollers and the high performance 16 bit microcontrollers. 8-bit

14

word size adequate for many computing tasks and control or monitoring applications it is applicable to simple appliances control, high speed machine control, data collection etc.

16 BIT MICROCONTROLLERS: It provides faster and more sophisticated calculations. It is applicable to control of servomechanisms like robot arms.

32 BIT MICROCONTROLLERS: The design emphasis is more on high speed computation features and not on chip features like RAM, ROM, and Timers etc. it is applicable to robotics, highly intelligent instrumentation, avionics, image, processing, telecommunications, automobiles Example: Intel 80960, ARM

3.5 8051 ARCHITECTURE

The 8051 family is one of the most common microcontroller architectures used worldwide. 8051 based microcontrollers are offered in hundreds of variants from many different silicon manufacturers. The 8051 is based on an 8-bit CISC core with Harvard architecture. The 8051 family is one of the most common microcontroller architectures used worldwide. 8051 based microcontrollers are offered in hundreds of variants from many different silicon manufacturers. The 8051 is based on an 8-bit CISC core with Harvard architecture

3.6 BLOCK DIAGRAM OF 8051

15

EXTERNAL INTERRUP TS INTERRU PT CONTRO L ONCHI P FLA SH ETC. ON CHIP RAM TIMER1 TIMER0 COUNTER INPUT

CPU
BUS CONTRO L SERIAL PORT

OSC

4 I/O PORTS

P0

P2 P1 P3

TXD RXD

ADDRESS/DA TA

Fig 3.2

16

3.7 PIN DIAGRAM

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD) P3.0 (TXD) P3.1 (INT0) P3.2 (INT1) P3.3 (T0) P3.4 (T1) P3.5 (WR) P3.6 (RD) P3.7 XTAL2 XTAL1 GND

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21

Vcc P0.0 (AD0) P0.1 (AD1) P0.2 (AD2) P0.3 (AD3) P0.4 (AD4) P0.5 (AD5) P0.6 (AD6) P0.7 (AD7) EA/VPP ALE/PROG PSEN P2.7 (A15) P2.6 (A14) P2.5 (A13) P2.4 (A12) P2.3 (A11) P2.2 (A10) P2.1 (A9) P2.0 (A8)

Fig 3.3

PIN DESCRIPTION Port 1- Pins (1-8)

: Input/output pins. Contains internal pull-ups.

Port 3- Pins (10-17)

Input/output pins. Contains internal pull-ups. Alternate functions to provide signals such as interrupts.

17

Port 2- pins (21-28)

Input/output port.

Contains internal pull-ups. Used both as I/O port and higher address byte.

Port 0- Pins (32-39):

Input/output pins. Required external Pull- up resisters of 10 k. Used both as I/O port and higher address byte.

PSEN- (pin 29): Program store enable

Active low input Used while accessing external memory. Connected to OE pin of external ROM.

Fig 3.4

ALE- (pin 30) : Address Latch Enable

18

Active high. Used for de-multiplexing the address and data by connecting G pin of the 74LS373.

EA - (pin 31):
Active low input. To access external ROM, it must be GND.

XTAL1and XTAL2 - (pin 19 and pin 18):

Provides clock to quartz crystal oscillator.

RST- (pin 9): Reset

Active high input. Terminate all activities of uc. Sets PC to 0. Requires minimum 2 machine cycles.

VCC - (pin 40). GND (pin 20). 3.8 GENERAL PURPOSE REGISTERS : Registers (R0-R7) Set of 8 auxiliary registers, namely R0, R1, and R7. Data Pointer (DPTR): Made of two 8-bit registers, namely DPH and DPL, Used to
furnish memory address for internal and external code access and external data access.

Program Counter (PC): 16-bit register holds the address of the next program instruction to
be executed, automatically Incremented after each instruction fetch.

Stack Pointer (SP):

top of the stack.

8-bit register, used to hold an internal RAM Address called the

3.9 SPECIAL FUNCTION REGISTER:

SFR lies between 80 to FF hex. Not all address space of 80 to FF is used by SFR. The unused locations 80H to FFH are reserved & must not be used By the programmer. 16 addresses are bit addressable. Arithmetic Instruction. Logical Instruction.

19

Branching Instruction. Data movement Instruction. Variety of addressing modes. 6 interrupt sources.

TYPES: CPU REGISTER:

ACC : Accumulator.

PSW : Program Status Word. SP : Stack Pointer.

DPTR : Data Pointer (DPH, DPL).

INTERRUPT CONTROL:
IE IP : Interrupt Enable. : Interrupt Priority.

I/O PORT:
P0 P1 P2 P3 : Port 0. : Port 1. : Port 2. : Port 3.

TIMERS:
TMOD : Timer mode. TCON : Timer control. TH0 TL0 TH1 TL1 : Timer 0 high byte. : Timer 0 low byte. : Timer 1 high byte. : Timer 1 low byte.

SERIAL I/O:
SCON : Serial port control. SBUF : Serial data registers.

OTHER:
PCON : Power control & misc.

A, B registers:

A (Accumulator):
8-bit register & used as working register.

20

Can be used as general purpose register. Necessary for some instructions.

B registers:
8-bit register and can be used as general purpose Register. Necessary for the instructions MUL and DIV.

PSW: Program Status Word CY AC F0

CY AC F0 RS1 RS0 OV P : :

RS1

RS0
: : :

OV

---- P

Carry Flag. Auxiliary Carry Flag. Flag 0 (available for user).

Register Select 1. Register Select 0. : : Arithmetic Overflow Flag. Accumulator Parity Flag.

SP: Stack Pointer

8- bit Register used to store the address of stack. As the data is pushed in the stack ,the stack pointer will Increment. As the data id popped from the stack, the stack pointer will Decrement. Effected by subroutine call, Interrupt triggering & PUSH, POP instruction.

DPTR: Data Pointer

16- bit Register used to store the address of the 8-bit data in program memory. Consist of a high byte (DPH) and a low byte (DPL). May be manipulated as a 16 bit register or as two Independent 8-bit registers.

Used in Index addressing mode.

GATE C/T Timer 1 M1 M0 Timer 0 GATE C/T M1 M0

3.10 TMOD: Timer Mode Register

GATE: Permits IN TX pin to enable/disable counter.

C/T: Set for counter operation, reset for timer operation.

M1, M0:

00: Emulate 8048 counter/timer (13-bits).

21

01:16-bit counter/timer. 10: 8-bit auto-reload mode 11: Timer 0 = two 8-bit timers. Timer 1 Counting disabled. Timing function allowed. It can be used as Baud Rate generator.

TIMER MODE
Timer Mode 0: Emulates 8048 counter/timer (13-bits). 8-bit counter (TL0 or TL1). 5-bit presales (TH0 or TH1).

Timer Mode 1: Timer Mode 2:

Simple 16-bit counter. 8-bit auto-reload. Counter in TL0 or TL1.

Timer Mode 2:

Split timer mode.

3.11 TCON: Timer Control Register TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
TF1, TF0: Overflow flags for Timer 1 and Timer 0. TR1, TR0: Run control bits for Timer 1 and Timer 0. Set to run Reset to hold. IE1, IE0 : Edge flag for external interrupts 1 and 0. Set by interrupt edge, cleared when interrupt is processed. IT1, IT0 : Type bit for external interrupts. Set for falling edge interrupts, reset for 0 level interrupts.

3.12 SCON: Serial Control Register SMO SM1 SM2 REN TB8 RB8 TI RI
SM0, SM1 = Serial Mode: 00 = Mode 0 : Shift register I/O expansion. 01 = Mode 1 : 8-bit UART with variable baud rate. 10 = Mode 2 : 9-bit UART with fixed baud rate. 11 = Mode 3 : 9-bit UART with variable baud rate. SM2 : Mode 0 : Not used. Mode 1 : 1 = Ignore bytes with no stop bit. Mode 2,3: 0 = Set receive interrupt (RI) on all bytes.

22

REN = Enables receiver. TB8 = Ninth bit transmitted (in modes 2 and 3). RB8 = Ninth bit received: Mode 0 : Not used. Mode 1 : Stop bit. Mode 2, 3: Ninth data bit. TI = Transmit interrupt flag. RI = Receive interrupt flag.

EA

----

----

ES

ET1

EX1

ET0

EX0

EA: Global interrupt enable. ES: Serial interface. ET1: Timer 1. EX1: External interrupts 1. ET0: Timer 0. EX0: External interrupts 0. 0 = Disabled. 1 = Enabled.

IP: Interrupt Priority Register

----PS PT1 PX1 PT0 PX0 --------PS PT1 PX1 PT0 PX0 : Serial interface. : Timer 1. : External interrupts 1. : Timer 0. : External interrupts 0.

0 = Low priority. 1 = High Priority.

23

CHAPTER 4 INTERRUPTS 4.1 Interrupt Structure

The 80C51 and its ROMless and EPROM versions have 5 interrupt sources: 2 external interrupts, 2 timer interrupts, and the serial port interrupt. What follows is an overview of the interrupt structure for the device. More detailed information for specific members of the 80C51 derivative family is provided in later chapters of this users guide.

Interrupt Enables
Each interrupt source can be individually enabled or disabled by setting or clearing a bit in the SFR named IE (Interrupt Enable). This register also contains a global disable bit, which can be cleared to disable all interrupts at once.

4.2 Interrupt Priorities

Each interrupt source can also be individually programmed to one of two priority levels by setting or clearing a bit in the SFR named IP (Interrupt Priority). A low-priority interrupt can be interrupted by a high-priority interrupt, but not by another low-priority interrupt. A highpriority interrupt cant be interrupted by any other interrupt source. If two interrupt requests of different priority levels are received simultaneously, the request of higher priority is serviced. If interrupt requests of the same priority level are received simultaneously, an internal polling sequence determines which request is serviced. Thus within each priority level there is a second priority structure determined by the polling sequence. The IE and IP registers and the polling sequence work to determine which if any interrupt will be serviced. In operation, all the interrupt flags are latched into the interrupt control system during State 5 of every machine cycle. The samples are polled during the following machine cycle. If the flag for an enabled interrupt is found to be set (1), the interrupt system generates an LCALL to the appropriate location in Program Memory, unless some other condition blocks the interrupt. Several conditions can block an interrupt, among them that an interrupt of equal or higher priority level is already in progress.

24

The hardware-generated LCALL causes the contents of the Program Counter to be pushed into the stack, and reloads the PC with the beginning address of the service routine. As previously noted, the service routine for each interrupt begins at a fixed location. Only the Program Counter is automatically pushed onto the stack, not the PSW or any other register. Having only the PC automatically saved allows the programmer to decide how much time should be spent saving other registers. This enhances the interrupt response time, albeit at the expense of increasing the programmers burden responsibility. As a result, many interrupt functions that are typical control applications toggling a port pin for example, or reloading a timer, or unloading a serial buffer can often be completed in less time than it takes other architectures to complete.

25

Chapter - 5 ADDRESSING MODES 5.1 IMMEDIATE ADDRESSING MODE:

The operand comes immediately after the opcode. Immediate data must be preceded by the pound sign (#). Can be used to load information into any of the registers and memory locations. MOV 30H, #23H MOV A, #25H MOV R0, #65H

5.2 REGISTERS ADDRESSING MODES:

Involves the use of registers to hold the data to be manipulated. MOV A, R0 MOV R1, A MOV A, R6

5.3 DIRECT ADDRESSING MODE:

The data in the RAM memory location and whose address is known. The address is given as apart of instruction. MOV 30H, A : Save content of A in RAM. MOV R0, 24H MOV A, 28H

5.4 REGISTER INDIRECT ADDRESSING MODES:

A register is used as a pointer to the data. As the register hold the address of RAM location they must be proceeded by @ sign. Only register R0, R1 are used for this purpose. MOV A, R0; Move the content of Ram location whose address is Held by R0 into A. MOV @R1, B; Move contents of B into RAM location whose Address is held by R1.

26

5.5 INDEXED ADDRESSING MODE:

Used in accessing data elements of look-up table located in ROM space. The 16-bit register DPTR and ACC are used to form the address of data element stored on a chip ROM. The instruction used foe this purpose is MOV A, @A+DPTR

27

CHAPTER 6 PUBLIC GARDEN AUTOMATION INTRODUCTION:

The most important problems faced are the misuse of electricity and its wastage. Sometimes due to carelessness of the authorities and the workers lamps are left ON which results in wastage of electricity. Water wastage is another problem which needs to be dealt with. Our project helps to overcome all these problems. Firstly the Microcontroller around 4.00pm switches on the water supply once to water the entire garden few hours before opening of the garden for public. Next the gate is opened by running the motor which is driven by a motor driver operated by the Microcontroller. At around 6.00pm the lights are switched on depending upon the output of the LDR and the lights remain functional till the garden remains open for visitors. The garden remains open for about three hours and so around 8.50 pm a buzzer is sounded to indicate closure of the garden and alert the visitors. The gate is then closed at 9.00pm and three of the four lamps are switched off. One lamp is kept on throughout the night. In the morning the remaining lamp is switched off as the depending upon the signal sent by the light dependent resistor to the Microcontroller. These are the step involved in the operation of the circuit and the public garden automation. Microcontroller is used to supervise the actions of all other devices and to control the entire set of operations.

28

BLOCK DIAGRAM

Alarm

LCD

Motor driver

Microcontroller Relays

Fig 6.1

29

Circuit Description

The system consists of five sections namely power supply section, microcontroller circuit, relay section, motor driver circuit and alarm circuitry.

1. Power Supply Section

The power supply circuit is made to provide 6V regulated power supply. First the 230V ac is stepped down to 12V ac by using a 230V primary to 12-0-12V secondary transformer. This 12V ac is rectified using a bridge rectifier. This dc is then fed to the positive voltage regulator ICs 7806 which will provide 6V regulated power supply.

2. Microcontroller circuit
Here we have used microcontroller AT89S52. All the ports of controller is configured as an output ports. The microcontroller controls all the relays and the motor driver and LCD. The LCD is used to display the time at which an event will occur such as switching ON the lights, opening the gates, etc. Relays will be activated/ deactivated to switch on/off the lights or the pump. The relays are connected to P0.0 pin of the microcontroller through relay driver.

3. Motor Driver Section

The motor driver circuit consists of an L293D IC which is a dual motor driver IC and consists of two H- Bridges to control the motion of two motors. Here we are using only single section of the two.

4. Alarm Section
The alarm section consists of a piezoelectric buzzer. The buzzer will produce sound to give indication that gate is to be closed shortly.

30

5.Relay: It is used to control the flow of water in the garden just like any simple valve and is
driven by a relay driver.

Source Code
The source code for the microcontroller is written in C language and is compiled using the popular C compiler keil uvision3.

31

CIRCUIT DIAGRAMS

1. Main Circuit

VCC 6V C3 U2 R2 8 .2 k J1 U1
V C C4 0 P0B0A30 D8 P0B1A31 D9 P0B2A32 D7 P0B3A33 D6 P0B4A34 D5 P0B5A35 D4 P0B6A36 D3 P0B7A37 D2 E A V P3 1 P ALEPR3G O0 29 PSEN P2B7A25 18 P2B6A24 17 P2B5A23 16 P2B4A22 15 P2B3A21 14 P2B2A20 13 P 2 B 1 A292 P 2 B 0 A281 2 3 4 5 6 7 8 9

R1 1 X 8 S IP 10k X1
IO1 O1 I IO2 O2 I

1 0 u FK e y = S p a c e
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

B U ZZER 200 Hz

P1B0T2 P1B1T2EX P1B2 P1B3 P1B4 P1B5MOSI P1B6MISO P1B7SCK RST P3B0RXD P3B1TXD P3B2INT0 P3B3INT1 P3B4T0 P3B5T1 P3B6WR P3B7RD XTAL2 XTAL1 GND

MOTOR SECTION X2
IO1 O1 I IO2 O2 I IO3 O3 I

8052

AC INTERFACE X3
IO1 O1 I IO2 O2 I IO3 O3 I IO4 O4 I IO5 O5 I IO6 O6 I IO7 O7 I IO8 O8 I IO9 O9 I IO10 10 IO IO11 11 IO

C1 22pF C2 22pF X1 H C -4 9 /U _ 1 1 M H z

LCD module

Fig 6.2

32

2. LCD Module circuit

Fig 6.3

33

3. Motor driver circuit

VCC 5V

IO1 U3 IO2 S1 MOTOR

M

L293D

Fig 6.4

34

4. Relay circuit

VCC 12V

K1 IO1 U4 ULN2003_DIP16 IO2

1 2 3 4 5 6 7 9 IN1 IN2 IN3 IN4 IN5 IN6 IN7 COM GND 8 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 16 15 14 13 12 11 10 K K

K2

IO3

K3
K

Fig 6.5

35

5. Power supply

Fig 6.6

36

PCB AND COMPONENT LAYOUTS Main board

Fig 6.7

Fig 6.8

36