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RVS SCHOOL OF ENGINEERING

Department of Biomedical Engineering

Lab Manual

BM 2209 - Electronic Circuits Lab

Prepared by M.MANTHIRALAKSHMANAN AP/BME

BM 2209 ELECTRONIC CIRCUITS LABIII sem BME

1. Rectifiers HWR and FWR (with & without capacitor filter) 2. Zener diode as regulator 3. Study of biasing circuits a. i). Fixed bias, ii). Self bias, iii). collector to base bias 4. FET amplifier 5. Differential amp CMRR and determination of Gain 6. Design of RC coupled amplifier 7. Design of Voltage series feedback amplifier 8. Design of Class A and Class B amplifier 9. Design of RC phase shift oscillator 10. Design of Hartley Oscillator 11. Design of Colpitts oscillator 12. Study of pulse shaping circuits i). Astable Multivibrator ii). Monostable Multivibrator

1. HALF WAVE RECTIFIER AIM:


To construct half wave rectifier and to draw their input and output waveforms.

APPARATUS REQUIRED:
S.No. 1. 2. 3. 4. 5. 6. Name Transformer Diode Resistor Capacitor CRO Bread Board Range 230 V / 6-0-(-6) IN4007 1 k 100F 30 MHz Quantity 1 1 1 1 1 1

FORMULA USED:
Ripple Factor = Where Im is the peak current

THEORY: Half wave rectifier:


A rectifier is a circuit, which uses one or more diodes to convert A.C voltage into D.C voltage. In this rectifier during the positive half cycle of the A.C input voltage, the diode is forward biased and conducts for all voltages greater than the offset voltage of the semiconductor material used. The voltage produced across the load resistor has same shape as that of the positive input half cycle of A.C input voltage. During the negative half cycle, the diode is reverse biased and it does not conduct. So there is no current flow or voltage drop across load resistor. The net result is that only the positive half cycle of the input voltage appears at the output.

PROCEDURE:

1. 2. 3. 4.

Connect the circuit as per the circuit diagram. Apply a.c input using transformer. Measure the amplitude and time period for the input and output waveforms. Calculate ripple factor.

CIRCUIT DIAGRAM: WITHOUT FILTER:

FIG.13.1 WITH FILTER:

FIG.13.2

MODEL GRAPH:

FIG.13.5 TAB.9.1: HALF WAVE RECTIFIER: Without filter Input signal Amplitude(V) Time period With filter Output signal Amplitude(V) Time period

RESULT:
Thus the half wave rectifier was constructed and its input and output waveforms are drawn. The ripple factor of capacitive filter is calculated as Ripple factor=

FULLWAVE RECTIFIER

FIG.8.1 FULLWAVE RECTIFIER WITH FILTER

FIG.8.2

2. FULL WAVE RECTIFIER AIM: To construct a full wave rectifier and to measure dc voltage under load and to calculate the ripple factor. APPARATUS REQUIRED: S.No. 1. 2. 3. 4. 5. 6. Name Transformer Diode Resistor Capacitor CRO Bread Board Range 230 V / 6-0-(-6) IN4007 1 k 100F 30 MHz Quantity 1 2 1 1 1 1

FORMULA Ripple Factor = [(Im/2) / (2*Im /)] 2-1 Where Im is the peak current THEORY: The full wave rectifier conducts for both the positive and negative half cycles of the input ac supply. In order to rectify both the half cycles of the ac input, two diodes are used in this circuit. The diodes feed a common load RL with the help of a centre tapped transformer. The ac voltage is applied through a suitable power transformer with proper turns ratio. The rectifiers dc output is obtained across the load. The dc load current for the full wave rectifier is twice that of the half wave rectifier. The lowest ripple factor is twice that of the full wave rectifier. The efficiency of full wave rectification is twice that of half wave rectification. The ripple factor also for the full wave rectifier is less compared to the half wave rectifier. PROCEDURE: 1. Connections are given as per the circuit diagram wiyhout filter. 2. Note the amplitude and time period of the input signal at the secondary winding of the transformer and rectified output. 3. Repeat the same steps with the filter and measure Vdc. 4. Calculate the ripple factor. 5. Draw the graph for voltage versus time.

MODEL GRAPH

RESULT: Thus, the full wave rectifier was constructed and the ripple factor was calculated as Ripple factor =

REVIEW QUESTIONS: 1. What is meant by rectifier?

2. Write the operation of two diodes during the application of AC input signal

3. Which type of transformer used for the rectifier input?

4. Define ripple factor.

5. Write the efficiency of this rectifier.

3. FIXED BIAS AMPLIFIER CIRCUIT AIM: To construct a fixed bias amplifier circuit and to plot the frequency response characteristics. APPARATUS REQUIRED: S.No. 1. 2. 3. 4. 5. 6. 7. FORMULA: a) R2 / (R1+R2) = voltage at which Class A, Class B or Class C operation takes place b) hfe = Ic / I THEORY: In order to operate the transistor in the desired region, we have to apply an external dc voltage of correct polarity and magnitude to the two junctions of the transistor. This is called biasing of the transistor. When we bias a transistor, we establish a certain current and voltage conditions for the transistor. These conditions are called operating conditions or dc operating point or quiescent point. This point must be stable for proper operation of transistor. An important and common type of biasing is called Fixed Biasing. The circuit is very simple and uses only few components. But the circuit does not check the collector current which increases with the rise in temperature. Name Transistor Resistor Regulated power supply Signal Generator CRO Spread Board Capacitor Range BC107 10 k,100 k,680 (0-30)V (0-3)MHz 30 MHz 47F Quantity 1 1,1,1 1 1 1 1 2

CIRCUIT DIAGRAM

MODEL GRAPH

f1

FIG.9.2

f2

f (Hz)

TABULATION: FREQUENCY RESPONSE OF FIXED BIAS AMPLIFIER Keep the input voltage constant (Vin) = Frequency (in Hz) Output Voltage (in volts) Gain = 20 log (Vo / Vin) (in dB)

PROCEDURE 1. Connections are made as per the circuit diagram. 2. The waveforms at the input and output are observed for Class A, Class B and Class C operations by varying the input voltages. 3. The biasing resistances needed to locate the Q-point are determined. 4. Set the input voltage as 1V and by varying the frequency, note the output voltage. 5. Calculate gain=20 log (Vo / Vin) 6. A graph is plotted between frequency and gain. CALCULATIONS: a) To determine the value of bias resistance R2 / (R1+ R2)

b)

hfe = IC/IB RESULT: Thus, the Fixed bias amplifier was constructed and the frequency response curve is plotted

4.BJT AMPLIFIER USING VOLTAGE DIVIDER BIAS

AIM: To constant a voltage divider bias amplifier and measure input resistance and gain and also to plot the dc collector current as a function of collector resistance. APPARATUS REQUIRED:
S.No. 1. 2. 3. 4. 5. 6. 7. Name Transistor Resistor Capacitor Function Generator CRO Regulated power supply Bread Board Range BC 107 56k,12k,2.2k,470 0.1F, 47F (0-3)MHz 30MHz (0-30)V Quantity 1 1,1,1,1 2, 1 1 1 1 1

FIG.5.1

MODEL GRAPH

f1

FIG..2

f2

f (Hz)

Keep the input voltage constant, Vin =


Frequency (in Hz) Output Voltage (in volts) Gain= 20 log(Vo/Vin) (in dB)

FORMULA: a) Rin = * Re b) Gain = * Re/Rin THEORY: This type of biasing is otherwise called Emitter Biasing. The necessary biasing is provided using 3 resistors: R1, R2 and Re. The resistors R1 and R2 act as a potential divider and give a fixed voltage to the base. If the collector current increases due to change in temperature or change in , the emitter current Ie also increases and the voltage drop across Re increases, reducing the voltage difference between the base and the emitter. Due to reduction in Vbe, base current Ib and hence collector current Ic also reduces. This reduction in Vbe, base current Ib and hence collector current Ic also reduces. This reduction in the collector current compensates for the original change in Ic. The stability factor S= (1+) * ((1/ (1+)). To have better stability, we must keep Rb/Re as small as possible. Hence the value of R1 R2 must be small. If the ratio R b/Re is kept fixed, S increases with . PROCEDURE: 1. Connections are given as per the circuit diagram. 2. Measure the input resistance as Rin=Vin/Iin (with output open) and gain by plotting the frequency response. 3. Compare the theoretical values with the practical values. 4. Plot the dc collector current as a function of the collector resistance (ie) plot of V cc and Ic for various values of Re. RESULT: Thus the voltage divider bias amplifier was constructed and input resistance and gain were determined. The Gain Bandwidth Product is found to be =

5.FET AMPLIFIER AIM: To construct a source follower with bootstrapped gate resistance amplifier and plot its frequency response characteristics. APPARATUS REQUIRED: S.No. 1. 2. 3. 4. 5. 6. Name Transistor Resistor Regulated power supply Signal Generator CRO Bread Board Range BC107 1k,11 k,1M k (0-30)V (0-3)MHz 30 MHz Quantity 2 1,1,1 1 1 1 1

7.

Capacitor

0.01F

FIG.13.1 MODEL GRAPH

f1

f2

f (Hz)

Keep the input voltage constant (Vin) =


Frequency (in Hz) Output Voltage (in volts) Gain = 20 log (Vo / Vin) (in dB)

THEORY: Source follower is similar to the emitter follower( the output source voltage follow the gate input voltage),the circuit has a voltage gain of less than unity, no phase reversal, high input impedance, low output impedance. Here the Bootstrapping is used to increase the input resistance by connecting a resistance in between gate and source terminals. The resister RA is required to develop the necessary bias for the gate. PROCEDURE: 1. Connections are made as per the circuit diagram. 2. The waveforms at the input and output are observed for cascode operations by varying the input frequency. 3. The biasing resistances needed to locate the Q-point are determined. 4. Set the input voltage as 1V and by varying the frequency, note the output voltage. 5. Calculate gain=20 log (Vo / Vin.) 6. A graph is plotted between frequency and gain. RESULT: Thus, the Source follower with Bootstrapped gate resistance was constructed and the gain was determined. REVIEW QUESTIONS: 1. What is meant by source follower? 2. What is meant by Bootstrapping?

3. How the above circuit is used to provide a good impedance matching? 4. What is the advantage of bootstrapping method?

6.DIFFERENTIAL AMPLIFIER USING BJT Aim: To construct a differential amplifier using BJT and to determine the dc collector current of individual transistors and also to calculate the CMRR. APPARATUS REQUIRED:
S.No. 1. 2. 3. 4. Name Transistor Resistor Regulated power supply Function Generator Range BC107 4.7k, 10k (0-30)V (0-3) MHz Quantity 2 2,1 1 2

5. 6.

CRO Bread Board

30 MHz

1 1

CIRCUIT DIAGRAM

OBSERVATION VIN =VO =AC = VO / VIN FORMULA: Common mode Gain (Ac) = VO / VIN Differential mode Gain (Ad) = V0 / VIN Where VIN = V1 V2 Common Mode Rejection Ratio (CMRR) = Ad/Ac Where, Ad is the differential mode gain Ac is the common mode gain. THEORY: The differential amplifier is a basic stage of an integrated operational amplifier. It is used to amplify the difference between 2 signals. It has excellent stability, high versatility and immunity to noise. In a practical differential amplifier, the output depends not only upon the difference of the 2 signals but also depends upon the common mode signal. Transistor Q1 and Q2 have matched characteristics. The values of RC1 and RC2 are equal. Re1 and Re2 are also equal and this differential amplifier is called emitter coupled differential amplifier. The output is taken between the two output terminals.

OBSERVATION VIN = V1 V2 V0 = Ad = V0/ VIN For the differential mode operation the input is taken from two different sources and the common mode operation the applied signals are taken from the same source Common Mode Rejection Ratio (CMRR) is an important parameter of the differential amplifier. CMRR is defined as the ratio of the differential mode gain, Ad to the common mode gain, Ac. CMRR = Ad / Ac In ideal cases, the value of CMRR is very high. PROCEDURE: 1. Connections are given as per the circuit diagram. 2. To determine the common mode gain, we set input signal with voltage Vin=2V and determine Vo at the collector terminals. Calculate common mode gain,

Ac=Vo/Vin.

3. To determine the differential mode gain, we set input signals with voltages V1 and V2. Compute Vin=V1-V2 and find Vo at the collector terminals. Calculate differential mode gain, Ad=Vo/Vin. 4. Calculate the CMRR=Ad/Ac. 5. Measure the dc collector current for the individual transistors. RESULT: Thus, the Differential amplifier was constructed and dc collector current for the individual transistors is determined. The CMRR is calculated as REVIEW QUESTIONS 1. What is a differential amplifier? 2. What is common mode and differential mode inputs in a differential amplifier? 3. Define CMRR. 4. What is common mode signal? 5. Write some applications of Differential amplifier.

7. CLASS - A POWER AMPLIFIER AIM: To construct a Class A power amplifier and observe the waveform and to compute maximum output power and efficiency.

APPARATUS REQUIRED:
S.No. 1. 2. 3. 4. 5. 6. 7. Name Transistor Resistor Capacitor Signal Generator CRO Regulated power supply Bread Board Range CL100, BC558 47k,33,220, 47 F (0-3)MHz 30MHz (0-30)V Quantity 1,1 2,1 2 1 1 1 1

CIRCUIT DIAGRAM

Keep the input voltage constant, Vin =


Frequency (in Hz) Output Voltage (in volts) Gain= 20 log(Vo/Vin) (in dB)

FORMULA Maximum power transfer =Po,max=Vo2/RL Effeciency, = Po,max/Pc THEORY: The power amplifier is said to be Class A amplifier if the Q point and the input signal are selected such that the output signal is obtained for a full input signal cycle. For all values of input signal, the transistor remains in the active region and never enters into cut-off or saturation region. When an a.c signal is applied, the collector voltage varies sinusoidally hence the collector current also varies sinusoidally.The collector current flows for 3600 (full cycle) of the input signal. i e the angle of the collector current flow is 3600 . PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set Vi =50 mv, using the signal generator. 3. Keeping the input voltage constant, vary the frequency from 10 Hz to 1M Hz in regular steps and note down the corresponding output voltage. 4. Plot the graph; Gain (dB) vs Frequency(Hz). RESULT: Thus the Class A power amplifier was constructed. The following parameters were calculated: a) Maximum output power= ` b) Efficiency= REVIEW QUESTIONS: 1. What is meant by Power Amplifier?

2. What is the maximum efficiency in class A amplifier. 3. What are the disadvantages of Class A amplifier? 4. Write some applications of Power amplifier. 5. What is the position of Q-point in Class A amplifier?

8.CLASS B COMPLEMENTARY SYMMETRY POWER AMPLIFIER AIM:

To construct a Class B complementary symmetry power amplifier and observe the waveforms with and without cross-over distortion and to compute maximum output power and efficiency. APPARATUS REQUIRED:
S.No. 1. 2. 3. 4. 5. 6. 7. 8. Name Transistor Resistor Capacitor Diode Signal Generator CRO Regulated power supply Bread Board Range CL100, BC558 4.7k,15k 100F IN4007 (0-3)MHz 30MHz (0-30)V Quantity 1,1 2,1 2 2 1 1 1 1

CIRCUIT DIAGRAM

FORMULA:

Input power, Pin=2VccIm/ Output power, Pout=VmIm/2 Power Gain or efficiency, =/4(Vm/Vcc) 100
THEORY:

A power amplifier is said to be Class B amplifier if the Q-point and the input signal are selected such that the output signal is obtained only for one half cycle for a full input cycle. The Qpoint is selected on the X-axis. Hence, the transistor remains in the active region only for the positive half of the input signal. There are two types of Class B power amplifiers: Push Pull amplifier and complementary symmetry amplifier. In the complementary symmetry amplifier, one n-p-n and another p-n-p transistor is used. The matched pair of transistor are used in the common collector configuration. In the positive half cycle of the input signal, the n-p-n transistor is driven into active region and starts conducting and in negative half cycle, the p-n-p transistor is driven into conduction. However there is a period between the crossing of the half cycles of the input signals, for which none of the transistor is active and output, is zero CIRCUIT DIAGRAM

FIG.6.2 OBSERVATION OUTPUT SIGNAL AMPLITUDE: TIME PERIOD : CALCULATION POWER, PIN OUTPUT POWER, POUT EFFICIENCY, MODEL GRAPH = 2VCC Im/ = VmIm/2

= ( /4)( Vm/ VCC) x 100

FIG.6.3

PROCEDURE: 1. Connections are given as per the circuit diagram without diodes. 2. Observe the waveforms and note the amplitude and time period of the input signal and distorted waveforms. 3. Connections are made with diodes.

4. Observe the waveforms and note the amplitude and time period of the input signal and output signal. 5. Draw the waveforms for the readings. 6. Calculate the maximum output power and efficiency. Hence the nature of the output signal gets distorted and no longer remains the same as the input. This distortion is called cross-over distortion. Due to this distortion, each transistor conducts for less than half cycle rather than the complete half cycle. To overcome this distortion, we add 2 diodes to provide a fixed bias and eliminate cross-over distortion. RESULT: Thus the Class B complementary symmetry power amplifier was constructed to observe cross-over distortion and the circuit was modified to avoid the distortion. The following parameters were calculated: a)Maximum output power= b)Efficiency=

9. RC COUPLED AMPLIFIER

Aim : To desgn an RC coupled amplifier and to plot its frequency response Components and equipments required: Regulated Power supply, function generator, Transistor BC 107, Capacitors and resistors Circuit diagram:

Procedure: 1. Test all the components using a multimeter. Set up the circuit and verify dc bias conditions. To check dc bias conditions, remove input signal and capacitors in the circuit. 2. Connect the capacitors in the circuit. Apply a 100 mV peak to peak sinusoidal signal from the function generator to the circuit input. Observe the input and output waveforms on the CRO screen simultaneously. 3. Keep the input voltage constant at 100 mV, vary the frequency of the input signal from 0 to 1 MHz or highest frequency available in the generator. Measure the output amplitude corresponding to di_erent frequencies and enter it in tabular column. 4. Plot the frequency response characteristics on a graph sheet with gain in dB on y-axis and logf on x-axis. Mark log fL and log fH corresponding to 3 dB points. (If a semi-log graph sheet is used instead of ordinary graph sheet, mark f along x-axis instead of logf). 5. Calculate the bandwidth of the ampli_er using the expression BW= fH- fL: 6. Remove the emitter bypass capacitor CE from the circuit and repeat the steps 3 to 5 and observe that the bandwidth increases and gain decreases in the absence

Tabulation:

Vin= ___________ Sl no Frequency Output voltage(Vo) Gain(Vo/Vin) Gain(db) 20 log (gain)

QUESTIONS 1. Differentiate between ac and dc load lines? Explain their importance in ampli_er analysis. 2. Why is the center point of the active region chosen for dc biasing? 3. What happens if extreme portions of the active region are chosen for dc biasing? 4. Draw the output characteristics of the amplifier and mark the load-line on it. Also mark the three regions of operation on the output characteristics. 5. Which are the different forms of coupling used in multi-stage ampli_ers? 6. Draw hybrid and hybrid equivalent models of a transistor in the CE con_guration. 7. Draw the Ebers-Moll model of a BJT. 8. What are self bias and fixed bias? 9. Give a few applications of RC-coupled amplifier.

10. RC PHASE SHIFT OSCILLATOR

Aim :To design and set up an RC phase shift oscillator using BJT and to observe the sinusoidal output waveform. Components and equipments required Transistor, dc source, capacitors, resistors, potentiometer, breadboard and CRO. Theory: An oscillator is an electronic circuit for generating an ac signal voltage with a dc supply as the only input requirement. The frequency of the generated signal is decided by the circuit elements. An oscillator requires an ampli_er, a frequency selective network, and a positive feedback from the output to the input. The Barkhausen criterion for sustained oscillation is A_ = 1 where A is the gain of the ampli_er and _ is the feedback factor. The unity gain means signal is in phase. (If the signal is 180_ out of phase, gain will be 1.) If a common emitter ampli_er is used, with a resistive collector load, there is a 180_ phase shift between the voltages at the base and the collector. Feedback network between the collector and the base must introduce an additional 180_ phase shift at a particular frequency. In the figure shown, three sections of phase shift networks are used so that each section introduces approximately 60 phase shift at resonant frequency. By analysis, resonant frequency f can be expressed by the equation,

The three section RC network o_ers a _ of 1/29. Hence the gain of the amplifier should be 29. For this, the requirement on the hFE of the transistor is found to be

The phase shift oscillator is particularly useful in the audio frequency range. CIRCUIT DIAGRAM

Procedure: The connections are given as per circuit diagram and the ouput sinusoidal waveform is traced using CRO at Vo. Viva-voce questions and answers 1. Classify the sinusoidal oscillators. Sinusoidal oscillators can be classi_ed as RC and LC oscillators. LC oscillators are used for high frequency generation while RC oscillators for audio frequency generation . 2. Explain Barkhausen criteria for sustained oscillation. a) Total loop gain (A_) of the circuit must be exactly unity, where A is the gain of the ampli_er and _ is the feedback factor. b) Total phase shift around the loop must be 360_. 3. What are the practical applications of a phase shift oscillator? RC-phase shift oscillator is widely used as audio frequency oscillator. 4. What happens when CE is removed? Why? When CE is removed, gain of the ampli_er decreases and oscillation gets damped. 5. Why is a minimum hFE value required for the circuit to function as an oscillator? A minimum hFE is required to obtain su_cient gain for the ampli_er part to satisfy the Barkhausen criteria for oscillation. 6. How does one RC section generate a phase di_erence of 60_? Phase shift introduced by one RC network is tan1(!RC). Suitable values of R and C will provide 60_ phase shift between input and output of one RC network at a particular frequency.

11. HARTLEY OSCILLATOR Aim :- To construct Hartley oscillator using a transistor, to find out the frequency of oscillation and comparing it to that of theoretical frequency. Apparatus :- n-p-n transistor, Carbon resistors (as shown in circuit), two inductors, capacitors, dc power supply, CRO and connecting terminals. Formulae :- The frequency of oscillation of the oscillator

Theory :-The Hartley oscillator is designed for generation of sinusoidal oscillations in the R.F range (20 KHz - 30 MHz). It is very popular and used in radio receivers as a local oscillator. The circuit diagram of Hartley oscillator (parallel or shunt-fed) using BJT is shown in Figure. It consists of an R-C coupled amplifier using an n-p-n transistor in CE configuration. R1 and R2 are two resistors which form a voltage divider bias to the transistor. A resistor RE is connected in the circuit which stabilizes the circuit against temperature variations. A capacitor CE is connected in parallel with RE, acts as a bypass capacitor and provides a low reactive path to the amplified ac signal. The coupling capacitor CC blocks dc and provides an ac path from the collector to the tank circuit. The L-C feedback network (tank circuit) consists of two inductors L1, and L2 (in series) which are placed across a common capacitor C and the centre of the two inductors is tapped as shown in fig. The feedback network (L1, L2 and C) determines the frequency of oscillation of the oscillator. When the collector supply voltage Vcc is switched on, collector current starts rising and charges the capacitor C. When this capacitor is fully charged, it discharges through coils L1 and L2, setting up damped harmonic oscillations in the tank circuit. The oscillatory current in the tank circuit produces an a.c. voltage across L1 which is applied to the base emitter junction of the transistor and appears in the amplified form in the collector circuit. Feedback of energy from output (collector emitter circuit) to input (base-emitter circuit is) accomplished through auto transformer action. The output of the amplifier is applied across the inductor L1, and the voltage across L2 forms the feedback voltage. The coil L1, is inductively coupled to coil L2, and the combination acts as an auto-transformer. This energy supplied to the tank circuit overcomes the losses occurring in it. Consequently the oscillations are sustained in the circuit. The energy supplied to the tank circuit is in phase with the generated oscillations. The phase difference between the voltages across L1 and that across L2 is always 180 because the centre of the two is grounded. A further phase of 180 is introduced between the input and output voltages by the transistor itself. Thus the total phase shift becomes

3600 (or zero), thereby making the feedback positive or regenerative which is essential for oscillations. So continuous undamped oscillations are obtained. Procedure :-The circuit is connected as shown in figure. Connect the CRO across the output terminals of the oscillator. Switch on the power supply to both the oscillator and CRO. Select proper values of C, L1 and L2 in the oscillator circuit and get the sine wave form on the screen of CRO. The voltage (deflection) sensitivity band switch (Y-plates) and time base band switch (X-plates) are adjusted such that a steady and complete picture of one or two sine waveform is obtained on the screen. The horizontal length (l) between two successive peaks is noted. When this horizontal length (l), is multiplied by the time base (m) i.e. sec/div , we get the time-period (T = l x m).The reciprocal of the time-period(1/T) gives the frequency (f). This can be verified with the frequency, calculated theoretically by using the above formula. The experiment is repeated by changing C or L1 or L2 or all. The readings are noted in the table given CIRCUIT DIAGRAM:

Result: Thus the Hartley oscillator is designed and the theoretical and practical frequency of oscillation are verified

Viva questions: 1. 2. 3. 4. 5. Explain the operation of a Hartley oscillators What is the difference between LC oscillators and RC oscillators Give the applications of Hartley oscillator What is the phase shift in Hartley oscillator What is the frequency of oscillation

12. Colpitt's Oscillator


Aim :- To construct Colpitts oscillator using a transistor, to find out the frequency of oscillation and comparing it to that of theoretical frequency . Apparatus :- n-p-n transistor, Carbon resistors (as shown in circuit), inductor, capacitors, dc power supply, CRO and connecting terminals. Formulae :- The frequency of oscillation of the oscillator

Description :- The Colpitts oscillator is designed for generation of high frequency sinusoidal oscillations (radio frequencies ranging from 10KHz to 100MHz). They are widely used in commercial signal generators up to 100MHz. Colpitt's oscillator is same as Hartley oscillator except for one difference. Instead of using a tapped inductance, Colpitt's oscillator uses a tapped capacitance. The circuit diagram of Colpitts oscillator using BJT is shown in Fig. It consists of an R-C coupled amplifier using an n-p-n transistor in CE configuration. R1 and R2 are two resistors which form a voltage divider bias to the transistor. A resistor RE is connected in the circuit which stabilizes the circuit against temperature variations. A capacitor CE is connected in parallel with RE, acts as a bypass capacitor and provides a low reactive path to the amplified ac signal. The coupling capacitor CC blocks dc and provides an ac path from the collector to the tank circuit. The feedback network (tank circuit) consists of two capacitors C1 and C2 (in series) which placed across a common inductor L. The centre of the two capacitors is tapped (grounded). The feedback network (C1, C2 and L) determines the frequency of oscillation of the oscillator. The two series capacitors C1, and C2 form the potential divider led for providing the feedback voltage. The voltage developed across the capacitor C2 provides regenerative feedback which is essential for sustained oscillations. Theory :- When the collector supply voltage Vcc is switched on, collector current starts rising and charges the capacitors C1 and C2. When these capacitors are fully charged, they discharge through coil L setting up damped harmonic oscillations in the tank circuit. The oscillatory current in the tank circuit produces an a.c. voltages across C1, C2. The oscillations across C2 are applied to base-emitter junction of the transistor and appears in the amplified form in the collector circuit and overcomes the losses occurring in the tank circuit. The feedback voltage ( across the capacitor C2) is 180 out of phase with the output voltage ( across the capacitor C1), as the centre of the two capacitors is grounded. A phase shift of 180 is produced by the feedback network and a further phase shift of 180 between the output and input voltage is produced by the CE transistor. Hence, the total phase shift is 360 or 0, which is essential for sustained oscillations, as per, the Barkhausen criterion. So we get continuous undamped oscillations.

Procedure :-The circuit is connected as shown in figure. Connect the CRO across the output terminals of the oscillator. Switch on the power supply to both the oscillator and CRO. Select proper values of L, C1 and C2 in the oscillator circuit and get the sine wave form on the screen of CRO. The voltage (deflection) sensitivity band switch (Y-plates) and time base band switch (X-plates) are adjusted such that a steady and complete picture of one or two sine waveform is obtained on the screen. The horizontal length (l) between two successive peaks is noted. When this horizontal length (l), is multiplied by the time base (m) i.e. sec/div , we get the time-period (T = l x m).The reciprocal of the time-period(1/T) gives the frequency(f). This can be verified with the frequency, calculated theoretically by using the above formula. The experiment is repeated by changing L or C1 or C2 or all. The readings are noted in the table given. CIRCUIT DIAGRAM:

TABULATION

Result: Thus the colpitts oscillator is designed and the theoretical and practical frequency of oscillation is verified Viva Questions: 1. 2. 3. 4. 5. Explain the operation of a Colpitts oscillators What is the difference between LC oscillators and RC oscillators Give the applications of copitts oscillator What is the phase shift in Colpitts oscillator What is the frequency of oscillation of Colpitts oscillator

13.ZENER DIODE AS VOLTAGE REGULATOR Aim: To determine the line regulation and load regulation characteristics of a zener diode Apparatus required: Regulated Power supply, zener diode, resistors, milliammeters Theory: The function of a regulator is to provide a constant output voltage to a load connected in parallel with it in spite of the ripples in the supply voltage or the variation in the load current and the zener diode will continue to regulate the voltage until the diodes current falls below the minimum IZ(min) value in the reverse breakdown region. It permits current to flow in the forward direction as normal, but will also allow it to flow in the reverse direction when the voltage is above a certain value - the breakdown voltage known as the Zener voltage. The Zener diode specially made to have a reverse voltage breakdown at a specific voltage. Its characteristics are otherwise very similar to common diodes. In breakdown the voltage across the Zener diode is close to constant over a wide range of currents thus making it useful as a shunt voltage regulator. The purpose of a voltage regulator is to maintain a constant voltage across a load regardless of variations in the applied input voltage and variations in the load current. The resistor is selected so that when the input voltage is at VIN(min) and the load current is at IL(max) that the current through the Zener diode is at least Iz(min). Then for all other combinations of input voltage and load current the Zener diode conducts the excess current thus maintaining a constant voltage across the load. The Zener conducts the least current when the load current is the highest and it conducts the most current when the load current is the lowest.

Circuit diagram:

Procedure: If there is no load resistance, shunt regulators can be used to dissipate total power through
the series resistance and the Zener diode. Shunt regulators have an inherent current limiting advantage under load fault conditions because the series resistor limits excess current. A zener diode of break down voltage Vz is reverse connected to an input voltage source Vi across a load resistance RL and a series resistor RS. The voltage across the zener will remain steady at its break down voltage VZ for all the values of zener current IZ as long as the current remains in the break down region. Hence a regulated DC output voltage V0 = VZ is obtained across RL ,whenever the input voltage remains within a minimum and maximum voltage Basically there are two type of regulations

a) Line Regulation
In this type of regulation, series resistance and load resistance are fixed, only input voltage is changing. Output voltage remains same up to particular low input voltage.

Percentage of line regulation can be calculated by = where V0 is the output voltage and VIN input voltage

b) Load Regulation
In this type of regulation, input voltage is fixed and the load resistance is varying. Output volt remains same, zener diode maintain the flow of current through the load resistance.

Percentage of load regulation =

where

is the null load resistor voltage and

is the full load resistor voltage

Result: Thus a voltage regulator circuit using zener is constructed and line regulation and load regulation are determined.

14. MONOSTABLE MULTIVIBRATOR Aim: To study the working principle of monostable multivibrator Components Required: Transistor BC 108, resistors, capacitors, function generator,Diode 1N4004

Theory: The basic collector-coupled Monostable Multivibrator circuit and its associated waveforms are shown above. When power is firstly applied, the base of transistor TR2 is connected to Vcc via the biasing resistor, RT thereby turning the transistor "fully-ON" and into saturation and at the same time turningTR1 "OFF" in the process. This then represents the circuits "Stable State" with zero output. The current flowing into the saturated base terminal of TR2 will therefore be equal to Ib = (Vcc - 0.7)/RT. If a negative trigger pulse is now applied at the input, the fast decaying edge of the pulse will pass straight through capacitor, C1 to the base of transistor, TR1 via the blocking diode turning it "ON". The collector of TR1 which was previously at Vcc drops quickly to below zero volts effectively giving capacitorCT a reverse charge of -0.7v across its plates. This action results in transistor TR2 now having a minus base voltage at point X holding the transistor fully "OFF". This then represents the circuits second state, the "Unstable State" with an output voltage equal to Vcc. Timing capacitor, CT begins to discharge this -0.7v through the timing resistor RT, attempting to charge up to the supply voltage Vcc. This negative voltage at the base of transistor TR2 begins to decrease gradually at a rate determined by the time constant of the RT CT combination. As the base voltage ofTR2 increases back up to Vcc, the transistor begins to conduct and doing so turns "OFF" again transistor TR1 which results in the monostable multivibrator automatically returning back to its original stable state awaiting a second negative trigger pulse to restart the process once again.

Monostable Multivibrators can produce a very short pulse or a much longer rectangular shaped waveform whose leading edge rises in time with the externally applied trigger pulse and whose trailing edge is dependent upon the RC time constant of the feedback components used. This RC time constant may be varied with time to produce a series of pulses which have a controlled fixed time delay in relation to the original trigger pulse as shown below. Monostable Multivibrator Waveforms

Result: Thus the waveforms are traced and the working of monostable multivibrator is studied

15. Astable Multivibrator (AMV)


Aim :- To construct an astable multivibrator using transistors for getting square wave

and to determine the frequency of oscillation . Apparatus :- Two n-p-n transistors, two fixed carbon resistors, two variable non inductive resistors ( pots), two capacitors, d.c. power supply, CRO and connecting terminals.

Formula:

Circuit Diagram:

Theory: When power Vcc is applied by closing switch S, collector current starts flowing in Q1 and Q2 and the coupling capacitors C1 and C2 start charging up. Since the characteristics of no two seemingly similar transistors can be exactly alike, one transistor,say Q1 will conduct more rapidly than the other. Then the collector current of Ql will rise at a faster rate causing a decrease in its collector voltage. The resulting negative signal is applied to the base of Q2 through C2 and drives it towards cut-off. Consequently, thecollector voltage of Q2 (positive going signal) is fed to the base of transistor Q1 through capacitor C1. As a result of this positive going pulse, the collector current of Q1 is further increased. The process being cumulative, in a short time, transistor Q1 is saturated while Q2 is cut-off. These actions are so rapid and instantaneous that C1 does not get a chance to discharge. Under this situation, whole of Vcc drops across RL1 (since Q1 is saturated or is in ON state) i.e., Vc1 = 0 and point A is at ground (or zero) potential. Also, since Q2 is cut-off (OFF state), there is no drop across RL2 and point B is at Vcc. Capacitor C2 now begins to discharge through R2, which decreases the reverse bias on base of transistor Q2.

Ultimately a forward bias is re-established at Q2 which, therefore, begins to conduct. Consequently, Collector of Q2 becomes less positive. This negative going voltage signal is applied to the base of transistor Q1 through the capacitor C1. As a result, Q1 is pulled out of saturation and is soon driven to cut-off. Simultaneously Q2 is driven to saturation. Now Vc2 decreases and becomes almost zero volt when Q2 gets saturated. Consequently, potential of point B decreases from Vcc to almost zero volt. The transistor Q1 remains cut-off and Q2 in conduction until capacitor Cl discharges through R1, enough to decrease the reverse bias of Q1 The whole of the cycle is repeated. The output of the multivibrator can be taken from the collector of either transistor. The output is a square wave, with a peak amplitude equal to Vcc. Total time of the square wave T = T1 + T2 = 0.69 (R1C1+R2C2) Procedure :- The two transistors (Q1 and Q2) are connected in CE mode and they are given proper bias with the help of RL1, RL2 and + VCC. Collector of each transistor is connected to the base of the other transistor through a condenser. The condensers C1 and C2 are connected to the power supply through the variable resistors R1 and R2. The collector of any one of the transistor is connected the Y plates of CRO. Switch on the power Vcc, and the power supply of CRO. Observe the square wave on the screen. Adjust the values Rl and R2 and the band switches of X and Y plates of CRO to get at least one complete wave on the screen. Then the length of one complete wave ( l ) on screen is measured on horizontal scale, this is multiplied with the time base ( t ). The product will give the time period of the wave ( l x t = T ). The reciprocal of T gives the frequency ( f ). These values are noted in the table. This frequency is experimental frequency.Now the Power Vcc is switched off and the resistance values of Rl and R2 are measured using multi-meter. The values R1, R2, C1 and C2 are also noted in the table. Substituting these values in the above formula we will get the frequency theoretically. The theoretical and experimental frequencies are compared. They are equal.The experiment is repeated with different values of R1 and R2 (the values of C1 and C2 can also be changed, if possible). Tabulation:

Result: Thus the astable multivibrator is constructed and the waveforms are traced 16. DARLINGTON AMPLIFIER USING BJT AIM: To construct a Darlington current amplifier circuit and to plot the frequency response characteristics.

APPARATUS REQUIRED:
S.No. 1. 2. 3. 4. 5. 6. 7. Name Transistor Resistor Capacitor Function Generator CRO Regulated power supply Bread Board Range BC 107 15k,10k,680,6k 0.1F, 47F (0-3)MHz 30MHz (0-30)V Quantity 1 1,1,1,1 2, 1 1 1 1 1

CIRCUIT DIAGRAM

MODEL GRAPH

f1

FIG..2

f2

f (Hz)

TAB 4.1: Keep the input voltage constant, Vin =


Frequency (in Hz) Output Voltage (in volts) Gain= 20 log(Vo/Vin) (in dB)

THEORY: In Darlington connection of transistors, emitter of the first transistor is directly connected to the base of the second transistor .Because of direct coupling dc output current of the first stage is (1+hfe )Ib1.If Darlington connection for n transitor is considered, then due to direct coupling the dc output current foe last stage is (1+hfe ) n times Ib1 .Due to very large amplification factor even two stage Darlington connection has large output current and output stage may have to be a power stage. As the power amplifiers are not used in the amplifier circuits it is not possible to use more than two transistors in the Darlington connection. In Darlington transistor connection, the leakage current of the first transistor is amplified by the second transistor and overall leakage current may be high, Which is not desired. PROCEDURE: 1. Connect the circuit as per the circuit diagram. 2. Set Vi =50 mv, using the signal generator. 3. Keeping the input voltage constant, vary the frequency from 0 Hz to 1M Hz in regular steps and note down the corresponding output voltage. 4. Plot the graph; Gain (dB) vs Frequency(Hz). 5. Calculate the bandwidth from the graph. RESULT: Thus, the Darlington current amplifier was constructed and the frequency response curve is plotted. . The Gain Bandwidth Product is found to be = QUESTIONS:

1. What is meant by Darlington pair? 2. How many transistors are used to construct a Darlington amplifier circuit? 3. What is the advantage of Darlington amplifier circuit? 4.Write some applications of Darlington amplifier .

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