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HV66
General Description
The HV66 is a low voltage serial to high voltage parallel converter with push-pull outputs. This device has been designed for use as a driver circuit for LCD displays. It can also be used in any application requiring multiple output high voltage current sourcing and sinking capabilities. The inputs are fully CMOS compatible. The device consists of a 32-bit shift register, 32 latches, and control logic to perform blanking and polarity control of the outputs. HVOUT1 is connected to the first stage of the shift register. Data is shifted through the shift register on the logic rising transition of the clock. A DIR pin causes data shifting clockwise when grounded and counter clockwise when connected to VDD. A data output buffer is provided for cascading devices. This output reflects the current status of the last bit of the shift register. Operation of the shift register is not affected by the LE (latch enable), BL (blank) or the POL (polarity) inputs. Transfer of data from the shift register to the latch occurs when the LE (latch enable) input is high. The data in the latch is stored after LE transitions from high to low.
Latch
HVOUT1
CLK DIR
Latch
Latch
DATA OUT
HVOUT31
Latch
HVOUT32 BPOUT
GND
Supertex inc.
Tel: 408-222-8888
www.supertex.com
HV66
Ordering Information
Package Options Device
10.00x10.00mm body 2.35mm height (max) 0.80mm pitch
Pin Configurations
44-Lead PLCC .653x.653in body HV66PJ-G
44-Lead PQFP
44 1
HV66
HV66PG-G
Value -0.5V to +7.0V -0.5V to +70V -0.5V to VDD +0.5V 1.5A 1200mW -40C to +85C -65C to +125C
Product Marking
Top Marking
HV66PG
YYW W LLLLLLLLL
Bottom Marking
CCCCCCCC AAA
YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = Green Packaging
*May be part of top marking
Continuous total power dissipation Operating temperature range Storage temperature range
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to GND. Notes: 1. Device will survive (but operation may not be specified or guaranteed) at these extremes 2. All voltages are referenced to GND 3. Duty cycle is limited by the total power dissipated in the package 4. For operation above 25C ambient derate linearly to 85C at 20mW/C
YY = Year Sealed WW = Week Sealed A = Assembler ID L = Lot Number Bottom Marking C = Country of Origin* = Green Packaging
LLLLLLLLLL
YYWW AAA
HV66PJ
CCCCCCCCCCC
Supertex inc.
Tel: 408-222-8888
www.supertex.com
HV66
Electrical Characteristics (over recommended operating conditions unless otherwise noted)
DC Characteristics (V
Sym IDD IPPQ IDDQ VOH VOL IIH IIL VOLBP VOHBP Parameter VDD supply current Quiescent VPP supply current Quiescent VDD supply current High-level output Low-level output High-level input current Low-level input current Low-level output voltage, backplane High-level output voltage, backplane
DD DD
Units mA mA mA mA V V A A V V
Conditions VDD = 5.5V, fCLK = 5.0MHz Outputs high Outputs low All VIN = GND or VDD IO = -5.0mA, VPP = +60V IO = -100A IO = +5.0mA, VPP = +60V IO = +100A VIH = VDD VIL = 0V IO = +10mA IO = -10mA
AC Characteristics (V
fCLK tWL, tWH tSU tH tHON, tHOFF tBON, tBOFF tDHL tDLH tDLE tWLE tSLE tBR, tBF |tBR - tBF|
Clock frequency Clock width high or low Data set-up time before clock rises Data hold time after clock rises Time from latch enable or POL to HVOUT Time from POL to BPOUT Delay time clock to data high to low Delay time clock to data low to high Delay time clock to LE low to high Width of LE pulse LE set-up time before clock rises BPOUT rise/fall time BPOUT rise and fall difference
100 25 50 50 100 50 10 -
MHz ns ns ns ns ns ns ns ns ns ns s s
Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Set all inputs (Data, CLK, EN, etc.) to a known state. 4. Apply VPP. The VPP should not drop below VDD during operation. Power-down sequence should be the reverse of the above.
Supertex inc.
Tel: 408-222-8888
www.supertex.com
HV66
Function Table
Inputs Function Load S/R, R/L Shift Load Latches Data L or H L or H X X L or H Transparent Mode L or H L or H L or H Blank Control
Notes: H L X Ignore * - High level - Low level - Dont care - The state of the specific input or output is irrelevant to demonstrate the occurred event - Low to High transition - Dependent on previous stages state before the last CLK or last LE high
Outputs BL POL Ignore Ignore H L H L H L L H DIR H L X X H H L L X X Shift Reg 1, 2, ... 32 Data Q1... Q32 Q1 ...Q32 Data *...* *...* Data Q1... Q32 Data Q1... Q32 Q1 ...Q32 Data Q1 ...Q32 Data X X HVOUT 1, 2, ... 32 Ignore Ignore /*...* *...* /*...* *...* /*...* *...* L...L H...H Data Out Q32 Q1 No Change No Change Q32 Q32 Q1 Q1 Ignore Ignore BPOUT Ignore Ignore H L H L H L L H
CLK H or L H or L X X
LE L L H H H H H H X X
Ignore Ignore H H H H H H L L
X X
Switching Waveforms
DATA IN 50% tSU CLK 50% tWL 50% tWH 50% DATA OUT tDLH 50% tDHL LE 50% tDLE tWLE 50% tHOFF 50% tHON 50% tBOFF BPOUT 50% 50% tBON 50% 10% tBR 90% tBF 50% tSLE Data Valid tH 50% 50% 50%
VIH VIL VIH VIL VOH VOL VOH VOL VIH VIL VOH VOL VOH VOL VIH VIL VOHBP VOLBP
Supertex inc.
Tel: 408-222-8888
www.supertex.com
HV66
44-Lead PQFP Pin Description (PG)
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Function HVOUT11 HVOUT12 HVOUT13 HVOUT14 HVOUT15 HVOUT16 HVOUT17 HVOUT18 HVOUT19 HVOUT20 HVOUT21 HVOUT22 HVOUT23 HVOUT24 HVOUT25 Pin # 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Function HVOUT26 HVOUT27 HVOUT28 HVOUT29 HVOUT30 HVOUT31 HVOUT32 DATA OUT GND N/C BL POL LE VDD CLK Pin # 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Function DIR DATA IN VPP BPOUT HVOUT1 HVOUT2 HVOUT3 HVOUT4 HVOUT5 HVOUT6 HVOUT7 HVOUT8 HVOUT9 HVOUT10
Supertex inc.
Tel: 408-222-8888
www.supertex.com
HV66
E1
44 1 b e
Top View
View B A A2 L2 Seating Plane L L1 Gauge Plane Seating Plane
A1
Side View
View B
Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator.
A 1.95* 2.35
A1 0.00 0.25
b 0.30 0.45
D1 9.80* 10.00
E 13.65* 13.90
E1 9.80* 10.00
e 0.80 BSC
L1 1.95 REF
L2 0.25 BSC
0O 3.5O 7O
JEDEC Registration MO-112, Variation AA-2, Issue B, Sep.1995. * This dimension is not specified in the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-44PQFPPG, Version C041309.
Supertex inc.
Tel: 408-222-8888
www.supertex.com
HV66
Top View
View B Base Plane e Seating Plane .020 MIN
b1
A2
A1
View B
Notes: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. 2. Actual shape of this feature may vary.
A2 .062 .083
b .013 .021
b1 .026 .036
e .050 BSC
JEDEC Registration MS-018, Variation AC, Issue A, June, 1993. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc. #: DSPD-44PLCCPJ, Version F031111.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Supertex inc.