MICROCONTROLLERS

8051 MICROCONTROLLER: ARCHITECTURE PROGRAMMING AND INTERFACING

CONTENTS

Introduction 8051 Microcontroller Architecture Pin Diagram Memory Organisation Assembly Language Programming Instructions Addressing Modes Timers Serial Communication Interrupts Interfacing

INTRODUCTION
A microcontroller is a programmable logic and integrated circuit which can be programmed to do a number of tasks. It is possible to control a lot of things with the program written by the user. A microcontroller has A CPU to execute programmed code Memory, both RAM and ROM Internal timers An input/output system UART for serial communication ADCs and DACs(not in all types of microcontrollers) Internal EEPROM (not in all types of microcontrollers)

Functions of microcontroller Microcontroller can execute a stored set of instructions to carry out a particular task which is defined by the user. It can access external memory chips to read or write data It can be interfaced with I/O devices like LED, LCD etc.

Difference between MICROPROCESSOR and MICROCONTROLLER

A microprocessor is general purpose digital computer central processing unit (CPU). Microprocessors do not contain RAM, ROM, I/O ports, timers etc. To make a microprocessor work, one have to add RAM, ROM, I/O ports, timers externally. These are just general purpose CPUs. The use of microprocessor makes the system bulkier. Whereas a microcontroller has a CPU, RAM, ROM, timers, interrupts and some more extra features like ADCs and DACs. The fixed amount of on-chip ROM, RAM, and number of I/O ports makes them Ideal for many applications in which cost and space are critical. A microcontroller is

Figure 1 used when cost and power is taken into consideration. A microcontroller is self contained and independent. It is a computer on the chip.

PROCESSOR ARCHITECTURE
There are two types of basic architectures: VON-Neumann architecture- it has only one bus which is used for both data transfer and instruction fetches, and therefore data transfers and instruction fetches must be scheduled i.e. they cannot be performed at the same time.

Harvard architecture- It has separate data and instruction busses, allowing transfers to be performed simultaneously on both the busses.

8051 MICROCONTROLLER
8051 microcontroller was first introduced by INTEL in 1981. It becomes popular after allowing other manufacturers to make the same. It is an 8 bit microcontroller i.e. the CPU can work on 8 bits of data at a time. 8051 contains 128 Bytes of RAM 4K Bytes of on-chip ROM Two Timers One serial Port Four I/O ports, each 8 bits wide 6 Interrupts Sources

8051 MICROCONTROLLER ARCHITECTURE

All 80C51 devices have separate address spaces for program and data memory, as shown in figure.

Figure 2- 8051 architecture

The 8051 architecture consists of these specific features 8 bit CPU with registers A( the accumulator) and B 16 bit program counter(PC) and data pointer(DPTR) 8 bit program status word(PSW) and stack pointer(SP) Internal ROM (4K) Internal RAM (128 bytes) 4 register banks(bank 0 to bank 3) each containing 7 registers 16 bytes which are bit addressable Rest 80 bytes for special function registers(SFRs) 32 input/output pins arranged as four 8 bit ports Two 16 bit timers/counters T0 and T1 Serial data receiver and transmitter Two external and three internal interrupt sources Oscillator and clock circuit 8051 is a collection of 8 bit and 16 bit registers and 8 bit memory locations. These registers and memory locations can be operated by using software instructions. Program memory

(ROM) can only be read. There can be up to 64K bytes of program memory. In 8051, the lowest 4KB of program memory is on chip. Data memory (RAM) occupies a separate address space from ROM. In 8051, the lowest 128 bytes of data memory is on chip. Up to 64K bytes of external RAM can be addressed in the external data memory space.

PIN DIAGRAM OF 8051

8051 is a 40 pin IC. These 40 pins are dedicated to different for various functions such as I/O, -RD, -WR, address, data and interrupts.

Figure 3- pin diagram of 8051

PIN 18(XTAL2) & PIN 19(XTAL1)

The 8051 has an on-chip oscillator but requires an external clock to run it. A quartz crystal oscillator is connected to inputs XTAL1 and XTAL2. The quartz crystal oscillator also needs two capacitors of 30 pF value. If we use a frequency source other than a crystal oscillator, such as a TTL oscillator. It will be connected to XTAL1 and XTAL2 is left unconnected.

Figure 4- Oscillator Circuit The quartz crystal oscillator also needs two capacitors of 30 pF value. The speed of microcontroller depends on the maximum frequency of the oscillator.

PIN 9(RESET)
It is an input and is active high (normally low). Upon applying a high pulse to this pin, the microcontroller will reset and terminate all activities. This is also called power-on reset. Activating this pin will cause all values in the registers to be lost.

Figure 5- Reset circuit

PIN 31(EA/VPP)
When EA is held high the CPU executes out of internal program memory. Holding EA low forces the CPU to execute out of external memory regardless to the program counter value. It is connected to VCC in 8051 as program is fetched from internal memory.

PIN 29 (PSEN)
Program Store Enable is the read strobe to external memory. This pin is connected to OE of the external ROM. It is an output pin. When the device is executing out of external program memory, PSEN is activated twice each machine cycle. PSEN is not activated when the device is executing out of internal program memory.

PIN 30 (ALE/PROG)
Address latch enable output pulse for latching the low byte of the address during accesses to external memory. ALE is emitted at the constant rate of 1/6th of the oscillator frequency, for external timing or clocking purposes, even when there are no accesses to external memory. This pin is used for demultiplexing of address and data.

Port 0
Port 0 is an 8-bit open drain bidirectional port. As an open drain output port, it can sink eight LS TTL loads. Port 0 pins that have 1s written to them float, and in that state will function as high impedance inputs. Port 0 is also the multiplexed low-order address and data bus during accesses to external memory. In this application it uses strong internal pull-ups when emitting 1s. Port 0 emits code bytes during program verification. In this application, external pull-ups are required.

FIGURE 6- External pull up for port 0

Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s written to them are pulled high by the internal pull-ups, and in that state can be used as inputs. As inputs, port 1 pins that are externally being pulled low will source current because of the internal pull-ups.

Port 2
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 emits the high-order address byte during accesses to external memory that use 16-bit addresses. In this application, it uses the strong internal pull-ups when emitting 1s.

Port 3
Port 3 is an 8-bit bi directional I/O port with internal pull-ups. It also serves the functions of various special features of the 80C51 Family as follows: Port Pin Alternate Function P3.0 RxD (serial input port) P3.1 TxD (serial output port) P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (timer 0 external input) P3.5 T1 (timer 1 external input) P3.6 WR (external data memory write strobe) P3.7 RD (external data memory read strobe) VCC: Supply voltage VSS: Circuit ground potential

MEMORY ORGANISATION
The 8051 has three very general types of memory.

External Code Memory

The executable program code is stored in this code memory. The code memory size is limited to 64KBytes (in a standard 8051). The code memory is read-only in normal operation and is programmed under special conditions e.g. it is PROM or a Flash RAM type of memory. Code may also be stored completely off chip in an external ROM or, more commonly an external EPROM. It is possible to have 4K of code memory on chip and 64K of code memory off chip in an EPROM.

External RAM Data Memory

This is read-write memory and is available for storage of data. Up to 64KBytes of external RAM data memory is supported (in a standard 8051). External RAM is any random access memory which is found off chip. Since the memory is off chip. It is not as flexible in terms of accessing and is also slower. For example- to increment an internal RAM location by 1 requires only 1 instruction and 1 instruction cycle. To increment a 1 byte value stored in external memory requires 4 instructions and 7 instruction cycles. In this case external memory is 7 times slower. External RAM is not fast and flexible but it gains in quantity. While internal RAM is limited to 128 bytes, the 8051 supports external RAM up to 64K.

Internal Memory
The 8051s on-chip memory consists of 256 memory bytes organised as follows: First 128 bytes: 00h to 1Fh Register Banks 20h to 2Fh Bit Addressable RAM 30 to 7Fh General Purpose RAM Next 128 bytes: 80h to FFh Special Function Registers

Figure 7- internal RAM The first 128 bytes of internal memory is organised as shown in figure 1.6, and is referred to as Internal RAM, or IRAM.

ASSEMBLY LANGUAGE PROGRAMMING

ASSEMBLY LANGUAGE
Assembly language is referred to as a low level Language. It deals directly with the internal structure of the CPU. Assembly languages provided mnemonics for the machine code instructions, plus other features. An Assembly language program consist of a series of lines of Assembly language instructions.

REGISTERS
Registers are used to store information temporarily. This information could be a byte of data or an address pointing to the data to be fetched. The majority of registers in 8051 are 8 bit registers. So any data more than 8 bit must be broken into chunks of 8 bits. The most widely used registers are A (accumulator), used for arithmetic and logic instructions B,R0,R1,R2,R3,R4,R5,R6,R7 (all 8 bit registers) Data Pointer (DPTR) and Program Counter (PC) both 16 bit registers

SPECIAL FUNCTION REGISTER

A map of the on-chip memory area called the special function register (SFR) space is shown in figure 1.5. In SFRs not all of the addresses occupied. Unoccupied addresses are not implemented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have no effect.

PROGRAM STATUS WORD

The program status word (PSW) contains several status bits that reflects the current state of the CPU. The PSW, shown in figure, resides in the SFR space. It contains the carry bit, auxiliary carry, the two register bank select bits, the overflow flag, a parity flag, and two user-definable status flags. The carry bit , other than serving the function of a carry bit in arithmetic operations, also serves as the Accumulator for number of Boolean operations. The bits RS0 and

Figure 8- SFRs in RAM

RS1 are used to select one of the four register banks. A number of instructions refer to these RAM locations as R0 to R7. The selection of which of the four is being referred to is made on the RS) and RS1 at execution time. The parity bit reflects the number of 1s in the accumulator. P=1, if the accumulator contains odd number of 1s P=0, if the accumulator contains even number of 1s

STACK POINTER
The stack pointer register is 8 bits wide. It is incremented before data is stored during PUSH and CALL instructions. Stack pointer is initialized to 07H after a reset. This causes the stack to begin at locations 08H.

INSTRUCTIONS
MOV INSTRUCTION MOV DESTINATION, SOURCE ;copy source to dest.

This instruction tells the CPU to copy the source operand to destination For examplemov A,#25h mov R4,A mov R4,#12h ;load value 25H in A ;load the value of A in R4 ;load value 12h in R4

Values (proceeded with #) can be loaded directly to A, B and R0 to R7. For the values starting for hex number A to F, a 0 used be used to indicate the hex number. Moving a value that is too large into a register will cause an error MOV A, #7F2H ; ILLEGAL: 7F2H>8 bits (FFH)

ADD INSTRUCTION ADD A, source ;add the source operand to the acc.

The ADD instruction tells the CPU to add the source byte to register A and put the result in register A. Source operand can be either a register or immediate data, but the destination must always be the accumulator. For exampleADD A, #23h ; add value 23h to A ADD A, R0 ; add the contents of R0 to A ADD R4, A and ADD R2, #12H are invalid since A must be the destination of any arithmetic operation. ASSEMBLER DIRECTIVES ORG (origin) The ORG directive is used to indicate the beginning of the address. The number that comes after ORG can be

either in hex and decimal. If the number is not followed by H, it is decimal and the assembler will convert it to hex. END This indicates to the assembler the end of the source (asm) file. The END directive is the last line of an 8051 program. It means that in the code anything after the END will be ignored by the assembler. LOOP INSTRUCTION Repeating a sequence of instructions a certain number of times is called a loop. Loop action is performed by DJNZ reg, Label The register is decremented If it is not zero, it jumps to the target address referred to by the label. Prior to the start of loop the register is loaded with the counter for the number of repetitions. Counter can be R0 R7 or RAM location. For example;This program adds value 3 to the ACC ten times MOV A,#0 ;A=0,clear ACC MOV R2,#10 ;load counterR2=10 AGAIN: ADD A,#03 ;add 03 to ACC DJNZ R2,AGAIN ; repeat until ;R2=0,10 times MOV R5,A ;save A in R5 If we want to repeat an action more times than 256, we use a loop inside a loop, which is called nested loop We use multiple registers to hold the count. For example- this program compliment the accumulator 700 times MOV A,#55H MOV R3,#10 NEXT: MOV R2,#70 AGAIN: CPL A DJNZ R2,AGAIN ;A=55H ;R3=10, outer loop count ;R2=70, inner loop count ;complement A register ;repeat it 70 times

JUMP INSTRUCTION
Jump instructions are of two types. Conditional and unconditional jumps. Conditional jumpsFollowing are some conditional jump instructions JZ label ; jump if A=0 JNC label ; jump if not carry i.e CY=0 CJNE A,byte ; jump if A byte JNZ label ; jump if A 0 JC label ; Jump if CY 0 JB label ; Jump if bit 1 JNB label ; Jump if bit 0 All conditional jumps are short jumps. The address of target must be within -128 to +127 bytes of contents of PC. Unconditional JumpsThe unconditional jump is a jump in which control is transferred unconditionally to the target location. SJMP(SHORT JUMP)It is a 2 byte instruction. The address of target must be within -128 to +127 bytes of contents of PC. LJMP(LONG JUMP)It is a 3 byte instruction. The address of target must be anything between 0000h to FFFFh. CALL INSTRUCTION Call instruction is used to call subroutine. Subroutines are often used to perform tasks that need to be performed frequently. This makes a program more structured in addition to saving memory space. TYPES OF CALLS LCALL (long call) It is a 3-byte instruction. First byte is the opcode. Second and third bytes are used for address of target subroutine. Subroutine is located anywhere within 64K byte address space. ACALL (absolute call) It is 2-byte instruction. This used for address within 2K byte range. When a subroutine is called, control is transferred to that subroutine, the processor saves on the stack the address of the instruction immediately below the CALL and begins to fetch

instructions from the new location. After finishing execution of the subroutine the instruction RET transfers control back to the caller. Difference between ACALL and LCALL The only difference between ACALL and LCALL is The target address for LCALL can be anywhere within the 64K byte address The target address of ACALL must be within a 2K-byte range The use of ACALL instead of LCALL can save a number of bytes of program ROM space.

ADDRESSING MODES
The CPU can access data in various ways, which are called addressing modes. Immediate addressing mode Register addressing mode Direct addressing mode Register indirect addressing mode

Immediate addressing mode

The source operand is a constant The immediate data must be preceded by the pound sign, # Can load information into any registers, including 16-bit DPTR register DPTR can also be accessed as two 8-bit registers, the high byte DPH and low byte DPL

For exampleMOV A,#25H MOV R4,#62 MOV B,#40H MOV DPTR,#4521H MOV DPL,#21H MOV DPH,#45H

;load 25H into A ;load 62 into R4 ;load 40H into B ;DPTR=4512H ;This is the same ;as above

Register addressing Mode

Use registers to hold the data to be manipulated For example-

MOV MOV ADD ADD MOV

A,R0 R2,A A,R5 A,R7 R6,A

;copy contents of R0 into A ;copy contents of A into R2 ;add contents of R5 to A ;add contents of R7 to A ;save accumulator in R6

The source and destination registers must match in size MOV DPTR,A will give an error The movement of data between registers is not allowed MOV R4,R7 is invalid

Direct addressing mode

It is most often used the direct addressing mode to access RAM locations 30 7FH The entire 128 bytes of RAM can be accessed The register bank locations are accessed by the register names For exampleMOV A,4 ;is same as MOV A,R4 ;which means copy R4 into A Contrast this with immediate addressing mode, There is no # sign in the operand The SFR (Special Function Register) can be accessed by their names or by their addresses For exampleMOV 0E0H,#55H ;is the same as MOV A,#55h ;load 55H into A

Stack and direct addressing mode

Only direct addressing mode is allowed for pushing or popping the stack PUSH A is invalid Pushing the accumulator onto the stack must be coded as PUSH 0E0H

Register indirect addressing mode

A register is used as a pointer to the data o Only register R0 and R1 are used for this purpose o R2 R7 cannot be used to hold the address of an operand located in RAM When R0 and R1 hold the addresses of RAM locations, they must be preceded by the @ sign For exampleMOV A,@R0 ;move contents of RAM whose ;address is held by R0 into A

Bit addressability
One unique and powerful feature of the 8051 is single-bit operation. Single-bit instructions allow the programmer to set, clear, move, and complement individual bits of a port, memory, or register. It is registers, RAM, and I/O ports that need to be bit-addressable. ROM, holding program code for execution, is non bit-addressable. For exampleCLR C ; clears the carry flag SETB bit ; sets the direct bit

TIMERS
The 8051 has two timers/counters, they can be used either as timers to generate a time delay or as Event counters to count events happening outside the microcontroller. Both Timer 0 and Timer 1 are 16 bits wide. Since 8051 has an 8-bit architecture, each 16-bits timer is accessed as two separate registers of low byte and high byte. The low byte register is called TL0/TL1 and the high byte register is called TH0/TH1. These registers can be accessed like any other register.

TMOD REGISTER
Both timers 0 and 1 use the same register, called TMOD (timer mode), to set the various timer operation modes. TMOD is a 8-bit register. The lower 4 bits are for Timer 0 and the upper 4 bits are for Timer 1. In each case, the lower 2 bits are used to set the timer mode and the upper 2 bits to specify the operation as shown

DELAY GENERATION USING TIMERS

1. Load the TMOD value register indicating which timer (timer 0 or timer 1) to be used and which timer mode (0 or 1) is selected. 2. Load registers TL and TH with initial count value. 3. Start the timer. 4. Keep monitoring the timer flag (TF) with the JNB TFx,target instruction to see if it is raised, Get out of the loop when TF becomes high. 5. Stop the timer. 6. Clear the TF flag for the next round. 7. Go back to Step 2 to load TH and TL again. For exampleMOV TMOD,#01 HERE: MOV TL0,#3EH MOV TH0,#0B8H SETB P2.3 SETB TR0 AGAIN: JNB TF0,AGAIN CLR TR0

;Timer 0, 16-bitmode ;TL0=3Eh, the low byte ;TH0=B8H, the high byte ;SET high timer 0 ;Start the timer 0 ;Monitor timer flag 0 ;Stop the timer 0

CLR TF0

;Clear TF0 for next Round

The amount of delay is calculated as (FFFFH B83E + 1) = 47C2H = 18370 in decimal and 18370 1.085 us = 19.93145 ms Since TH TL = B83EH = 47166 (in decimal) we have 65536 47166 = 18370. This means that the timer counts from B38EH to FFFF. This plus Rolling over to 0 goes through a total of 18370 clock cycles, where each clock is 1.085 us in duration. Therefore, we have 18370 1.085 us = 19.93145 ms as the width of the pulse.

COUNTER PROGRAMING
Timers can also be used as counters counting events happening outside the 8051. When it is used as a counter, it is a pulse outside of the 8051 that increments the TH, TL registers. TMOD and TH, TL registers are the same as for the timer explained previously. Programming the timer as explained also applies to programming it as a counter except the source of the frequency. The C/T bit in the TMOD registers decides the source of the clock for the timer. When C/T = 1, the timer is used as a counter and gets its pulses from outside the 8051. The counter counts up as pulses are fed from pins 14 and 15, these pins are called T0 (timer 0 input) and T1 (timer 1 input).

SERIAL COMMUNICATION
One of the 8051s most powerful features is its integrated UART, otherwise known as a serial port. The fact that 8051 has an integrated serial port means that we can easily read and write values to the serial port. If it were integrated serial port, writing a byte to a serial line would be a rather tedious process requiring turning on and off one of the I/O lines in rapid succession to properly clock out each individual bit, including start bits, stop bits, and parity bits. Now,we dont have to do this, instead, we simply need to configure the serial port operation mode and baud rate. Once configured, all we have to do is write to an SFR to write a value to the serial port or read the same SFR to read the value from the serial port. The 8051 will automatically let us know when it has finished sending the character we wrote and will also let us know whenever it has received a byte so that we can process it. We do not have to worry about transmission at the bit level, which saves us quite a bit of coding and processing time.

Setting the serial port mode The first thing to be done is to configure it. This lets us tell the 8051 how many data bits we want, the baud rate we will use. Setting the baud rate The baud rate in 8051 is programmable and it is done with the help of timer 1. There are many baud rates used in 8051 like 1200, 2400,4800,9600 etc. This is set by putting the value in TH1. Following are the steps used to serially transmit a byte to serial port1. Program timer one for mode . 2. Load TH1 with some value to set baud rate. 3. Program SCON for mode 1 (SCON 50h). 4. Start timer one (T1). 5. Clear T1. 6. Load SBUF with the byte to be transmitted. 7. Monitor the T1 flag bit until it becomes one using instruction JNB T1,XX. 8. Go back to step 5 for next byte.

INTERUPTS
TYPES OF INTERUPTS1) Level triggered- In this mode when a low level signal is applied to INT0 and INT1 then the microcontroller triggers the interrupt. After that controller stops whatever it is doing and jumps to interrupt vector table to service the interrupt. 2) Edge triggered- upon reset INT0 and INT1 are low level triggered. For making them edge triggered IT0 and IT1 bits of TCON register are programmed. When these bits are made high then interrupts become edge triggered.

The 80C51 provides 5 interrupt sources. These are shown in the table 1.2. The external interrupts INT0 and INT1 can each be either level-activated or transition-activated ,depending on bits IT0 and IT1in register TCON. The flags that actually generate these interrupts are bits IE0and IE1in TCON. When an external interrupt is generated, the flag that generated it is cleared by the hardware when the service routine is vectored to only if the interrupt was transition-activated. If the interrupt was level-activated, then the external request flag, rather than the on-chip hardware.

The timer 0 and timer 1 interrupts are generated by TF0 and TF1, which are set by a rollover in their respective timer/counter registers. When a timer interrupt is generated, the flag that generated is cleared by the on-chip hardware when the service routine is vectored to. The serial port interrupt is generated by the logical OR of RI and TI. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine normally have to determine whether it was RI or TI that generated the interrupt.

INTERRUPT ENABLE REGISTER

The IE register is as shown

Steps in executing an interrupt1. The microcontroller finishes the current instruction it is executing and saves the address of next instruction on the stack. 2. It also saves the current status of all interrupts internally. 3. It jumps to a fixed location in memory at address given in the interrupt vector table. It then starts to executes the ISR until it reaches the last instruction. 4. Upon executing RETI instruction, the microcontroller returns to the place where it was interrupted.

INTERFACING
INTERFACING SWITCH TO THE MICROCONTROLLER Figure shows switch interfacing to port 0 or any pin to be used as an INPUT PIN a HIGH(1) should be written to the pin if we dont do this the pin will always be read as LOW. In the above figure when the switch is not pressed the 10k resistor provides the current needed for LOGIC 1 closure of switch provides logic 0to the controller pin.

INTERFACING LED TO MICROCONTROLLER Figure shows the interface of LED to the microcontroller. As we can see the anode is connected through a resistor to Vcc & the cathode is connected to the microcontroller pin. So when the port pin is high the LED is OFF and when the port is LOW the LED is turned ON.

INTERFACING 7 SEGMENT DISPLAY TO MICROCONTROLLER 7 segments displays are basically 7 LEDs as shown in figure 7.3. It will be much easier to understand if you first read interfacing LEDs to microcontroller Basically there are two types of 7 segment displays: Common anode where all segments share the same anode.

 Common cathode where all segments share the same cathode. This is shown in the figure. In common anode type, in order to turn ON a segment the corresponding pin must be set to 0 and to turn it OFF it is set to 1. The 7 segment display is not connected directly to the microcontroller. We use an IC midway. Generally IC 4511 is used. INTERFACING LCD TO MICROCONTROLLER It is a liquid crystal display of thin flat panel used for electronically displaying information such as text, images and moving pictures.

Example: Display the monitor of CPU.

PIN

DIAGRAM

OF

L.C.D.

L.C.D.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Vss Vcc Vee RS R/W E DB0 DB1DB2 DB3DB4 DB5 DB6 DB7 LED+ LED-

PIN No. 1 2 3 4

SYMBOL Vss Vcc Vee RS

I/O ---I

DESCRIPTION GROUNDED +5V POWER SUPPLY Power supply to control contrast RS=0,select command register RS=1,select data register

R/W

R/W=0,for write R/W=1,for read

6 7-14

E DB0

I/O I/O

Enable The 8 bit data bus

Circuit Diagram for displaying on LCD

GROUND +5V
Regulator

12 V D.C. Voltag e

L.C.D.
Vss Vcc Vee RS 1 2 3 4 R/W 5 E DB0 DB1 DB2 6 7 8 9 DB3 DB4 DB5 DB6 DB7 LED+ LED10 11 12 13 14 15 16

POT 10.0k

33.0p

S
1 2 3 4 5 6 7 8 9
P1 .O P1 .1 P1 .2 P1 .3 P1 .4 P1 .5

10.0k

10

11
P3 .1

12
P3 .2

13
P3 .3

14
P3 .4

15
P3 .5

16
P3 .6

17

18

19

33.0p

20

P1 .6 P1 .7 R ST P3 .0

P3 .7 XTALT2 XTAL1 GN D

8051 MCU
Vc c P0 .0 P0 .1 P0 .2 P0 .3 P0 .4 P0 .5 P0 .6 P0 .7 EA / VppAL E PSEN P2 .7 P2 .6 P2 .5 P2 .4 P2 .3 P2 .2 P2 .1 P2 .0

40

39
10.0k

38
10.0k 10.0k

37
10.0k

36

35
10.0k

34
10.0k

33
10.0k

32

31

30

29

28

27

26

25

24

23

22

21

10.0k

5.0

100.0

100.0

100.0

100.0

100.0

100.0

100.0

led 1N1183

led 1N1183

led 1N1183

led 1N1183

led 1N1183

led 1N1183

led 1N1183

led 1N1183

100.0

S1

S2

S3

S4

10.0k

10.0k

10.0k

Circuit Description
In this interfacing we use the port 3 as a LCD control and port 1 as a LCD data. Switches connected on port 3 and LED connected on port 1. Whenever we use port 0 we have to connect pull up register externally to make it by directional because of by default port 0 is unidirectional i.e. only input port . All other ports have already inbuilt pull up register so no need to connect pull up register externally.

10.0k

List of hardware
S.NO. 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. Name of Hardware. 40 pin IC base 8051 p89B51RD2FN MCU XTAL(11.0592Mhz) Capacitor 30pF 10k POT LCD 7085 regulator Pull-up resistor G.P. PCB Berg strip LED Wires Resistance Multimeter 12v DC supply source Soldering wires, soldering iron ,Flux 1 Quantity 1 1 1 2 1 1 1 1 1 As required. 8 As required As required

LCD Commands Codes

Code(HEX) 1 2 4 6 5 7 8 A C E F 10 14 18 1C 80 C0 38 Command to LCD Instruction Register Clear Display Screen. Return Home. Decrement cursor( shift cursor to left) Increment cursor( shift cursor to lift) Shift display right Shift display left Display off, cursor off Display off, cursor on Dicplay on, cursor off Display on, cursor blinking Display on, cursor blinking Shift cursorposition to left Shift cursor position to right Shift the entire display to the left Shift to the entire display to the right Force cursor to beginning of first line Force cursor to beginning of second line 2 lines and 5*7 matrix

References
Notes given at CDAC The 8051 microcontroller and embedded system by Muhammad Ali Mazidi The 8051 microcontroller- Architecture Programming and applications by K. Ayala.