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instruction set
Vittorio Giovara
Fabio Margaglia
Francesco Meo
Lorenzo Simone
1 Introduction 2
2 Instruction List 3
2.1 Instruction Rules . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1.1 Arithmetical Operations . . . . . . . . . . . . . . . . . 4
2.1.2 Logical Operations . . . . . . . . . . . . . . . . . . . . 4
2.1.3 Memory Operations . . . . . . . . . . . . . . . . . . . 4
2.2 Jump Operations . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2.1 Branch Operations . . . . . . . . . . . . . . . . . . . . 4
2.2.2 Shift Operations . . . . . . . . . . . . . . . . . . . . . 5
2.2.3 Special Operations . . . . . . . . . . . . . . . . . . . . 5
3 Compiler structure 6
3.1 The JFlex scanner . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 The CUP parser . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.2.1 Instruction Encoding and Emulation . . . . . . . . . . 8
3.2.2 Error Handling . . . . . . . . . . . . . . . . . . . . . . 8
1
Chapter 1
Introduction
The aim of this report is to provide documentation about the use of the
instruction set of a custom MIPS-like processor and about the internal code
of the compiler.
This document will list the implemented instructions and their assembly-
like structure. Afterwards it will present the use of the compiler itself as
well as the explanation of the involved code about the scanner and parsing
technique.
The compiler comes with an emulator, that preforms simulated execution
of the compiled code.
2
Chapter 2
Instruction List
• NOP • ST8
• ADDU • JMP
• ADDS • JAL
• SUBU • JZ
• SUBS
• JNZ
• MULU
• JLZ
• MULS
• JGZ
• DIVU
• JLEZ
• DIVS
• JGEZ
• AND
• LLS
• OR
• LRS
• XOR
• ALS
• LD32
• LD16 • ARS
• LD8 • LR
• ST32 • RR
• ST16 • MOV
3
2.1 Instruction Rules
2.1.1 Arithmetical Operations
parameter 1 : Destination Register (Rd 1 or Rt 2 )
parameter 3 : Immediate
STORE
parameter 1 : Source Register (Rt )
parameter 3 : Immediate
4
2.2.2 Shift Operations
parameter 1 : Destination Register (Rd )
NOP
No arguments needed.
3
Defines the shift or rotate amount
5
Chapter 3
Compiler structure
6
separator The character that separates the instruction arguments;
eol The character that concludes the instruction.
The actual operations are not defined by macros but are aggregated:
for example mathematicatical operations that can be signed or unsigned
are described by the same rule (eg. the addition is described as ADD(U|S)
not as ADDU and ADDS but inside that rule the two possible symbols are
differenciated.
Every rule passes a symbol to CUP, with some attributes: the number
for the register and the kind of operation for the base instructions.
7
• program −→ list
renames the non terminal symbol and produces the starting symbol.
1
this is due to the actual processor that has such dimesion because of synthesis -
constraints.