GDE021OC1

Version: 0.9

TECHNICAL

SPECIFICATION

MODEL : GDE021OC1

The content of this information is subject to be changed without notice. Please contact Good Display or its agent for further information

Customers Confirmation Customer

Date

By

Good Displays Confirmation

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GDE021OC1

Revision History
Rev.
0.1

Issued Date
Jul. 11, 2009

Revised
Preliminary

Contents

0.2

Oct. 08, 2009

0.3

Jan. 14, 2010

0.4

Mar. 01, 2010

0.5

Jun. 01, 2010

1. Add [2. Features] description 2. Add FPC Drawing 3. Modify [5. Input/Output Terminal] 4. Add [6. Command Table] 5. VCI from 2.4V to 3.3V 6. Modify [11. Block Diagram] 1. Modify [4. Mechanical Drawing] 2. Modify [5-1] Pin out List] 3. Modify [6. Command Table] 4. Add [7-6] Reference Circuit] 5. Modify [8. Typical Operating Sequence] 1. Add UV exposure Resistance in [11. Reliability test] 2. Description of screen size modify from 2.1 to 2.04 3. Modify [8. Typical Operating Sequence] 4. Modify [6. Command Table] 5. Modify drawing of 9-2) Definition of contrast ratio 6. pin out listchange pin 38 from FB to NC 7. Modify 7-6) Reference Circuit 1. Weight = 40.5 g 2. Add power consumption Typ.= 0.657(mW) , Max. = 3.610(mW) 3. Revise update time Before

After

1. Add Command Table

0.6

Jul. 01, 2010

0.7

Feb. 25,2011

0.8

Mar. 18,2011

0.9

Mar. 30,2011

2. Modify [8. Typical Operating Sequence] 1. 5-1) Modify Pin out List and add IinputOoutputI/OBi-directionalC capacitor 2. Modify (6.command table) 3. Modify (8. Typical Operating Sequence) 1. Add Note7-1 & Note7-2(page11). 2. Add part table(page23) & notes(reference circuit). 3. Modify block diagram(page33). 1. Modify 7-2) Panel DC characteristics - Standby power - Maximum image update time at 25 2. Delete 7-5) Power Consumption 3. Modify 9-1) Specifications - Contrast Ratio

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GDE021OC1

TECHNICAL

SPECIFICATION

CONTENTS
NO. 1 2 3 4 5 6 7 8 9 10 11 12 ITEM Cover Contents Application Features Mechanical Specifications Mechanical Drawing of EPD module Input/Output Terminals Command Table Electrical Characteristics Typical Operating Sequence Optical Characteristics Handling, Safety and Environment Requirements Reliability test Block Diagram PAGE 1 2 3 3 3 5 6 8 11 24 29 31 32 33

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GDE021OC1 1. Application The display is a TFT active matrix electrophoretic display, with interface and a reference system design. The 2.04 active area contains 180 x 75 pixels, and has 1-bit and 2-bit full display capabilities. An integrated circuit contains gate buffer, source buffer, interface, timing control logic, oscillator, DC-DC, SRAM, LUT, VCOM, and border are supplied with each panel.

2. Features High contrast High reflectance Ultra wide viewing angle Ultra low power consumption Pure reflective mode Bi-stable Commercial temperature range Landscape, portrait mode Antiglare hard-coated front-surface Low current deep sleep mode On chip display RAM Waveform stored in On-chip OTP 8-bits Parallel (6800 & 8080), Serial peripheral interface available On-chip oscillator On-chip booster and regulator control for generating VCOM, Gate and source driving voltage. 12C Single Master Interface to read external temperature sensor reading Available in COG package, IC thickness 250um

3. Mechanical Specifications Parameter Screen Size Display Resolution Active Area Pixel Pitch Pixel Configuration Outline Dimension Weight Specifications 2.04 180(H)75(V) 20.0(H)48.0(V) 0.2660.266 Rectangle 26.60 (H)59.50(V)1.18(D) 40.5 Unit Inch Pixel mm mm mm g Remark Dpi : 95 -

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GDE021OC1 4. Mechanical Drawing of EPD module

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GDE021OC1 5. Input/Output Terminals

5-1) Pin out List

IinputOoutputI/OBi-directionalCcapacitor
Pin # Type 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Signal Description A stabilizing capacitor should be connected between VCOM and VSS Do not connect with other NC pins Power Supply pin for VCOM, VGL and VSL Do not connect with other NC pins Negative Source driving voltage Do not connect with other NC pins Power Supply pin for VGH and VSH Do not connect with other NC pins Positive Source driving voltage Do not connect with other NC pins Core logic power pin Ground Power Supply for the chip Do not connect with other NC pins data signal source driver data signal source driver data signal source driver data signal source driver data signal source driver data signal source driver data signal source driver data signal source driver Chip Select input pin Read / Write control input pin Data / Command control pin Enable pin Reset Busy state output pin Bus selection pins Bus selection pins Note 5-1 Note 5-2 Note 5-3 Note 5-4 Note 5-5 Note 5-6 Note 5-7 Keep Open Keep Open Keep Open Keep Open Keep Open Keep Open Remark

C C C C C C I I/O I/O I/O I/O I/O I/O I/O I/O I I I I I O I I

VCOM NC PREVGL NC VSL NC PREVGH NC VSH NC VDD VSS VCI NC D7 D6 D5 D4 D3 D2 D1 D0 CS# R/W#(WR#) D/C# E(RD#) RES# BUSY BS1 BS0

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GDE021OC1
31 32 33 34 35 36 37 38 39 40

I/O O C C I O

TSDA TSCL NC VGH NC VGL NC NC RESE GDR

I2C Interface to digital temperature sensor Data pin I2C Interface to digital temperature sensor Clock pin Do not connect with other NC pins Positive Gate driving voltage Do not connect with other NC pins Negative Gate driving voltage Do not connect with other NC pins Do not connect with other NC pins Current Sense Input for the Control Loop Keep Open Keep Open Keep Open Keep Open

N-Channel MOSFET Gate Drive Control

Note 5-1This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW in parallel interface. When CS# is not in use, please connect to VCI or VSS. Note 5-2This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial interface is selected, this pin R/W (WR#) can be connected to either VCI or VSS. Note 5-3This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D [7:0] will be interpreted as data. When the pin is pulled LOW, the data at D [7:0] will be interpreted as command. Note 5-4This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial interface is selected, this pin E (RD#) should be connected to either VCI or VSS. Note 5-5This pin is reset signal input. Active Low. Note 5-6This pin is Busy state output pin. When Busy is High, the operation of the chip should not be interrupted, command should not be sent. e.g., The chip would put Busy pin High when - Outputting display waveform; or - Programming with OTP - Communicating with digital temperature sensor Note 5-7

TableBus interface selection

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GDE021OC1 6. Command Table D/C# = 0R/W#(WR#) = 0E(RD# = 1) unless specific setting is statedPORDefault value.

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GDE021OC1

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GDE021OC1

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GDE021OC1 7. Electrical Characteristics

7-1) Absolute maximum rating Parameter Logic Supply Voltage Logic Input voltage Logic output voltage Operating Temp. range Storage Temp. range 7-2) Panel DC characteristics Symbol VCI VIN VOUT TORP TSTG Rating -0.5 to +3.6 -0.5 to VCI+0.5 -0.5 to VCI+0.5 0 to +50 -25 to +70 Unit V V V

The following specifications apply forVSS = 0V, VCI = 3.3V, TA = 25

Parameter Signal ground Logic Supply Voltage High level input voltage Low level input voltage High level output voltage Low level output voltage Maximum power panel Standby power panel Typical power panel Operating temperature Storage temperature Maximum image update time at 25 DC/DC off Symbol VSS Conditions Min Typ Max Unit V V V

2.4 0.8 VCI

0 3.0

3.3 0.2 VCI

VCI
VIH VIL VOH VOL PMAX PSTBY PTYP IOH= -100uA IOH=100uA

V V

0.9 VCI 0.1 VCI 0 -25 0.657 3.610 0.165 50 70 4000

V mW mW mW ms

Deep sleep mode current Note 7-1 Sleep mode current

VCI

No clock No input load Ram data not retain DC/DC off No clock No input load Ram data retain

uA

VCI Note 7-2

35

50

uA

Note 7-1: From deep sleep mode to normal mode,typical is 10ms,maximum is 50ms. Note 7-2: When module power on,dont transfer any command to module.It will into sleep mode.
(From sleep mode to normal mode is immediately)

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GDE021OC1
The Typical power consumption is measured with following pattern transition: from horizontal 4 gray scale pattern to vertical 4 gray scale pattern.(Note 7-1) The standby power is the consumed power when the panel controller is in standby mode. The listed electrical/optical characteristics are only guaranteed under the controller & waveform provided by Good Display. Vcom is recommended to be set in the range of assigned value 0.1V.

Note 7-1 The Typical power consumption

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GDE021OC1

7-3 ) Panel AC characteristics

The following specifications apply forVSS = 0V, VCI = 3.3V, TA = 25

Parameter Internal Oscillator frequency 7-3-1) MCU Interface Note 7-2L is connected to VSS Note 7-3H is connected to VCI 7-3-1-1) MCU Interface Selection Symbol Fosc Conditions VCI = 2.4 to 3.3V Min Typ Max Unit MHz

0.95

1.05

SPD2701 MCU interface consist of 8 data pins and 5 control pins. The pin assignment at different interface mode is summarized in Table 7-1. Different MCU mode can be set by hardware selection on BS[2:0] pins.
Pin Name Bus interface SPI4 8-bit 8080 SPI3 8-bit 6800 Data/Command Interface D7 D6 D5 L L D4 D3 D2 NC D [7:0] NC D [7:0] D1 SDin SDin D0 SCLK SCLK E (RD#) L RD# L E Control Signal R/W# CS# D/C# (WR#) L CS# D/C# WR# CS# D/C# L CS# L R/W# CS# D/C#

RES# RES# RES# RES# RES#

MCU interface assignment under different bus interface mode 7-3-1-2) MCU Parallel 6800-series Interface

The parallel interface consists of 8 bi-directional data pins (D[7:0]), R/W#, D/C#, E and CS#. A LOW in R/W# indicates WRITE operation and HIGH in R/W# indicates READ operation. A LOW in D/C# indicates COMMAND read/write and HIGH in D/C# indicates DATA read/write. The E input serves as data latch signal while CS# is LOW. Data is latched at the falling edge of E signal. Function Write Command Read status Write data Read data E R/W# L CS# L D/C# L L H H

H L L L H L Control pins of 6800 interface

Note 7-4 stands for falling edge of signal

In order to match the operating frequency of display RAM with that of the microprocessor, some pipeline processing is internally performed which requires the insertion of a dummy read before the first actual display data read. This is shown in Figure 7-1.

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GDE021OC1

7-3-1-3) MCU Parallel 8080-series Interface

The parallel interface consists of 8 bi-directional data pins (D[7:0]), RD#, WR#, D/C# and CS#. A LOW in D/C# indicates COMMAND read/write and HIGH in D/C# indicates DATA read/write. A rising edge of RD# input serves as a data READ latch signal while CS# is kept LOW. A rising edge of WR# input serves as a data/command WRITE latch signal while CS# is kept LOW.

high low

high low

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GDE021OC1 Function Write Command Read status Write data Read data RD# H WR# CS# L D/C# L L H H

H L L H H L Control pins of 8080 interface (Form 1)

Note 7-5 stands for rising edge of signal Note 7-6Refer to Figure 13-2 for Form 1 8080-Series MPU Parallel Interface Timing Characteristics

Alternatively, RD# and WR# can be keep stable while CS# serves as the data/command latch signal. Function RD# WR# CS# D/C# L Write H L Command Read status L H L Write data H H L Read data H H L Control pins of 8080 interface (Form 2) Note 7-7 stands for rising edge of signal
Note 7-8Refer to Figure 13-3 for Form 2 8080-Series MPU Parallel Interface Timing Characteristics

In order to match the operating frequency of display RAM with that of the microprocessor, some pipeline processing is internally performed which requires the insertion of a dummy read before the first actual display data read. This is shown in Figure 7-4.

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GDE021OC1
7-3-1-4) MCU Serial Interface (4-wire SPI)

The serial interface consists of serial clock SCLK, serial data SDIN, D/C#, CS#. In SPI mode, D0 acts as SCLK, D1 acts as SDIN. For the unused data pins, D2 should be left open. The pins from D3 to D7, E and R/W# can be connected to an external ground. Function Write Command Write data E(RD#) Tie LOW Tie LOW R/W#(WR#) CS# Tie LOW L D/C# L SCLK

H Tie LOW L Control pins of Serial interface Note 7-9 stands for rising edge of signal

SDIN is shifted into an 8-bit shift register on every rising edge of SCLK in the order of D7, D6, D0. D/C# is sampled on every eighth clock and the data byte in the shift register is written to the Graphic Display Data RAM (RAM) or command register in the same clock. Under serial mode, only write operations are allowed.

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GDE021OC1
7-3-1-5) MCU Serial Interface (3-wire SPI)

The 3-wire serial interface consists of serial clock SCLK, serial data SDIN and CS#. In 3-wire SPI mode, D0 acts as SCLK, D1 acts as SDIN. For the unused data pins, D2 should be left open. The pins from D3 to D7, R/W# (WR#)#, E and D/C# can be connected to an external ground. The operation is similar to 4-wire serial interface while D/C# pin is not used. There are altogether 9- bits will be shifted into the shift register on every ninth clock in sequence: D/C# bit, D7 to D0 bit. The D/C# bit (first bit of the sequential data) will determine the following data byte in the shift register is written to the Display Data RAM (D/C# bit = 1) or the command register (D/C# bit = 0). Under serial mode, only write operations are allowed. Function Write Command Write data E(RD#) Tie LOW Tie LOW R/W#(WR#) CS# Tie LOW L D/C# Tie LOW SCLK

Tie LOW L Tie LOW Control pins of 3-wire Serial interface stands for rising edge of signal Note 7-10

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GDE021OC1
7-3-2) Timing Characteristics of 6800-Series MCU Parallel Interface

6800-Series MCU Parallel Interface Timing Characteristics (VCI-VSS = 1.8V to 2.0V, TA = 25, CL=20pF)

[20% ~ 80%] [20% ~ 80%]

6800-series MCU parallel interface characteristics

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GDE021OC1
7-3-3) Timing Characteristics of 8080-Series MCU Parallel Interface

8080-Series MCU Parallel Interface Timing Characteristics (VCI-VSS= 1.8V to 2.0V, TA= 25, CL=20pF)

[20% ~ 80%] [20% ~ 80%]

8080-series MCU parallel interface characteristics

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GDE021OC1
7-3-4) Timing Characteristics of Series Interface

Series Interface Timing Characteristics (VCI-VSS= 1.8V to 2.0V, TA= 25, CL=20pF)

[20% ~ 80%] [20% ~ 80%]

Series interface characteristics

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GDE021OC1
7-4) Reference Circuit

Figure. 7-4 (1)

Note: 40pins connector (Connect to FPC of 2.04 panel)

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GDE021OC1

Figure. 7-4 (2)

Note: C1,C6,C7 for stable voltage. C3,C5,C9,C10 for ic inside charge pump circuit.

Figure. 7-4 (3)

Note: Thermal sensor circuit

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GDE021OC1

Figure. 7-4 (4)

Note: For IC inside PWM circuit (Generate PREVGH,PREVGL)

BOM

or MBR0530

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GDE021OC1 8. Typical Operating Sequence

Initialize Display:

Close charge pump:

Open charge pump:

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GDE021OC1

Normal display:

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GDE021OC1

Convert image format: Converting from a picture in Windows 24-bit bitmap (BMP) format.

2x2 (4 pixels) Bitmap Data Structure

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GDE021OC1

Converting monochrome BMP to Driver IC

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GDE021OC1

Converting color BMP to Driver IC

Since the BMP file is the last line at the beginning, here are some suggested approach to convert a picture without frame buffer: Flip the image up side down before save to BMP. Change the scan direction of the driver IC; make the last line scan 1st.

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GDE021OC1 9. Optical characteristics

9-1) Specifications

Measurements are made with that the illumination is under an angle of 45 degrees, the detection is perpendicular unless otherwise specified. T = 25oC
SYMBOL R Gn CR Tupdate PARAMETER Reflectance Nth Grey Level Contrast Ratio Update time CONDITIONS White 2~4-bit mode MIN TYP. MAX sec UNIT % L*

Note Note 9-1 -

30
-

35
DS+(WS-DS)n/(m-1)

10
-

12 2~4

WSWhite state , DSDark state Gray state from Dark to WhiteDSG1G2GnGm-2WS m4, when 2 bits mode Note 9-1Luminance meterEye One Pro Spectrophotometer

9-2) Definition of contrast ratio

The contrast ratio (CR) is the ratio between the reflectance in a full white area (Rl) and the reflectance in a dark area (Rd) CR = Rl/Rd

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GDE021OC1
9-3) Reflection Ratio

The reflection ratio is expressed as R = Reflectance Factorwhite board x ( Lcenter / Lwhite board ) Lcenter is the luminance measured at center in a white area (R=G=B=1). Lwhite board is the luminance of a standard white board. Both are measured with equivalent illumination source. The viewing angle shall be no more than 2 degrees.

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GDE021OC1 10. HANDLING, SAFETY AND ENVIROMENTAL REQUIREMENTS

WARNING The display glass may break when it is dropped or bumped on a hard surface. Handle with care. Should the display break, do not touch the electrophoretic material. In case of contact with electrophoretic material, wash with water and soap. CAUTION The display module should not be exposed to harmful gases, such as acid and alkali gases, which corrode electronic components. Disassembling the display module can cause permanent damage and invalidate the warranty agreements. Observe general precautions that are common to handling delicate electronic components. The glass can break and front surfaces can easily be damaged. Moreover the display is sensitive to static electricity and other rough environmental conditions.

Data sheet status Product specification Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. This data sheet contains final product specifications.

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GDE021OC1 11. Reliability test

TEST 1 2 3 4 5 6 7 8 9 CONDITION METHOD IEC 60 068-2-2Bp IEC 60 068-2-2Ab IEC 60 068-2-2Bp IEC 60 068-2-1Ab IEC 60 068-2-3CA IEC 60 068-2-3CA IEC 60 068-2-14 IEC60 068-2-5Sa IEC 62179, IEC 62180 REMARK

High-Temperature T = 50C, 30% for 240 hrs Operation Low-Temperature T = 0C for 240 hrs Operation High-Temperature T = +70C, 23% for 240 hrs Storage Test in white pattern Low-Temperature T = -25C for 240 hrs Storage Test in white pattern High Temperature, HighT = +40C, RH = 90% for 168 hrs Humidity Operation High Temperature, High- T = +60C, RH = 80% for 240 hrs Humidity Storage Test in white pattern -25 +70 , 100 cycles Temperature Cycle 30 mins 30 mins Test in white pattern UV exposure Resistance Electrostatic Effect (non-operating) 765 W/m2 for 168hrs,40 Machine mode +/- 250V, 0, 200pF

10

Package Vibration

11

Package Drop Impact

1.04G, Frequency10~500Hz Full packed for shipment DirectionX,Y,Z Duration1 hours in each direction Drop from height of 122 cm on concrete surface. Drop sequence 1 corner, 3 edges, Full packed for shipment 6 faces One drop for each. 700hPa ( = 3000m ),48Hr 260hPa ( = 10000m ),48Hr Test in white pattern

12

Altitude test Operation Altitude test Storage

13

Actual EMC level to be measured on customer application. NoteThe protective film must be removed before temperature test.

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GDE021OC1 12. Block Diagram (schematic drawing)

2.04 Panel Driver IC Active area

FPC 40pins

Pin1 )

Connector 40pins as page21 , Figure. 7-4(1)

Data bus (6800 or 8080 or SPI) Control bus VCI Capacitor (As page22 , Figure. 7-4 (2)) CPU or MCU or ARMetc (Designed by customer) Power circuit (Generate VCI voltage) (Designed by customer) Thermal sensor (As page22 , Figure. 7-4 (3))

PWM circuit

PCBA

(As page23 , Figure. 7-4 (4))

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