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Features
Low Frequency Drift with Temperature . . . . . . .250ppm/oC Low Distortion. . . . . . . . . . . . . . . . 1% (Sine Wave Output) High Linearity . . . . . . . . . . . 0.1% (Triangle Wave Output) Wide Frequency Range . . . . . . . . . . . 0.001Hz to 300kHz Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . . 2% to 98% High Level Outputs . . . . . . . . . . . . . . . . . . . . . . TTL to 28V Simultaneous Sine, Square, and Triangle Wave Outputs Easy to Use - Just a Handful of External Components Required
Ordering Information
PART NUMBER ICL8038CCPD ICL8038CCJD ICL8038BCJD ICL8038ACJD STABILITY 250ppm/oC (Typ) 250ppm/oC (Typ) 180ppm/oC (Typ) 120ppm/oC (Typ) TEMP. RANGE (oC) 0 to 70 0 to 70 0 to 70 0 to 70 PACKAGE 14 Ld PDIP 14 Ld CERDIP 14 Ld CERDIP 14 Ld CERDIP PKG. NO. E14.3 F14.3 F14.3 F14.3
Pinout
ICL8038 (PDIP, CERDIP) TOP VIEW
Functional Diagram
V+ CURRENT SOURCE #1 I 14 NC 2I 2 3 4 5 6 7 13 NC 12 SINE WAVE ADJUST 11 V- OR GND 10 TIMING CAPACITOR 9 8 SQUARE WAVE OUT FM SWEEP INPUT BUFFER BUFFER CURRENT SOURCE #2 C COMPARATOR #2 10 6 COMPARATOR #1
SINE WAVE 1 ADJUST SINE WAVE OUT TRIANGLE OUT DUTY CYCLE FREQUENCY ADJUST V+ FM BIAS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
ICL8038
Absolute Maximum Ratings
Supply Voltage (V- to V+). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+ Input Current (Pins 4 and 5). . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 75 20 PDIP Package . . . . . . . . . . . . . . . . . . . 115 N/A Maximum Junction Temperature (Ceramic Package) . . . . . . . .175oC Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . . 0oC to 70oC
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specications
VSUPPLY = 10V or +20V, TA = 25oC, RL = 10k, Test Circuit Unless Otherwise Specied
ICL8038CC ICL8038BC MIN TYP MAX ICL8038AC MIN TYP MAX UNITS TEST CONDITIONS
PARAMETER
SYMBOL
MIN
TYP
MAX
+10 5
12
+30 15 20
+10 5 -
12
+30 15 20
+10 5 -
12
+30 15 20
V V mA
Supply Current
ISUPPLY
FREQUENCY CHARACTERISTICS (All Waveforms) Max. Frequency of Oscillation Sweep Frequency of FM Input Sweep FM Range FM Linearity Frequency Drift with Temperature (Note 5) Frequency Drift with Supply Voltage f/T f/V fMAX fSWEEP (Note 3) 10:1 Ratio 0oC to 70oC Over Supply Voltage Range 100 10 35:1 0.5 250 0.05 100 10 35:1 0.2 180 0.05 100 10 35:1 0.2 120 0.05 % ppm/oC %/V kHz kHz
OUTPUT CHARACTERISTICS Square Wave Leakage Current Saturation Voltage Rise Time Fall Time Typical Duty Cycle Adjust (Note 6) Triangle/Sawtooth/Ramp Amplitude VTRIANGLE
IOLK VSAT tR tF D
0.2 180 40
1 0.5 98
0.2 180 40 -
1 0.4 98
0.2 180 40 -
1 0.4 98
A V ns ns %
0.1 200
0.05 200
0.05 200
ICL8038
Electrical Specications
VSUPPLY = 10V or +20V, TA = 25oC, RL = 10k, Test Circuit Unless Otherwise Specied (Continued)
ICL8038CC PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX ICL8038BC MIN TYP MAX ICL8038AC MIN TYP MAX UNITS
Sine Wave Amplitude THD VSINE THD RSINE = 100k RS = 1M (Note 4) Use Figure 4 0.2 0.22 2.0 5 0.2 0.22 1.5 3 0.2 0.22 1.0 1.5 xVSUPPLY %
THD
1.5
1.0
0.8
2. RA and RB currents not included. 3. VSUPPLY = 20V; RA and RB = 10k, f 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B. 4. 82k connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.) 5. Figure 1, pins 7 and 8 connected, VSUPPLY = 10V. See Typical Curves for T.C. vs VSUPPLY. 6. Not tested, typical value for design purposes only.
Test Conditions
PARAMETER Supply Current Sweep FM Range (Note 7) Frequency Drift with Temperature Frequency Drift with Supply Voltage (Note 8) Output Amplitude (Note 10) Sine Triangle Leakage Current (Off) (Note 9) Saturation Voltage (On) (Note 9) Rise and Fall Times (Note 11) Duty Cycle Adjust (Note 11) Max Min Triangle Waveform Linearity Total Harmonic Distortion 50k ~25k 10k 10k ~1.6k 50k 10k 10k 10k 10k 10k 10k 3.3nF 3.3nF 3.3nF 3.3nF Closed Closed Closed Closed Waveform at Pin 9 Waveform at Pin 9 Waveform at Pin 3 Waveform at Pin 2 10k 10k 10k 10k 10k 10k 10k 10k 10k 10k 4.7k 10k 10k 3.3nF 3.3nF 3.3nF 3.3nF 3.3nF Closed Closed Closed Closed Closed Pk-Pk Output at Pin 2 Pk-Pk Output at Pin 3 Current into Pin 9 Output (Low) at Pin 9 Waveform at Pin 9 RA 10k 10k 10k 10k RB 10k 10k 10k 10k RL 10k 10k 10k 10k C 3.3nF 3.3nF 3.3nF 3.3nF SW1 Closed Open Closed Closed MEASURE Current Into Pin 6 Frequency at Pin 9 Frequency at Pin 3 Frequency at Pin 9
NOTES: 7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (fLO). Otherwise apply Sweep Voltage at pin 8 (2/3 VSUPPLY +2V) VSWEEP VSUPPLY where VSUPPLY is the total supply voltage. In Figure 5B, pin 8 should vary between 5.3V and 10V with respect to ground. 8. 10V V+ 30V, or 5V VSUPPLY 15V. 9. Oscillation can be halted by forcing pin 10 to +5V or -5V. 10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V. 11. Not tested; for design purposes only.
Detailed Schematic
CURRENT SOURCES REXT B Q1 Q2 5 Q3 Q4 Q7 R46 40K Q10 R3 30K Q30 Q31 Q32 Q33 Q34 Q24 9 R11 270 Q23 R12 2.7K Q25 R13 620 R16 1.8K R14 27K Q26 R15 470 Q29 Q Q27 28 R17 4.7K R18 4.7K FLIP-FLOP Q35 R41 27K Q37 Q36 Q 38 Q40 R43 27K Q39 3 R44 1K R4 100 Q11 Q12 Q13 R5 100 R6 100 Q19 Q5 COMPARATOR Q8 Q9 10 Q15 CEXT R7B 15K Q20 Q21 Q22 R10 5K Q49 R22 10K R23 2.7K R24 800 R28 33K Q50 Q51 Q52 Q53 Q54 Q55 Q56 R42 BUFFER AMPLIFIER 27K 11 2 SINE CONVERTER R38 375 R39 200 R40 5.6K R37 330 R29 33K R30 33K R31 33K Q16Q17 R7A 10K Q18 R9 5K REXT A 4 Q14 R8 5K Q47 Q46 Q45 Q44 Q43 Q42 R25 33K R26 33K R27 33K R45 33K R41 4K Q48 R19 800 R20 2.7K R21 10K Q41 R33 200 R34 375 R35 330 6 V+ R32 5.2K 1 R1 8 11K 7 R2 Q 39K 6
R36 1600
12 REXTC 82K
net-current I and the voltage across it drops linearly with time. When it has reached the level of comparator #2 (set at 1/3 of the supply voltage), the flip-flop is triggered into its original state and the cycle starts again. Four waveforms are readily obtainable from this basic generator circuit. With the current sources set at I and 2I respectively, the charge and discharge times are equal. Thus a triangle waveform is created across the capacitor and the ip-op produces a square wave. Both waveforms are fed to buffer stages and are available at pins 3 and 9.
ICL8038
The levels of the current sources can, however, be selected over a wide range with two external resistors. Therefore, with the two currents set at values different from I and 2I, an asymmetrical sawtooth appears at Terminal 3 and pulses with a duty cycle from less than 1% to greater than 99% are available at Terminal 9. The sine wave is created by feeding the triangle wave into a nonlinear network (sine converter). This network provides a decreasing shunt impedance as the potential of the triangle moves toward the two extremes.
C 1/3 V SUPPLY R A RA C CV t 1 = ------------- = ------------------------------------------------------------------ = ----------------I 0.22 V SUPPLY 0.66
The falling portion of the triangle and sine wave and the 0 state of the square wave is:
t 2 R R C C 1/3V SUPPLY A B CV = ------------ = ----------------------------------------------------------------------------------- = ------------------------------------V 1 V 0.66 ( 2R A R ) SUPPLY SUPPLY B 2 ( 0.22 ) ----------------------- 0.22 ----------------------R B R A
Thus a 50% duty cycle is achieved when RA = RB. If the duty cycle is to be varied over a small range about 50% only, the connection shown in Figure 3B is slightly more convenient. A 1k potentiometer may not allow the duty cycle to be adjusted through 50% on all devices. If a 50% duty cycle is required, a 2k or 5k potentiometer should be used. With two separate timing resistors, the frequency is given by:
1 1 f = --------------- = -----------------------------------------------------t1 + t2 RA C RB ------------ 1 + ------------------------- 0.66 2R A R B
Waveform Timing
The symmetry of all waveforms can be adjusted with the external timing resistors. Two possible ways to accomplish this are shown in Figure 3. Best results are obtained by keeping the timing resistors RA and RB separate (A). RA controls the rising portion of the triangle and sine wave and the 1 state of the square wave. The magnitude of the triangle waveform is set at 1/3 VSUPPLY; therefore the rising portion of the triangle is,
or, if RA = RB = R
0.33 f = ---------- (for Figure 3A) RC
V+ V+ RA 7 4 5 RB 6 9 RL 1k RA 7 4 5 RB 6 9 RL
ICL8038
ICL8038
10 C
11
12 2 82K V- OR GND
10 C
11
12 2 100K V- OR GND
FIGURE 3A.
FIGURE 3B.
ICL8038
Neither time nor frequency are dependent on supply voltage, even though none of the voltages are regulated inside the integrated circuit. This is due to the fact that both currents and thresholds are direct, linear functions of the supply voltage and thus their effects cancel. R1 and R2 are shown in the Detailed Schematic. A similar calculation holds for RB. The capacitor value should be chosen at the upper end of its possible range.
Reducing Distortion
To minimize sine wave distortion the 82k resistor between pins 11 and 12 is best made variable. With this arrangement distortion of less than 1% is achievable. To reduce this even further, two potentiometers can be connected as shown in Figure 4; this conguration allows a typical reduction of sine wave distortion close to 0.5%.
V+ RA 7 4 1k RB 5 6 9 RL
ICL8038
The frequency of the waveform generator is a direct function of the DC voltage at Terminal 8 (measured from V+). By altering this voltage, frequency modulation is performed. For small deviations (e.g. 10%) the modulating signal can be applied directly to pin 8, merely providing DC decoupling with a capacitor as shown in Figure 5A. An external resistor between pins 7 and 8 is not necessary, but it can be used to increase input impedance from about 8k (pins 7 and 8 connected together), to about (R + 8k). For larger FM deviations or for frequency sweeping, the modulating signal is applied between the positive supply voltage and pin 8 (Figure 5B). In this way the entire bias for the current sources is created by the modulating signal, and a very large (e.g. 1000:1) sweep range is created (f = 0 at VSWEEP = 0). Care must be taken, however, to regulate the supply voltage; in this conguration the charge current is no longer a function of the supply voltage (yet the trigger thresholds still are) and thus the frequency becomes dependent on the supply voltage. The potential on Pin 8 may be swept down from V+ by (1/3 VSUPPLY - 2V).
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certication.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
ICL8038
V+ RA 7 R 8 ICL8038 3 4 RA 7 5 RB 9 15K 4 5 RB 6 9 RL
With a dual supply voltage the external capacitor on Pin 10 can be shorted to ground to halt the ICL8038 oscillation. Figure 7 shows a FET switch, diode ANDed with an input strobe signal to allow the output to always start on the same slope.
V+
FM
10 C
11
12 2 81K V- OR GND
ICL8038
1N914
11
10
2 1N914
C V+ SWEEP VOLTAGE 4 RA 5 RB 6 9 RL
STROBE
10 C
11
12 2 81K V- OR GND
To obtain a 1000:1 Sweep Range on the ICL8038 the voltage across external resistors RA and RB must decrease to nearly zero. This requires that the highest voltage on control Pin 8 exceed the voltage at the top of RA and RB by a few hundred mV. The Circuit of Figure 8 achieves this by using a diode to lower the effective supply voltage on the ICL8038. The large resistor on pin 5 helps reduce duty cycle variations with sweep. The linearity of input sweep voltage versus output frequency can be signicantly improved by using an op amp as shown in Figure 10.
+10V 1N457 DUTY CYCLE 0.1F 1K 4.7K 15K 4.7K
Typical Applications
The sine wave output has a relatively high output impedance (1k Typ). The circuit of Figure 6 provides buffering, gain and amplitude adjustment. A simple op amp follower could also be used.
V+ RA 7 4 5 RB 6 2 AMPLITUDE + 741
100K 8 ICL8038
ICL8038
10 C
11
4.7K 20K V-
10
11 0.0047F
15M
ICL8038
DUTY CYCLE FREQUENCY ADJUST 7 4 5 6 3 SINE WAVE OUT 9 ICL8038 2 V2+
TRIANGLE OUT
V1+
INPUT
AMPLIFIER
DEMODULATED FM R2
10
11
12
TIMING CAP.
HIGH FREQUENCY SYMMETRY 1N753A (6.2V) 1k 1,000pF 4 +15V 5 6 9 500 4.7k 10k 4.7k 1M 100k LOW FREQUENCY SYMMETRY SINE WAVE OUTPUT 100k
741 + -VIN P4
1k 8
+15V
+ 741 +
11
12 2
15
-55oC
125oC 10 25oC
10
15
20
25
30
NORMALIZED FREQUENCY
10
15
20
25
30
NORMALIZED FREQUENCY
RISE TIME
30
-50
-25
25
75
125
10
TEMPERATURE (oC)
SATURATION VOLTAGE
10
12
14
16
18
20
1.2 NORMALIZED OUTPUT VOLTAGE 1.1 1.0 0.9 0.8 0.7 0.6 10 100 1K 10K 100K 1M FREQUENCY (Hz)
10.0
LINEARITY (%)
1.0
0.1
12 10 DISTORTION (%)
1.0
0.9
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
10