SHANMUGHA

ARTS, SCIENCE, TECHNOLOGY & RESEARCH ACADEMY SASTRA UNIVERSITY

(A University Established U/Sec 3 of the UGC Act 1956)

TIRUMALAISAMUDRAM
THANJAVUR- 613 401.

SUBJECTS OF STUDY AND SYLLABI FOR

M.TECH - EMBEDDED SYSTEMS
(For the 2011-2013 Batch Onwards)

TIFAC CORE
Item No:

SEMESTER I:

Subject Code

Subject Title

Periods of Instruction L T 1 0 0 1 1 0 4 P 0 0 0 0 0 6 6

Credits

MEBD101 MEBD102 MEBD103 MEBD104EXX MEBD105EXX MEBD106

Embedded Systems Design Micro Controllers and Applications Design of Digital Systems D- I D II Embedded Systems Lab TOTAL

4 4 4 3 3 0 18

4 4 4 3 3 2 20

ELECTIVES Periods of Instruction L E11 E12 E13 E14 Design of ASICs Wireless and Mobile Communication Real Time Systems Software Technology for Embedded Systems 3 3 3 3 T 1 1 1 1 P 0 0 0 0 3 3 3 3

Subject Code

Subject Title

Credits

SEMESTER II:

Subject Code

Subject Title L

Periods of Instruction T 1 0 0 0 0 0 1 P 0 0 0 0 0 6 6

Credits

MEBD 201 R03 MEBD 202 R03 MEBD 203 R03 MEBD 204EXX MEBD205EXX MEBD 206

Embedded Processors & Peripherals Real Time Operating System Embedded Networking Elective - III Elective IV Embedded Systems & RTOS Lab TOTAL

4 4 4 3 3 0 18

4 4 4 3 3 2 20

DEPARTMENTAL ELECTIVES:

Subject Code

Subject Title L

Periods of Instruction T P

Credits

E21 E22 E23 E24

XML and Web Services Hardware and Software Co-Design Embedded Systems for Security Embedded Control Systems

3 3 3 3

0 0 0 0

0 0 0 0

3 3 3 3

SEMESTER III:

Subject Code

Subject Title L

Periods of Instruction T 1 0 0 0 1 P 0 0 0 3 3

Credits

MEBD 301 MEBD302EXX EBD303EXX MEBD 304

Distributed Embedded Computing Elective - V Elective -VI Seminar TOTAL

4 3 3 0 10

4 3 3 1 11

DEPARTMENTAL ELECTIVES:

Subject Code

Subject Title L

Periods of Instruction T 0 0 0 0 P 0 0 0 0

Credits

E31 E32 E33 E34

Wireless Sensor Networks Intelligent Embedded Systems Robotics & Automation Computational Intelligence

3 3 3 3

3 3 3 3

SEMESTER IV:

Subject Code

Subject Title L

Periods of Instruction T 0 0 P 18 18

Credits

MEBD 401

Project Work & Viva Voce TOTAL

0 0

12 12

TOTAL CREDITS: 20+20+11+12 = 63

MEBD101 EMBEDDED SYSTEMS and DESIGN L T P Credits 4 1 0 4 __________________________________________________________________________ UNIT- I ( 12 Periods)

Design: Embedded Design Life Cycle: Product Specification Hardware Software Partitioning Design and Integration Selection Process: Performance Measuring Tools Benchmarking RTOS Availability Tool Chain availability Hardware Software Duality Hardware Trends ASIC: Managing the Risk Co verification. UNIT- II (12 Periods)

Process Models and Co- Design : Models of Operation Finite State Machines Models HCFSM and State charts Language Program-State Machine Models Concurrent Process Models Inter process Communication Synchronization - Implementation Data Flow Model Design Technology Automation Synthesis Hardware Software co simulation IP cores Design Process Model. UNIT- III (12 Periods)

Instruction Set Architecture : General Purpose Processors: Architecture Instruction Set Development Environment - Application Specific Instruction set processors - DSP processors Peripherals Timers Watchdog Timers - Counters UART- PWM LCD Controllers Memory Advanced RAM. UNIT- IV (12 Periods)

Embedded Software : Embedded Communication System Microprocessor Interfacing Advanced Embedded Communication Principles- Serial Parallel Wireless Communication Protocol Implementations: CAN and I2C IEEE802.11 - Bluetooth etc Example. Device and Router Management Management of Subsystem Architecture System Start up and Configuration - Interrupt Service Routines Inter Process Communication device drivers and kernel level software. UNIT- V (12 Periods)

Embedded System Verification and Validation : Requirement analysis (functional and non functional) Verification and Validation Basic Toolset Host based Debugging Remote Debugging ROM Emulators Logic Analyzer Caches Compiler Optimization Statistical profiling In circuit emulators Real Time trace Hardware Breakpoints Overlay Memory Timing Constraints Usage Issues Triggers.

References: 1. Arnold S. Berger, Embedded System Design, CMP Books USA 2002. 2. Frank Vahid and Tony Gwargie, Embedded System Design, John Wiley & Sons 2002 3. David.E.Simon, An Embedded Software Primer, Pearson Education 2001. 4. Steve Heath, Embedded System Design, 2nd Edition, Elseiver 2004.

MEBD102 MICROCONTROLLER A N D ITS APPLICATIONS L T P Credits 4 1 0 4 __________________________________________________________________________ UNIT I (12 Periods)

Introduction to 8051 microcontroller: Embedded microcontrollers - Microcontrollers vs Microprocessor - CISC vs RISC - Harvard vs Princeton - Detailed Study of 8051 Architecture Special Function Registers Program and Data Memory Organization Oscillator Configuration Parallel Port Architecture - Timers Serial Port Architecture - Interrupt Handling. UNIT-II (12 Periods)

Programming in 8051: Power Saving Modes - Program Memory Lock 8051 Addressing modes Instruction set Assembly language programming with Timers - Parallel Port - Serial Port Interrupts. UNIT III (12 Periods)

Introduction to AVR RISCMicrocontroller: AVR Family architecture Register file ALU Memory Access I/O Memory I/O Ports - Timer WDT - UART Power down modes Interrupt Structure Different types of AVR controllers. UNIT IV (12 Periods)

Programming in AVR Micro controller: AVR Addressing modes Instruction set Assembly language programming with on-chip peripherals. UNIT V (12 Periods)

Interfacing with 8051 and AVR Microcontroller: Interfacing 8051 and AVR with 7-segment displays LCD ADC DAC - stepper motor Switches.

References: 1. Muhammad ail Mazidi, Janice Gilispie Mazzidi,"The 8051 Microcontroller and Embedded Systems, II edition, Pearson education, 2008 2. Kenneth Ayala. "The 8051 microcontroller". III edition, Penram International publishing India (p) Ltd, 2004 3. Dhananjay v. Gadre Programming and Customizing the AVR Microcontroller, The McGraw-Hill Companies, Inc, New Delhi, 2008. 4. Muhammad Ali Mazidi, Janice Mazidi, Sarmad Naimi, Avr Microcontroller and Embedded Systems: Using Assembly and C, Prentice Hall 2010

MEBD103 DESIGN OF DIGITAL SYSTEMS L T P Credits 4 0 0 4 ____________________________________________________________________________ UNIT-I (12 Periods)

Principles of Digital Design: Combinatorial Components-Ripple-carry Adders-Carry-LookAhead Adders-Adders/Sub tractors-Logic unit-Arithmetic-Logic Unit-Decoders-SelectorsBuses-Priority Encoders-Magnitude Comparators-Shifters and Rotators-read-Only memoriesProgrammable Logic Arrays-ChapterSequential Logic-Storage ComponentsRegister Transfer Design. UNIT II (12 Periods)

Programmable Read Only Memory (prom), Field Programmable Combinational Devices: Mask Programmed ROM-PROM-EPROM-EEPROM-Programmable Logic Element(PLE)Combinational Logic Design using PLEs-Sequential circuit Realization using PLEs-FieldProgrammable Gate Array-Field-Programmable Address Decoder(EPAD)-Field-Programmable Logic Array(FPLA)-Logic Design Using FPLAs. UNIT-III (12 Periods) Logic Cell Array: XC2000 Series LCA-Logic Block-Input/Output Block-Programmable Interconnect-configuration Memory-XC3000 series LCA-Logic Design using Cell Arrays-State machine Design-Design Aids. UNIT-IV (12 Periods)

Fault Modeling, Logic and Fault Simulation, Combinational Circuit Test Generation : Defects, Errors, and Faults-Functional Versus Structural Testing-Levels of Fault Models-A Glossary of Fault Models-Single Struck-at Fault-Fault Equivalence-Equivalence of Single Struck-at Faults-Fault Collapsing-Fault Dominance and Checkpoint Theorem- Logic And Fault Simulation-Combinational Circuit Test Generation. UNIT-V (12 Periods)

Digital DFT and Scan Design, Built-in Self-test: Ad-Hoc DFT Methods-Scan design-PartialScan Design-Variations of Scan- The Economic Case for BIST-Random Logic BIST-Memory BIST-Delay Fault BIST

References: 1. Daniel D.Gajski Principles of Digital Design Prentice Hall International Editions 1997. 2. Parag K.Lala, Digital System Design Using Programmable Logic devices BS Publications, Indian Reprint 2003. 3. Michael L.Bushnell, Vishwani D.Agrawal Essentials of Electronic Testing Kluwer academic Publishers, Second printing with corrections-2001.

E11: DESIGN OF ASICs

L T P Credits 3 1 0 3 ___________________________________________________________________________ UNIT- I ( 9 Periods) Introduction to ASICs: Types of ASICs design flow Economics of ASICs, ASIC cell libraries. Review of CMOS LOGIC: CMOS Transistors CMOS process CMOS design rulescombinational logic cells Sequential logic cells Data path logic cells- I/O cells. UNIT - II (9 Periods) ASIC Library Design: Transistors as resisters transistors parasitic capacitance logical efforts Library cell design Library architecture Gate array design standard cell design Data path Cell design. UNIT - III (9 Periods) Simulation : Types of simulation : Behavioral simulation, Functional simulation, timing simulation, Gate level simulation & net capacitance Logic simulation static timing analysis Formal verification switch level simulation transistor level simulation. UNIT IV (9 Periods) ASIC Construction: Physical design Methods & algorithms- Systems partitioning Estimated ASIC size Power dissipation Partitioning methods. UNIT V (9 Periods) Floor Planning, Placement & Routing: Goals and objectives- measurements of delay in floor planning floor planning tools channel deification I/O and power planning Clock planning. Placement physical design flow- Routing: Global routing detailed routing special routing Circuit extraction and DRC. References: 1. M.J.S.Smith, Application Specific Integrated Circuits, 1st Edition Addison Wesley, 2001. 2. Razak Hossain High Performance ASIC Design: Using Synthesizable Domino Logic in an ASIC Flow , CAMBRIDGE Press 2008. 3. Nigel Horspool, Peter Gorman The ASIC Handbook PHI,2001.

E12 WIRELESS AND MOBILE COMMUNICATION L T P Credits 3 1 0 3 ___________________________________________________________________________ UNIT I ( 9 Periods) Introduction: Wireless Transmission signal propagation spread spectrum Satellite Networks Capacity Allocation FAMA DAMA MAC. UNIT II (9 Periods)

Mobile Networks: Cellular Wireless Networks GSM Architecture Protocols Connection Establishment Frequency Allocation Routing Handover Security GPRA. UNIT III (9 Periods)

Wireless Networks: Wireless LAN IEEE 802.11 Standard-Architecture Services AdHoc Network- Hiper Lan Blue Tooth. UNIT IV (9 Periods)

Routing: Mobile IP DHCP AdHoc Networks Proactive and Reactive Routing Protocols Multicast Routing UNIT V (9 Periods)

Transport and Application Layers: TCP over Adhoc Networks WAP Architecture WWW Programming Model WDP WTLS WTP WSP WAE WTA Architecture WML WML scripts. References: 1. Kaveh Pahlavan, Prasanth Krishnamoorthy, Principles of Wireless Networks PHI/Pearson Education, 2003 2. Uwe Hansmann, Lothar Merk, Martin S. Nicklons and Thomas Stober, Principles of Mobile computing, Springer, New york, 2003. 3. C.K.Toh, AdHoc mobile wireless networks, Prentice Hall, Inc, 2002. 4. Charles E. Perkins, Adhoc Networking, Addison-Wesley, 2001. 5. Jochen Schiller, Mobile communications, PHI/Pearson Education, Second Edition, 2003.

6. William Stallings, Wireless communications and Networks, PHI/Pearson Education, 2002.

E13 REAL TIME SYSTEMS L T P Credits 3 1 0 3 ___________________________________________________________________________ UNIT I (9 Periods) Introduction : Introduction Issues in Real Time Computing Structure of a Real Time System Task classes Performance Measures for Real Time Systems Estimating Program Run Times Task Assignment and Scheduling Classical uniprocessor scheduling Algorithms Uniprocessor scheduling of IRIS tasks Task assignment Mode Changes and Fault Tolerant Scheduling. UNIT II (9 Periods)

Programming Languages and Tools: Programming Languages and Tools Desired language characteristics Data typing Control structures Facilitating Hierarchical Decomposition, Packages, Run time (Exception) Error handling Overloading and Generics Multitasking Low level Programming Task Scheduling Timing Specifications Programming Environments Run time support. UNIT-III (9 Periods)

Real Time Databases: Real time Databases Basic Definition, Real time Vs General Purpose Databases, Main Memory Databases, Transaction priorities, Transaction Aborts, Concurrency control issues, Disk Scheduling Algorithms, Two phase Approach to improve Predictability Maintaining Serialization Consistency Databases for Hard Real Time Systems. UNIT IV (9 Periods)

Communications: Real Time Communication Communications media, Network Topologies Protocols, Fault Tolerant Routing. Fault Tolerance Techniques Fault Types Fault Detection. Fault Error containment Redundancy Data Diversity Reversal Checks Integrated Failure handling. UNIT V (9 Periods)

Evaluation Techniques: Reliability Evaluation Techniques Obtaining parameter values, Reliability models for Hardware Redundancy Software error models. Clock Synchronization Clock, A Nonfault Tolerant Synchronization Algorithm Impact of faults Fault Tolerant Synchronization in Hardware Fault Tolerant Synchronization in software.

References : 1. C.M. Krishna, Kang G. Shin, Real Time Systems, McGraw Hill International Editions, 1997. 2. Rajib Mall, Real-time systems: theory and practice, Pearson Education, 2007 3. Peter D.Lawrence, Real Time Micro Computer System Design An Introduction, McGraw Hill, 1988. 4. Stuart Bennett, Real Time Computer Control An Introduction, Prentice Hall of India, 1998. 5. S.T. Allworth and R.N.Zobel, Introduction to real time software design, Macmillan, 2nd Edition, 1987. 6. R.J.A Buhur, D.L Bailey, An Introduction to Real Time Systems, Prentice Hall International, 1999. 7. Philip.A.Laplante, Real Time System Design and Analysis, Prentice Hall of India, 3rd Edition, April 2004.

E14 SOFTWARE TECHNOLOGY FOR EMBEDDED SYSTEMS L T P Credits 3 1 0 3 ___________________________________________________________________________ UNIT I (9 Periods) C And Assembly : Overview of Embedded C - Compilers and Optimization - Programming and Assembly Register usage conventions typical use of addressing options instruction sequencing procedure call and return parameter passing retrieving parameters everything in pass by value temporary variables UNIT II (9 Periods)

Embedded Program and Software Development Process : Program Elements Queues Stack- List and ordered lists-Embedded programming in C++ - Inline Functions and Inline Assembly - Portability Issues - Embedded Java- Software Development process: Analysis Design- Implementation Testing Validation- Debugging - Software maintenance UNIT III (9 Periods)

Unified Modeling Language: Object State Behavior UML State charts Role of Scenarios in the Definition of Behavior Timing Diagrams Sequence Diagrams Event Hierarchies Types and Strategies of Operations Architectural Design in UML Concurrency Design Representing Tasks System Task Diagram Concurrent State Diagrams Threads. Mechanistic Design Simple Patterns UNITIV ( 9 Periods)

Introduction to Embedded LINUX: Embedded Linux Introduction Advantages- Embedded Linux Distributions - Architecture - Linux kernel architecture - User space linux startup sequence - GNU cross platform Tool chain UNIT V (9 Periods)

Embedded Drivers and Application Porting : MTD Architecture - MTD Driver for NOR Flash The Flash Mapping drivers MTD Block and character devices - Linux serial driver Ethernet driver I2C subsystem USB gadgets Watchdog - timer Kernel Modules Application porting roadmap - Programming

References: 1. Michael Barr, Programming Embedded Systems in C and C++, Oreilly, 2003 2. Bruce Powel Douglas, Real-Time UML, Second Edition: Developing Efficient Object for Embedded Systems, 2nd edition ,1999, Addison-Wesley 3. Daniel W.lewis Fundamentals of Embedded Software where C and Assembly meet PHI 2002. 4. Matthias Kalle Dalheimer, Matt Welsh, Running Linux, OReilly Publications, 2005 5. Mark Mitchell, Jeffrey Oldham and Alex Samuel Advanced Linux Programming, New Riders Publications, 2009 6. P. Raghavan ,Amol Lad , Sriram Neelakandan, Embedded Linux System Design and Development, Auerbach Publications 2006 7. Karim Yaghmour, Building Embedded Linux Systems, O'Reilly Publications, 2003.

MEBD106 Embedded Systems Lab L T P Credits 0 0 6 2 ___________________________________________________________________________ 1. Arithmetic & Logical operations using 8051 and AVR. 2. Programming with Timers in 8051. 3. RS232 communication with UART of 8051. 4. Event driven programming with External Interrupts of 8051. 5. Interfacing Character LCD with 8051. 6. Interfacing Stepper Motor with 8051. 7. Programming with Input Capture Module of AVR. 8. PWM generation using Output Compare Module of AVR. 9. Programming with on-chip ADC of AVR. 10. Programming with Analog Comparator of AVR. 11. Interfacing Switches with AVR. 12. Interfacing 7-segment displays with AVR.

MEBD201 R03 EMBEDDED PROCESSORS AND PERIPHERALS L T P Credits 4 1 0 4 ___________________________________________________________________________ UNIT- I (12 periods)

ARM Architecture: ARM Embedded Systems The RISC Design Philosophy The ARM Design Philosophy Embedded System Hardware Embedded System Software ARM Processor Fundamentals Registers Current Program Status Register Pipeline Exceptions Interrupts and the Vector Table Core Extensions Architecture Revisions ARM Processor Families UNIT- II (12 periods)

ARM Instruction Set : Introduction to the ARM Instruction Set Data Processing Instructions Branch Instructions Load Store Instructions Software Interrupt Instruction Program Status Register Instructions -Loading Constants ARMv5E Extensions Conditional Execution Introduction to the Thumb Instruction Set Thumb Register Usage ARM Thumb Interworking Other Branch Instructions Data Processing Instructions Single Register Load Store Instructions Multiple Register Load Store Instructions Stack Instructions Software Interrupt Instruction . UNIT- III (12 periods)

ARM Programming using C and Assembly Code : Efficient C Programming Overview of C Compilers and Optimization Basic C Data Types C Looping Structures Register Allocation Function Calls Pointer Aliasing Structure Arrangement Bit fields Unaligned Data and Endianness Floating Point Inline Functions and Inline Assembly Portability Issues- Writing and Optimizing ARM Assembly Code Writing Assembly Code Profiling and Cycle Counting Instruction Scheduling Register Allocation Conditional Execution Looping Constructs Bit Manipulation Efficient Switches Handling Unaligned Data . UNIT- IV (12 periods)

ARM Memory Management: Firmware Caches-memory hierarchy cache architecture policy - co processor 15 Flushing and cleaning lockdown- Software performance- Memory protection unit memory management units-ARM MMU Page Tables translation look aside buffer domains and memory access permission caches and write buffer co processor 15 and MMU configuration Fast context switch extensions

UNIT- V

(12 periods)

Peripherals Buses and Devices: Adding peripheral devices using SPI and I2C serial ports UARTS RS232 RS422 infrared communication USB Networks RS485 CAN Ethernet- Analog to digital conversion Interfacing an external ADC temperature sensor light sensor accelerometer pressure sensors Magnetic field sensors- digital to analog conversion - PWM Motor control switching big loads References: 1. 2. John Catsoulis Designing Embedded Hardware, O'Reilly, Second Edition 2003. Andrew N Sloss, Dominic Symes, Chris Wright ARM System Developers Guide designing and optimizing system software, Elsevier, 2004

MEBD 202 R03 REAL TIME OPERATING SYSTEMS L T P Credits 4 0 0 4 UNIT-I (12 periods)

RTOS Concepts and Application Domains: Real Time operating system architecture tasks and Tasks states Semaphores and shared data-Message queues-Mail boxes-Timer functionsEvents-Memory management Interrupt routines in an RTOS environment UN IT-II (12 periods)

Design in RTOS: Overview principles-General operation Writing short ISRs- Identifying the number of tasks- Assigning priorities to the tasks created Efficient task structure implementation. Design Examples- Software design for underground tank monitoring system in RTOS-Encapsulating the kernel resources in the design-Design considerations-Saving memory space and saving power. UNIT III (12 periods)

TinyOS: Introduction-Modules and TinyOS execution module-mote-mote radio communicationMote-PC serial communication and serial forwarder-Sensing-Concurrency-Network protocols. UNIT IV (12 periods)

RTX 51: Overview-Tasks-Interrupt system- System clock-Operating resources- Programming Concepts-Tasks switching-Task States-Task Classes-Interrupt Management-Task Communication-Mail boxes-Semaphores-Dynamic Memory management-Time ManagementCAN support BITBUS support-Application Example UNIT V (12 periods)

VxWorks: Introduction VxWorks tasks-Multitasking-Task State Transition-Wind Task Scheduling-Task Control-Shared Code and Rentrancy-VxWorks System Tasks- Intertask Communication- Shared Data Strucutures-Mutual Exclusion-Semaphores-Message QueuesPipes-Network intertask Communication VxWorks Events-Watchdog timers-Interrupt Service codes. References: 1. David E.Simon, An Embedded Software Primer, Pearson Education, 2004. 2. VxWorks Programmers Guide, Wind River Systems Inc., 2002. 3. RTX-51 Users Guide,Keil Electronik GmBH, Mettler and Fuchs AG,Keil Software Inc., 2002

MEBD 203 R03 EMBEDDED NETWORKING L T P Credits 4 0 0 4 __________________________________________________________________________ UNIT- I (12 periods)

Networking Concepts: Introduction - OSI model and the TCP\IP protocol suite-Transmission media-LANs. Switching Concepts-circuit switching, packet switching and message switching, WANs-PPP, X-25, Frame Relay and ATM, Connecting Devices-Repeaters, Bridges, Routers and Gateways. Communication protocols for embedded systems, Embedded communication networking issues. UNIT- II (12 periods)

Embedded Networking requirements and CAN overview: Embedded networking-Code requirements Communication requirements-Introduction to CAN Signal states-Signal levelsConnectors-Frame format-Collision and Arbitration Error Detection Mechanism Selecting CAN controller-required performance-Different implementations-Traditional full CAN-Physical interface of CAN controllers Code, Data memory and CPU performance requirements. UNIT- III (12 periods)

Implementing CAN open: Communication layout and requirements comparison of implementation methods- Implementation of MicroCAN open- Hardware modules or Chips Source code- conformance test Implementation path-complaint boot loaders- implementation example. UNIT- IV (12 periods)

Introduction 6LoWPAN: Wireless Embedded Internet - Architecture - The protocol stack Link layers - Addressing Header format - Bootstrapping - Mesh topologies - Internet integration - Adaptation Layer - Link-layer technologies beyond IEEE 802.15.4 - Link-layer service model Link-layer addressing - Link-layer management and operation - 6LoWPAN Format - Addressing - Forwarding and Routing L2 forwarding(Mesh-Under) L3routing(Route-Over) - Header Compression - Stateless header compression - Context-based header compression Fragmentation and Reassembly.

UNIT- V

(12 periods)

Application Protocols: Introduction - Design Issues - Link layer Networking - Host issues Compression - Security Protocol Paradigms - End-to-end - Real time streaming and sessions Publish/subscribe - Web service paradigms Common Protocols - Web service protocols - MQ telemetry transport for sensor networks (MQTT-S) ZigBee compact application protocol (CAP) - Service discovery Simple network management protocol (SNMP) - Real-time transport and sessions Industry specific protocols. References: Behrouz A.Forouzan, TCP/IP protocol Suite, Tata McGrawHill Edition, 2000. 2. Glaf P.Feiffer, Andrew Ayre and Christian Keyold Embedded Networking with CAN and CAN open. Embedded System Academy 2005. 3. M.Tim Jones, TCP/IP Application Layer Protocols for Embedded Systems Charles River Media; 1st edition (June 2002)
1.

E21 XML AND WEB SERVICES L T P Credits 3 0 0 3

UNIT-I (9 Periods) Introduction: Essentials of XML - XML in context-Fundamental of XML- Introduction to XML syntax- XML document structure - XML content models Rules of XML Structure Name spaces in XML-Validating XML with Document Type Definition. UNIT-II (9 Periods) XML Schemas: Creating XML Schemas- the XFiles XPath- XPointer- XLinkAlternate Schema Representations-Parsing XML using Document Object Model Parsing XML using SAX- Transforming XML with XSL- Integrating XML with databases. UNIT III (9 Periods) XML and Web: Formatting XML for Web- Interactive Graphical Visualization with SVG- XML and content management- Architecting Web Services. UNIT-IV (9 Periods) Web Services Building Blocks: SOAP- SOAP syntax- SOAP messages SOAP implementation- WSDL- WSDL Syntax- SOAP binding WSDL implementationsUDDI basics UDDI API Vendor implementations. UNIT-V (9 Periods) Applied XML: - Implementing XML in E-Business - E-Business and internet enabled supply chain - Different types of B2B interaction Enterprise integration CommerceNet eCo Framework-ebXML- Delivering wireless and voice services with XML- Wireless Applications with WAP and WML-Voice Application with VoiceXMLIntroduction to semantic web. References: 1. Ron Schmelzer et al, XML and Web Services, SAMS publishing, 2002. 2. Vijay Mukhi, Vikram RamChand, Sonal Mukhi,XML Web Services and SOAP,BPB, 2003 3. Robert Tabor, Microsoft(R ) .NET XML Web Services, Sams publisher,2001.

E22 HARDWARE SOFTWARE CO-DESIGN L T P Credits 3 0 0 3 ____________________________________________________________________________ Unit- I (9 Periods) Issues in Co design: Issues - Models-Architectures-Languages - A generic Co-Design Methodology - Hardware/Software Co-Synthesis Algorithms - Hardware/Software PartitioningOther Partitioning Systems Heuristic Algorithm - System partitioning Reactive system C0Synthesis. Unit- II (9 Periods) Hardware/Software Co-Design: Hardware/Software Co-Design - General Co-Design problems and Design Approaches - Co Design of Embedded systems - Co Design of ISAs- Co design of Embedded Systems: Status and Trends - Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment. Unit- III (9 Periods) Compilation and Verification: Compilation Techniques and tolls for Embedded Processor Architectures: Introduction- -Embedded Software Development Needs -Compilation Technologies - Design Specification and Verification: Introduction -Concurrency-Coordinating Concurrent Computations - Verification-Languages of System - Level Specification and Design: Introduction system level specification -Design Representation for System level Synthesissystem level specification Languages - Heterogeneous Specification and Multi-Language Cosimulation. Unit- IV (9 Periods) Cosyma System: Architecture and input languages-Hardware and software partitioning synthesis-Communication Estimation and Code Optimization-The Scalable-Performance Scheduler - System Optimization - New approaches in Cosyma- Hardware/Software Partitioning using the LYCOS System overview - . Unit- V (9 Periods) Cosmos: A Transformational Co-Design Tool for Multiprocessor Architectures: Introduction overview - Design Models Used by Cosmos - Design Steps- Hardware/Software Partitioning Communication refinement prototype design flow - Application.

References: 1. Jorgen Staunstrup and Wayne Wolf, Hardware/Software Co-Design: Principles and Practice, Kluwer Academic Publishers, 2002. 2. Glovanni De Micheli, Rolf Ernst, Wayne Wolf, Readings in Hardware/Software CoDesign Morgan Kaufmann Publishers. 2002. 3. Felice Balarin, Massimiliano Chiodo Paolo Giusto, Harry Hsieh, Attila Jurecska, Luciano Lavagno, Claudio Passerone, Alberto Sangiovanni- Vincentelli, Ellen Sentovich, Kei Suzuki, Bassamssam Tavvara, Hardware-software co-design of embedded system: POLIS Approach, Springer, 2004.

E23 EMBEDDED SYSTEMS FOR SECURITY L T P Credits 3 0 0 3 _____________________________________________________________________________ Unit-I (9 periods) AES MD5- Knapsack

Introduction: Security services - Symmetric-key -Public-Key cryptography - Cipher Modes Hash functions - Key - Classes of attacks and security models Algorithms - Elliptic Curve Cryptosystems RSA Kerberos Diffie-Hellman Authentication protocols. Unit II

nm(9 periods)

Steganography: Comparison between Steganography, Watermarking and Encryption. Principles of steganography- pure, secret key, public key steganography security of stego system Classification - Substitution system-transform domain-spread spectrum - Statistical distortion cover generation methods - Image Steganography - LSB Substitution - Mod based - Optimal Pixel Adjustment Process (OPAP) -Random Image Steganography. Recent development in Image Steganography.

Unit- III

( 9 periods)

Embedded Security: Data Integrity message Authentication Embedded implications Side Channel attacks on the embedded systems - Attacks Analysis Differential correlation Analysis Countermeasures Misalignment - Masking Reliability fault Tolerance. Unit IV

(9 periods)

Embedded Security Protocols: SSH - IPSEC other protocols SSL Networked embedded systems and resource constraints - Embedded Security Design Principle Interfaces 802.11 WPA Authentication WPA key management Zig Bee Wireless technologies.

Unit-V Security in Hardware:

(9 periods) Choosing and optimizing cryptographic algorithms for resource

constrained system Optimization guidelines hardware based Security assistance solutions Security issues Future of embedded applications security .

References: 1. Alfred J. Menezes, Paul C.Van OorSchot, Scott A. Van Stone, Handbook of Applied Cryptography, CRC Press, 1996. 2. William Stallings, Cryptography and Network Security, Tata McGraw Hill, . 3. Catherine H. Gebotys Security in Embedded Devices Springer Science+Business Media -LLC 2010 4. Timothy Stapko, Practical embedded Security Building secure resource constrained systems, Newnes Publication, 2008 5. Stefan katzenbeisser and Fabien A.P, Petitcolas editors Information hiding techniques for steganography and digital watermarking, Artech House, Norwood, MA, 2000.

Reference Papers: 1. Abbas Cheddad, Joan Condell, Kevin Curran, Paul Mc Kevitt, Digital image steganography: Survey and analysis of current methods Signal Processing 90, 2010,pp. 727752. 2. C.K. Chan, L.M. Chen, Hiding data in images by simple LSB substitution, Pattern Recognition, Vol. 37.No. 3, 2004, pp. 469474

E24 EMBEDDED CONTROL SYSTEMS

L 3 T 0 P Credits 0 3

UNIT I INTRODUCTION TO DIGITAL EMBEDDED SYSTEMS AND CONTROL

Anatomy of a Control system-closed loop control-Plant models-PID control implementation-Issues related to discrete time systems- Difference Equations and Z transforms-Issues related to Sampling theorem-Nyquist sampling rate Case study- DC motor control using PID controller-Algorithm-Program in any high level language..

Unit II COMPUTER INTERFACING FOR DATA ACQUISITION AND CONTROL

Sensors and signals - Interfacing signals Digital signal conditioning circuits- Output signal with continuous actuators - Cabling-Digital to Analog converter Analog to Digital converter -Plug in cards Low cost multifunctional Add-on-cards - IEEE 4888 GPIB Standard communication busesIntroduction to Field bus.

UNIT III INTRODUCTION TO PLC Controllers Hardware - Internal architecture - Commercial PLCs - Sequential controls - Programmable controllers - Advantages of PLCs - Basic structure of PLCs - Basic instruction and execution Programming a PLC - Advantage of smart hand held programming terminal.

UNIT IV INTRODUCTION TO LADDER DIAGRAM Ladder diagram - Logic function Latching - multiple outputs - Entering ladder program -Instruction list - Boolean algebra - Functional block diagram - Sequential functional charts -IEC standards - Internal relays - Internal relays in programming - Battery backed relays - One shot operation - Set and reset Master control relay-Case studies-PLC based Manufacturing processes like spray painting and welding Processes-Ladder logic diagram UNIT V REAL TIME CONTROL ISSUES

Real time control system development methodologies-Issues in implementation-Concurrencymultitasking-Scheduling-Priority-DDC algorithms Supervisory control and data acquisition problemsYourdon, MASCOT methodologies and analysis.

Text Books:1. Chidambaram.M , Computer control of process Alpha Science publication, 3rd edition,2002 . 2. W.Bolton, Programmable logic controllers, 3rd edition, oxford, 2003. 3. Jim Ledin, Embedded control systems in C/C++ Focal press,2003 4. Bennett , Real time computer control:An introduction Pearson publication,2006.

MEBD 206 EMBEDDED SYSTEMS & RTOS LAB

ARM CORE (LPC 2148, MSP430, LPC2378, LPC2129 & SAM9263) 1. Task management. 2. Message Queue Implementation. 3. Mutual exclusion Implementation. 4. Performance Analysis of Scheduling Algorithm 5. Implementation of resource management in routing. 6. Implementation of parallel computing techniques using LPC 2148. 7. Data Acquisition and Control. 8. Serial and parallel communication. 9. Interfacing with external peripherals. 10. Web Server applications. 11. Network Development (star & mesh) using LPC 2148 and XBEE Pro. ULK kit 1. Data and Image Processing 2. GPS Interfacing 3. Touch Panel with LCD Interfacing

MEBD 301 DISTRIBUTED EMBEDDED COMPUTING L T 4 P Credits 4

1 0

-------------------------------------------------------------------------------------------------------------------UNIT I (12 periods)

A taxonomy of distributed sensor networks Object detection and classification- Target tracking with self organizing distributed sensors Distributed Multi-Target detection in sensor networks. UNIT II (12 periods)

Coverage oriented sensor deployment- Designing energy aware sensor systems- Sensor centric routing in wireless sensor networks-Query processing in sensor networks. UNIT III (12 periods)

The Mobile Agent framework for collaborative processing in sensor networks- Distributed services- Adaptive active querying-Example distributed sensor network control hierarchy. UNIT IV (12 periods)

UML for real time Modeling Quality of service with UML- Modeling Metric timePerformance Analysis with UML- Schedulability analysis with UML. UNIT V (12 periods)

Analog and digital co-design, optimizing functional distribution in complex system design Validation and fast prototyping of multiprocessor system on chip a new dynamic scheduling algorithm for real time multiprocessor system. References: 1. S.Sitharama Iyengar and Richard R.Brooks, Distributed Sensor Networks, Chapman and Hall/CRC, 2005. 2. Bernd Kleinjohann, Architecture and design of Distributed Embedded Systems, Kluwer Academic Publishers, 2001. 3. Luciano Lavagno, Grant Martin, Bran Selic, UML for Real design of Embedded Real Time System, Kluwer Academic publishers,

E31 - WIRELESS SENSOR NETWORKS L T P Credits 3 0 0 3 ______________________________________________________________________________ Unit I (9 Periods) WSN Introduction: Sensor network: Challenges of WSN- Factors Influencing WSN Design: Hardware Constraints - Fault Tolerance - Scalability - Production Costs - WSN Topology Pre-deployment and Deployment Phase - Post-deployment Phase - Re-deployment Phase of Additional Nodes - Transmission Media - Power Consumption - Sensing - Data Processing Communication. Unit -II (9 Periods) Sensor Network Architecture: Components of Nodes - Building Tiered Architectures - Task Decomposition and Allocation -Forming Tiered Architectures - Drawbacks of Tiered Architectures - Issues for Topology Design - Coverage in Wireless Sensor Networks - Location Management in Wireless Sensor Networks -Positioning and Location Tracking in Wireless Sensor Networks. Unit- III (9 Periods) Routing in Wireless Sensor Networks: Routing Challenges and Design Issues in Wireless Sensor Networks - Data Dissemination and Gathering - Network Scale and Time-Varying Characteristics - Resource Constraints - Routing Strategies in Wireless Sensor Networks Routing Techniques - Low-Energy Adaptive Clustering Hierarchy - Power-Efficient Gathering in Sensor Information - Directed Diffusion - Geographical. Unit IV (9 Periods) Protocols & Middleware in WSN: MAC Protocols for WSN: Schedule-Based Protocols Random Access-Based Protocols - Traditional Transport Control Protocols-TCP (RFC 793)UDP (RFC 768) - Transport Protocol Design Issues - Performance of Transport Control Protocols - Middleware Principles - Middleware Architecture DSW CSMF. Unit-V (9 Periods) Network Management & RF technologies for Wireless Sensor Networks: Network Management Requirements - Traditional Network Management Models - Design Issues - OS for Wireless Sensor Networks - Blue tooth Technology IEEE 802.15.1 - Wi-Fi Technology IEEE 802.11.a/b/h/g - UWB Technology IEEE 802.15.3 - Zig Bee Characteristics Networks applications. References: 1. Holger, Andreas Willing, Hasso-Plattner ,Protocols and Architecture for Wireless Sensor Networks, John Wiley & Sons Ltd,2005 2. Ian F. Akyildiz , Can Vuran,Wireless Sensor Networks, John Wiley and Sons Ltd., 2010

3. Mohammad Ilyas and Imad Mahgoub,Handbook of sensor networks : Compact wireless and wired sensing systems , CRC Press LLC, 2005 4. kazem sohraby,Daniel minoli,Taieb Znati,Wireless sensor networks technology, protocols and application,John wiley & sons, Inc,2007. 5. Ana, Jose, Juan, Aggeliki, Problem solving for wireless sensor Networks Springer, Verlag London Limited,2008

E32 INTELLIGENT EMBEDDED SYSTEMS L T 3 0 P Credits 0 3

-------------------------------------------------------------------------------------------------------------------UNIT I (9 periods)

A brief introduction to software- Agent technology- Agent software for near term success in distributed applications-Design of intelligent agent systems-Brokering the info under world. UNIT II (9 periods)

Personal Agents Rational software Agents Agent oriented Techniques for traffic and manufacturing applications cooperating Agents Concepts and applications UNIT III (9 periods)

Intelligent Agents in telecommunications- Managing heterogeneous transaction workflows with cooperating Agents-Intelligent Agents in Portfolio Management- Agents and large databasesIntelligent Agents in financial services Applications of intelligent Agents UNIT IV (9 periods)

Introduction to Designing Intelligent Machines: Introduction- Intelligent Machines- Self regulation- Reasoning and Knowledge Learning and Pattern Recognition- Autonomous Intelligent Agents Architecture of intelligent machines. UNIT V (9 periods)

Perception: Introduction- Feature and Pattern Recognition- Six dimensional classificationTemplate matching perception- Cognition interface- Model based pattern recognition- Model based computer vision. References: 1. Arkin R.C.,Behaviour-based Robotics, The MIT Press,2000. 2. Nicholas R.Jennings, Michael J.Woolridge, Agent Technology foundations, Applications and Markets, Springer 1998. 3. Rzevski, G., Mechatronics: Designing intelligent machines volume 1: Perception, Cognition and Execution, Butterworth - Heinmann,1995 4. Steels S,L., Brooks R., The Artificial Life Route to Artificial Intelligence: Building Embodied Situated Agents, Lawrence Erlbaum, 1995.

E33 ROBOTICS and AUTOMATION L T 3 0 P Credits 0 3

-------------------------------------------------------------------------------------------------------------------UNIT I (9 periods)

Getting ready to automate-Boa Constrictor-Designing for Automation-Stabilizing the Process-Quality and Automation-Achieving Machine Reliability-About volume-Building Blocks of Automation-SensorsAnalyzers-Actuators-Drives-Mechanization of Parts Handling-Parts Feeding-Parts Feeding Research.

UNIT II

(9 periods)

Automation Production and Assembly-Assembly machines-Production and Throughput-Buffer StorageNumerical Control and CAD/CAM-Advantages of NC-Machine Code-Axes of Motion-Incremental Versus Absolute-Motion Control-NC Programming-Direct Numerical Control-Computer Numerical Control-CAD/CAM-Industrial Robots-Robot Geometry-Robot Drives-Motion Control-Robot ToolingProgramming-Sensing Capability-Performance Specifications-Robot Utilization and Justification.

UNIT III

(9 periods)

Teaching Robots To Do Work-Robots World and The Real World-Programming Methods-VAL-AML/2ARM Basic-Machine Vision Systems-Image Acquisition-Image Analysis Techniques-Industrial Applications-Robot Implementation-Not So Fast-Planning-Development-Mock-Up and Test-InstallationProduction-Management and Worker Commitment-Training.

UNIT IV

(9 periods)

Industrial Applications of Robots-Welding-Machine Loading-Spray Painting-Fabrication-AssemblyUsual Applications-Industrial Logic Control Systems-Truth Tables-Boolean Algebra-Karnaughs MapsLogic Diagramming-Logic Networks-Ladder Logic Diagrams-Timers-Response Diagrams-Programmable Logic Controllers(PLC)-PLC Internal Features-PLC Programming-Application Programs-Control of Industrial Robots-Stage Programming-Advantages and Disadvantages of PLCs

UNIT V

(9 periods)

On-line Computer Control-Process Control Computers-Levels of Implementation-Control StrategiesProcess Interface-Interrupts-Process Computer Programming-Microprocessors-Integrated CircuitsMicroprocessor Structure-Programming-Microprocessor Applications-Computer Integrated Manufacturing-Interfacing-Flexible Manufacturing Systems-Group Technology.

References:
1. C.Ray Asfahl Robots and Manufacturing Automation John Wiley & Sons, Second Edition, 1992 2. Thomas R. Kurfes, Robotics and Automation Handbook, CRC Press, 2004 3. Bruno Siciliano, KimonP. Valavanis, Control Problems in Robotics and Automation, Springer 1998

E 34 COMPUTATIONAL INTELLIGENCE L T P 3 0 0

Credits 3

___________________________________________________________________________ UNIT- I (9 periods)

Artificial Intelligence: History and Applications Production Systems Structures and Strategies for state space search Data driven and goal driven search Depth First and Breadth First Search DFS with Iterative Deepening Heuristic Search Best First Search A* Algorithm AO* Algorithm Constraint Satisfaction Using heuristics in games Minimax Search Alpha Beta Procedure planning. UNIT -II (9 periods) Artificial Intelligence Representation schemes: Knowledge representation Propositional calculus Predicate Calculus Theorem proving by Resolution Answer Extraction AI Representational Schemes Semantic Nets Conceptual Dependency Scripts Frames Introduction to Agent based problem solving. UNIT III (9 periods) Neural Networks: Neural networks (NNs) for machine learning models of neuron perceptrons and perceptron learning rule limitations of perceptrons Multilayer perceptrons (MLPs) back propagation learning algorithm MLPs as classifiers local minima and ovefitting applications of MLPs Radial basis functions (RBFs) interpolation and approximation with RBFs RBFs vs. MLPS related classical optimization. UNIT -IV (9 periods) Genetic algorithms: Introduction genetic Operators chromosomes mutations and cross over Fitness functions Evolutionary programming : learning classification systems Multi agent systems PCA and SOM with evolutionary computations Modeling uncertainty distributions intervals fuzzy sets rough sets Fuzzy Vs Crisp membership pas Fuzzy systems. UNIT V (9 periods) Expert System and Language Processing: Overview of Expert System Technology Rule based Expert Systems Introduction to Natural Language Processing Languages and Programming Techniques for AI Introduction to PROLOG and LISP Search strategies and Logic Programming in LISP Production System examples in PROLOG.

References: 1. George.F.Luger, Artificial Intelligence Structures and Strategies for Complex Problem Solving, 4th edition, Pearson Education, 2002. 2. E. Rich, K.Knight, Artificial Intelligence, 2nd edition, Tata McGraw Hill 3. Winston. P. H, LISP, Addison Wesley

4. Ivan Bratko, Prolog Programming for Artificial Intelligence, 3rd edition, Addison Wesley, 2000 5. A.P. Engelbrecht, Computational Intelligence, John Wiley &Sons, 2002. 6. M. Berthold, D. Hand, Intelligent Data Analysis, Springer Verlag,2002