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TELKOMNIKA, Vol.10, No.4, August 2012, pp.

670~679 e-ISSN: 2087-278X accredited by DGHE (DIKTI), Decree No: 51/Dikti/Kep/2010

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Non-Sinusoidal PWM Method for Cascaded Multilevel Inverter


Shahrin Md Ayob*, Zainal Salam, Abdul Halim Mohamed Yatim
Power Electronics and Drives Research Group Faculty of Electrical Enginering Universiti Teknologi Malaysia 81310 UTM Skudai, Johor, Malaysia e-mail: shahrin@fke.utm.my*

Abstrak
Makalah ini menyajikan teknik pensaklaran yang baru untuk inverter berundak dan bertingkat jamak (CMI). Metode baru ini menggunakan sinyal non-sinusoidal sebagai sinyal modulasinya. Keuntungan utama penggunaan sinyal semacam ini adalah kemampuan untuk memberikan nilai komponen dasar yang lebih tinggi dan pada saat yang sama mempunyai beberapa orde harmonik yang rendah pada tegangan keluarannya sebelum rangkaian penapis; hal ini secara alamiah dikarenakan adanya sinyal modulasi non-sinusoidal. Di dalam tulisan ini, sinyal trapezoidal digunakan sebagai sinyal modulasi untuk CMI. Profil harmonik untuk kemiringan sudut yang berbeda telah dianalisis. Dari analisis o tersebut, didapati bahwa sudut 36 mampu menghilangkan harmonik ketiga dan kelima namun masih mengandung nilai komponen dasar yang tinggi. Untuk menguji rancangan yang diusulkan maka purwa rupa CMI fasa tunggal telah dibuat dan ALTERA FPGA digunakan untuk mengimplementaskan algoritma pensaklaran yang diusulkan. Hasil pengujian menunjukkan bahwa analisis yang dilakukan adalah benar. Kata kunci: FPGA, harmonik orde rendah, inverter berundak dan bertingkat jamak, modulasi lebar pulsa

Abstract
This paper presents a new switching method for cascaded multilevel inverter (CMI). The new method uses multiple non-sinusoidal signals as the modulating signal. The main advantage of using nonsinusoidal modulating signal is that it provides higher fundamental component but at the cost of having a numbers of low-order harmonics in its unfiltered output voltage; naturally contributed by the non-sinusoidal modulating signal. In this paper, the Trapezoidal waveform is employed as the non-sinusoidal modulating signal for the CMI. Its harmonics profile of different slope angles is analysed. From the analysis, it was o found that the trapezoidal with the slope angle of 36 eliminates the third and fifth harmonics yet yields a high fundamental magnitude. To verify, a single-phase CMI prototype is constructed and an ALTERA FPGA is deployed to implement the proposed methods algorithm. From the results, it was shown that analysis is validated Keywords: cascaded Multilevel Inverter, FPGA, low-order harmonics, pulse width modulation Copyright 2012 Universitas Ahmad Dahlan. All rights reserved.

1. Introduction Recently, multilevel inverter topologies have become very popular especially in renewable source energy. A large body of literatures over the past decades has testified its viability especially for high power application. It is an effective and practical solution to reduce switching losses and to improve harmonic profile. In general, issues in multilevel inverter technology can be divided into two issues. The first issue is the topology and second is on the imposed switching strategy that produces the PWM gating signals. For multilevel inverter, there are three main topologies that are usually cited, namely Flying-Capacitor multilevel inverter (FCMI), Diode-Clamp Multilevel Inverter (DCMI) and Cascaded Multilevel Inverter (CMI). These topologies have their own merits and limitations. The decision on selecting the appropriate topologies largely depends on the particular application and the nature of the dc supply that feed to the inverter. The CMI is known to be the simplest topology and less component counts. Moreover, additional full-bridge inverters can be added up to meet an increased power demand due to its modular structure. However, the topology requires that the voltage source to be separated. The structure of CMI is illustrated in Figure 1.

Received June 26, 2012; Revised July 23, 2012; Accepted July 29, 2012

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S11 E1
+

S21 V1 Vphase (Vout)

S31

S41

Module 1 S12 E2
+ _

S22 V2

S32 Module 2

S42

S1M EM
+ _

S2M VM 0

S3M Module M

S4M

Figure 1. Structure of cascaded multilevel The second issue is on the switching strategy of the inverter. In the past decades, a number of switching schemes have been proposed to improve the inverter performance especially its harmonic profile [1], [2]. The simplest strategy is the square wave though it exhibits the poorest harmonic profile. Then this is followed by quasi-square wave in which the harmonic profile can be improved by selecting the appropriate firing angle. By far, however the most popular switching is Pulse Width Modulation (PWM) techniques. Basically PWM technique is based on the triangulation method; a physical comparison between a sinusoidal signal with triangular carrier signal. The intersections between the signals produce the PWM pulses. This technique helps the improvement of harmonic profile by locating all undesired harmonic to a higher frequency range. The analog version of this technique has been introduced by Schonung and Stemmler [3]. It however, suffers from serious problem of drift and ageing of the components. The digital version i.e. regular-sampling has been introduced by Bowes in 1975 [4]. It has become the impetus for the proliferation of several important digital PWM techniques until the present day. Several currently popular PWM schemes are Optimized PWM, Selective Harmonic Elimination PWM (SHEPWM) and more recently the Space Vector PWM (SVPWM) [5-7]. Originally, the abovementioned schemes are applied to the two-level inverter. However, by some modification the schemes can be extend to be applied in multilevel inverter. For a carrier-based multilevel sinusoidal PWM in particular, a method has been proposed by using a different arrangement of triangular carrier. They are Phase Opposition Disposition (POD), Phase Disposition (PD) and alternatively in Phase Opposition (APOD) [8]. These techniques employ multiple carriers with a single reference signal i.e. sinusoidal. Each method has its own unique spectra and specific application. However, these methods suffered from a low fundamental magnitude. In this paper, a new switching scheme is proposed for cascaded multilevel inverter (CMI). The scheme uses multiple modulating signals with single carrier signal which is contrary to the abovementioned switching schemes. Moreover, this paper will analyze the utilization of non-sinusoidal modulating signal i.e. trapezoidal waveform. The waveform is choosen due to its simple signal generation. Moreover, its harmonics profile is changeable by varying its slope Non-Sinusoidal PWM Method for Cascaded Multilevel Inverter (Shahrin Md Ayob)

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angle (). The study will analyze on the viability of the new switching scheme in synthesizing sinusoidal output voltage. A CMI prototype will be constructed to verify the viability. For the switching algorithm, a cost-effective ALTERA FPGA is employed. It is expected that by using Trapezoidal as the modulating signals, a higher fundamental magnitude can be achieved.

2. Trapezodial PWM Switching Scheme The heart of any multilevel inverter is undoubtedly the switching scheme used to generate the switching edges of the PWM waveform pattern. In the past few decades, a large number of PWM switching strategies have been proposed, starting from analogue-based system through digital based and more recently ROM-based and microprocessor-implemented controls schemes [9], [10]. This section is dedicated to describe the Trapezoidal PWM modulation scheme applied to the Cascaded Multilevel Inverter (CMI). The main impetus of the proposed modulation scheme is its simplicity and suitability to be implemented in a full digital circuit such as FPGA. 2.1. The Waveform Trapezoid waveform as shown in Figure 2 can be digitally generated using FPGA. The waveform itself simply comprises of two linear sections; a slope line and a horizontal line section. The shape and hence, the harmonics depend on the location of slope angle (), which 0 0 0 can be varied within 0 to 90 . It forms a square shape if located at 0 and a triangular shape 0 if located at 90 [11].

00
1

900

Figure 2. Trapezoidal signal over 90 of fundamental cycle


0 0

The harmonic contents of the trapezoid signal, having an angle within 0 and 90 can be found by using standard Fourier analysis. By assuming quarter-wave symmetry, only the odd sine terms are present. Thus, the sine-term Fourier coefficients are given by:

An =

4 /2

=0

F ( ).sin(n )d

(1)

where F() represents trapezoidal signal. Equation (1) can be expand to be


4 kosn 1 An = + n 0 n

kosn d
0

(2)

/2

(1) sin n d

Equation (2) can be simplified down to the general expression:

4 sin(n ) An = 2 n

(3)

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(a)

(b)

Figure 3. (a) Harmonics magnitude (1, 3, 9, and 15) with different slope angles. (b) Harmonics magnitude (5, 7, 11, and 13) with different slope angles

The harmonics magnitude versus trapezoidal slope angle, , are shown in Figs. 3(a) 0 and 3(b). From the figures, it can be observed that triangular shape ( = 90 ) has less harmonics than trapezoidal waveform. However the latter offers higher fundamental component as compared to the triangular. Thus, the trapezoidal is more desirable. 2.2. The Principle of the Switching Scheme Figure 4 illustrates the proposed switching scheme. The proposed scheme is based on the classical unipolar PWM switching. The main idea behind this method is to compare several trapezoidal modulation signals m(t) that have equal amplitude (Am) and frequency (fs) with a single triangular carrier signal c(t). The carrier signal is a train waveform with a frequency fc and amplitude Ac. The intersection between modulation signals and carrier defines the switching instant of the PWM pulses. The number of modulation signals required is equal to the number of modules in CMI (M).

Figure 4. Trapezoidal modulation signals and single carrier signal

The relationship between the number of output level (N) and M is described in (4), M=(N-1)/2 Modulation index (mi) for N-level inverter with M modules is defined by equation (5): (4)

mi =

Am A = m (N 1) MAc Ac 2

(5)

Therefore, if Ac is defined at a fixed 1 p.u, then mi will range between 0 and 1 and Am will range between 0 and M. The definition for mf is similar to the conventional two-level output inverter and can be rewritten as Non-Sinusoidal PWM Method for Cascaded Multilevel Inverter (Shahrin Md Ayob)

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mf =

fc fm

(6)

In equation (6), fc is defined as the carriers frequency and fm is the trapezoidal modulation signals frequency. Figure 5 illustrates the principal of the proposed scheme of five-level CMI with mi = 0.8. The modulation ratio, mf is set at 40. For five-level CMI, the number of modulating signals is equal to the number of modules. Thus, by referring to equation (4), two trapezoidal signals are required and are arranged as shown in Figure 5.

Figure 5. Principal of the proposed modulation scheme for mi = 0.8 and mf = 20 As depicted in Figure 5, the intersections between trapezoidal signal and carrier signal define the PWM switching edges. The intersections between m1(t) with carrier produce the lower level output voltage and the intersections between m2(t) produce the upper level of voltage output.

3. Analysis of the Proposed Scheme This section presents the harmonic analysis of the output voltage of the proposed scheme with different Trapezoids slope angle. The Matlab/Simulink software is used to conduct the simulation of the proposed scheme in five-level CMI model. The simulation parameters are tabulated in Table 1. Table 1. Parameters for Simulation
Parameter DC source Fundamental frequency Carrier frequency Modulation Index Modulation Frequency Symbol E fs fc mi mf Value 100 V 50 Hz 2k Hz 0.8 40

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However, due to pages constraint, only trapezoidal with four different lope angles will be o o o analyzed. The selection of the angle is arbitrary; the selected slope angles are 30 , 36 , 60 and o 72 . Figs. 6, 7, 8 and 9 show the output waveform and its harmonics spectrum for each slope angle, respectively.

Figure 6. Output voltage and harmonics o spectrum for = 30

Figure 7. Output voltage and harmonics o spectrum for = 36

Figure 8. Output voltage and harmonics o spectrum for = 60

Figure 9. Output voltage and harmonics o spectrum for = 72

Table 2 tabulates the fundamental magnitude and low-order harmonics for different o slope angles. The table clearly shows that trapezoidal signal with slope angle of 30 offers the o highest fundamental magnitude as compared to the other slope values. Moreover, the 30 trapezoidal is easier to be digitally generated with minimal digital circuit [11]. However, it should be noted that it also has the highest low-order harmonics content.

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The third harmonic is eliminated for the 60 slope angle. In addition, the fundamental component is 2.97 % higher than when Sinusoidal PWM is used (2miVdc = 160 V). The loworder harmonics content is still large i.e. fifth harmonic component is high in amplitude and could not be eliminated. Table 2. Harmonics magnitude according to the slope
Harmonics magnitude (V) Fundamental 3 5 7 9 30 195.17 49.47 12.42 1.05 3.34 36 188.72 35.65 0.00 0.87 4.31 Slope Angle () 60 164.74 0.00 8.95 1.74 4.48 72 153.56 8.72 0.00 1.65 1.94

By choosing the slope angle to be 36 and 72 , the fifth harmonic is eliminated. However, the third harmonic component is high for both slope angles. To counter that problem, it is beneficial to take advantage of Triplen-effect in three-phase system. In Triplen-effect, the harmonics number with the multiple of three can be automatically eliminated if the carrier frequency is odd and in multiple of three. For example, by setting mf = 39 (odd and multiple of rd th th three), the harmonic with multiple number of three i.e. 3 , 9 , 15 , ... will be eliminated. o o Based on the analysis, it was shown that the trapezoidal with 36 and 72 slope angles seem suitable for the modulating waveform. Both angles provide better low-order harmonics profile. However, the former slope offers higher fundamental than the latter. Thus, based on o that judgment, the trapezoidal with the slope angle of 36 is selected for the implementation.

4. Hardware Implementation The proposed switching scheme is implemented using UP1 board from Altera Inc. The UP1 board contains two FPGA processors namely EPM7128S and EPF10K70 devices. However, due to limited numbers of logic gates and problems in configuring EPM7128S, only EPF10K70 device is used. With up to 70,000 of typical gates with 25MHz system performance at 2.5 V logic supply, EPF 10K70 device is ideal for intermediate to advance digital design. Altera Inc. allows one to program the FPGA board either by using graphical approach or Verilog Hardware Description Language (VHDL) via Max-Plus II software. The former is simpler where the users only need to click and drag the model that available in the software library. The latter is more towards customizing or re-creates a new model or algorithm. For this work, the hierarchal approach, which is the combination of both approaches, is used. Figure 10 shows the gating signals for the 5-level CMI, generated using Max-Plus II software.

Figure 10. Gate signals waveform from MAX-Plus II

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5. Results and Discussions Figures 11 and 12 show the simulation and the experiment results of the output voltage, respectively. The figures showed that the experimental result is in good agreement with the simulation result. Both figures yields five-level output voltage. The harmonics spectrum is discussed in the following section.

Figure 11. Simulation result of 5-level CMI

Figure 12. Experimental result for 5-level CMI

6. Harmonics Spectrum Analysis This section discussed on the harmonic spectrum of a Cascaded Multilevel Inverter 0 (CMI) for mi = 0.8, mf = 40 and = 36 . The simulation result of the output voltage harmonic spectrum is shown in Figure 13. The experimental result of harmonics spectrum for the similar case is shown in Figure 14. It can be clearly seen from both figures that the experimental result is in close agreement with the simulation. The proposed scheme produces odd harmonics. Furthermore, harmonics at the carrier and the multiples of the carrier frequency do not exist at all. This criterion is similar with the Phase Opposition Disposition (POD) technique as described in literature.

Figure 13. Harmonic spectrum of output voltage from simulation

Figure 14. Harmonic spectrum of output voltage from prototype

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As depicted in Figures 13 and 14, the spectrum has a wide range of side-band 0 harmonics. For the case of mi = 0.8, mf = 40 and = 36 , the side-band harmonics for the first significant high-order harmonic group (mf) is mf 15. Table 3 tabulates the harmonics magnitude for the first significant high-order harmonic group (mf) with respect to their trapezoid slope angle (). The table is created using the calculated value by MATLAB.

Table 3. Harmonics magnitude for the first significant high-order harmonic group (mf)
Slope angle, Fundamental (normalized) mf 1 mf 3 mf 5 mf 7 mf 9 mf 11 mf 13 mf 15 mf 17 300 0.968 0.1874 0.0463 0.0147 0.001 0.0130 0.0230 0.0292 0.0262 0.0148 360 0.952 0.1818 0.0383 0.0120 0.0146 0.0262 0.0324 0.0270 0.0135 600 0.840 0.1661 0.0237 0.0352 0.0514 0.0222 0.0157 0.0134 720 0.768 0.1554 0.0235 0.0593 0.0416 0.0156 0.0154 0.0108

From the table, it can be shown that the number of sidebands for the first high-order harmonic group is not solely depends on the modulation index (mi), but also relies on the slope angle. The number of sidebands with constant mi decreased from mf 17 down to mf 13 0 when the slope angle is 72 . This may be due to the fact that the low-order harmonics for that particular slope angle is small (referring to Figs. 3(a) and 3(b)). It can also be seen that the fundamental component amplitude is not linear with the modulation index (mi); it is dependent to the slope angle. Higher fundamental component is achieved for smaller slope angle. In the case of mi = 0.8, the highest fundamental components 0 magnitude is given by slope angle of 30 , which is 0.968 p.u. In SPWM method, the amplitude of the side-band harmonic for constant mi is determined by the modulation frequency (mf) alone. However, in this proposed scheme is was shown that the amplitude of the harmonics is also on the slope angle ().

7. Total Harmonics Distortion Total Harmonic Distortion (THD) is one of the common performance index to describe the quality of the output waveform. It can be compute using

V nh n =2 THD = V1

(6)

In equation (6), n denotes the harmonic order and 1 is the fundamental quantity. For inverter application, THD represents how close the ac output waveform with a pure sinusoidal waveform. A high quality output should have low THD. The proposed method used trapezoidal signal as a modulation signal, which naturally contains low-order harmonics. For harmonics improvement, some of the harmonics should be eliminated by choosing an appropriate trapezoid slope angle. Since triplens are allowed in 0 0 three-phase system, slope angle of 36 and 72 is selected, so as to eliminate the fifth harmonics. This allows reduction in the output waveform THD. 0 As discussed earlier, trapezoid slope angle of 72 offers the smallest number of sideband harmonic and amplitude. However, the angle does not provides a high fundamental 0 component as compared to slope angle of 36 . Thus, the latter is more preferable. The large 0 number and amplitude of the sidebands harmonic produce by trapezoid slope angle of 36 can be reduced by switching the inverter to the higher frequency range. Table 4 tabulates the predicted and measured results of the significant low-order harmonics. The comparison shows

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that the error is quite small. This validates the proposed scheme designed in FPGA with the simulation.

Table 4. Predicted and measured values of the significant low-order harmonics 0 for mi = 0.8, mf = 40, =36
Harmonic order 3 5 7 9 11 13 Frequency (Hz) Harmonic Magnitude (p.u) Predicted 150 250 350 450 550 650 0.204 0.00 0.035 0.010 0.014 0.017 Measured 0.210 0.00 0.033 0.010 0.011 0.018

Note that the fifth harmonic is eliminated. The third harmonic yields the highest fundamental component. However, the third harmonic and its multiple can be eliminated in three-phase if mf is selected to be odd and triplen. With the elimination of the third and fifth harmonics, the low-order harmonic by considering only the first thirteen low-order harmonics can be compute as 0.53%. The harmonics profile can be further improved to 0.182 % by filtering the seventh harmonic.

8. Conclusion In this paper, a new modulation scheme using trapezoidal waveform as the modulating signal is proposed. The scheme is applied to cascaded multilevel inverter (CMI). Its viability is verified by constructing a hardware prototype of CMI. The scheme has been implemented in Altera UP1 FPGA board. Based on the results, it was shown that by appropriate selection of slope angle, better harmonics profile with high fundamental magnitude of the output voltage can be obtained.

Acknowledgements This work was supported by Universiti Teknologi Malaysia

References
[1] L.M. Tolbert, F..Z. Peng and T.G. Habetler. Multilevel Converter for Large Electric Drive. IEEE Transaction on Industrial Applications. 1999; 35(1): 36-44. [2] L.M. Tolbert, F.Z.Peng and T.G. Habetler. Multilevel PWM Method at Low Modulation Indices. The 1999 Applied Power Electronics Conference (APEC 99). 1999: 1032-1039. [3] A. Schonung and H. Stemmler. Static Frequency Changers with Sub-harmonic Control in Conjunction with Reversible Variable Speed AC Drives. Brown Boveri Rev. 1964: 555-557. [4] S. R. Bowes and A. Midoun. Microprocessor Implementation of New Optimal PWM Switching Strategies. IEE Proceedings B: Electric Power Applications. 1988; 135(5): 269-280. [5] N. A. Azli and A. H. M. Yatim. A DSP Based Online Optimal PWM Switching Strategies for Modular Structured Multilevel (MSM) Inverter. The 6th International Symposium on Signal Processing and its Applications. Kuala Lumpur. 2001: 623-626. [6] N. A Azli and A. H. M. Yatim. A Modular Structured Multilevel Inverter for Fuel Cell Applications. Journal of Technology: Part D. 1998: 1-8. [7] V.G Agelidis and P.D. Ziogos. Dead Band PWM Switching Patterns. IEEE Transaction on Power Electronics. 1996; 11(4): 552-531. [8] G. Carrara, S.Gardella, M. Marchesoni, R. Salutari and G. Sciutto. A New Multilevel PWM Method: A Theoretical Analysis. IEEE Transaction on Power Electronics. 1992; 7(3): 497-505. [9] S. Mekhilef and N. A. Rahim. Xilinx FPGA Based Three-Phase PWM Inverter and Its Application for Utility Connected PV System. Proceedings of IEEE TENCON. 2002: 2079-2082. [10] D. Deng, S. Chen and G. Joos. FPGA Implementation of PWM Pattern Generators. The Canadian Conference on Electrical and Computer Engineering. 2001: 225-230. th [11] J. C. Salmon. A 3-phase PWM Modulator using a Trapezoidal Reference Signal. The 14 Annual Industrial Electronics Society Conference. 1988: 623-627.

Non-Sinusoidal PWM Method for Cascaded Multilevel Inverter (Shahrin Md Ayob)

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