University of Saskatchewan EE 292 Electrical Engineering Laboratory I

LOOK-UP-TABLES (LUTS) V6
Safety: In this lab, voltages are less than 5 volts and this is not normally dangerous to humans.
On the other hand, static electrical charge from humans can harm FET-based logic circuits. Discharge static electricity accumulated on your body by first touching a grounded metal surface before touching the logic circuits. Be CAREFUL of sharp connector pins that can puncture skin. Objective: To introduce students to the look look-up table (LUT), the basic building block of Field Programmable Gate Arrays (FPGAs). To design and implement a state machine for a foxduck-corn game using look-up tables. Introduction: A FPGA is an integrated circuit containing logic blocks such as look-up tables (LUT) and flip-flops. As opposed to application specific integrated circuit (ASIC), the FPGA can be programmed by the user to realize custom-designed logic. Programming is accomplished using a hardware descriptive language (HDL), such as VHDL or Verilog. In the labs you have previously done, the FPGA has been pre pre-programmed to provide logic components such as AND gates and flip-flops and the student connected these components together. This experiment is designed to provide students with more insight into the structure of a field programmable gate array (FPGA). A look up table (LUT) is a memory with a one-bit output that essentially implements a truth table where each input combination generates a certain logic output. The input combination is referred to as an address. The HDL synthesizer implements an AND gate or other simple logic function by programming the stored elements in a LUT. In this experiment, you will program three pre-built LUTs and develop a state machine to implement the fox-duck-corn game described below. When finished, you will be able to play the game.

A man went on a trip with a fox, a duck and an open can of corn. He came upon a river and a tiny boat to cross the river but he could only take himself and one other - the fox, the duck, or the corn - at a time. He could not leave the fox alone with the duck or the duck alone with the corn. How does he get all safely over the river?
Implementation: You are to use the DE2 board (containing the Altera Cyclone II FPGA) as the controller, where you will develop the state machine of the game. The more complicated parts of the state machine are pre-programmed for you. Connect the controller to a pre-built external breadboard containing four pushbuttons and eight LEDs. Four LEDs indicate the man, fox, duck and corn on the near side of the river (logic zero) and four LEDs indicate their arrival on the far side of the river (logic one). Three pushbuttons initiate a crossing for the man plus the fox or the duck or the corn, and one causes the man to cross the river on his own. In the first part of the lab, you will design and implement the combinational logic that drives the next state of the man, fox, duck and corn.

Revised Mar 23, 2010

University of Saskatchewan EE 292 Electrical Engineering Laboratory I

U

Procedure:

1. Fox Logic - Complete the following next state table according to the game description Definitions: curM (current state of the man), curF (current state of the fox), inF (the control input of bringing the fox over the river), nextF (next state of the fox). Remember that the fox cannot move unless the man is on the same side of the river as the fox.

2. Power up the DE2 board and use SW17-14 to set configuration to 10. Program look-up table #1 (LUT-1) with the above truth table using the following method:
SetSW1SW0(anditsdecimalvalueshowninHEX5)to1. PressKEY1toadvancetheLUT1addresswhichisdisplayedinHEX4. Foreachaddress,pressKEY0totoggletheLUToutputwhichisdisplayedinLEDG0. AllcontentsoftheLUTcanberesetto0bypressingKEY2 Verify the functionality of your LUT entry using SW3 SW5 and LEDG1

3. Duck & Corn Logic - Upon further examination of the game, it turns out that the next state table of the duck and the corn are very similar. Design and write out the next state table of the duck and the corn. As in Part 2, program LUT-2 and LUT-3 with the truth table for the duck and corn respectively. Connect LUT outputs and inputs to D-FFs to form a state machine. Note the pre-determined order of the D-FFs shown in Figure 3.

4. Man & Boat Logic - The design of the next state table of the man has 5 inputs and is too complex for the purpose of this lab, so it is already implemented for you. The output is nextMan on pin 35 of daughter board B. 2

University of Saskatchewan EE 292 Electrical Engineering Laboratory I 5. Game Logic This has been pre-programmed for you. The FPGA in the DE2 board is programmed such that the fault states (when the fox eats the duck and when the duck eats the corn) and the winning state are detected internally and displayed. Furthermore, HEX1 HEX0 are programmed to count the number of tries the player does. A 1 kHz system clock is generated internally and is connected to the clock inputs of the D flip-flops. There are also 4 inputs dedicated for the inputs of the pushbuttons. These inputs are debounced internally and the one-shot outputs (inManOut,.., inCornOut) are available for connection to the state machine LUTs. The one-shot outputs pulse high for only one clock period. KEY3 is programmed as the game reset which resets all the states to 0. 6. Display Board Obtain from the technicians a white breadboard circuit and connect to the DE2 board. The controller has 8 Flip Flop outputs to drive the LEDs and 4 inputs (inMan,., inCorn) which connect to switches. The LEDs have four coulours: Green (man), Red (fox), Duck (orange) and Corn (yellow) 7. Play the Game Verify the function of the game and try to fool the logic you have created. 8. State Diagram Complete the following state diagram for the game. There are 16 states: one is the starting state, one is the desired finish state, and there are 6 fault states where something gets eaten. Include the state transition links showing the push button inputs. Assume that only one button can be pushed at a time thus there are four ways to try to leave each state.

Figure 1. State Diagram of Fox-Duck-Corn Game 9. Questions Are there any unreachable states in this state machine? How many possible winning sequences are there in the game? What are they?

University of Saskatchewan EE 292 Electrical Engineering Laboratory I

U

Appendix:

Fox logic notes: - If the man and the fox are on the different sides of the river, the state of the fox is unchanged unchanged, regardless of any other inputs. If the man and the fox are on the same side of the river and the control to bring the fox over is pressed, the fox and the man will move to the opposite side of the river. If the man and the fox are on the same side of the river and the control to bring the fox over is not pressed, then the fox will not change sides. State machine notes: - a conceptually simple approach to the state machine would be to use a 8bit by 4-bit memory (256 locations, each with 4 bit content). The memory address would be composed of 4 bits of input information plus 4 bits of current state. This laboratory partitions the contol logic into 4 look up tables and thereby uses much less memory in the FPGA. DE2 Board setup: - Connect the DE-2 board to 120 Vac supply and switch on using the red button. Slide the switches SW0, SW1, SW17 to the off position (toward the lower edge of the board) then Slide SW17 and SW15 to the on position and the display should change from 00 to 10. If not already in place, insert the I/O daughter-boards A (on left) and B (on right).

Figure 2. DE2 Board Layout Breadboard Circuit: - The push buttons on the white breadboard output a logic 0 when pressed and this starts the one-shot pulse. The LEDs light in response to a logic 1 from the DE2 board. Power and ground must be supplied from the DE2 board to the breadboard.

University of Saskatchewan EE 292 Electrical Engineering Laboratory I

Figure 3. Daughter Board Inputs and Outputs

Revised Mar 23, 2010