Timothy Joo (1-5)

Power Electronics (Dr. Hanafi)

EXAM II

PROBLEM 1
For the following PSPICE simulations:
MOSFET MbreakN (IRF540)
.model MbreakN NMOS (Level=3 Gamma=0 Delta=0 Eta=0 Theta=0 Kappa=0.2 Vmax=0 Xj=0
+ Tox=100n Uo=600 Phi=.6 Rs=21.34m Kp=20.71u W=.94 L=2u Vto=3.136 Rd=22.52m
+ Rds=444.4K Cbd=2.408n Pb=.8 Mj=.5 Fc=.5 Cgso=1.153n Cgdo=445.7p Rg=5.557 Is=2.859p
+ N=1 TT=142n)
Dbreak (FFPF15UP20S)
.model Dbreak D (IS=50n RS=81.3m BV=200 IBV=5.00u CJO=27.7p M=0.33 N=2.48 TT=45n)

I. BUCK CONVERTER
(a) Calculate the output voltage, the critical inductance (L
crit
) to ensure continuous current. Use
L = L
crit
and find the output capacitance to give a 1% output voltage ripple factor.

V
in
=50V ,

R
LOAD
=5O,

f =100kHz,

D = 0.4

V
O
V
in
= D
V
O
= DV
in
= 0.4(50) = 20V


L
crit.
=
1 D
2
TR =
10.4
2
1
100 10
3
(5)
L
crit.
=15H


L = 4 L
crit.
= 4(15H) =60H

AV
O
V
O
=
1 D
8LCf
2
C =
10.4
8(60 10
6
)(100 10
3
)
2
(0.01)
=12.5F


I
G
= I
S
,

I
O
= I
L
,

I
S
= DI
L
,

I
D
=(1D)I
L





Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
2

(b) Simulate the circuit with L = 4xL
crit.
and the output capacitance fount in part (a). Plot figures
to show the output voltage (V
O
), the voltage ripple, and the inductor current:
Circuit:

Plot of V
out
(top) & Inductor Current (bottom):

- Is the output voltage the same as what you calculated?
V
out
= 19.243 V
The output voltage is approximately the same as what we calculated in part (a). There percent
error is:

%error =
approximate theoretical
theoretical
100 =
19.24320
20
100
%error = 3.79%

The reason for the error could be due to some noise error or machine error because they are
not ideal machines. This is concluded because the error is so small.
Time
0s 50us 100us 150us 200us 250us 300us 350us 400us 450us 500us 550us 600us 650us 700us 750us
V(L1:2) I(L1)
0
5
10
15
20
25
30
Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
3
- Is the output voltage ripple the same as what you have designed?

- Is the inductor current continuous, as you have designed?
Yes, the inductor current is continuous because it never falls to zero during the commutation
cycle.
Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
4
II. BOOST CONVERTER
(a) Calculate the output voltage, the critical inductance (L
crit
) to ensure continuous current. Use
L = L
crit
and find the output capacitance to give a 1% output voltage ripple factor.

V
in
=50V ,

R
LOAD
=5O,

f =100kHz,

D = 0.4

V
O
V
in
=
1
1 D
V
O
=
V
in
1 D
=
50
10.4
= 83.33V


L
crit.
=
RT
2
(1 D)
2
D =
5
2(100 10
3
)
(10.4)
2
(0.4)
L
crit.
= 3.6H


L = 4 L
crit.
= 4(3.6H) =14.4H

AV
O
V
O
=
D
RCf
C =
0.4
5(100 10
3
)(0.01)
= 80F


I
G
= I
L
,

I
O
= I
D
,

I
S
= DI
L
,

I
O
=(1D)I
L

(b) Simulate the circuit with L = 4xL
crit.
and the output capacitance fount in part (a). Plot figures
to show the output voltage (V
O
), the voltage ripple, and the inductor current:
Circuit:



Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
5

Plot of V
out
(top) & Inductor Current (bottom):

- Is the output voltage the same as what you calculated?
V
out
= 79.108 V
The output voltage is approximately the same as what we calculated in part (a). There percent
error is:

%error =
approximate theoretical
theoretical
100 =
79.108 83.33
83.33
100
%error = 5.07%

The reason for the error could be due to some noise error or machine error because they are
not ideal machines. This is concluded because the error is so small.
- Is the output voltage ripple the same as what you have designed?

- Is the inductor current continuous, as you have designed?
No, the inductor current is not continuous because it falls to zero between about 0.22ms and
0.26ms. If the ripple amplitude of the current is too high, the inductor may be completely
discharged before the end of a whole commutation cycle. When this happens, the current
through the inductor falls to zero. This is why the inductor current is not continuous.
Time
0s 0.1ms 0.2ms 0.3ms 0.4ms 0.5ms 0.6ms 0.7ms 0.8ms 0.9ms 1.0ms 1.1ms 1.2ms 1.3ms 1.4ms 1.5ms
V(R2:2) I(L2)
-20
0
20
40
60
80
100
Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
6
III. BUCK-BOOST CONVERTER
(a) Calculate the output voltage, the critical inductance (L
crit
) to ensure continuous current. Use
L = L
crit
and find the output capacitance to give a 1% output voltage ripple factor.

V
in
=50V ,

R
LOAD
=5O,

f =100kHz,

D = 0.4

V
O
V
in
=
D
1 D
V
O
=
DV
in
1 D
=
0.4(50)
10.4
= 33.33V


L
crit.
=
RT(1 D)
2
2
=
5(10.4)
2
2(100 10
3
)
L
crit.
= 9H


L = 4 L
crit.
= 4(9H) = 36H

AV
O
V
O
=
DT
RC
C =
0.4
5(100 10
3
)(0.01)
= 80F


I
O
= I
D
=
V
O
R
,

I
D
=(1D)I
L
,

I
G
= I
S
= DI
L

(b) Simulate the circuit with L = 4xL
crit.
and the output capacitance fount in part (a). Plot figures
to show the output voltage (V
O
), the voltage ripple, and the inductor current:
Circuit:



Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
7

Plot of V
out
(top) & Inductor Current (bottom):

- Is the output voltage the same as what you calculated?
V
out
= 31.353 V
The output voltage is approximately the same as what we calculated in part (a). There percent
error is:

%error =
approximate theoretical
theoretical
100 =
31.353 33.33
33.33
100
%error = 5.93%

The reason for the error could be due to some noise error or machine error because they are
not ideal machines. This is concluded because the error is so small.
- Is the output voltage ripple the same as what you have designed?

- Is the inductor current continuous, as you have designed?
No, the inductor current is not continuous because it falls to zero between about 0.32ms and
0.5ms. When the amount of energy required by the load is small enough to be transferred in a
time smaller than the whole commutation period, the current through the inductor falls to zero
during part of the period. This is why the inductor current is not continuous as designed.
Time
0s 0.2ms 0.4ms 0.6ms 0.8ms 1.0ms 1.2ms 1.4ms 1.6ms 1.8ms 2.0ms 2.2ms 2.4ms 2.6ms
-I(L3) V(0,D3:1)
-10
0
10
20
30
40
50
Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
8

PROBLEM 2
Circuit:

(a) Sketch the equivalent circuits during D*T and (1-D)*T respectively.
MODE 1 [D*T]: (M1 and M2 are both ON; D1 and D2 are both REVERSED BIAS)






MODE 2 [(1-D)*T]: (M1 and M2 are both OFF; D1 and D2 are both REVERSED BIAS)







Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
9

(b) Sketch the waveform of the voltage across L for two cycles.






(c) Derive V
out
/V
in
.
MODE 1 [D*T]: (M1 and M2 are both ON; D1 and D2 are both REVERSED BIAS)

i
L
(t) =
1
L
V
in
t + I
L
(0)

I
L max
I
L min
=
1
L
V
in
DT
MODE 2 [(1-D)*T]: (M1 and M2 are both OFF; D1 and D2 are both REVERSED BIAS)

i
L
(t) =
V
O
L
(t DT) + I
L
(DT)
at t = T, I
L
(0) = I
L
(t)

I
L max
I
L min
=
V
O
L
(1D)T

V
O
V
in
=
D
1 D

(d) What is the efficiency of this circuit?

q =
P
out
P
in
100 =
P
out
P
out
+ P
loss
100
q =100%

The efficiency of this circuit is 100% because all of the components (switches, diodes, inductors,
resistors, and capacitors) are operating in ideal modes. This allows us to assume the circuit is
lossless and P
in
= P
out
.

Timothy Joo (1-5)
Power Electronics (Dr. Hanafi)
EXAM II
10

(e) Derive the critical inductance Lcrit, in terms of D, R and T.
D > 0.5 (BOOST)
D < 0.5 (BUCK)
D = 0.5 (UNITY GAIN)

I
in
=
I
L max
+I
L min
2
D

I
out
=
I
L max
+ I
L min
2
(1 D)

I
in
I
out
=
V
O
V
in
=
D
1 D


I
L max
=V
in
D
R(1 D)
2
+
DT
2L



(

(

I
L min
=V
in
D
R(1 D)
2

DT
2L



(

(

L
crit.
=
RT(1 D)
2
2