Jkhnical Developments

POWER MODULE DRIVER CIRCUIT,

by Richard J. Valentine The power module driver block diagram shown in Figure 1 provides the necessary interface to power IGBT modules. One aspect of the module driver design is the internal undervoltage shutdown circuit found in various MOSFET or IGBT gate driver integrated circuits such as the MC33151, MC33152, and MC33153. When these devices are used to drive 400 to 800 amp IGBTs or MOS FETS, an amplifier stage is required as shown in Figure 2. The IGBT gate drive amplifier uses complementary power MOS FETS, a P channel for providing the ON bias, and a N channel for the OFF bias. Unstable operation occurs during the powering up or down of the modules interface because the IGBT bias goes ON, instead of remaining OFF until the control logic acquires control. This is caused by the P channel device switching on when the gate driver IC is in an undervoltage shutdown mode. The shutdown mode forces the Its output low thereby turning on the P channel which in turn biases ON the IGBT Figure 3 shows a circuit that eliminates this problem, and also allows a negative IGBT gate bias. Zener diodes are used to couple the MC33151 outputs to the power FET drivers. A 6.8 volt zener is connected in series with the P FET driver. When the MC33151 is operating in its UV lockout mode, which is 5.8 volts or less, the P Channel device remains off because the 6.8~ zener is non conductive. In normal IGBT on operation the P FET power driver stage is biased on with 8.2 volts (15 volt level minus the 6.8~ zener = 8.2). An active gate clamp consisting of a NPN small signal transistor insures the P FET turns off when the MC33151 output goes high. (Another approach would be to change the gate drivers internal shutdown circuit to tri-state its output, thereby allowing external pull-up or pull-down resistors to determine Its output voltage level); Another aspect of the driver design is a means to detect gross over-current levels. This is desirable since the power modules IGBTs exhibit high transconductance (170 mhos, for a typical 400A/600V module). This means the IGBT devices can easily conduct more than twice their maximum rated current. The DSAT or de-saturation current sensing method shown in Figure~#4 relies on the IGBTs forward on voltage to increase with its current flow. The DSAT sense line is clamped low during the off time period of the IGBT and during the switching transitions to avoid overloading the comparators inputs. The DSAT clamp !is driven horn the ON/OFF opto output. The off-to-on switching edge time period relies upon the clamp FETs gate discharge time to delay the unclamping ofithe DSAT sense line until after the IGBT has switched on. The propagation delay.of the comparator-MC33151-FET DRIVER chain insures the DSAT line is clamped low, slightly before the IGBT actually turns off. The comparator sense line tracks the IGBT collector-to-emitter ON voltage. When an over-current condition occurs, the IGBT CE voltage goes above its nominal value and the over-current comparator toggles when its reference voltage is exceeded!

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Inc.

1995

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November1995

M 0

MolylRoLA

Technical Developments

FAULTINPUT I_

r-------__---I OUTPUT* : INTERFACE I INPUT ; INTERFACE

DRIVERCIRCUIT (1 OF 3)

_____ OSAT _I LOGIC CATE DRIVERT I 1 OSAT AC2 LOGIC -G2 GT~ DRIVERYE2

tsoov c, Gl E IGBT El.C2 CURRENT WINDING POWER NODULE PHASE CURRENT

GATE DRIVERLOGIC

I_

OUTPUT : INTERFACE I INPUT i INTERFACE I

e-I-

GATE DRIVERLOGIC

E2

L-----------------J

&
Fig. 1

PROBLEU I! 3 5.5 VOLT GE LOCKOUT LOWVOLTA1 JTPUTLOW DRIVES01 D , r-------l___ WHICHTURNS ON a FET AND

t15v

POWER YOOULE I---------,

PROBLEV IS -5 VOLTbN N FET SOURCE REQUIRES N FET GATE TO PULL DOWN TO -5 VOLTSTO TURNOFF. UC33151 Vss CAN NOT OPERATE BELOW GROUND Fig. 2
0 MOtOcOla. Inc. 1995

123

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MmROLA

,Technical Developments

ADDING 6.6 VOLT ZENER DISABLES LOW VOLTAGELOCKOUT, BUT DOESREQUIREEXTRA t15v TURN-OFF ELEMENT. ACTIVE GATE CLAMP , .-.. \

POWER UODULE r------1

DRIVER LOGIC

I I
ACTIVE GATE CLAMP-5V ADDING 1OV ZENERALLOWS-5 VOLT ON N FET SOURCE. WHEN-. MC33151OUTPUT GOES HIGH, +15V, ZENER DROPS lOV, WHICH ALLOWStlOV GATE-TO-SOURCE BIAS TO TURN ON N FET. WHENMC33151OUTPUTGOESLOW, OV, 1OV ZENERIS OFF, AND PNP ACTIVE GATE CLAMPALLOWS-5V TO N FET GATE.

Fig.3

PGWER YODULE r-+----, COMPARATOR

FAULT LATCH

CLAMPSHUNTSTrr NOISE AND PERFORMS AND GATE FUNCTION.OSAT COMPARATOR I ONLY SEE IGBT ON VOLTAGE,NOT NOISE SPIKES FROMSWITCHINGEDGESNOR IGBT OFF VOLTAGE.
Fig.4 0 Motorola. Inc.,995

124

November 1995