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Error Detection

Types of Errors
Error Detection
Model of Frame Transmission
Types of Errors
Single-bit error
Multiple-bit error
Burst error
Redundancy
Vertical Redundancy Check (VRC)
In vertical redundancy check (VRC), a
parity bit is added to every data unit so
that the total number of 1s becomes
even.
Vertical Redundancy Check (VRC)
Examples
The sender wants to send the word world. in ASCII
1110111 1101111 1110010 1101100 1100100
w o r l d
The Transmitted data is below with the parity bit in bold.
11101110 11011110 11100100 11011000 11001001
a) Suppose the received data is as follows:
11101110 11011110 11100100 11011000 11001001
Counting the number of 1s in each character we have (6,6,4,4,4). The data is accepted.
b) Suppose the received data is as follows:
11111110 11011100 11101100 11011000 11001001
Counting the number of 1s in each character we have (7,6,5,4,4). The receiver
knows that the data are corrupted, discards them, and asks for retransmission.
Vertical Redundancy Check (VRC)
Examples
1) VRC detects all single-bit errors. It can detect burst
errors only if the total number of errors in each data unit
is odd.
2) VCR can not correct errors (why?)
Longitudinal Redundancy Check (LRC)
Suppose the following data is sent:
10101001 00111001 11011101 11100111 10101010 (LRC)
During transmission, it is hit by a burst of length eight and some bits are corrupted
10100011 10001001 11011101 11100111 10101010 (LRC)
Checksum
Cyclic Redundancy Check (CRC)
Polynomial
Polynomial and Divisor
Standard Polynomials
Error Detection
Cyclic Redundancy Check (CRC)
Systematic Representation of the CRC
Code
Mathematical Framework and
Examples
Block diagram showing Error Control
Operations for a Point-to-Point Link
A sequence of k bits arrives from a source
The encoder observe the sequence of message and adds n-k check
bits to form a transmitter block of n bits
At the receiver, the n bit received block is observed by the
decoder, which uses the check bits to determine if errors are
present. If not the k bits message are further processed through
the system
Storage Encoder
Transmission
Link
Decoder
Input data
Data block
(k-bits)
Encoded block
n bits
n > k
Received block
n bits
Output data
k bits
Cyclic Redundancy Check (CRC)
Consider the sequence of bits
1001110101 (The left most significant bit)
| |
1 0 0 1 1 1 0 1 0 1 v =
9 6 5 4 2
( ) 1 v x x x x x x = + + + + +
For polynomial representation
In v(x) the powers of x with zero coefficient are not
represented and that the polynomial has degree 9 or
less to conform with the sequence that contains 10
bits.
For ease and cost of implementation modulo-2
arithmetic is used when implementing the CRC code
Mathematical Framework
Modulo-2 Arithmetic
ADDITION MULTIPLICATION SUBTRACTION
0 + 0 = 0 0 0 = 0 0 - 0 = 0
0 + 1 = 1 0 1 = 0 0 - 1 = 1
1 + 0 = 1 1 0 = 0 1 - 0 = 1
1 + 1 = 0 1 1 = 1 1 - 1 = 0
Mathematical Framework
Polynomial Representation
| |
| |
1 0 0 1 1 1 0 1 0 1
0 1 1 0 1 0 1 1 1 0
:
( )
( )
v
w
Write
V x
W x
=
=
=
=
6 3 2
2 1
3
2
3
1
) ( ) (
) ( , 1 ) (
x x x x x v x v
x x x v x x x v
+ + + =
+ = + + =
Example
Multiplication of polynomials
Mathematical Framework
Polynomial Division
Division of polynomials: can be carried out using the
long division rule of algebra
3
1 2
( ) 1 , ( ) 1 v x x x v x x = + + = +
2
x x +
1 x +
3
1 x x + +
3 2
x x +
2
1 x x + +
2
x x +
1 = remainder
1 ) ( ) ( ) (
2
2
1
+ + = x v x x x v
The Result:
Mathematical Framework
Polynomial Representation
( ) ode generator polynomial of degree ( )
( ) essage polynomial of degree ( 1)
( ) Transmitter code polynomial of degree ( 1)
( ) Receiver code polynomial of degree ( -1)
( ) Remainder Polynomial
( ) Re
G x C n k
M x M k
T x n
R x n
r x
S x
=
=
=
=
=
= mainder of dividing R(x)/G(x)
Polynomial notation
Mathematical Framework
is the highest degree of G(x)
transmitted message
(1) '( ) ( )
(2) ( ) [ '( ) / ( )]
(3) ( ) '( ) ( )
n k
remainder
n k M x M x x
r x M x G x
T x M x r x

=
=
= +
Code Construction at the transmitter:
Mathematical Framework
2 3 3
( ) 1 ; ( ) 1
( ) [ ( ) / ( )]
remainder
R x x x x G x x x
S x R x G x
= + + + = + +
=
1
3
1 x x + +
3 2
1 x x x + + +
3
1 x x + +
2
( ), Syndrome x S x =
Syndrome calculation at the receiver, S(x)
Assume:
Then calculate
Mathematical Framework
Case 1: S(x) is equal to zero. This implies no
error.
Case 2: S(x) is different from zero. This
implies an error is present.
Examples
For a 7 bi data code 1001100 determine the
CRC check bits and the transmitted message
using CRC generator polynomial of
Show how single bit and double bit errors can
be detected.
3 2
( ) 1 G x x x = + +
Answer
6 3 2
3 2
( ) (1001100)
( ) 1 (1101)
M x x x x
G x x x
= + +
= + +
3 3 6 3 2
9 6 5
9 6 5 3 2
9 6 5
(1) '( ) ( ) ( )
1001100000
(2) ( ) [ '( ) / ( )]
[( ) / 1]
1 001
(3) ( ) '( ) ( ) 1 1001100001
remainder
remainder
M x M x x x x x x
x x x
r x M x G x
x x x x x
T x M x r x x x x
= = + +
= + +
=
= + + + +
=
= + = + + +
Detection of Single Bit and Double
bit Errors
9 6 5
9 6 5 3 2
'( ) 1001100000
Calculate
( ) [ '( ) / ( )] [( ) /( 1)]
1 001
remainder remainder
R x x x x
S x R x G x x x x x x
= + +
= = + + + +
=
Assume the received message has one bit in error:
R(x)=1001100000
Therefore S(x) is different from zero, implies there is
an error.
Detection of Single Bit and Double
bit Errors
9 6 5 3
9 6 5 3 3 2
2
'( ) 1001101000
Again calculate
( ) [ '( ) / ( )] [( ) /( 1)]
100
remainder remainder
R x x x x x
S x R x G x x x x x x x
x
= + + +
= = + + + + +
=
Assume the received message has two bits in errors:
R(x)=1001101000
Again S(x) is different from zero, which implies
there is an error.
Summary (1)
Three types of error
Single-bit error
Multiple-bit error
Burst error
Error Detection
Vertical Redundancy Check
Longitudinal Redundancy Check
Checksum
Cyclic Redundancy Check ( most powerful)
Atypical encoder produces a code word in systematic form.
This involves the following steps:
1. Multiply the message sequence by to obtain
2. Divide the resulting sequence by the generator polynomial,
G(x)
3. Add the remainder polynomial, r(x), that results from step 2 to
obtain the polynomial representation of the transmitted code
word T(x).
Summary (2)
n k
x

( )
n k
x M x

Summary (3)
At the receiver, the decoder calculates the syndrome polynomial,
S(x) and the output message polynomial M(x)
( ) received
( ) remainder
( ) generator
R x
S x
G x

=

If S(x) is different from zero, there is an error. Hence


retransmission or error concealment is required.
If S(x) is equal to zero there is no errors.
Since the code vector is constructed in systematic form,
producing M(x) merely requires selecting the first k bits of the
received word.
Summary (4)
A generator polynomial of R bits will detect :
All single-bit errors
All double-bit errors
All odd number of bit errors
All error burst less than R
Most error bursts greater or equal to R
Error Correction
Introduction
Error bits are added to correct transmission errors.
Normally, the more bits that are added, the better the
correction. With error correction the receiver detects an
error and tries to correct as many error bits as possible.
An error correction code is normally used when the
receiver cannot request a retransmission.
Hamming Code
Hamming code is a forward error correction (FEC)
scheme, which can be used to detect and correct bit
errors. The error correction bits are known as Hamming
bits and the number that needs to be added to a data
symbol is determined by the expression:
Where m is the number of bits in the data symbol
n is the number of Hamming bits.
2 1
n
m n > + +
Hamming Code
Hamming bits are inserted into the message character
as desired. Typically, they are added at positions that
are powers of 2, i.e. the 1st, 2nd, 4th, 8th, 16th bit
positions, and so on.
Hamming Code
Hamming Code
Example:
For example to code the character 011001 then,
starting from the right-hand side, the Hamming
bits would be inserted into the 1st, 2nd, 4th and
8th bit positions.
The character is 011001
The Hamming bits are HHHH
The message format will be 01H100H1HH
10 9 8 7 6 5 4 3 2 1
0 1 H 1 0 0 H 1 H H
Hamming Code
Next each position where there is a 1 is represented
as a binary value. Then each position value is
exclusive-OR'ed with the others. The result is the
Hamming code. In this example:
Position Code
9
7
3
XOR
1001
0111
0011
1101
Hamming Code
The Hamming code error bits are thus 1101 and the
message transmitted will be 0111001101.
10 9 8 7 6 5 4 3 2 1
0 1 1 1 0 0 1 1 0 1
Hamming Code
At the receiver all bit positions where there is a 1 are
exclusive-OR'ed. The result gives either the bit position error
or no error. If the answer is zero there were no single-bit
errors.
Position Code
9
7
3
XOR
1001
0111
0011
0000
Hamming 1101
Hamming Code
If an error has occurred, it will give the bit position. For
example if an error has occurred in bit 5 then the result
is 5.
Position Code
9
7
3
XOR
1001
0111
0011
0101
Hamming 1101
5 0101
Hamming Code
Summary
(1) Calculate the number of Hamming bits
using the formula:
Where m is the number of bits in the data and
n is number Hamming bits.
2 1
n
m n > + +
Hamming Code
Summary
(2) Determine the bit positions of the
Hamming bits (typically they will be inserted in
the power-of-2 bit positions, i.e. 1, 2, 4, 8, ...).
(3) Generate the transmitted bit pattern with
data bits and Hamming bits. For example if
there are 7 data bits and 4 Hamming bits
then the transmitted bit pattern will be:
Hamming Code
Summary
(4) Represent each position where there is a
1 as a binary value. Then calculate the
exclusive-OR of all values. The results is the
Hamming code.
(5) At the receiver all bit positions where there
is a 1 are exclusive-OR' red. The result gives
either the bit position error or no error.

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