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# Integrated Circuits

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## Unit 5 Assignment 1: Problems

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Learning Objectives and Outcomes Contrast the output characteristics of integrators and differentiators. Analyze the operation of several converters and other op-amp circuits. Troubleshoot op-amp circuits.

## Assignment Requirements: Answer the following questions.

1. Determine the rate of change of the output voltage in response to the step input to the integrator in Figure 1.

Figure 1

2. A triangular waveform is applied to the input of the circuit in Figure 2 as shown. Determine what the output should be and sketch its waveform in relation to the input.

Figure 2

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3.

## What is the magnitude of the capacitor current in Figure 2?

4. Beginning in position 1 in Figure 3 the switch is thrown into position 2 and held there for 10 ms, then back to position 1 for 10 ms, and so forth. Sketch the resulting output waveform. The saturated output levels of the op-amp are 12 V.

Figure 3

5. Determine the load current in each circuit of Figure 4. (Hint: Thevenize the circuit to the left of Ri.)

Figure 4

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6. Devise a circuit for remotely sensing temperature and producing a proportional voltage that can then be converted to digital form for display. A thermistor can be used as the temperature sensor.

7. The waveforms given in Figure 5(a) are observed at the indicated points in Figure 5(b). Is the circuit operating properly? If not, what is a likely fault?

Figure 5

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8. The waveforms shown for the window comparator in Figure 6 are measured. Determine if the output waveform is correct and, if not, specify the possible fault(s).

Figure 6

9. The sequences of voltage levels shown in Figure 7 are applied to the summing amplifier and the indicated output is observed. First, determine if this output is correct. If it is not correct, determine the fault.

Figure 7

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10. The given ramp voltages are applied to the op-amp circuit in Figure 8. Is the given output correct? If it isnt, what is the problem?

Figure 8

## Required Resources Textbook Notes from class

Submission Requirements Submit your written answers to your instructor at the beginning of Unit 6.

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## Unit 5 Assignment 2: Lab Follow-up

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Date:

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Learning Objectives and Outcomes Analyze the operation of several converters and other op-amp circuits. Troubleshoot op-amp circuits.

Assignment Requirements: Read the Brief Description and answer the questions that follow.

Brief description: The dual-slope ADC in Figure 1 accepts an audio signal and converts it to a series of digital codes for the purpose of recording. The audio signal voltage is applied to the sample-and-hold circuit. (Sample-andhold circuits are covered in detail in Chapter 14.) At fixed intervals, sample pulses cause the amplitude at that point on the audio waveform to be converted to proportional dc levels that are then processed by the rest of the circuits and represented by a series of digital codes.

Figure 1

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The sample pulses occur at a much higher rate than the audio frequency so that a sufficient number of points on the audio waveform are sampled and converted to obtain an accurate digital representation of the audio signal. A rough approximation of the sampling process is illustrated in Figure 2. As the frequency of the sample pulses increases relative to the audio frequency, an increasingly accurate representation is achieved.

Figure 2

The summing amplifier has only one input active at a time. For example, when the audio input is switched in, the reference voltage input is zero and vice versa.

During the time between each sample pulse, the dc level from the sample-and-hold circuit is switched electronically into the summing amplifier on the ADC board. The output of the summing amplifier goes to the ramp generator, which is an integrator circuit. At the same time, the digital counter starts counting up from zero. During the fixed time interval of the counting sequence, the integrator (ramp generator) produces a positive-going ramp voltage whose slope depends on the level of the sampled audio voltage. At the end of the fixed time interval, the ramp voltage at the output of the integrator has reached a voltage that is proportional to the sampled audio voltage. At this time, the digital control logic switches from the sample-and-hold input to the negative dc reference voltage input and resets the digital counter to zero.

The summing amplifier applies this negative dc reference to the integrator input, which starts a negativegoing ramp on the output. This ramp voltage has a slope that is fixed by the value VREF. At the same time, the digital counter begins to count up again and will continue to count up until the negative-going ramp output of the integrator reaches zero volts.

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At this point, the comparator switches to its negative saturated output voltage and disables the gate so that there are no additional clock pulses to the counter. At this time, the digital code in the counter is proportional to the time that it took for the negative-going ramp at the integrator output to reach zero and it will vary for each different sampled value.

Recall that the negative-going ramp started at a positive voltage that was dependent on the sampled value of the audio signal. Therefore, the digital code in the counter is also proportional to, and represents, the amplitude of the sampled audio voltage. This code is then shifted out to the register and then processed and recorded.

This process is repeated many times during a typical audio cycle. The result is a sequence of digital codes that represent the audio voltage amplitude as it varies with time. Figure 3 illustrates this for several sampled values. As mentioned, you will focus on the ADC board, which contains the summing amplifier, integrator, and comparator.

Figure 3

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Exercise 1 - Analyze the Circuit Using the schematic in Figure 4, perform the following: 1. Determine the gain of the summing amplifier. 2. Determine the slope of the integrator ramp in volts per microsecond when a sampled audio voltage of +2 V is applied. 3. Determine the slope of the integrator ramp in volts per microsecond when the reference voltage of -8 V is applied. 4. Given that the reference voltage is -8 V and the fixed-time interval of the negative-going slope is 1 s, sketch the dual-slope output of the integrator when an instantaneous audio voltage of +3 V is sampled. 5. Assuming that the maximum audio voltage to be sampled is +6 V, determine the maximum audio frequency that can be sampled by this particular system if there are to be 100 samples per cycle. What is the sample pulse rate in this case?

Figure 4

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Exercise 2 - Write a Technical Report In reference to Figure 5, discuss the detailed operation of the ADC board circuitry and explain how it interfaces with the overall system. Discuss the purpose of each component on the circuit board.

Figure 5

Exercise 3 - Troubleshoot the circuit for each of the following problems by stating the probable cause(s).

1. Zero volts on the output of IC1 when there are voltages on the sampled audio input and on the reference voltage input.

2. IC1 goes back and forth between its saturated states as the positive audio voltage and the negative reference voltage are alternately switched in.

## 3. The inverting input of IC1 never goes negative.

4. The output of IC2 stays at zero volts under normal operating conditions.

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