IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO.

3, MARCH 2013

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An Integrated Boost Resonant Converter for Photovoltaic Applications

Ben York, Student Member, IEEE, Wensong Yu, Member, IEEE, and Jih-Sheng (Jason) Lai, Fellow, IEEE
AbstractEffective photovoltaic power conditioning requires efcient power conversion and accurate maximum power point tracking to counteract the effects of panel mismatch, shading, and general variance in power output during a daily cycle. In this paper, the authors propose an integrated boost resonant converter with low component count, galvanic isolation, simple control, as well as high efciency across a wide input and load range. Provided is a discussion of the converter synthesis, key operational features, converter design procedure, and loss analysis, as well as experimental verication by way of a 250-W prototype with a California Energy Commission efciency of 96.8%. Index TermsIntegrated boost resonant (IBR), isolated dcdc microconverter, photovoltaic (PV).

Fig. 1.

Distributed (a) microinverter and (b) microconverter system structures.

I. INTRODUCTION

OWER conversion for photovoltaic (PV) applications, as opposed to more conventional dcdc converter congurations, requires an adaptable system that is capable of responding to a wide range of input voltage and current conditions. As previously stated in the literature, PV voltage varies signicantly with panel construction and operating temperature, while the PV current changes largely due to solar irradiance and shading conditions [1]. If a converter is designed only for high peak efciency, oftentimes the range of conditions common to many PV installations will force the converter into another operating region where it is much less efcient. Thus, the California Energy Commission (CEC) has introduced a more comprehensive scale for measuring converter performance, a so-called weighted efciency, as an attempt to reect the net efciency of a power conditioning system (PCS) over the course of an average day [2], [3]. Also of interest in the PV PCS design process is the necessity of galvanic isolation between the PV panel and the electric utility system. While an ungrounded, grid-connected PV array is permitted by many electric codes, galvanic isolation can be preferred for various reasons. Most notable among these are

Manuscript received November 2, 2011; revised March 29, 2012 and May 10, 2012; accepted June 25, 2012. Date of current version October 12, 2012. This work was supported by the U.S. Department of Energy under Award DEEE0004681. Recommended for publication by Associate Editor J. A. Cobos. The authors are with the Virginia Polytechnic Institute and State University, Blacksburg, VA 24060 USA (e-mail: benyork@vt.edu; wensong@vt.edu; laijs@vt.edu). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TPEL.2012.2207127

improved voltage boost ratio, reduced ground leakage current, and overall safety improvement during fault conditions [4][6]. As several authors have already proposed, distributed maximum power point tracking (MPPT) can achieve much better energy harvesting over systems that are completely centralized [7]. Researchers have also concluded that a system structure with the PV panels connected in parallel can be much more productive in low-light and partially shaded conditions than a series-connected system [8][12]. These concerns arguably make the single-panel PV microinverter (dcac), or at least an isolated microconverter (dcdc), an attractive option from a strictly performance-based analysis. In either system, the dc dc stage implements local MPPT optimization, while the second stage attempts to regulate the dc-link voltage by sending power to the utility grid. Block diagrams showing the microinverter and microconverter system structures are provided in Fig. 1. It is this combination of high CEC efciency, galvanic isolation, and a localized, distributed approach to energy conversion that has prompted the proceeding technical development. In the literature, there have been a variety of different methods proposed for microconversion, both isolated and nonisolated [13][16]. Some utilize one pulsewidth-modulated (PWM) stage in the conversion from dcac [17], others utilize multiple PWM stages. For reasons discussed earlier, the authors are constraining the discussion henceforth to isolated solutions. Considering also only multistage solutions allows for increased interoperability between distributed ac and dc systems while permitting the removal of electrolytic capacitors, which have limited lifetime, from the system design. In the distributed PV PCS, the isolated dcdc stage must operate efciently at full power, while maintaining high performance at light load, across a range of PV voltages. In order to maintain high efciency under low-power conditions, it is necessary to minimize the amount of circulating energy in the system. An alternate denition of this characteristic would be producing a system with a high power factor at the isolation transformer. Also critical to light load efciency is mitigating the device

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switching loss. Finally, reduction of the control and gate drive complexity allows for lower xed losses due to auxiliary power requirements. When considering potential PV conversion solutions, addressing these loss mechanisms is critical to a successful design. One popular option for the dcdc conversion stage is a simple continuous-conduction-mode (CCM) yback converter [18], [19]. It has the benet of simple construction and low circulating energy. However, the switching loss for both the primary switch and the diode can be quite large, and the overall system efciency is typically low (<90%). Improvements in yback efciency can be made using variants such as zero-voltage transition or active clamp, both of which use the transformer leakage inductance as a resonant element to achieve zero-voltage switching (ZVS) across the main device [20], [21]. However, this effectively trades switching loss for circulating energy, reducing efciency at high line or low power. Another more complex effort involves transitioning between different circuit topologies at different load/line conditions thereby increasing control and system complexity [22]. Another option is the series-resonant converter, and more recently the LLC resonant converter, both of which operate on a similar principle and, typically, use a variable frequency control to adjust the output voltage [23][25]. When the series-resonant, or LLC converter, is operated near the resonant frequency of the tank circuit, the converter achieves nearly ZVS and zero-current switching (ZCS) with very low circulating energy, giving it a high peak efciency. However, as the operating frequency diverges from the resonant frequency, the amount of circulating energy increases. Unfortunately, the normal conditions for PV conversion will often push the converter signicantly away from the optimum switching frequency, causing the CEC efciency to suffer. Several authors have proposed methods to extend the line and load range of the LLC, once again complicating the circuit topology and control [26][28]. Other authors have proposed using the series-resonant converter as an unregulated dcdc transformer (DCX) [29]. This approach has the benet of almost no switching loss, little or no circulating energy, very high peak efciency, and integrated isolation. However, the inverter stage must be able to regulate over a wide input range because the PV voltage uctuates so dramatically, causing extremely poor overall system efciency. This concept of using the series-resonant DCX is not without merit, but the system requires an additional element to provide regulation capability. The method proposed in this paper integrates a traditional boost converter element into the DCX with only the addition of a single inductor. The overall design is straightforward and may be controlled using simple xedfrequency PWM with only the need to observe limitations on the maximum and minimum duty cycle. For PV applications, this circuit satises the need for galvanic isolation, low switching loss (the output diodes achieve ZCS), minimal circulating energy, as well as simple gate drive and control. In the following sections, the authors will discuss the synthesis of the topology, key waveforms and operational characteristics, design procedure and loss analysis, as well as experimental results for a 250-W prototype.

Fig. 2.

Resonant half-bridge with separate boost input stage.

Fig. 3.

IBR converter.

II. CONVERTER SYNTHESIS AND OPERATION When considering the series-resonant DCX as part of this new hybrid circuit, it is important to notice the half-wave resonant behavior by which it operates. During the on-period of either switch a resonant circuit is formed by a combination of the input-side capacitors, the output-side capacitors, and the transformer leakage inductance. The unidirectional nature of the output diodes prevents this circuit from resonating perpetually, and instead, only a resonant period consisting of one half-sine wave is visible. Provided that this resonant period is allowed to complete fully before the primary-side switches change states, the series-resonant circuit is naturally soft-switching on both turn-on and turn-off (ZVS and ZCS). If both resonant periods are allowed to fully complete, the system has no method by which to regulate the output, and the output is simply a reection of the input. Hence, the necessary addition of another regulating element, in this case a boost converter, is shown in Fig. 2. The boost converter regulates the effective input voltage to the series-resonant converter, allowing it to run as a DCX with high efciency. The cost is two additional transistors, with their associated gate drive requirements, and some additional switching and conduction loss. This circuit may be further simplied by integrating the system so that the boost converter function is implemented by the original two MOSFETs. A straightforward method to understand this is to directly tie the input inductor to the midpoints of both active switching legs simultaneously. Note that this change directly ties the inductor to one terminal of the transformer. This additional connection renders the upper MOSFETs (QX and Q1 ) as well as the lower MOSFETs (QY and Q2 ) in parallel, so long as their switching patterns are synchronized. Thus, the circuit may be simplied, with the additional connection and the removal of QX and QY , into the topology shown in Fig. 3. Because the now single upper and lower FETs (Q1 and Q2 ) are effectively replacing two parallel FETs, they carry the combined current from the original four switches. Also, as long as the resonant behavior is allowed to complete, the output diodes, D1 and D2 , still achieve ZCS.

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Fig. 4.

IBR converter operating modes.

Mode 1 [t0 < t < t1 ; see Fig. 4(a)]: Beginning with the turnoff of Q2 prior to t0 , the current in the input inductor L ows into the body diode of Q1 , discharging its parasitic capacitance. This allows Q1 to be turned ON under ZVS conditions at t0 . At this time, the upper input-side capacitor C1 begins resonating with the transformer leakage inductance Lk and the output-side capacitors, C3 and C4 , through D1 . Simultaneously, the input current begins charging the series combination of C1 and C2 . During this phase, Q1 carries the difference between the transformer current, owing from C1 through the positive terminal of the transformer and the input current. Once the transformer current resonates back to zero, D1 prevents the continued resonating in the reverse direction, ending mode 1. The length of mode 1 is given by Tres1 = Lk n2 (C1 + C2 ) (C3 + C4 ) . C1 + C2 + n2 (C3 + C4 ) (2)

Fig. 5.

Timing diagram showing circuit operating modes.

This particular circuit topology is similar to that of the boost half-bridge (BHB); however, the actual operation of this circuit is quite different [30][34]. In the BHB, the operating currents are that of the hard-switching half-bridge, giving the converter a poor power factor at the transformer. This makes it difcult for the converter to achieve a wide range of operation, even with ZVS. Also, the voltage transfer ratio is highly nonlinear, leading to much more complex control requirements. On the other hand, this new circuit features a very simple voltage transfer ratio, given in (1), where n is the transformer turns ratio, and D is the duty cycle of the lower switch, Q2 . Unlike the BHB, this transfer ratio is constant over both input load and frequency Vout n . = Vin 1D (1)

Mode 2 [t1 < t < t2 ; see Fig. 4(b)]: Q1 is still active, yet it is only conducting the input inductor current, which is still decreasing, a pathway which is shown in Fig. 4(b). The resonant elements all conduct zero current during this interval. Only C5 continues discharging into the load at this time. Mode 2 ends with the turn-off of Q1 and the subsequent turn-on of Q2 . Mode 3 [t2 < t < t3 ; see Fig. 4(c)]: After the turn-off of Q1 , but prior the turn-on of Q2 , the inductor current is still shunted into charging the series combination of C1 and C2 , this time through the body diode of Q1 , and still decreasing almost linearly. When Q2 is turned ON, the body diode of Q1 is hardcommutated, causing some switching loss. At t2 , C2 begins to resonate with Lk and the parallel combination of C3 and C4 , through the diode D2 . Simultaneously, the inductor current also ows through Q2 , increasing linearly. During this interval, Q2 carries the sum of the transformer current and the inductor current. Thus, the rms current through Q2 is signicantly larger than that of Q1 , which carries the difference of the two currents. Once the transformer current resonates back to zero, D2 blocks the continued oscillation, marking the end of mode 3 Tres2 = Lk C2 n2 (C3 + C4 ) . C2 + n2 (C3 + C4 ) (3)

This voltage transfer ratio (1) is identical between the circuit shown in Figs. 2 and 3, indicating that only one pair of switches is necessary to provide controllability. Also, the transfer characteristic is similar to that of a CCM boost converter, simply multiplied by n. MPPT control of the CCM boost converter is widely discussed in the literature, with many different methods available such as perturb & observe (P&O) [35], ripple correlation control [36], and incremental conductance [37]. Also, several different control implementations are possible with the integrated boost resonant (IBR) converter, such as input voltage [38], input current [39], and direct duty cycle control [40], giving tremendous control exibility to the designer. The new topology can be effectively broken down into four distinct operating modes, shown in schematic form in Fig. 4(a) (d) and as sections in the timing diagram provided in Fig. 5.

Mode 4 [t3 < t < t4 ; see Fig. 4(d)]: The inductor current continues to ow through the lower device, increasing until Q2 is turned OFF and the circuit returns to mode 1. Also, during both modes 3 and 4, Q1 effectively isolates the upper capacitor from charging or discharging. Note that there is a signicant difference in the circuit behavior between the two resonant modes (1 and 3). During mode 3, C1 is effectively isolated from the rest of the circuit due to the presence of Q1 . However, during mode 1, C2 has an ac discharge path through the PV source and the input inductor, allowing the two input capacitors (C1 and C2 ) to appear in parallel, though the resonant current is not shared evenly between them. Thus, the length of mode 1 can be signicantly longer than mode 3, depending on the relative sizing of C1 C4 and the transformer turns ratio n. Optimizing the resonant period length

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will be a core component of the design procedure outlined in the proceeding section. III. DESIGN PROCEDURE AND LOSS ANALYSIS A. Determining Duty Cycle Limits From Input Requirements The most critical element of this design procedure is the identication of the input voltage requirements, so that the duty cycle range is fully utilized. With this converter, there is a direct tradeoff between increased input range and lower rms currents in the circuit. The most basic method involves setting the maximum and minimum duty ratios such that the middle of the input range results in a 50% duty cycle at the converter, an approach provided via (4) and (5) Dm ax = Vin , m ax Vin , m in + Vin , m ax (4) (5)

number of primary turns: Vbus Tsw . (13) 4 When determining the winding current density and, therefore, the required winding gauge and copper loss, the rms current through the primary and secondary windings may be determined from (14) and (15). These equations were derived by integrating the square of the transformer currents over one switching cycle. Note that Rload is the load resistance for a given output power level. At this stage, the maximum values for Tres1 and Tres2 , as calculated in step 2, may be used. They may be replaced once the values are determined more specically in step 5 V Sp eak = iRM S , XFM R , pri = 2 nVout Rload Tsw 2 1 Tres1 + 1 Tres2 (14) iRM S , XFM R , sec = 2 Vout Rload Tsw 2 1 Tres1 + 1 Tres2 . (15) D. Design Input Inductor Based on Allowable Current Ripple Multiple criteria may be used for designing the input inductor. In PV applications, especially for accurate MPPT, the inductor current ripple must be regulated. The following equation species the input inductance based on the maximum allowable current ripple (which occurs at D = 0.5): L= Vbus Tsw . 4IL , avg %ripple , m ax (16)

Dm in = 1 Dm ax .

With the nominal input assigned to have a 50% duty cycle, the bus voltage Vbus which is measured across C1 and C2 can be calculated by Vbus = Vin , m ax + Vin , m in . (6)

However, it may be necessary to adjust Vbus to accommodate voltage stress requirements on devices or to meet certain standards. If this is necessary, Vbus , Dm ax , and Dm in can be altered by using (7), (8), and (9), respectively Vbus , adj = Vbus + Voset Dm ax , adj Vin , m in =1 Vbus , adj Vin , m ax . Vbus , adj (7) (8) (9)

Dm in , adj = 1

B. Determining Maximum Resonant Period Lengths With the maximum and minimum duty ratios known, the limits for the resonant periods Tres1 and Tres2 may be calculated based on the desired switching period Tsw utilizing the following equations: Tres1 , m ax = (1 Dm ax ) Tsw Tres2 , m ax = Dm in Tsw . C. Design Transformer Based on the calculated Vbus and the desired output voltage Vout , the following equation can be used to calculate the necessary transformer turns ratio, n: n= Vout nsec = . npri Vbus (12) (10) (11)

For both inductor design and loss analysis, the rms current through the inductor may be calculated by (17), once again with the maximum rms for a given IL , avg occurring at a 0.5 duty ratio. This equation was derived by integrating the square of the inductor current over one switching cycle IL , RM S =
2 IL , avg + 2T2 D2 Vin sw . 12L2

(17)

E. Resonant Capacitor Design With the magnetics design complete, it is now possible to design the resonant capacitors C1 C4 . In order to reduce the rms currents in the circuit, the resonant period needs to be as close to the calculated maximum as possible. Because the leakage inductance of the transformer, Lk , is involved in the resonant circuit and is a consequence of the transformer design in step 3, it is left as a constant here. The full equation for calculating Tres1 is given in (2). In order to simplify the design process, C1 and C2 as well as C3 and C4 may be set to equal values, CL and CH , respectively, simplifying the result from (2) into (18). If the duty cycle was not adjusted as in the second half of step 1, then Tres2 is not necessary to design. Otherwise, Tres2 may be calculated fully in (3) or with equal Cs in (19) Tres1 = Lk 2 (CL ) (n2 CH ) < Tres1 , m ax CL + n2 CH (18)

The transformer design process can be carried out under a number of different procedures; however, the peak Vs product, provided in the following equation, is often a useful quantity when determining the transformer ux density, core size, and

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Tres2 =

2Lk n2 CL CH < Tres2 , m ax . CL + 2n2 CH

(19)

TABLE I POWER STAGE ELEMENT VALUES FOR 250-W PROTOTYPE

In order to calculate the conduction losses in each of the capacitors, rms current calculations are provided in (20)(23). These equations were derived by integrating the square of the capacitor current waveforms (C3 and C4 being purely resonant, while C1 and C2 are the combination of the inductor and transformer currents), over one switching cycle iRM S ,C 1 =
2 (1 D) IL , avg +

2 8

nVout Rload

Tsw 2 Tres1

nVout Rload

IL , avg Irm s (20)

2 Q2

Tsw 2Tres2

nVout 2Rload

2niL , avg Vout + i2 L , avg D. Rload (27)

iRM S ,C 2 = iRM S ,C 3 = iRM S ,C 4 = 4 4

2 (1 D) IL , avg

Tsw +2 Tres2

n 4

Vout Rload

(21)

Vout Rload Vout Rload

Tsw 2 Tsw 2

1 1 + Tres1 Tres2 1 1 + Tres1 Tres2 .

(22) (23)

A dc path exists between the input terminal and C2 , which causes the average voltage across C2 to be equal to Vin . The average voltage across C1 can thus be written as VC 1 , avg = F. Output Capacitance The required output capacitance C5 can be determined from the allowable output ripple on the dc-link voltage, specied by (25). This equation is approximate, based on taking the average value of the resonant output current during one-half resonant period, subtracting the load current, dividing by the output capacitance, and multiplying by the resonant period length Vripple , pk pk = Vout Rload Tsw 1 2Tres2 Tres2 . C5 (25) DVin . 1D (24)

Because Q1 obtains ZVS naturally, its switching loss is limited to only turn-off loss. Q2 , however, has both turn-on and turn-off losses. Of note here is that because modes 1 and 3, with lengths of Tres1 and Tres2 , are complete by the time that either Q1 or Q2 switches OFF, the current-related switching losses are only due to the input inductor current. The loss equations, (28) and (29), are modied triangle approximations with time values representing the rise and fall of the device voltage and current, and IL representing the inductor current ripple [41]. Also incorporated is the charge-related switching loss. Diode reverse recovery loss is not included in the loss equation (29), but could be signicant in some applications PSW ,Q 1 = PSW ,Q 2 = (tFI + tRV ) IL Vbus IL , avg 2Tsw 2 (tRI + tFV ) IL Vbus IL , avg 2Tsw 2 + + (tFI + tRV ) IL Vbus IL , avg + 2Tsw 2 1 Qoss ,Q 2 Vbus . Tsw (29) (28)

G. MOSFET and Diode Selection Both of the primary-side MOSFETs have a maximum voltage stress of Vbus and rms current stresses given by (26) and (27). Note that the current stress in Q2 is much larger than that in Q1 , and that both current stresses are related to the ratio of Tsw and Tres1 , 2 . These equations were derived by integrating the square of the MOSFET currents (each being the combination of the inductor and transformer currents) over one switching cycle Irm s
Q1

The output diodes D1 and D2 need to block the full output voltage, and they need to each carry the full load current due to the voltage-doubler conguration, as shown in the following equation: iavg , dio de = H. Loss Analysis Utilizing the equations dened above in conjunction with the characteristics of the experimental circuit dened in the proceeding section (see Tables IIV), a loss analysis graph is provided in Fig. 6 showing the system loss at a nominal input of 30 V and at a full load capacity of 250 W. In the circuit, the principle losses belong to Q2 and the output diodes. Vout . Rload (30)

= nVout 2Rload
2

Tsw 2Tres1

2niL , avg Vout + i2 L , avg (1 D ) (26) Rload

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TABLE II POWER STAGE DESIGN PARAMETERS FOR 250-W PROTOTYPE

TABLE III SEMICONDUCTOR DATA FOR 250-W PROTOTYPE

Fig. 7. TABLE IV SWITCHING LOSS CALCULATION DATA

250-W experimental prototype.

Fig. 8. Key converter operational waveforms at 30-Vd c input and 225-W/ 400-Vd c output.

Fig. 6.

Circuit loss analysis at 30-V input, 250-W output (full load).

IV. EXPERIMENTAL RESULTS During the course of this development, a 250-W prototype converter was designed and built in order to validate the presented analysis and to serve as a core element in a new distributed PV generation system. Some specications for the circuit are listed in Tables I and II, while the semiconductor device content is summarized in Table III. Table IV includes the switching data for Q1 and Q2 used in the calculations loss analysis above. The system control was implemented digitally on a Texas Instruments TMS320F28026 microcontroller simply for exibility and rapid implementation. In practice, a dedicated PWM or MPPT controller would also function well. A photograph of the prototype is provided in Fig. 7. Figs. 8 and 9 demonstrate the consistency of the converter operation over both high and low power. Under each condition, both the inductor current and the transformer current retain their general wave shape while demonstrating CCM and resonant behavior, respectively. This consistency and simplicity is further demonstrated by the voltage transfer ratio plot in Fig. 10, which shows the relationship of the voltage transfer ratio given in (1), as compared to experimental measurement at low and high power. As anticipated, the magnitude of the voltage transfer ratio varies

Fig. 9. Key converter operational waveforms at 30-Vd c input and 67-W/ 400-Vd c output.

only slightly with power level as a result of increased converter loss. In order for the converter to achieve high efciency, two other critical components were mentioned, mitigating switching loss and improving transformer power factor. One denitive aspect of managing the converter switching loss is the ability of the output diodes to achieve ZCS. Experimental evidence of this is provided in Fig. 11, even at high power (>225 W). Also, the fully resonant behavior at the transformer allows the converter to achieve a high power factor, as evidenced in Fig. 12. Here, it is shown that the transformer current is continually in-phase with the transformer voltage, indicating very low circulating energy. Utilizing the TI microcontroller, a simple PV voltage control loop with P&O MPPT logic was implemented, similar to [38].

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Fig. 10.

Experimental voltage transfer ratio versus duty cycle.

Fig. 13. Input voltage and current during startup, P&O MPPT, and shutdown using a BP Solar SX6165N 165-W PV Panel (112-W operating power) (400-Vd c output).

Fig. 11.

Output diode ZCS (30-Vd c input and 400-Vd c /225-W output).

Fig. 14.

Projected power stage efciency (400-Vd c output).

Fig. 12. output).

Transformer VI relationship (30-Vd c input and 400-Vd c /225-W

TABLE V BP SOLAR SX6165N PV PANEL RATINGS (25 C CELL TEMPERATURE)

Fig. 15.

Measured power stage experimental efciency (400-Vd c output).

At startup, the converter starts at the open-circuit voltage of the PV panel and attempts to locate the MPP by changing the input voltage reference and measuring the corresponding change in input power. An experimental waveform showing the proposed IBR converter operation during startup (via connecting the converter to the PV panel), MPPT operation, as well as shutdown (via forcibly disconnecting the PV panel from the input) is shown in Fig. 13. For the test recorded in the gure, a BP Solar SX6165N polycrystalline SiN PV panel was used as the input source, which has characteristics recorded in Table V. As the nal step in the verication process, an experiment to demonstrate the efciency of the proposed converter was conducted. Projections for the converter efciency, based on the procedure outlined in Section III, are given in Fig. 14. Shown

in Fig. 15 is the measured power stage efciency for a range of input and load conditions. These match well overall, with some discrepancies at full power due to unmodeled circuit parasitics. Another issue is the variation in the device switching times under different current conditions, causing a low estimate of the efciency at the low-voltage conditions. However, the converter achieves a CEC efciency of 96.8% and an overall peak efciency of 97.4%. V. CONCLUSION As a solution for providing efcient, distributed PV conversion, an isolated boost resonant converter has been proposed. The system is a hybrid between a traditional CCM boost converter and a series-resonant half-bridge, employing only two active switches. The synthesis of the converter was described along with the circuit operating modes and key waveforms. The design process was then dened, with a focus on the unique combined resonant and PWM behavior. The result was a simple

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process, requiring only consideration of the resonant period length in selecting a valid converter duty cycle range. Also provided was a detailed theoretical loss analysis, along with formulas for calculating the rms values of important waveforms. Finally, the loss and theoretical analysis were veried by the design, construction, and testing of a 250-W experimental prototype. The principle advantages of utilizing this topology were as follows: 1) high weighted efciency because of low circulating energy and reduced switching loss with resonant energy transfer and output diode ZCS; 2) low potential cost due to minimal number of active devices and a small overall component count; 3) galvanic isolation allows for the use of high efciency inverter stages without additional concern over ground leakage current; 4) reduced control complexity provides lower auxiliary power loss and simpler controller IC congurations. Further efciency improvements are possible with the addition of widebandgap semiconductor devices and passive component optimization. REFERENCES
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Ben York (S06) received the B.S.E.E. degree from the University of Alabama, Tuscaloosa, in 2008, and the M.S. degree in electrical engineering from the Virginia Polytechnic Institute and State University, Blacksburg, in 2010, where he is currently working toward the Ph.D. degree in electrical engineering as a Graduate Research Assistant with the Future Energy Electronics Center. His current research interests include circuit and control development for isolated and resonant converters, particularly in renewable energy applications.

Jih-Sheng (Jason) Lai (S85M89SM93F07) received the M.S. and Ph.D. degrees in electrical engineering from the University of Tennessee, Knoxville, in 1985 and 1989, respectively. In 1989, he joined the Electric Power Research Institute (EPRI) Power Electronics Applications Center, where he managed EPRI-sponsored power electronics research projects. Since 1993, he has worked with the Oak Ridge National Laboratory as the Power Electronics Lead Scientist, where he initiated a high power electronics program and developed several novel high power converters including multilevel converters and auxiliary resonant snubber-based soft-switching inverters. In 1996, he joined the Virginia Polytechnic Institute and State University, Blacksburg, where he is currently a James. S. Tucker Endowed Professor and the Director of Future Energy Electronics Center. He has contributed to more than 270 refereed technical papers and two books. He received 20 U.S. patents in the area of high power electronics and their applications. Dr. Lai was the Founding Chair of the 2001 IEEE Future Energy Challenge for Inverter Competition, General Chairs of the 2000 IEEE Workshop on Computers in Power Electronics, 2005 IEEE Applied Power Electronics Conference and Exposition, and 2008 National Science Foundation Workshop on Power Electronics for Alternate Energy and Distributed Generation. His work brought him several distinctive awards including a Technical Achievement Award in Lockheed Martin Award Night and seven international conference paper awards.

Wensong Yu (M07) received the M.S. degree from the Huazhong University of Science and Technology, Wuhan, China, and the Ph.D. degree from the South China University of Technology, Guangzhou, China, in 1995 and 2000, respectively, both in mechanical and electrical engineering. In 2000, he was with the Emerson Network Power Co., Ltd., Shenzhen, China, where he developed digital uninterruptible power supply projects. In 2004, he joined the School of Electronic and Information Engineering, South China University of Technology. He is currently a Research Assistant Professor with the Bradley Department of Electrical and Computer Engineering, Future Energy Electronics Center, Virginia Polytechnic Institute and State University, Blacksburg. He is the author or coauthor of more than 20 technical papers and holds three patents. His research interests include soft-switching power converter, grid-tied inverter, industrial power electronics, digital control applied to power electronics, and renewable energy power conditioning systems.