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CUSTOMER CUSTOMER PART NO. ORIENT DISPLAY NO. DESCRIPTION APPROVED BY DATE AMC2002C SERIES
PREPARED BY
CHECKED BY
APPROVED BY
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Contents
1.Module Classification Information 2.Precautions in use of LCD Modules 3.General Specification 4.Absolute Maximum Ratings 5.Electrical Characteristics 6.Optical Characteristics 7.Interface Pin Function 8.Power Supply 9.Contour Drawing & Block Diagram 10.Function Description 11.Character Generator ROM Pattern 12.Instruction Table 13.Timing Characteristics 14.Initializing of LCM 15.Quality Assurance 16.Reliability
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3. General Specification
Item Number of Characters Module dimension(No Backlight ) Module dimension(With LED Backlight ) View area Active area Dot size Dot pitch Character size Character pitch LCD type Duty View direction Backlight Type 1/16 6 oclock or 12 oclock None, Yellow Green, Red or White LED backlight Dimension 20characters x 2 Lines 116.0 x 37.0 x 10.5MAX 116.0 x 37.0 x 14.5MAX 83.0 x 18.6 73.50 x 11.50 0.60 x 0.65 0.65 x 0.70 3.20 x 5.55 3.70 x 5.95 TN, Yellow/Gray/Blue STN/FSTN Unit mm mm mm mm mm mm mm mm
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5. Electrical Characteristics
Item Supply Voltage For Logic Supply Voltage For LCD Input High Volt. Input Low Volt. Supply Current Symbol VDD-VSS VDD-V0 VIH VIL IDD Condition Ta=25 VDD=5V Forward current =210 mA VLED 3.8 Number of LED die 2x21= 42 Forward current =60 mA VLED 3.0 Number of LED die 2x2= 4 3.2 3.5 V 4.1 4.3 V Min 4.5 4.1 0.7 VDD VSS 0.5 Typ 5.0 4.9 1.0 Max 5.5 4.5 VDD 0.3 VDD 2.0 Unit V V V V mA
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6. Optical Characteristics
Item View Angle Contrast Ratio Response Time Symbol (V) (H) CR T rise T fall Condition CR2 CR2 Min -20 -30 Typ 3 Max 35 30 250 250 Unit deg deg ms ms
Intensity 100
Selected Conition
Non-selected Conition
10
Vop
Driving Voltage(V)
Tr
Tf
[positive type]
[positive type]
Conditions : Operating Voltage : Vop Frame Frequency : 64 HZ Viewing Angle() : 0 0 Driving Waveform : 1/N duty , 1/a bias
b = 180
= 270
= 90
= 0
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8. POWER SUPPLY
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P2.54X7=17.78
11.50(A.A.) 18.6(V.A.)
4.0
NO B/L
10.5(MAX.) 2.9 5.7 0.5
16
15
29.0 0.2
37.0 0.5
31.2 0.3
4.0
1.6 0.1
4-? 3.5
1.6 0.1
16-? 1.0
116.0 0.5
0.65
0.40
Vdd V0 Vss
40 4 DRIVER 0.05
S6A0069 OR EQUIVALENT
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0.05
60
5.55
DB0 DB7
CONTROLLER
E R/W RS
16
3.20 0.60
0.50
Busy Flag (BF) When the busy flag is 1, the controller LSI is in the internal operation mode, and the next instruction will not be accepted. When RS=0 and R/W=1, the busy flag is output to DB7. The next instruction must be written after ensuring that the busy flag is 0. Address Counter (AC) The address counter (AC) assigns addresses to both DDRAM and CGRAM Display Data RAM (DDRAM) This DDRAM is used to store the display data represented in 8-bit character codes. Its extended capacity is 808 bits or 80 characters. Below figure is the relationships between DDRAM addresses and positions on the liquid crystal display.
AC (hexadecimal)
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Character Generator ROM (CGROM) The CGROM generate 58 dot or 510 dot character patterns from 8-bit character codes. See Table 2. Character Generator RAM (CGRAM) In CGRAM, the user can rewrite character by program. For 58 dots, eight character patterns can be written, and for 510 dots, four character patterns can be written. Write into DDRAM the character code at the addresses shown as the left column of table 1. To show the character patterns stored in CGRAM.
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Relationship between CGRAM Addresses, Character Codes (DDRAM) and Character patterns Table 1.
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Table.2
Instruction Code Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Clear Display 0 0 0 0 0 0 0 0 0 1
Write 00H to DDRAM and set DDRAM address to 00H from AC Set DDRAM address to 00H from AC and return cursor to its original position if shifted. The contents of DDRAM are not changed. Assign cursor moving direction and enable the shift of entire display. Set display (D), cursor (C), and blinking of cursor (B) on/off control bit. Set cursor moving and display shift
Description
1.53ms
Return Home Entry Mode Set Display ON/OFF Control Cursor or Display Shift
1.53ms
0 0
0 0
0 0
0 0
0 0
0 0
0 1
1 D
I/D C
SH B
39s 39s
S/C R/L
39s
Function Set Set CGRAM Address Set DDRAM Address Read Busy Flag and Address Write Data to RAM Read Data from RAM
DL
39s
0 0
0 0
0 1
AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address counter.
39s 39s
AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address counter.
Whether during internal operation or not can be known by reading BF. The AC6 AC5 AC4 AC3 AC2 AC1 AC0 contents of address counter can also be read.
BF
0s
1 1
0 1
D7 D7
D6 D6
D5 D5
D4 D4
D3 D3
D2 D2
D1 D1
D0 D0
Write data into internal RAM (DDRAM/CGRAM). Read data from internal RAM (DDRAM/CGRAM).
43s 43s
dont care
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13.2
Read Operation
Ta=25, VDD=5.0 0.5V Item Symbol tcycE PWEH tEr,tEf tAS tAH tDDR tDHR Min 1200 140 0 10 10 Typ Max 25 100 Unit ns ns ns ns ns ns ns
Enable cycle time Enable pulse width (high level) Enable rise/fall time Address set-up time (RS, R/W to E) Address hold time Data delay time Data hold time
13.3
V0.
Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against
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VDD
95%
V0
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14.Initializing of LCM
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set 0 0 0 0 1 1 * * * * Wait for more than 39us RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 * 0 0 0 0 * * * N F * * * 0 0 * * * Wait for more than 39 s RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 * * * * Function set 0 0 0 0 0 0 N F * * * * * * Wait for more than 37us RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control * * * * 0 0 0 0 0 0 * 1 D C B * * * 0 0 Wait for more than 37 s RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear * * * * 0 0 0 0 0 0 1 * * * * 0 0 0 0 0 Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set * * * * 0 0 0 0 0 0 * 1 I/D SH * * * 0 0 0 Initialization ends
BF can not be checked before this instruction. BF can not be checked before this instruction. Function set
4-Bit Ineterface
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RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set 0 0 0 0 1 1 N F * * Wait for more than 39us RS R/WDB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Function set 0 0 0 0 1 1 N F * * Wait for more than 37us RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display ON/OFF control 0 0 0 0 0 0 1 B C D Wait for more than 37 s RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Display Clear 0 0 0 0 0 0 0 0 0 1 Wait for more than 1.53ms RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Entry Mode Set 0 0 0 0 0 0 0 1 I/D S Initialization ends
BF can not be checked before this instruction.
8-Bit Ineterface
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15.Quality Assurance
Screen Cosmetic Criteria
Item Defect Judgment Criterion A)Clear Size: d mm Acceptable Qty in active area d 0.1 Disregard 0.1<d0.2 6 0.2<d0.3 2 0.3<d 0 Note: Including pin holes and defective dots which must be within one pixel size. B)Unclear Size: d mm Acceptable Qty in active area d 0.2 Disregard 0.2<d0.5 6 0.5<d0.7 2 0.7<d 0 Acceptable Qty in active area Size: d mm d0.3 Disregard 0.3<d1.0 3 1.0<d1.5 1 1.5<d 0 In accordance with spots cosmetic criteria. When the light reflects on the panel surface, the scratches are not to be remarkable. Above defects should be separated more than 30mm each other. Not to be noticeable coloration in the viewing area of the LCD panels. Back-light type should be judged with back-light on state only. Partition
Spots
Minor
Bubbles in Polarizer
Minor
3 4 5
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16.Reliability
Content of Reliability Test
Environmental Test Test Item High Temperature storage Low Temperature storage High Temperature Operation Low Temperature Operation High Temperature/ Humidity Storage High Temperature/ Humidity Operation Temperature Cycle Content of Test Endurance test applying the high storage temperature for a long time. Endurance test applying the high storage temperature for a long time. Endurance test applying the electric stress (Voltage & Current) and the thermal stress to the element for a long time. Endurance test applying the electric stress under low temperature for a long time. Test Condition 60 96hrs -10 96hrs 50 96hrs 0 96hrs Applicable Standard
Endurance test applying the high 60,90%RH temperature and high humidity storage for a 96hrs long time. Endurance test applying the electric stress (Voltage & Current) and temperature / humidity stress to the element for a long time. Endurance test applying the low and high temperature cycle. -10 25 60 30min 5min 1 cycle 30min 50,90%RH 96hrs
-10/60 10 cycles
Mechanical Test Vibration test Endurance test applying the vibration during transportation and using. Constructional and mechanical endurance test applying the shock during transportation. 10~22Hz1.5mmp-p 22~500Hz1.5G Total 0.5hrs 50G Half sign wave 11 msedc 3 times of each direction
Shock test
***Supply voltage for logic system=5V. Supply voltage for LCD system =Operating voltage at 25
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