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Page 1
JMicron/JM20339
Revision History
Version
2.0 2.1
Date
2006/5/3 2006/07/27 1. Modify for 2 different package.
Revision Description
Initialization of this document for JM20339 version 2. Pin assignment
2. Modify the power pin description. 3. Add the support for SATA pass through function.
2.2 2.3
2006/08/30 Add support of new package type 2006/10/12 1. 2. Separate and remove the pass through description the new package to another SPEC. Modify the resistor for VBUS.
Copyright JMicron Technology, 2003. All Rights Reserved. Printed in Taiwan 2003 JMicron and the JMicron Logo are trademarks of JMicron Technology Corporation in Taiwan and/or other countries. Other company, product and service names may be trademarks or service marks of others. All information contained in this document is subject to change without notice. The products described in this document are NOT intended for use implantation or other life supports application where malfunction may result in injury or death to persons. The information contained in this document does not affect or change JMicrons product specification or warranties. Nothing in this document shall operate as an express or implied license or environments, and is presented as an illustration. The results obtained in other operating environments may vary. THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIEDE ON AN AS IS BASIS. In no event will JMicron be liable for damages arising directly or indirectly from any use of the information contained in this document. JMicron Technology Corporation 1F, No.13, Innovation Road I, Science Based Industrial Park Hsinchu, Taiwan, R.O.C For more information on JMicron products, please visit the JMicron web site at http://www.JMicron.com or send email to sales@jmicron.com
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JMicron/JM20339
Table of Contents
1. General Description ................................................................................................................................................ 4 2. Features ................................................................................................................................................................. 4 3. Main Applications................................................................................................................................................. 5 4. Block Diagram ...................................................................................................................................................... 5 5. Package and Pin Assignments.............................................................................................................................. 6
5.1 Package Pin Out ................................................................................................................................................................. 6 5.2 Package Outline.................................................................................................................................................................. 7 6. Pin Descriptions.................................................................................................................................................................... 8 6.1 Pin Type Definition............................................................................................................................................................. 8 6.2 Serial ATA Interface ........................................................................................................................................................... 8 6.3 USB Interface...................................................................................................................................................................... 8 6.4 Crystal Interface................................................................................................................................................................. 8 6.5 Voltage Regulator ............................................................................................................................................................... 9 6.6 Digital Power Supply and System Control Interface....................................................................................................... 9
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JMicron/JM20339
1. General Description
The JM20339 is single chip solution to bridge between USB host and SATA device. The highly integrated Hi-Speed USB and SATA Phys technology provides a cost-effective solution to apply USB to SATA device enclosure. The USB adheres the Mass Storage Class Bulk-Only Transport Specification. The embedded command parser supports both ATA and ATAPI command set with LBA48 addressing capability. This chip is designed by 0.18um CMOS technology with 64 LQFP package.
2. Features
Compliance with Gen1i of Serial ATA II Electrical Specification 1.0 Support SATA Spread-Spectrum Clock Support SATA II Asynchronous Signal Recovery (Hot Plug) feature Compliance with USB 2.0 electrical specification Support USB High-Speed and Full-Speed Operation Compliance with USB Mass Storage Class, Bulk-Only Transport Specification Support ATA/ATAPI PACKET command set Support ATA/ATAPI LBA48 addressing mode Support 12MHz external crystal Support external NVRAM for Vender Specific VID/PID of USB Device Controller Embedded 3.3V to 1.8V voltage regulator Single power 3.3V power supply 0.18um CMOS technology 64 LQFP package Support hardware data protection Support interface with fingerprint sensor Support on line USB firmware update ( e.g. ISP) Support USB to SATA Port Multiplier function Up to 24 GPIO
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JMicron/JM20339
3. Main Applications
Hi-Speed USB to SATA Device
SATA Device
SATA
JM20339
USB
PC
4. Block Diagram
FIFO
Register Files
FIFO
SATA Device
USB Host
Register Files
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JMicron/JM20339
VCCK
48
47
46
45
44
43
42
41
40
39
38
37
TME#
36
GPIO[13] GPIO[14] GPIO[15] GPIO[8] UAI UAO MODE[1] VCCO DGND VCCK MODE[0] GPIO[16] GPIO[17] GPIO[18] GPIO[19] GPIO[20]
49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
35
32 31 30 29 28 27 26 25 24
TXP TXN AGND AVDDL RXN RXP REXT AGND AVDDH NC AGNDH AVDDH DP DM XTALO XTALI
JM20339
(LGAC/LGAD)
23 22 21 20 19 18 17
10
11
12
13
14
15 AVDDH
GPIO[22]
VCCO
GPIO[23]
GPIO[7]
AVREG
DGND
NC
NC
GPIO[21]
MODE[2]
AGNDH
Oct. 2006 Copying prohibited.
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VBUS
RST#
NC
NC
16
49
E1
64
1 2
16 1 b b1
WITH PLATING
A A2
A1
L e
Dimension in mm Min A A1 A2 b b1 c c1 D D1 --0.05 1.35 0.17 0.17 0.09 0.09 Nom ----1.40 0.22 0.20 ----12.00 BSC 10.00 BSC Max 1.60 0.15 1.45 0.27 0.23 0.20 0.16
b
Dimension in inch Min --0.002 0.053 0.007 0.007 0.004 0.004 Nom ----0.055 0.009 0.008 ----Max 0.063 0.006 0.057 0.011 0.009 0.008 0.006 E E1 e L L1 1 2 3 0 0
o o
3
Symbol
L1
Dimension in inch Min Nom 0.472 BSC 0.394 BSC 0.020 BSC 0.75
o
Symbol
Dimension in mm Min Nom 12.00 BSC 10.00 BSC 0.05 BSC 0.45 0.60 1.00 REF 3.5 --12 TYP 12 TYP
o o o
Max
c c1
17
32
Max
0.018
o o
0.024
o
0.030
o
---
---
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30 24 25
AI AI AI
AVDDH AGNDH
21 22
AI AI
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JMicron/JM20339
Signal Name XTALI XTALO Pin No. 17 18 Type AI AO Description Crystal Input/Oscillator Input. It is connected to a 12MHz crystal or crystal oscillator. Crystal Output. It is connected to a crystal. While crystal oscillator is applied, this pin should be reserved as No Connection (NC).
TME#
37
DIH
HDDA
39
DO
MODE[2:0]
4,55,59
GPIO[0]
DIOH
GPIO[1]
DIOH
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JMicron/JM20339
Signal Name GPIO[2] Pin No. Type DIOH Description USB Attach Sequence/EEPROM 9346 Serial Clock (SK)/Serial Flash(SCK)/GPIO2 (1) The internal controller will detect the pin status after power on. The functionality of power on initial state determines the USB attach sequence of JM20339 0: Attached USB first. 1: Check SATA device first. (2) This pin is Serial Clock of serial EEPROM 9346/Serial flash (PM25LV512). (3) While EEPROM detection is complete, this pin is default set to input, and could act as GPIO pin by SCSI-2 vender command. EEPROM 9346 Chip Select (CS) /Serial Flash(CE#)/GPIO3 (1) This pin functions as Chip Select of EEPROM 9346/Serial Flash(PM25LV512) in EEPRM detection. (2) While EEPROM detection is complete, this pin is default set to input, and could act as GPIO pin by SCSI-2 vender command. Note that it only supports 9346 with 64x16-bit mode. GPIO 7: USB Bus State. This pin will go high while the USB Vbus is applied. It will go low only in (1) Vbus is detached. (2) Vbus is attached and USB is configured and enter suspend state. 1. Can be configured by customer firmware. 2. Be set to ADC_DAT when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to ADC_SYN when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to F_SYN when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to P_SYN when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to ADC_CLK when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to RST when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to SCK when interface with LTT-SS500. 1. Can be configured by customer firmware. 2. Be set to SDA when interface with LTT-SS500. Can be configured by customer firmware. Can be configured by customer firmware.
GPIO[3]
DIOH
GPIO[7]
11
DIO
GPIO[4] GPIO[5] GPIO[6] GPIO[8] GPIO[9] GPIO[10] GPIO[11] GPIO[12] GPIO[13] GPIO[23:14]
DIO DIO DIO DIO DIO DIO DIO DIO DIO DIO
DIH DO DO
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JMicron/JM20339
7. Electrical Characteristics
7.1 Absolute Maximum Rating
Parameter Analog power supply Digital I/O power supply Digital I/O input voltage Storage temperature Symbol AVDDH DVDD VI(D) TSTORAGE Condition Min -0.5 -0.5 -0.4 -55 Max 6 6 DVDD+0.4 85 Unit V V V
o
C C
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JMicron/JM20339
0x08 0x10
0x18 0x20
0x28 0x30
0x38 0x40
0x48 0x50
0x58 0x60
0x68 0x70
0x78
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