RAVI SANKAR KONIDENA

Plot:290, sree om Railway colony, 12th stage Vijayanagar, Mysore sankarkonidena@gmail.com Phone: 8105359032 _________________________________________________________

ACADEMIC QUALIFICATIONS
2000-2002 1996-2000 1994-1996 1993-1994 MTECH, IIT BOMBAY
Post Graduation in Computer Science and Engineering SRI VENKATESWARA UNIVERSITY

CPA Percentage Percentage Percentage

8.5 76% 92% 83%

B.Tech in Computer Science and Engineering SREE BHARATHI JUNIOR COLLEGE Board of Intermediate Education (Class XII) VISWABHARATHI HIGH SCHOOL S.S.C

INDUSTRIAL EXPERIENCE ( 8.2 years )

INFOSYS TECHNOLOGIES DEC 2009 TILL DATE Responsible for leading a team to add new features to a highly successful banking product called Finacle.

COMPUTER SCIENCE CORPORATION(CSC) AUG 2007 TILL DECEMBER 2009 Responsible for planning, onsite co-ordination and cross-vertical coordination for development and maintenance of software in finance domain for a client called Paypal. Responsible for technically leading a team, fixing defects and working on enhancements in manufacturing domain for a client called Chrysler.

IBM RATIONAL , BANGALORE MAY 2006 TILL JULY 2007 Responsible for leading a team, planning, onsite co-ordination and crossvertical co-ordination for doing development and maintenance of software for an open source project called CDT.

DENALI SYSTEMS,BANGALORE AUG 2005 TO MAY 2006 Responsible for doing enhancements to library code required for functioning of denali memory models. Fixing defects in the code of denali libraries and memory models. MENTOR GRAHICS, HYDERABAD OCT 2002 TO AUG 2005 Generation of Arithmetic circuits for Formal pro equivalence checker Responsible for maintaining Mentors PCB design flow tool called BOARD STATION

SKILLS Software
Software Languages C++, C, Java, Perl, Shell scripting OS Windows, Unix

Hardware
Have an understanding of HDLs (Verilog and VHDL) and ASIC design flow. Tools used - Design compiler(Synopsys), FormalPro(Mentor Graphics)

PROJECTS IN DETAIL
Project Duration Site Expertise Role Finacle Dec 2009 till date Infosys C++, Unix, Shell Scripting, Finacle Scripting Tech lead

Finacle is a highly successful banking product. My role is to design and lead the development of new enhancements for Finacle. I was mainly involved in the projects given below. 1. Canada Localization 2. US Localization

Project Duration Site Expertise Role

Chrysler July 2008 till Dec 2009 CSC C++, Unix, Shell Scripting, Sybas, UML Tech lead

Chrysler is a group that maintains and develops enhancements in manufacturing domain for a client called Chrylser. My role is to fix defects and work on enhancements in Chrysler source code . I was involved in maintaining and enhancing the following modules. 3. WCC ( work cell controller). 4. Stored procedures and shell scripts. I am responsible for technically leading the team for a major enhancement called Machine normalization. This enhancement is to identify performance bottle necks in manufacturing systems.

Project Duration Site Expertise

FinProd Aug 2007 June 2008 CSC C++, Unix

FinProd is a group which handles financial products in Paypal. I worked in Debit domain. My role is to lead a team to fix defects and work on enhancements in Paypal source code. I was involved in developing the following features. 1. Youth Account. 2. Secondary Card 3. Replacement Card. 4. Debit card enhancements( admin changes ) Project Duration Site Expertise Role CDT May2006 July2007 IBM India Pvt Ltd Java, Windows Tech lead

CDT is an IDE for C/C++ development. It is an open source project. My role is to lead a team to fix defects and work on enhancements for the project. I worked on the following enhancements. 1. Managed build for xlc compiler on AIX platform. 2. Error parser for Photran compiler. Other than these two enhancements, I fixed a number of defects in the code.

Project Duration Site Expertise

Enhancements to library code and fixing defects Aug2005 May2006 Denali Systems C,C++

This project involved doing enhancements to the library code of Denali. I implemented code which schedules simulator wakeup calls for Denali models. Other than this, I fixed some defects in Denali code.

Project

Maintenance work for Mentors PCB design tool called Board Station. Duration Jan 2005 Aug 2005 Site Mentor Graphics, Hyderabad Expertise C++ This project involved fixing defects in Mentors PCB design tool called BoardStation.

Project Duration Site Expertise

Generation of arithmetic circuits Oct 2002 Jan 2005 Mentor Graphics, Hyderabad C++, Perl, Verilog, Unix, lex,yacc

This project involved generation of arithmetic circuits which are hardware implementations of various algorithms for arithmetic circuits. Formal Verification of arithmetic circuits is a hard problem. Aim of this project was to make easy the job of solvers in Mentors formal verification tool called FormalPro. My work was mainly on generation of dividers and multiplier circuits.

PAPERS
Title Design Patterns for Mobile Agent Applications Selected for Workshop on Ubiquitous Agents on embedded, wearable and mobile devices, 2002.

This paper proposes three design patterns, Messenger Pattern, Group Communication Pattern and MoProxy Pattern. Messenger Pattern and Group Communication pattern isolate the implementation details of locating and communicating with other agents from the Primary agent functionality. The MoProxy pattern provides access to resources via a mobile proxy agent.

M.TECH PROJECT
Title High Speed Hardware Implementation of Cryptographic Algorithms

In this project Ive designed and implemented a packet processing engine which works at a speed of 10Gbps. This engine processes IPv6 packets, applies HMACMD5 algorithm and outputs the seed. VHDL has been used for modeling the hardware and Synopsys Design Compiler has been used for synthesis.

PERSONAL INFORMATION
Date of Birth Place of Birth Permanent Address 20-07-1979 Guntur s% K. N. Sambasiva Rao Plot-22, RTC Colony Near Buja Buja Nellore Nellore Andhra Pradesh