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Description
Recommended for high-side switching applications that benefit from separate logic and load grounds, these devices encompass load supply voltages to 50 V and output currents to -500 mA. These 8-channel source drivers are useful for interfacing between low-level logic and high-current loads. Typical loads include relays, solenoids, lamps, stepper and/or servo motors, print hammers, and LEDs. All devices may be used with 5 V logic systems TTL, Schottky TTL, DTL, and 5 V CMOS. The device packages offered are electrically interchangeable, and will withstand a maximum output off voltage of 50 V, and operate to a minimum of 5 V. All devices in this series integrate input current limiting resistors and output transient suppression diodes, and are activated by an active high input. The suffix A indicates an 18-lead plastic dual in-line package with copper lead frame for optimum power dissipation. Under normal operating conditions, these devices will sustain 120 mA continuously for each of the eight outputs at an ambient temperature of +50C and a supply of 15 V. The suffix LW package is provided in a 20-pin wide-body SOIC package with improved thermal characteristics compared to the 18-pin SOIC version it replaces (100% pin-compatible electrically). The A2982ELW driver is available for operation over an extended temperature range, down to -40C. These packages are lead (Pb) free, with 100% matte-tin leadframe plating.
Packages:
Not to scale
20-pin SOICW (package LW) (drop-in replacement for discontinued 18-pin SOIC variants)
Simplified Block Diagrams 18-pin DIP (A Package) 20-pin SOICW (LW Package)
Selection Guide
Part Number
A2982ELWTR-T* A2982SLWTR-T UDN2981A-T UDN2982A-T
Package
20-pin SOICW 20-pin SOICW 18-pin DIP 18-pin DIP
Packing
1000 per reel 1000 per reel 21 per tube 21 per tube
20 to 85
*Variant is in production but has been determined to be LAST TIME BUY. This classification indicates that the variant is obsolete and notice has been given. Sale of the variant is currently restricted to existing customer applications. The variant should not be purchased for new design applications because of obsolescence in the near future. Samples are no longer available. Status date change November 2, 2009. Deadline for receipt of LAST TIME BUY orders is April 30, 2010.
Symbol
VCE VIN IOUT PD TA TJ(max) Tstg See graph Range E Range S UDN2981 A2982, UDN2982
Notes
Rating
5 to 50 25 20 500 40 to 85 20 to 85 150 55 to 150
Units
V V V mA C C C C
2.5
2.0
18-P IN DIP , R
JA
= 65 C /W
JA
20-LE AD S OIC , R
= 90 C /W
1.5
1.0
0.5
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
1 2 3 4 5 6 7 8 9
18
R
1 2 3 4 5 6 7 8 9 10
20
R
L L L L L L L L
17
R
19
R
16
R
18
R
15
R
17
R
14
R
16
R
13
R
15
R
12
R
14
R
11 10
13 12 11
NC
Pins 10 and 11 can oat; other pins match discontinued 18-pin SOIC: 1 to 9 same, pins 12 to 20 match pins 10 to 18
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Test Fig. 1 2 2 2 3 3 3 3 2 2 4 5 6
Typ. 1.6 1.7 1.8 140 310 140 1.25 1.5 0.3 2.0
Max. 20 1.8 1.9 2.0 200 450 200 1.93 10 50 2.0 2.0 10
Units A V V V V A A A mA mA mA mA A V s s
VIN = 2.4 V VIN = 3.85 V VIN = 2.4 V VIN = 12 V VIN = 2.4 V, VCE = 2.0 V VIN = 2.4 V, VCE = 2.0 V VIN = 2.4 V*, VS = 50 V VR = 50 V, VIN = 0.4 V* IF = 350 mA 0.5 EIN to 0.5 EOUT, RL = 100, VS = 35 V 0.5 EIN to 0.5 EOUT, RL = 100, VS = 35 V, See Note
unused inputs must be connected to ground. Pull-down resistors (approximately 10 k) are recommended for inputs that are allowed to oat while power is being applied to VS. inputs simultaneously. delay is inuenced by load conditions. Systems applications well below the specied output loading may require timing considerations for some designs, i.e., multiplexed displays or when used in combination with sink drivers in a totem pole conguration.
3All
4Turn-off
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
TEST FIGURES
Figure 1
VS
Figure 2 VS
V CE
mA
Figure 3
V
S
V VIN
I IN
mA OPEN
I OUT
V IN
IN
A I CEX
Dwg. No. A-11,083
Figure 4
VS I S mA
OPEN
Figure 5
VS IR
Figure 6
OPEN
OPEN
VIN
VIN
VF
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
500
500
450
450
400
300
3 4
300
3
250
250
5 8 7 6
4 5 6
200
200
8
150 NUMBER OF OUTPUTS CONDUCTING SIMULTANEOUSLY
150
100
VS = 15 V
100
VS = 15 V
50 50
10
20
30
70
80
90
100
10
20
30
70
80
90
100
2.0
INPUT CURRENT, IIN (mA)
1.5
X MA IM UM
1.0
TY PIC
AL
0.5
10
12
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
5.33 MAX +0.51 3.30 0.38 2.54 +0.25 1.52 0.38 0.46 0.12
SEATING PLANE
All dimensions nominal, not for tooling use (reference JEDEC MS-001 AC) Dimensions in inches Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Terminal #1 mark area
7.500.10 A
9.50
2 0.25
0.65
B PCB Layout Reference View
1.27
SEATING PLANE 2.65 MAX 0.20 0.10 For Reference Only Dimensions in millimeters (Reference JEDEC MS-013 AC) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and PCB layout tolerances
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com
Copyright 1977-2009, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegros products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use; nor for any infringement of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com
Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com