Escolar Documentos
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iu Khin
Mc lc
Li gii thiu Chng 1: Kin trc h Vi x l (VXL). 1.1. n v x l trung tm (CPU). 6 1.2. Qu trnh tm np lnh v thc thi lnh ca CPU. 7 1.3. B nh trung tm ca h VXL. 8 1.3.1. B nh ch c. 8 1.3.2. B nh truy cp ngu nhin. 9 1.4. Cc thit b xut/nhp. 9 1.5. Cu trc knh chung ca h VXL. 9 Chng 2. B Vi iu khin AT89C51 (80C51). 2.1. Gii thiu chung. 11 2.2.S khc nhau gia b VXL v b Vi iu khin (VK). 11 2.3. S khi. 13 2.4. S chn tn hiu ca 80C51/AT89C51. 15 2.5. Chc nng cc thnh phn ca AT89C51. 17 2.5.1. Cc thanh ghi chc nng c bit. 17 1 Bch Hng Trng 24-10-2003 Trang 5
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iu Khin 2.5.1.1. Thanh ghi ACC. 19 2.5.1.2. Thanh ghi B. 19 2.5.1.3. Thanh ghi SP. 19 2.5.1.4. Thanh ghi DPTR . 20 2.5.1.5. Cc cng vo/ ra d liu (Ports 0 to 3). 20 2.5.1.6. Thanh ghi SBUF . 20 2.5.1.7. Cc Thanh ghi Timer. 20 2.5.1.8. Cc thanh ghi iu khin. 20 2.5.1.9. Thanh ghi PSW. 20 2.5.1.10. Thanh ghi PCON. 21 2.5.1.11. Thanh ghi IE. 22 2.5.1.12. Thanh ghi IP. 22 2.5.1.13. Thanh ghi TCON. 23 2.5.1.14. Thanh ghi TMOD. 23 2.5.1.15. Thanh ghi SCON. 24 2.5.2. Khi to thi gian v b m (Timer/Counter). 25 Bch Hng Trng 24-10-2003
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iu Khin 2.5.3. B nh chng trnh v b nh d liu ni tr. 28 2.5.3.1. B nh chng trnh ni tr. 29 2.5.3.2. B nh d liu ni tr. 30 2.5.3.2.1. Vng nh 128 Byte thp. 30 2.5.3.2.2. Vng nh dnh cho SFR. 31 2.5.3.2.3. Cc lnh truy cp b nh d liu ni tr. 31 2.5.4. B nh chng trnh v b nh d liu ngoi tr. 34 2.5.4.1. B nh chng trnh ngoi tr. 34 2.5.4.2. B nh d liu ngoi tr. 35 2.5.5. C ch ngt trong On-chip AT89C51. 38 2.5.5.1. Phn loi ngt trong On-chip. 38 2.5.5.2. Cc bc thc hin ngt. 39 2.5.5.3. Mc ngt u tin trong on-chip. 40 2.5.5.4. Nguyn l iu khin ngt ca AT89. 40 2.5.5.4.1.Cc ngt ngoi. 42 2.5.5.4.2. Vn hnh Single-Step. 42 2.5.6. Nguyn l truyn tin ni tip ca AT89C51. 43 Bch Hng Trng 24-10-2003
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iu Khin 2.5.6.1. 43 2.5.6.2. 44 2.5.6.3. 45 2.5.6.4. Phng thc truyn tin ni tip. Lin lc a x l . Cc tc Baud. .
S dng Timer 1 to ra cc tc Baud 45 2.5.6.5. Hot ng ca ch 0. 46 2.5.6.6. Hot ng ca ch 1. 48 2.5.6.7. Hot ng ca ch 2 v 3. 50 2.5.7. Nguyn l khi ng ca On-chip AT89C51. 54 2.5.8. Mch dao ng. 57 2.5.9. Ch ngun gim v ch ngh. 58 2.5.11. Bo v chng trnh. 59 Chng 3: Tp lnh ca h VK AT89/80C51. 3.1. Nhm lnh di chuyn d liu. 61 3.1.1. Lnh MOV dng Byte. 61 3.1.2. Lnh MOV dng Bit. 62 3.1.3. Lnh MOV dng Word. 62 3.1.4. Lnh chuyn byte m lnh. 63 Bch Hng Trng 24-10-2003
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iu Khin 3.1.5. Lnh chuyn d liu ra ngoi. 63 3.1.6. Lnh chuyn s liu vo ngn xp. 64 3.1.7. Lnh chuyn s liu ra khi ngn xp . 64 3.1.8. Hon chuyn d liu. 64 3.1.9. Hon chuyn 4 bit thp. 64 3.2. Nhm lnh tnh ton s hc. 65 3.2.1. Lnh thc hin php cng. 65 3.2.2. Lnh cng c nh. 65 3.2.3. Lnh tr c mn. 66 3.2.4. Lnh tng ln 1 n v. 66 3.2.5. Lnh gim 1 n v. 67 3.2.6. Lnh tng con tr d liu . 67 3.2.7. Lnh thc hin php nhn. 68 3.2.8. Lnh thc hin php chia . 68 3.2.9. Hiu chnh s thp phn. 68 3.3. Nhm lnh tnh ton logic. 69 3.3.1. Lnh AND cho cc bin 1 byte. 69 Bch Hng Trng 24-10-2003
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iu Khin 3.3.2. Lnh AND cho cc bin 1 bit. 69 3.3.3. Lnh OR cho cc bin 1 byte. 70 3.3.4. Lnh OR cho cc bin 1 bit. 70 3.3.5. Lnh X-OR cho cc bin 1 byte. 71 3.3.6. Lnh dch tri thanh ghi A. 71 3.3.7. Lnh dch tri thanh ghi A cng vi c nh. 71 3.3.8. Lnh dch phi thanh ghi A. 72 3.3.9. Lnh dch phii thanh ghi A cng vi c nh. 72 3.3.10. Lnh tro i ni dung hai na byte ca A. 72 3.4. Nhm lnh r nhnh chng trnh. 73 3.4.1. Lnh gi tuyt i . 73 3.4.2. Lnh gi di. 3.4.3. Lnh quay tr li t chng trnh con. 74 3.4.4. Lnh quay tr li t ngt. 74 3.4.5. Lnh nhy gin tip. 75 3.4.6. Lnh nhy nu 1 bit c thit lp. 75 3.4.7. Lnh nhy nu 1 bit khng c thit lp. 75 3.4.8. Lnh nhy nu 1 bit c thit lp v xo bit . 76 Bch Hng Trng 24-10-2003
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73
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iu Khin 3.4.9. Lnh nhy nu c nh c thit lp. 76 3.4.10. Lnh nhy nu c nh khng c thit lp. 77 3.4.11. Lnh nhy nu thanh ghi A bng 0. 77 3.4.12. Lnh nhy nu thanh ghi A khc 0. 77 3.4.13. Lnh nhy khi so snh 2 ton hng. 78 3.4.14. Lnh gim v nhy. 79 3.4.15. Lnh tm ngng hot ng. 79 3.5. Nhm lnh iu khin bin logic. 80 3.5.1. Lnh xo bit. 3.5.2. Lnh xo thanh ghi tch lu. 80 3.5.3. Lnh thit lp bit. 80 3.5.4. Lnh ly b ca bit. 81 3.5.5. Lnh ly b ca thanh ghi tch lu. 81
80
Ph lc A : Tra cu nhanh tp lnh Bng 1. Cc lnh ton hc ca b VK h ATMEL. 82 Bng 2. Cc lnh chuyn i d liu truy cp vng nh d liu trong. 82 Bng 3. Cc lnh s hc. 83 Bng 4. Cc lnh i s. 84 Bch Hng Trng 24-10-2003
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iu Khin Bng 5. Cc lnh chuyn i d liu truy cp RAM ngoi. 84 Bng 6. Cc lnh chuyn Byte m lnh. 85 Bng 7. Cc lnh nhy khng iu kin trong Flash Microcontrollers. 85 Bng 8. Cc lnh nhy c iu kin. 85 Ph lc B : cc h thng s 1. Bng chuyn i h thp phn/nh phn 86 2. Bng m thp lc phn 87 3. H thng s c du 88 TI liu tham kho. 89
Li gii thiu
Khoa hc k thut ang ngy cng pht trin rt mnh m, cc cng ngh mi thuc cc lnh vc khc nhau cng nh ra i nhm p ng nhu cu ca x hi
Bch Hng Trng 24-10-2003
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iu Khin
v k thut Vi iu khin cng nm trong s . Hin nay k thut Vi x l c ging dy rng ri cc trng i hc v Cao ng trong c nc, tuy nhin lnh vc mi Vi iu khin vn ang cn rt mi m, v nhng ng dng ca n vn cha c khai thc trit trong cc h thng iu khin, o lng v iu chnh ca cc dy chuyn cng nghip. Qua qu trnh tham gia ging dy ti trng i hc SPKT Hng yn v thi gian hc tp nng cao CHLB c, tc gi tp trung nghin cu v bin son gio trnh k thut Vi iu khin nhm phc v cng vic ging dy lnh vc ny ti trng. Ton b ni dung gio trnh c chia lm 2 phn. Phn 1 bao gm cc kin thc c bn v phn cng v cc tp lnh ca h Vi iu khin 80C51/ AT89C51. phn 2 tc gi tp trung trnh by phn cng h Vi iu khin 80C52/ AT89S8252 v k thut lp trnh bng hp ng. i tng ca quyn gio trnh ny l cc sinh vin ngnh in, in t, C in t, Cng ngh thng tin. Tuy nhin tip thu tt ni dung t quyn gio trnh ny, ngi hc cn c kin thc v k thut s, k thut mch in t v bit qua mt ngn ng lp trnh cp cao nh Pascal, C Mc d rt c gng trong qu trnh bin son, nhng do trnh v thi gian cn b hn ch nn chc chn quyn gio trnh ny khng trnh khi nhng thiu st, rt mong nhn c nhng kin ng gp, ph bnh ca bn c.
i hc spkt hng yn
iu Khin
Tc gi
CU
INPUT
ALU
IR
Interface
ROM RAM
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iu Khin - Nhm lnh iu khin bin Logic (Setb, Clr,...).... Cc nhm lnh trn c biu th bi 1 tp cc m nh phn v c gi l tp lnh. Mi b VXL (CPU) thng bao gm: - Cc thanh ghi ni (Registers): c nhim v lu gi tm thi cc thng tin, d liu. - n v s hc logic (Arithmetic Logic Unit - ALU): Thc hin cc thao tc trn cc thng tin hay d liu c lu gi tm thi trong thanh ghi ni. - n v iu khin (Control Unit - CU): C nhim v gii m lnh v iu khin vic thc hin cc thao tc, ng thi thit lp cc hot ng cn thit thc hin cc thao tc . - Thanh ghi lnh (Instruction Register - IR): Lu gi m nh phn ca lnh c thc thi. - B m chng trnh (Program Counter - PC): Lu gi i ch ca lnh k tip trong b nh cn c thc thi.
Clock
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iu Khin
+ Giai on thc thi lnh bao gm vic gii m cc m lnh v to ra cc tn hiu iu khin vic xut nhp gia cc thanh ghi ni vi ALU , ng thi thng bo ALU thc hin thao tc c xc nh.
1.3. B nh trung tm ca h Vi x l:
B nh trung tm l b phn rt quan trng i vi mi h VXL, n l tp hp cc thanh ghi thng tin vi s lng ln. Chc nng c bn ca b nh l trao i v lu tr thng tin.
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iu Khin c thay i nh: bng a ch cng giao tip, cc bng tra cu s liu, cc b m cn s dng trong h. ROM cng c qun l theo phng thc ma trn im, n c nhiu chng loi khc nhau: ROM, PROM, EPROM, EEPROM, ROM l b nh c nh c cu trc n gin nht. Ni dung ca n do nh sn xut ch to, ngi s dng khng th thay i ni dung ny c na.
1.3.1.4. EEPROM (Electrical EPROM ROM c kh nng lp trnh v xo c bng in). 1.3.2. B nh truy cp ngu nhin (Random Acess Memory - RAM):
RAM l b nh c th ghi v c c, thng tin trn RAM s b mt khi mt ngun cung cp. Theo phng thc lu tr thng tin, RAM c chia thnh 2 loi c bn: RAM tnh v RAM ng. RAM tnh: C th lu tr thng tin lu tu min l c cung cp in nng - tt c cc loi phn t nh bng Trig u thuc loi ny. Bch Hng Trng 24-10-2003
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iu Khin RAM ng: Ch lu c thng tin trong 1 khong thi gian nht nh. Mun ko di thi gian ny cn c phng thc lm ti li thng tin trong phn t nh RAM. Phn t nh ca RAM ng n gin nht l mt linh kin in dung - t din. S dng RAM ng c phc tp nhng v cu trc nh li n gin, tiu tn t nng lng, tng mt b nh v i khi cn lm tng c tc lm vic ca b nh. Cu trc mch in ca cc b nh RAM rt a dng c v cng ngh ch to chng (TTL, MOS, ) v cc yu cu s dng chng nh cc yu cu v ghp ni, tc lm vic, mt linh kin v dung lng cn thit
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iu Khin Nu kch hot tn hiu iu khin Read, thao tc c ly 1 byte d liu t b nh v tr xc nh v t byte ny ln knh d liu. CPU s c d liu v ct d liu vo 1 trong cc thanh ghi ni ca CPU. Nu kch hot tn hiu iu khin Write, CPU s thc hin thao tc ghi bng cch xut d liu ln knh d liu. Nh vo tn hiu iu khin, b nh nhn bit c y l thao tc ghi v lu d liu vo v tr c xc nh. Knh d liu cho php trao i thng tin gia CPU v b nh, cng nh gia CPU vi thit b ngoi vi. Thng thng cc h VXL dnh hu ht thi gian cho vic di chuyn d liu, a s cc thao tc di chuyn d liu xy ra gia 1 thanh ghi ca CPU vi ROM v RAM ngoi. Do ln ca knh d liu nh hng rt ln ti hiu sut ca h VXL. Nu b nh ca h thng rt ln v CPU c kh nng tnh ton cao, nhng vic truy xut d liu di chuyn d liu gia b nh v CPU thng qua knh d liu li b nghn th hin tng nghn c chai ny chnh l hu qu ca rng knh d liu khng ln. khc phc hin tng ny, cn tng ng tn hiu cho knh d liu.
D A T E N B U S 8 Bit
CPU
Control Bus
ROM
A D R E S S B U S 16
RAM
Bi t Hnh 1.3. Cu trc knh chung ca h 15 Bch Hng Trng thng VXL 24-10-2003
I/O
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iu Khin
Nh hnh 1.3, knh d liu l knh 2 chiu, cn knh a ch l knh 1 chiu. Cc thng tin v a ch lun c cung cp bi CPU, trong khi cc d liu di chuyn theo c 2 hng tu thuc vo thao tc thc hin l c hay ghi. Thut ng d liu c s dng theo ngha tng qut: thng tin di chuyn trn knh d liu c th l lnh ca chng trnh, a ch theo sau lnh hoc d liu c s dng bi chng trnh. Knh iu khin l tp hp cc tn hiu, mi tn hiu c mt vai tr ring trong vic iu khin c trt t hot ng ca h thng. Cc tn hiu iu khin c cung cp bi CPU ng b vic di chuyn thng tin trn cc knh a ch v d liu. Cc b VXL thng c 3 tn hiu iu khin: Read, Write, Clock. Tuy nhin tu vo yu cu c th cng nh cu trc phn cng ca tng h VXL m s lng tn hiu iu khin c th khc nhau.
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iu Khin
Vi iu khin (VK) l mt h Vi x l (VXL) c t chc trong mt chip. N bao gm: B VXL B nh chng trnh (ROM/EPROM/EEPROM/FLASH). B nh d liu (RAM). Cc thanh ghi chc nng, cc cng I/O, c ch iu khin ngt v truyn tin ni tip. Cc b thi gian dng trong lnh vc chia tn v to thi gian thc. B VK c th c lp trnh iu khin cc thit b thng tin, vin thng, thit b o lng, thit b iu chnh cng nh cc ng dng trong cng ngh thng tin v k thut iu khin t ng. C th xem b VK nh mt h VXL Onchip, i vi h AT89C51, n c y chc nng ca mt h VXL 8 bit, oc iu khin bi mt h lnh, c s lnh mnh, cho php lp trnh bng hp ng (Assembly).
2.2.
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iu Khin
VK CPU, RAM, ROM, Timers, SFR, mch giao tip, h thng ngt v c ch iu khin ngt.. S dng cc lnh iu khin xut nhp, c th truy xut d liu dng Bit hoc Byte. Cc nhm lnh chnh: Chuyn d liu, iu khin bin logic, r nhnh chng trnh, tnh ton s hc v logic. VK Trong cc h thng iu khin, o lng v iu chnh
Tp lnh
S dng cc tp lnh bao qut, mnh v kiu nh a ch. Cc lnh ny c th truy xut d liu ln, thc hin dng 1/2 Byte, Byte, Word, Double Word. VXL
ng dng
Trong cc h my vi tnh.
2.3. S khi.
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iu Khin
External Interrupts Interrupt Control 4K FLASH 128 Bytes RAM Timer 1 Timer 0 Counter Inputs
CPU
OSC
4 I/O Ports
P0 P2 P1 P3 Address/Data
Hnh 2.1. S khi h VK AT89C51 B VK 8 bit AT89C51 hot ng tn s 12 MHz, vi b nh ROM 4Kbyte, b nh RAM 128 Byte c tr bn trong v c th m rng b nh ra ngoi. b VK ny cn c 4 cng 8 bit (P0 P3) vo/ ra 2 chiu giao tip vi thit b ngoi vi. Ngoi ra, n cn c: - 2 b inh thi 16 bit (Timer 0 v Timer 1) - Mch giao tip ni tip. - B x l bit (thao tc trn cc bit ring r). - H thng iu khin v x l ngt. - Cc knh iu khin/ d liu/ a ch. - CPU - Cc thanh ghi chc nng c bit (SFR). 19 Bch Hng Trng 24-10-2003
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iu Khin Tuy nhin, tu thuc vo tng h VK ca tng hng sn xut khc nhau m tnh nng cng nh phm vi ng dng ca mi b VK l khc nhau, v chng c th hin trong cc bng thng k sau:
Tc (MHz )
12 12 12 12 12 12 12 12 12,16 12,16 12,16 12,16, 20,24 12,16, 20,24 12,16, 20,24 12,16, 20,24 12,16, 20,24 12,16, 20,24
H VK
ROM (bytes)
RAM (byte s)
128 128 128 128 128 256 256 256 128 128 128 128
Cc chn I/O
32 32 32 32 32 32 32 32 32 32 32 32 32
Timer/ Counte r
2 2 2 2 2 3 3 3 2 2 2 2
UAR T
Ngu n ngt
5 5 5 5 5 6 6 6 5 5 5 5
8051
8031AH 8051AH 8051AHP 8751H 8751BH
ROMLESS 4K ROM 4K ROM 4K EPROM 4K EPROM ROMLESS 8K ROM 8K EPROM ROMLESS 4K ROM 4K ROM 4K EPROM 1 1 1 1 1 1 1 1 1 1 1 1
8052
8032AH 8052AH 8752BH
80C51
80C31BH 80C51BH 80C31BH P 87C51
32 32 32 32 32 Cc chn I/O
3 3 3 3 3 Timer/ Counte r
1 1 1 1 1
UAR T
6 6 6 6 6 Ngu n ngt
ROM (bytes)
Tc (MHz
20
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iu Khin
32K ROM 32K EPROM
80C58 87C58
12,16, 20,24 12,16, 20,24 12,16, 20 12,16, 20 12,16, 20 12,16, 20 12,16, 20 12,16, 20
32 32 32 32 32 32 32 32
3 3 3 3 3 3 3 3
1 1 1 1 1 1 1 1
6 6 6 6 6 6 6 6
8K OTP 256 ROM 16K ROM 256 16K OTP 256 ROM 32K ROM 256 32K ROM OTP 256
Bng 2.1. Cc thng s ca cc h VK thuc hng Intel (MSC 51) H VK B nh ch- B nh d Timer ng liu (Bytes) 16 bit trnh(Byte s) 1K Flash 64 RAM 1 2K Flash 4K Flash 8K Flash 20K Flash 8K Flash 12K Flash 128 RAM 2 Cng ngh
128 RAM 2 256 RAM 3 256 RAM 3 256 RAM + 2K 3 EEPROM 256 RAM 3
Bng 2.2. Cc thng s ca cc h VK thuc hng Atmel Bch Hng Trng 24-10-2003
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iu Khin
Trong khun kh ti liu ny, tc gi s tp trung trnh by cu trc phn cng ca h VK AT89C51 thuc hng Atmel.
2.4. S 80C51/AT89C51.
P1.0 -P1.1-P1.2-P1.3-P1.4-P1.5-P1.6-P1.7-RST-(RxD) P3.0-(TxD) P3.1-(/INT0) P3.2-(/INT1) P3.3-(T0) P3.4-(T1) P3.5-(/Wr) P3.6-(/Rd) P3.7-XTAL2-XTAL1-GND-1 2 3 4 5 6 7 8 9 10 11 12 13
chn
tn
hiu
ca
40 39 38 37 36 35 34 33 32 31 30 29 28 22 27 26
--Vcc --P0.0 (AD0) --P0.1 (AD1) --P0.2 (AD2) --P0.3 (AD3) --P0.4 (AD4) --P0.5 (AD5) --P0.6 (AD6) --P0.7 (AD7) --/EA/Vpp --ALE/(/PROG) --/PSEN --P2.7 (A15) --P2.6 (A14) --P2.5 (A13) --P2.4 (A12) --P2.3 (A11) --P2.2 (A10) --P2.1 (A9) --P2.0 (A8)
17
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iu Khin
19 20
Chc nng ca cc chn tn hiu nh sau: - P0.0 n P0.7 l cc chn ca cng 0. - P1.0 n P1.7 l cc chn ca cng 1. - P2.0 n P2.7 l cc chn ca cng 2 - P3.0 n P3.7 l cc chn ca cng 3 - RxD: Nhn tn hiu kiu ni tip. - TxD: Truyn tn hiu kiu ni tip. - /INT0: Ngt ngoi 0. - /INT1: Ngt ngoi 1. - T0: Chn vo 0 ca b Timer/Counter 0. - T1: Chn vo 1 ca b Timer/Counter 1. - /Wr: Ghi d liu vo b nh ngoi. - /Rd: c d liu t b nh ngoi. - RST: Chn vo Reset, tch cc mc logic cao trong khong 2 chu k my. - XTAL1: Chn vo mch khuych a dao ng - XTAL2: Chn ra t mch khuych a dao ng. - /PSEN : Chn cho php c b nh chng trnh ngoi (ROM ngoi). - ALE (/PROG): Chn tn hiu cho php cht a ch truy cp b nh ngoi, khi On-chip xut ra byte thp ca a ch. Tn hiu cht c kch hot mc cao, tn s xung cht = 1/6 tn s dao ng ca b VK. N c th c dng cho cc b Timer ngoi hoc cho mc ch to xung Clock. y cng l chn nhn xung vo np chng trnh cho Flash (hoc EEPROM) bn trong On-chip khi n mc thp. - /EA/Vpp: Cho php On-chip truy cp b nh chng trnh ngoi khi /EA=0, nu /EA=1 th On-chip s lm vic vi b nh chng trnh ni tr. Khi chn ny c cp ngun in p 12V (Vpp) th On-chip m nhn chc nng np chng trnh cho Flash bn trong n. - Vcc: Cung cp dng ngun cho On-chip (+ 5V). - GND: ni mt. Bch Hng Trng 24-10-2003
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iu Khin
Ni dung MSB
EA CY GATE TF1 SM0 SMOD T2 RXD AC C/(/T) TR1 SM1 T2EX TXD ET2 PT2 FO M1 TF0 SM2 /INT0 ES PS RS1 M0 TR0 REN /INT1 ET1 PT1 RS0 GATE IE1 TB8 GF1 /SS T0 EX1 PX1 OV C/(/T) IT1 RB8 GF0 MOSI T1 ET0 PT0 M1 IE0 TI PD MISO /WR
LSB
EX0 PX0 P M0 IT0 RI IDL SCK /RD
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iu Khin
Bng 2.3. Chc nng ring ca tng thanh ghi trong SFR
25
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iu Khin Name Thanh ghi tch lu Thanh ghi B T trng thi chng trnh Con tr ngn xp SP Byte cao ca con tr d DP0L liu 0 Byte thp ca con tr d DP0H liu 0 Cng 0 * P0 Cng 1 * P1 Symbol Name Cng 2 * P2 Cng 3 * P3 TG iu khin ngt u * IP tin TG iu khin cho * IE php ngt khin kiu TMOD iu Timer/Counter iu khin * TCON TG Timer/Counter Byte cao ca TH0 Timer/Counter 0 Byte thp ca TL0 Timer/Counter 0 Byte cao ca TH1 Timer/Counter 1 Byte thp ca TL1 Timer/Counter 1 * SCON Serial Control Serial Data Buffer SBUF PCON Power Control * : c th nh a ch bit, x: khng Symbol * ACC *B * PSW Address 0E0h 0F0h 0D0h 81h 82h 83h 80h 90h Address 0A0h 0B0h 0B8h 0A8h 89h 88h 8Ch 8Ah 8Dh 8Bh Reset Values 00000000b 00000000b 00000000b 00000111b 00000000b 00000000b 11111111b 11111111b Reset Values 11111111b 11111111b xxx00000b 0xx00000b 00000000b 00000000b 00000000b 00000000b 00000000b 00000000b
Bng 2.4. a ch, ngha v gi tr ca cc SFR sau khi Reset Bch Hng Trng 24-10-2003
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i hc spkt hng yn
iu Khin
2.5.1.1. Thanh ghi ACC: l thanh ghi tch lu, dng lu tr cc ton hng v kt qu ca php tnh. Thanh ghi ACC di 8 bits. Trong cc tp lnh ca On-chip, n thng c quy c n gin l A. 2.5.1.2. Thanh ghi B : Thanh ghi ny c dng khi thc hin cc php ton nhn v chia. i vi cc lnh khc, n c th xem nh l thanh ghi m tm thi. Thanh ghi B di 8 bits. N thng c dng chung vi thanh ghi A trong cc php ton nhn hoc chia. 2.5.1.3. Thanh ghi SP: Thanh ghi con tr ngn xp di 8 bit. SP cha a ch ca d liu hin ang nh ca ngn xp. Gi tr ca n c t ng tng ln khi thc hin lnh PUSH trc khi d liu c lu tr trong ngn xp. SP s t ng gim xung khi thc hin lnh POP. Ngn xp c th t bt c ni no trong RAM on-chip, nhng sau khi khi ng li h thng th con tr ngn xp mc nh s tr ti a ch khi u l 07h, v vy ngn xp s bt u t a ch 08h. Ta cng c th nh con tr ngn xp ti a ch mong mun bng cc lnh di chuyn d liu thng qua nh a ch tc thi. 2.5.1.4. Thanh ghi DPTR: Thanh ghi con tr d liu (16 bit) bao gm 1 thanh ghi byte cao (DPH-8bit) v 1 thanh ghi byte thp (DPL-8bit). DPTR c th c dng nh thanh ghi 16 bit hoc 2 thanh ghi 8 bit c lp. Thanh ghi ny c dng truy cp RAM ngoi. 2.5.1.5. Ports 0 to 3: P0, P1, P2, P3 l cc cht ca cc cng 0, 1, 2, 3 tng ng. Mi cht gm 8 bit. Khi ghi mc logic 1 vo mt bit ca cht, th chn ra tng ng ca cng mc logic cao. Cn khi ghi mc logic 0 vo mi bit ca cht th chn ra tng ng ca cng mc logic thp. Khi cc cng m nhim chc nng nh cc u vo th trng thi bn ngoi ca cc chn cng s c gi bit cht tng ng. Tt c 4 cng ca Bch Hng Trng 24-10-2003
27
i hc spkt hng yn
iu Khin on-chip u l cng I/O hai chiu, mi cng u c 8 chn ra, bn trong mi cht bit c b Pullup-tng cng do nng cao kh nng ni ghp ca cng vi ti (c th giao tip vi 4 n 8 ti loi TTL). 2.5.1.6. Thanh ghi SBUF: m d liu ni tip gm 2 thanh ghi ring bit, mt thanh ghi m pht v mt thanh ghi m thu. Khi d liu c chuyn ti SBUF, n s i vo b m pht, v c gi y ch bin thnh dng truyn tin ni tip. Khi d liu c truyn i t SBUF, n s i ra t b m thu. 2.5.1.7. Cc Thanh ghi Timer: Cc i thanh ghi (TH0, TL0), (TH1, TL1) l cc thanh ghi m 16 bit tng ng vi cc b Timer/Counter 0 v 1. 2.5.1.8. Cc thanh ghi iu khin: Cc thanh ghi chc nng c bit: IP, IE, TMOD, TCON, SCON, v PCON bao gm cc bit trng thi v iu khin i vi h thng ngt, cc b Timer/Counter v cng ni tip. Chng s c m t phn sau. 2.5.1.9. Thanh ghi PSW: T trng thi chng trnh dng cha thng tin v trng thi chng trnh. PSW c di 8 bit, mi bit m nhim mt chc nng c th. Thanh ghi ny cho php truy cp dng mc bit. * CY: C nh. Trong cc php ton s hc, nu c nh t php cng bit 7 hoc c s mn mang n bit 7 th CY c t bng 1. * AC: C nh ph (i vi m BCD). Khi cng cc gi tr BCD, nu c mt s nh c to ra t bit 3 chuyn sang bit 4 th AC c t bng 1. Khi gi tr c cng l BCD, lnh cng phi c thc hin tip theo bi lnh DA A (hiu chnh thp phn thanh cha A) a cc kt qu ln hn 9 v gi tr ng. Bch Hng Trng 24-10-2003
28
i hc spkt hng yn
iu Khin * F0: C 0 (C hiu lc vi cc mc ch chung ca ngi s dng) * RS1: Bit 1 iu khin chn bng thanh ghi. * RS0: Bit 0 iu khin chn bng thanh ghi. Lu : RS0, RS1 c t/xo bng phn mm xc nh bng thanh ghi ang hot ng (Chn bng thanh ghi bng cch t trng thi cho 2 bit ny) RS1 0 0 1 1 RS0 0 1 0 1
0 1 2 3
Bng 2.5. Chn bng thanh ghi * OV: C trn. Khi thc hin cc php ton cng hoc tr m xut hin mt trn s hc, th OV c t bng 1. Khi cc s c du c cng hoc c tr, phn mm c th kim tra OV xc nh xem kt qu c nm trong tm hay khng. Vi php cng cc s khng du, OV c b qua. Kt qu ln hn +128 hoc nh hn -127 s t OV=1. * -: Bit dnh cho ngi s dng t nh ngha(Nu cn).
* P: C chn l. c t ng t/ xo bng phn cng trong mi chu trnh lnh ch th s chn hay l ca bit 1 trong thanh ghi tch lu. S cc bit 1 trong A cng vi bit P lun lun l s chn. 2.5.1.10. Thanh ghi PCON: Thanh ghi iu khin ngun.
29
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iu Khin * SMOD: Bit to tc Baud gp i. Nu Timer 1 c s dng to tc baud v SMOD=1, th tc Baud c tng ln gp i khi cng truyn tin ni tip c dng bi cc kiu 1, 2 hoc 3. * -: Khng s dng, cc bit ny c th c dng cc b VXL trong tng lai. Ngi s dng khng c php t nh ngha cho cc bit ny. * GF0, GF1: C dng cho cc mc ch chung (a mc ch). * PD: bit ngun gim. t bit ny mc tch cc vn hnh ch ngun gim trong AT89C51. Ch c th ra khi ch bng Reset. * IDL: bit chn ch ngh. t bit ny mc tch cc vn hnh kiu Idle (Ch khng lm vic) trong AT89C51. Lu : Nu PD v IDL cng c kch hot cng 1 lc mc tch cc, th PD c u tin thc hin trc. Ch ra khi ch bng 1 ngt hoc Reset li h thng. 2.5.1.11. Thanh ghi IE: Thanh ghi cho php ngt * EA: Nu EA=0, khng cho php bt c ngt no hot ng. Nu EA=1, mi ngun ngt ring bit c php hoc khng c php hot ng bng cch t hoc xo bit Enable ca n. * -: Khng dng, ngi s dng khng nn nh ngha cho Bit ny, bi v n c th c dng cc b AT89 trong tng lai. * ET2: Bit cho php hoc khng cho php ngt b Timer 2. * ES: Bit cho php hoc khng cho php ngt cng ni tip (SPI v UART). Bch Hng Trng 24-10-2003
30
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iu Khin * ET1: Bit cho php hoc khng cho php ngt trn b Timer 1 * EX1: Bit cho php hoc khng cho php ngt ngoi 1. * ET0: Bit cho php hoc khng cho php ngt trn b Timer 0 * EX0: Bit cho php hoc khng cho php ngt ngoi 0. 2.5.1.12. Thanh ghi IP: Thanh ghi u tin ngt. * - : Khng dng, ngi s dng khng nn ghi 1 vo cc Bit ny. * PT2: Xc nh mc u tin ca ngt Timer 2. * PS: nh ngha mc u tin ca ngt cng ni tip. * PT1: nh ngha mc u tin ca ngt Timer 1. * PX1: nh ngha mc u tin ca ngt ngoI 1. * PT0: nh ngha mc u tin ca ngt Timer 0. * PX0: nh ngha mc u tin ca ngt ngoI 0. 2.5.1.13. Thanh ghi TCON : Thanh ghi iu khin b Timer/Counter * TF1: C trn Timer 1. c t bi phn cng khi b Timer 1 trn. c xo bi phn cng khi b vi x l hng ti chng trnh con phc v ngt. * TR1: Bit iu khin b Timer 1 hot ng. c t/xo bi phn mm iu khin b Timer 1 ON/OFF * TF0: C trn Timer 0. c t bi phn cng khi b Timer 0 trn. c xo bi phn cng khi b vi x l hng ti chng trnh con phc v ngt. * TR0: Bit iu khin b Timer 0 hot ng. c t/xo bi phn mm iu khin b Timer 0 ON/OFF. * IE1: C ngt ngoi 1. c t bi phn cng khi sn xung ca ngt ngoi 1 c pht hin. c xo bi phn cng khi ngt c x l. * IT1: Bit iu khin ngt 1 to ra ngt ngoi. c t/xo bi phn mm. Bch Hng Trng 24-10-2003
31
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iu Khin * IE0: C ngt ngoi 0. c t bi phn cng khi sn xung ca ngt ngoi 0 c pht hin. c xo bi phn cng khi ngt c x l. * IT0: Bit iu khin ngt 0 to ra ngt ngoi. c t/xo bi phn mm. 2.5.1.14. Thanh ghi TMOD: Thanh ghi iu khin kiu Timer/Counter * GATE: Khi TRx c thit lp v GATE=1, b TIMER/COUTERx hot ng ch khi chn INTx mc cao. Khi GATE=0, TIMER/COUNTERx s hot ng ch khi TRx=1. * C/(/T): Bit ny cho php chn chc nng l Timer hay Counter. - Bit ny c xo thc hin chc nng Timer - Bit ny c t thc hin chc nng Counter * M0, M1: Bit chn Mode, xc nh trng thi v kiu Timer/Counter: - M1=0, M0=0: Chn kiu b Timer 13 bit. Trong THx di 8 bit, cn TLx di 5 bit. - M1=0, M0=1: Chn kiu b Timer 16 bit. THx v TLx di 16 bit c ghp tng. - M1=1, M0=0: 8 bit Auto reload. Cc thanh ghi t ng np li mi khi b trn. Khi b Timer b trn, THx di 8 bit c gi nguyn gi tr, cn gi tr np li c a vo TLx. - M1=1, M0=1: Kiu phn chia b Timer. TL0 l 1 b Timer/Counter 8 bit, c iu khin bng cc bit iu khin b Timer 0, Cn TH0 ch l b Timer 8 bit, c iu khin bng cc bit iu khin Timer 1. - M1=1, M0=1: Timer/Counter 1 Stopped 2.5.1.15. Thanh ghi SCON: SCON l thanh ghi trng thi v iu khin cng ni tip. N khng nhng cha cc bit chn ch , m cn cha bit d liu th 9 dnh cho vic truyn v nhn tin (TB8 v RB8) v cha cc bit ngt cng ni tip. Bch Hng Trng 24-10-2003
32
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iu Khin * SM0, SM1: L cc bit cho php chn ch cho cng truyn ni tip. SM 0 0 0 SM 1 0 1 Mode 0 1 c im Thanh ghi dch 8 bit UART Tc Baud Fosc /12
1 1
0 1
2 3
Bng 2.6. Chn Mode trong SCON * SM2: Cho php truyn tin a x l, th hin Mode 2 v 3. ch 2 hoc 3, nu t SM2 = 1 th RI s khng c kch hot nu bit d liu th 9 (RB8) nhn c gi tr bng 0. Mode 1, nu SM2=1 th RI s khng c kch hot nu bit dng c hiu lc khng c nhn. ch 0, SM2 nn bng 0 * REN: Cho php nhn ni tip. c t hoc xo bi phn mm cho php hoc khng cho php nhn. * TB8: L bit d liu th 9 m s c truyn Mode 2 v 3. c t hoc xo bi phn mm. * RB8: L bit d liu th 9 c nhn Mode 2 v 3. Mode 1, nu SM2=0 th RB8 l bit dng c nhn. Mode 0, RB8 khng c s dng. * TI: C ngt truyn. c t bi phn cng ti cui thi im ca bit th 8 trong Mode 0, hoc u thi im ca bit
33
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iu Khin dng trong cc Mode khc. bt k qu trnh truyn ni tip no, n cng phi c xo bng phn mm. * RI: C ngt nhn. c t bi phn cng ti cui thi im ca bit th 8 trong Mode 0, hoc gia thi im ca bit dng trong cc Mode khc. bt k qu trnh nhn ni tip no (tr trng hp ngoi l, xem SM2), n cng phi c xo bng phn mm.
2.5.2.
Khi
to
thi
gian
(Timer/Counter). On-chip AT89C51 c 2 thanh ghi Timer/Counter di 16 bit, l: Timer 0 v Timer 1. Trong On-chip AT89C52, ngoi Timer 0 v Timer 1 n cn c thm b Timer 2. C 3 b Timer ny u c th c iu khin thc hin chc nng thi gian hay b m, thng qua thanh ghi TMOD. Khi thanh ghi Timer/Counter lm vic kiu Timer, th sau mi chu k my ni dung trong thanh ghi c gia tng thm 1 n v. V vy thanh ghi ny m s chu k my. Mt chu k my c 12 chu k dao ng, do tc m ca thanh ghi l 1/12 tn s dao ng. Khi thanh ghi Timer/Counter lm vic kiu Counter, xung nhp bn ngoi c a vo m T0 hoc T1. Ni dung thanh ghi c tng ln khi c s chuyn trng thi t 1 v 0 ti chn u vo ngoi T0 hoc T1. Xung nhp cc u vo ngoi c ly mu ti thi im S5P2 ca mi chu k my. Khi qu trnh ly mu pht hin ra mc cao 1 chu k v mc thp chu k tip theo, th b m c tng ln. Gi tr mi ca b m xut hin trong thanh ghi ti thi im S3P1 ca chu k my sau khi s chuyn trng thi c pht hin. V vy ni dung ca thanh ghi tng ln 1 n v phi mt 2 chu k my, nn tc m ti a l 1/24 tn s b dao ng. Khng c s gii hn s vng thc hin ca tn hiu u vo ngoi, nhng n s gi t nht 1 chu k my y m
34
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iu Khin bo chc chn rng mt mc cho c ly mu t nht 1 ln na trc khi n thay i. Do xung nhp bn ngoi c tn s bt k nn cc b Timer (0 v 1) c 4 ch lm vic khc nhau lu chn: (13 bit Timer, 16 bit Timer, 8 bit auto-reload, split Timer).
Timer 0 v Timer 1:
Trong AT89C51 v AT89C52 u c cc b Timer 0 v 1. Chc nng Timer hay Counter c chn la bi cc bit iu khin C/(/T) trong thanh ghi TMOD. Hai b Timer/Counter ny c 4 ch hot ng, c la chn bi cp bit (M0, M1) trong TMOD. Ch 0, 1 v 2 ging nhau cho cc chc nng Timer/Counter, nhng ch 3 th khc. Bn ch hot ng c m t nh sau: + Ch 0: C 2 b Timer 0 v 1 ch 0 c cu hnh nh mt thanh ghi 13 bit, bao gm 8 bit ca thanh ghi THx v 5 bit thp ca TLx. 3 bit cao ca TLx khng xc nh chc chn, nn c lm ng. Khi thanh ghi c xo v 0, th c ngt thi gian TFx c thit lp. B Timer/Counter hot ng khi bit iu khin TRx c thit lp (TRx=1) v, hoc Gate trong TMOD bng 0, hoc /INTx=1. Nu t GATE=1 th cho php iu khin Timer/ Counter bng ng vo ngoi /INTx, d dng xc nh rng xung. Khi hot ng chc nng thi gian th bit C/(/T)=0, do vy xung nhp t b dao ng ni, qua b chia tn cho ra tn s f=fosc/12 c a vo m trong
OS C T1 PIN
TF 1 Interrupt
TR1
Bch Hng Trng 24-10-2003 /INT1
GATE
PIN
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iu Khin
thanh ghi Timer/Counter. Khi hot ng chc nng b m th bit C/(/T)=1, lc xung nhp ngoi a vo s c m. + Ch 1: hot ng tng t nh ch 0, ch khc l thanh ghi Timer/Counter c s dng c 16 bit. Xung nhp c dng kt hp vi cc thanh ghi thi gian byte thp v byte cao (TH1 v TL1). Khi xung Clock c nhn, b Timer s m tng ln: 0000h, 0001h, 0002,Khi hin tng trn xy ra, c trn s chuyn FFFFh v 0000h, v b Timer tip tc m. C trn ca Timer 1 l bit TF1 trong TCON, n c c hoc ghi bi phn mm, xem hnh 2.5 (Timer/Counter 1 Mode 1: 16 bit Counter).
Time r Clock
TF1
Overlo w Flag
OS C T1 PIN
/ 12
C/ T=0 C/ T=1
TF 1 Interru pt
i hc spkt hng yn
iu Khin
+ Ch 2: Ch ny ca thanh ghi Timer cng hot ng tng t nh 2 ch trn, nhng n c t chc nh b m 8 bit (TL1) vi ch t ng np li, nh hnh 2.6. Khi xy ra hin tng trn TL1, khng ch thit lp bit TF1 m cn t ng np li cho TL1 bng ni dung ca TH1, c thit lp bi phn mm. Qu trnh np li cho php ni dung ca TH1 khng b thay i. Ch 2 ca Timer/Counter 0 cng tng t nh Timer/Counter 1. + Ch 3: ch ny, chc nng Timer/Counter 0 v chc nng Timer/Counter 1 khc nhau. B Timer 1 ch 3 ch cha chc nng m ca n, kt qu ging khi t TR1=0. B Timer 0 ch 3 thit lp TH0, TL0 nh l 2 b m ring bit. Mch Logic i vi ch 3 ca Timer 0 th hin hnh 2.7. B m TL0 c iu khin bi cc bit: C/ (/T), GATE, TR0, /INT0 v khi m trn n thit lp c ngt TF0. B m TH0 ch c iu khin bi bit TR1, v khi m trn n thit lp c ngt TF1. Vy, TH0 iu khin ngt Timer/Counter 1. Ch 3 thng c dng khi yu cu cn c b thi gian hoc b m ngoi 8 bit. i vi Timer 0 ch 3, AT89C51 c th c 3 b Timer/Counter, cn AT89C52 c th c 4 b. Khi Timer 0 hot ng ch 3, th Timer 1 c th c bt hoc tt bng chuyn mch ngoi. ch ny, Timer 1 c th c s dng bi cng ni tip nh mt b to tc Baud, OS / hoc trong bt k ng dng no m khng yu cu mt ngt.
12
C/ T=0 C/ T=1
TF 0 Interru pt
37
TH0 8 bits
TF1 Interru pt
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iu Khin
i hc spkt hng yn
iu Khin
/EA=0 External
0000
/EA=1 Internal
7Fh 00 0000
/PSEN
/RD /WR
i hc spkt hng yn
iu Khin ni tr v ngoi tr. Ngc li, khi /EA = 0 th b VK ch s dng b nh chng trnh ngoi tr. Mi khi c Reset, b VK s truy cp b nh chng trnh ti a ch khi u l 0000h, sau nu c ch ngt c s dng th n s truy cp ti a ch quy nh trong bng vecter ngt. Khi truy cp b nh chng trnh, b VK s dng xung chn /PSEN iu khin. Nu on-chip lm vic vi b nh chng trnh ni tr th chn pht ra xung chn /PSEN khng s dng. Nu b VK lm vic vi b nh chng trnh ngoi tr th chn pht ra xung chn /PSEN c s dng. Khi nu /PSEN = 0 th cho php b VK c b nh chng trnh ngoi, ngc li nu /PSEN = 1 th b VK ch lm vic vi b nh chng trnh ni tr.
AT89C51 c b nh d liu chim mt khong khng gian b nh c lp vi b nh chng trnh. Dung lng ca RAM ni tr h VK ny l 128 Byte, c nh a ch t 00h n 7Fh. Phm vi a ch t 80h n FFh dnh cho SFR. Tuy nhin b VK cng c th lm vic vi RAM ngoi tr c dung lng cc i l 64 Kbyte c nh a ch t 0000h n FFFFh.
C th truy cp bng a ch 80h trc tip (SFR) C th truy cp bng a ch trc tip Hinh 2.9. B nh d liu trong v gin tip
FFh
i hc spkt hng yn
iu Khin Vng nh 128 Byte thp c nh a ch t 00h n 7Fh, c chia thnh 3 vng con nh th hin hnh 2.10. - Vng th nht c ln 32 Byte c nh a ch t 00h n 1Fh bao gm 4 bng thanh ghi ( bng 0...bng 3), mi bng c 8 thanh ghi 8 bit. Cc thanh ghi trong mi bng c tn gi t R0 n R7. Vng RAM ny c truy cp bng a ch trc tip mc Byte, v qu trnh chn s dung bng thanh ghi no l ty thuc vo vic la chon gi tr cho RS1 v RS0 trong PSW. - Vng th 2 c ln 16 Byte c nh a ch t 20h n 2Fh, cho php truy cp trc tip bng a ch mc bit. B VK cung cp cc lnh c kh nng truy cp ti vng nh 128 bit ny (nu truy cp dng mc bit th vng ny c a ch c nh t 00h n 7Fh) mc bit. vng nh ny, a ch c truy xut di dng Byte hay Bit tu vo lnh c th. Chng hn, t bit ti a ch 5Fh c mc logic 1, ta thc hin lnh: SETB 5Fh . Sau khi thc hin lnh ny, mc du 5Fh l a ch bit cao nht trong Byte c a ch 2Bh, nhng n khng lm nh hng ti cc bit khc trong Byte ny. Trong khi , cc b VXL thc hin chc nng nh trn cn dng nhng lnh sau: MOV A,2Bh ORL A,#10000000b MOV 2Bh,A y l u im r nt ca cc b VK khi thc hin vic truy xut cc bit ring r thng qua phn mm. Cc bit c th c t, xo, hay thc hin chc nng AND, OR...ch thng qua 1 lnh. Ngoi ra cc cng xut/nhp cng c th c nh a ch dng bit, iu ny lm n gin vic giao tip bng phn mm vi cc thit b xut/nhp n bit. - Vng nh cn li gm 80 Byte c a ch t 30h n 7Fh c dnh ring cho ngi s dng lu tr d liu. y c th xem l vng RAM a mc ch. C th truy cp vng nh ny bng a ch trc tip hoc gin tip thng qua cc thanh ghi (R0 hoc R1) dng mc Byte.
i hc spkt hng yn
42
i hc spkt hng yn
Bit Address
30
2F 2E 2D 2C yy 2B yy 2A yy 29 yy 28 yy 27 yy 26 yy 25 yy 24 yy yy 23 yy 22 yy 21 yy 20 y2 1F D 18 2C 11 10 0F 08 07 00
43
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iu Khin
Byte address
FF F0 E0 D0 B8 B0 A8 A0 99 98 90 8D 8C 8B 8A 89 88 87 83 82 81 80 87 86 8F 8E F7 E7 D7 B7 AF A7 F6 E6 D6 B6 -
Bit address
F5 E5 D5 B5 F4 E4 D4 F3 E3 D3 F2 E2 D2 F1 E1 F0 E0 D0 B8 B0 A8 A0 B ACC PSW IP P3 IE P2 SBUF SCON P1 TH1 TH0 TL1 TL0 TMOD TCON PCON DPH DPL SP P0
BC BB BA B9 B4 B3 B2 B1 A9 A1
AC AB AA A4 A3 A2
A6 A5
Not bit addressable Not bit addressable Not bit addressable Not bit addressable Not bit addressable
8D 8C 8B 8A 89 88
Not bit addressable Not bit addressable Not bit addressable Not bit addressable
85 84 83 82 81 80
Hnh 2.11. Cc thanh ghi chc nng bit (SFR) 44 Bch Hng c Trng 24-10-2003
i hc spkt hng yn
iu Khin
EPROM AD0...AD7
Latch D Q
i hc spkt hng yn
iu Khin
Hnh 2.13. th thi gian qu trnh nhn lnh t ROM ngoi B nh chng trnh ngoi l b nh ch c, c cho php bi tn hiu /PSEN. Khi c mt EPROM ngoi c s dng, c P0 v P2 u khng cn l cc cng I/O na. Khi b VK truy cp b nh chng trnh ngoi tr, n lun s dng knh a ch 16 bit thng qua P0 v P2. Mt chu k my ca b VK c 12 chu k dao ng. Nu b dao ng trn chip c tn s 12 MHz, th 1 chu k my di 1 s. Trong mt chu k my in hnh, ALE c 2 xung v 2 Byte ca lnh c c t b nh chng trnh (nu lnh ch c 1 byte th byte th 2 c loi b). Khi truy cp b nh chng trnh ngoi tr, b VK pht ra 2 xung cht a ch trong mi chu k
46
i hc spkt hng yn
iu Khin my. Mi xung cht tn ti trong 2 chu k dao ng t P2-S1 n P1-S2, v t P2-S4 n P1-S5. a ch ho b nh chng trnh ngoi tr, byte thp ca a ch (A0A7) t b m chng trnh ca b VK c xut qua cng P0 ti cc trng thi S2 v S5 ca chu k my, byte cao ca a ch (A8A15) t b m chng trnh c xut qua cng P2 trong khong thi gian ca c chu k my. Tip theo xung cht, b VK pht ra xung chn /PSEN. Mi chu k my ca chu k lnh gm 2 xung chn, mi xung chn tn ti trong 3 chu k dao ng t P1-S3 n ht P1-S4 v t P1-S6 n ht P1S1 ca chu k my tip theo. Trong khong thi gian pht xung chn th byte m lnh c c t b nh chng trnh nhp vo On chip.
P0 EA
Latc h D Q
A0...A7 A8...A15
I/O
P1
ALE P2 /
/OE /WE
RD
i hc spkt hng yn
P3
/WR
iu Khin
Hnh 2.16. th thi gian chu k ghi d liu vo RAM ngoi B nh d liu ngoi tr c cho php bi cc tn hiu /WR v /RD cc chn P3.6 v P3.7. VK truy cp b nh d liu Bch Hng Trng 24-10-2003
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iu Khin ngoi bng a ch 2 byte (thng qua cng P0 v P2) hoc 1 byte (thng qua cng P0). Lnh dng truy xut b nh d liu ngoi l MOVX, s dng hoc DPTR hoc Ri (R0 v R1) lm thanh ghi cha a ch. hnh 2.14 ta thy: - /EA c ni vi +Vcc cho php VK lm vic vi b nh chng trnh ni tr. - /RD ni vi ng cho php xut d liu (/OE-Output Data Enable) ca RAM. - /WR ni vi ng cho php ghi d liu (/WE-Write Data Enable) ca RAM. Nguyn l truy cp b nh d liu ngoi tr c th hin bng cc th thi gian trn. Tuy nhin, tu thuc vo nhim v c d liu t b nh hay ghi d liu vo b nh m nguyn l truy cp b nh d liu l khc nhau. * Qu trnh c d liu t b nh ngoi tr: Khi truy cp b nh d liu ngoi tr, b VK pht ra 1 xung cht a ch (ALE) cho b cht bn ngoi (Latch) trong mi chu k my, tn ti trong 2 chu k dao ng t P2-S4 n P1-S5. a ch ho b nh d liu ngoi, byte thp ca a ch t thanh ghi con tr d liu (DPL) hoc t Ri ca VK c xut qua cng P0 trong khong cc trng thi S5 ca chu k my trong chu k lnh. Tip theo byte thp ca a ch t b m chng trnh (PCL) cng c xut ra qua cng P0 a ti b m chng trnh thc hin lnh tip theo. Byte cao ca a ch t DPTR (DPH) ca VK c xut qua cng P2 trong khong thi gian t S5 n S4 ca chu k my tip theo. Sau byte cao ca a ch t PC (PCH) cng c xut qua cng P2 a n b nh chng trnh. Nu a ch c di 1 byte th n c xut qua cng P0 t DPL hoc Ri. Tip theo xung cht, VK xut ra tn hiu iu khin /RD cho php c d liu t b nh ngoi. Xung /RD tn ti trong 3 trng thi ca mi chu Bch Hng Trng 24-10-2003
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iu Khin k my t P1-S1 n P2-S3, v trong khong thi gian ny d liu t b nh ngoi c c vo VK . * Qu trnh ghi d liu vo b nh ngoi tr: Tng t nh qu trnh c d liu, nhng y dng tn hiu iu khin ghi /WR. * Cc lnh truy cp b nh d liu ngoi tr: - MOVX A, @Ri: Chuyn (c) d liu 8 bit t nh ca RAM ngoi ti a ch c xc inh trong thanh ghi ca bng thanh ghi hin hnh vo A. - MOVX @Ri, A: Chuyn (ghi) d liu 8 bit t A vo nh ca RAM ngoi ti a ch c xc nh trong thanh ghi ca bng thanh ghi hin hnh. - MOVX A,@DPTR: Chuyn (c) d liu 16 bit t nh ca RAM ngoi ti a ch c xc inh trong thanh ghi con tr d liu vo A. - MOVX @DPTR, A: Chuyn (ghi) d liu 16 bit t A vo nh ca RAM ngoi ti a ch c xc nh trong thanh ghi con tr d liu. V d: MOV R0, #4Fh MOVX A,@R0 S chuyn ni dung RAM ngoi ti a ch 4Fh vo A.
2.5.5. C ch ngt trong On-chip AT89C51: 2.5.5.1- Phn loi ngt trong On-chip:
B AT89C51 c tt c 5 Vectors ngt bao gm: 2 ngt ngoi (/INT0 v /INT1), 2 ngt ca khi thi gian (Timer 0, 1), v ngt cng truyn tin ni tip. Mi ngun ngt c th c kch hot hoc khng kch hot bng cch t hoc xo Bit trong IE. IE cng cha bit c th khng cho tt c cc ngt hot ng EA (Nu EA=0). Cc ngt ngoi c th c kch hot theo mc hoc theo sn xung, tu thuc vo gi tr ca cc bit IT0, IT1 trong TCON. Ngt ngoi c 2 c ngt tng ng l IE0, IE1 cng nm trong TCON. Khi mt ngt c thc hin th c ngt tng ng ca n b xo bng Bch Hng Trng 24-10-2003
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iu Khin phn cng. Chng trnh con phc v ngt hot ng ch khi ngt c kch hot theo sn xung. Nu ngt c kch hot theo mc th ngun yu cu ngt t bn ngoi iu khin c ngt. Hnh :
Hnh 2.17. Cc ngun ngt ca AT89C51 Cc ngt trong, vi ngt Timer/Counter 0, 1 c pht sinh bi c ngt TF0, TF1. Hai c ngt ny c thit lp khi thanh ghi Timer/Counter thc hin quay vng, ti thi im S5P2 ca chu trnh my. Khi mt ngt c thc hin th c ngt tng ng pht sinh ra ngt s b xo bng phn cng trong On-chip. Ngt cng ni tip c pht sinh bi cc ngt RI, TI, SPIF thng qua phn t Logic OR, khi chng trnh con phc v ngt c kch hot th cc c ngt pht sinh tng ng c xo bng Bch Hng Trng 24-10-2003
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iu Khin phn mm. Cc ngt trong c th c php hoc khng uc php kch hot bng cch t hoc xo mt bit trong IE.
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iu Khin Cc c ngt c thit lp ti thi im S5P2 ca mi chu k my. Chu k my tip theo sau chu k my c c ngt c thit lp, th chng trnh con c thit lp khi c lnh gi LCALL. Lnh LCALL pht sinh nhng li b cm hot ng khi gp cc tnh hung sau: a- ng thi c ngt vi mc u tin cao hn hoc bng ngt ang phc v. (Mt ngt c mc u tin bng hoc cao hn ang sn sng c phc v) b- Chu k my hin hnh khng phi l chu k my cui cng ca lnh ang thc hin. c- Lnh ang thc hin l RETI hoc bt k lnh no ghi vo thanh ghi IE hoc IP.
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iu Khin Bt k mt trong 3 iu kin ny xut hin s cn tr vic to ra LCALL i vi chng trnh phc v ngt. iu kin 2 m bo rng, lnh ang thc hin s c hon thnh trc khi tr ti bt k chng trnh phc v no. iu kin 3 m bo rng, nu lnh ang thc hin l RETI hoc bt k s truy cp no vo IE hoc IP, th t nht mt lnh na s c thc hin trc khi bt k ngt no c tr ti. Chu trnh kim tra vng c lp li vi mi chu trnh my, v cc gi tr c kim tra l cc gi tr m xut hin thi im S5P2 ca chu trnh my trc . Nu mt ch th ngt c hiu lc nhng khng c p ng v cc iu kin trn v nu ch th ny vn cha c hiu lc khi iu kin cn tr c loi b, th ngt b t chi ny s khng c phc v na. LCALL do phn cng to ra s chuyn ni dung ca b m chng trnh vo ngn xp (Nhng khng ghi vo PSW) v np li cho PC mt a ch ph thuc vo ngun gy ngt ang c phc v, nh bng di y:
Ngt External 0 Timer 0 External 1 Timer 1 Serial Port Timer 2 (AT89C52) System Reset
Ngun ngt IE0 TF0 IE1 TF1 RI hoc TI TF2 hoc EXF2 RST
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iu Khin Lnh RETI thng bo cho b VXL rng th tc ngt ny kt thc, sau ly ra 2 Byte t ngn xp v np li cho PC tr li quyn iu khin cho chng trnh chnh.
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iu Khin Nu chn /INT0 c duy tr mc thp, th CPU s chuyn ngay n th tc ngt ngoi 0 v dng cho ti khi INT0 c nhn xung t thp ln cao ri xung thp. Sau n s thc hin lnh RETI, tr li nhim v chng trnh, thc hin mt lnh, v ngay sau nhp li th tc ngft ngoi 0 i xung nhp tip theo ca P3.2. Mi bc ca nhim v chng trnh c thc hin vo mi thi im chn P3.2 c nhn xung.
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iu Khin Khi nhn, bit dng c chuyn vo RB8 ca thanh ghi SCON. Tc Baud c th thay i c. + Ch 2: 11 bit c truyn (thng qua TxD) hoc nhn (thng qua RxD) bao gm: bit khi ng (c gi tr 0), 8 bit d liu (u tin l LSB), mt bit d liu th 9 c th lp trnh c, v mt bit dng (c gi tr 1). Khi truyn, bit d liu th 9 (TB8 trong SCON) c th c gn gi tr 0 hoc 1. Chng hn nh bit chn l (P trong PSW) c th c chuyn vo TB8. Khi nhn, bit d liu th 9 c chuyn vo RB8 thanh ghi SCON, trong khi bit dng c lc b. Tc Baud c th lp trnh c bng 1/32 hoc 1/64 tn s b dao ng. + Ch 3: 11 bit c truyn (thng qua TxD) hoc c nhn (thng qua RxD) bao gm: 1 bit khi ng (c gi tr 0), 8 bit d liu (u tin l LSB), 1 bit d liu th 9 c th lp trnh c, v 1 bit dng (c gi tr 1). Trn thc t, ch 3 ging ch 2 mi gc tr tc Baud. Tc Baud ch 3 l kh bin v c xc nh theo b Timer 1. Trong c 4 ch trn, vic truyn c bt u bi bt k mt lnh no m s dng thanh ghi SBUF nh l mt thanh ghi ch. Vic nhn c bt u ch 0 khi RI=0 v REN=1. i vi cc ch khc, vic nhn c bt u khi bit REN=1.
(Multiprocessor
Ch 2 v 3 c mt d tr (chun b) c bit cho cc lin lc a x l. Trong cc ch ny 9 bit d liu c s dng. Bit th 9 s chuyn vo RB8, sau l 1 bit dng. Cng ni tip c th c lp trnh tho mn iu kin: khi bit dng c nhn th ngt ca cng ni tip c kch hot ch khi RB8=1. c im ny c th thc hin c bng cch t bit SM2 trong SCON. Bch Hng Trng 24-10-2003
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iu Khin V d di y cho thy, cch thc s dng ngt cng truyn ni tip to lin lc a x l. Khi b x l ch (Master) mun truyn 1 khi d liu ti mt trong nhng b x l (Slave) khc, u tin n gi i 1 byte a ch xc nh a ch ca b x l ch (Slave). Mt byte a ch khc vi mt byte d liu ch: bit th 9 bng 1 byte a ch v bng 0 byte d liu. Vi SM2=1, khng c b x l (Slave) no c ngt bi 1 byte d liu. Tuy nhin 1 byte a ch s ngt tt c cc b x l (Slave) khc, cho mi b x l (slave) khc c th kim tra byte nhn c v xem c phi n ang c tr ti khng. B x l (slave) no c tr ti s xo (clear) bit SM2 ca n v chun b nhn cc byte d liu s a n. Cc b x l (Slave) khc nu khng c tr ti, th s thit lp (set) bit SM2 ca chng v tip tc hot ng ca mnh m khng cn quan tm ti d liu trn knh. Bit SM2 khng c tc dng ch 0, nhng n c th c s dng kim tra bit dng trong ch 1. Trong qu trnh nhn tin ch 1, nu SM2=1 th ngt nhn tin s khng c kch hot tr khi bit dng c nhn vo.
2.5.6.3. Cc tc Baud:
+ Tc Baud ch 0 c c nh, v bng Tn s b dao ng/12 + Tc Baud ch 2 ph thuc vo gi tr ca bit SMOD trong thanh ghi PCON. Nu SMOD=0 (gi tr sau khi reset), th tc Baud =1/64 tn s ca b dao ng. Nu SMOD=1 th tc Baud =1/32 tn s ca b dao ng. Tc Baud ch 2 = (2 SMOD*Tn s b dao ng)/64 Trong AT89C51, cc tc Baud ch 1 v 3 do Timer 1 quyt nh, Trong AT89C52 tc Baud ca cc ch ny c th c quyt nh bi Timer 1 hoc Timer 2, hoc c hai Bch Hng Trng 24-10-2003
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iu Khin Tn SMODE s d. ng (MHz ) Mode 0 Max: 1M 12 x Mode 2 Max: 12 1 375K Mode 1,3 12 1 Max:62,5K 19,2K 11,05 1 9 9,6K 11,05 0 9 4,8K 11,05 0 9 2,4K 11,05 0 9 1,2K 11,05 0 9 137,5 11,96 0 6 110 6 0 110 12 0 Tc Baud (Hz)
X X 0 0 0 0 0 0 0 0 0
X X 2 2 2 2 2 2 2 2 1
2.5.6.5. Hot ng ca ch 0:
D liu ni tip vo v ra thng qua RxD. TxD cho ra ng h xung nhp. 8 bit d liu c truyn/nhn (vi LSB u tin) c thc hin ch ny. Tc Baud c c nh bng 1/12 tn s b dao ng. Hnh 2.19 (Seriel Port Mode 0) m t s chc nng ca cng ni tip ch 0 v cc mc thi gian c lin quan. Qu Bch Hng Trng 24-10-2003
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iu Khin trnh truyn c bt u bng bt k lnh no m s dung SBUF nh l mt thanh ghi ch. Tn hiu ghi vo SBUF ti thi im S6P2 cng np gi tr 1 vo v tr th 9 ca thanh ghi dch trong qu trnh truyn v bt c bo cho khi iu khin pht (Tx Control) v yu cu truyn tin. Thi gian c xc lp bn trong cho 1 chu trnh my y s bt u t thi im ghi vo SBUF cho ti khi SEND c kch hot. SEND cho php ni dung ca thanh ghi dch a ti u ra P3.0 v cho php tn hiu SHIFT CLOCK n u ra P3.1. SHIFT CLOCK c gi tr thp trong cc trng thi S3, S4 v S5 ca mi chu trnh my, v c gi tr cao trong cc trng thi S6, S1 v S2. Ti thi im S6P2 ca mi chu trnh my khi SEND c mc tch cc, th ni dung ca thanh ghi dch pht c dch sang bn phi mt bit.
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iu Khin
Hnh 2.19.
Khi cc bit d liu dch sang bn phi i ra ngoi th cc gi tr 0 c gn vo bn tri. Khi bit c trng s ln nht MSB ca Byte d liu v tr u ca thanh ghi dch, th gi tr 1 Bch Hng Trng 24-10-2003
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iu Khin ( c np t u vo v tr th 9) c t vo bn tri ca MSB, v tt c cc v tr bn tri cn li ca MSB u cha gi tr 0. iu kin ny s ch th cho khi iu khin pht thc hin mt php dch cui cng v sau hu tc dng ca SEND v thit lp c ngt truyn TI. C 2 tc ng ny xy ra ti thi im S1P1 ca chu trnh my th 10 k t thi im ghi vo SBUF. Qu trnh nhn tin c khi u bng iu kin REN=1 v RI=0. Ti thi im S6P2 ca chu trnh my tip theo, khi iu khin nhn (Rx Control) s ghi cc bit 11111110 (Xa RI) vo thanh ghi dch nhn, v s kch hot RECEIVE trong pha xung nhp tip theo. RECEIVE cho php SHIFT CLOCK (ng h xung nhp) a n u ra P3.1. SHIFT CLOCK s to ra vic pht tin ti thi im S3P1 v S6P1 ca mi chu trnh my. Ti giai on S6P2 ca mi chu trnh my khi RECEIVE c mc tch cc th ni dung ca thanh ghi dch nhn tin c dch sang tri mt v tr. Gi tr a vo t bn phi l gi tr c to mu chn P3.0 ti thi im S5P2 ca cng chu trnh my. Khi cc bit d liu c a vo t bn phi, th cc gi tr 1 s i ra bn tri. Khi gi tr 0 ( c np ban u vo v tr tn cng bn phi) dch n v tr tn cng bn tri trong thanh ghi dch, th n ch th cho khi iu khin nhn thc hin php dch cui cng v np vo SBUF. Ti thi im S1P1 ca chu trnh my th 10 sau thi im ghi vo SCON ( xo RI), th RECEIVE c xo v RI c thit lp.
2.5.6.6. Hot ng ca ch 1:
ch ny 10 bit c truyn (thng qua TxD) hoc nhn (thng qua RxD) bao gm: 1 bit khi u(c gi tr 0), 8 bit d liu (LSB u tin) v 1 bit dng (C gi tr 1). Khi nhn tin, bit dng chuyn vo RB8 trong SCON. Trong AT89C51, tc Baud c xc nh bng tc trn ca Timer 1. Trong AT89C52, tc Baud c xc nh bng tc trn ca Timer 1 hoc tc trn ca Timer 2 hoc bng tc trn ca c 2 b 63 Bch Hng Trng 24-10-2003
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iu Khin Timer ny. Trong trng hp ny, khi c 2 b Timer c s dng th mt b Timer s xc nh tc truyn tin, cn b Timer kia xc nh tc nhn tin. Hnh 2.20 (Seriel Port Mode 1) l s chc nng ca cng ni tip ch 1 v th thi gian lin quan ti qu trnh truyn v nhn tin ca ch ny. Qu trnh truyn tin c khi u bi bt k lnh no c s dng SBUF nh 1 thanh ghi ch. Tn hiu ghi vo SBUF s np gi tr 1 vo bit th 9 ca thanh ghi dch truyn v bt c bo cho khi iu khin pht (Tx Control) v yu cu cn truyn tin. Qu trnh truyn thc t bt u ti thi im S1P1 ca chu k my theo sau qu trnh quay vng (rollover) k tip trong b m chia 16 (-:-16). Do , cc thi im ca bit truyn c ng b vi nhp b m chia16, ch khng phi vi tn hiu ghi vo SBUF. Qu trnh truyn tin bt u khi /SEND c kch hot m cng OR v bit khi u c t ti TxD. Sau tn hiu DATA c kch hot m tip cng AND. iu ny cho php m thng ng truyn t thanh ghi dch truyn n u ra TxD. Xung nhp u tin dch cc bit trong thanh ghi dch truyn s xut hin ngay sau .
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iu Khin
Hnh 2.20
Khi cc bit d liu dch sang phi, th cc gi tr 0 c a vo t bn tri. Khi MSB ca Byte d liu v tr u ra ca thanh ghi dch th gi tr 1(ban u c np vo bit th 9) s c in vo ngay bn tri ca bit MSB, cn cc bit k t n sang tri u c gi tr 0. iu kin ny s ch th cho khi iu khin pht thc hin ln dch cui cng v sau a tr /SEND v mc th ng, ng thi thit lp c ngt TI. Bch Hng Trng 24-10-2003
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iu Khin Thi im ny ri vo chu k th 10 ca b m chia 16, sau thi im ghi vo SBUF. Qu trnh nhn tin c khi u bng vic pht hin c s chuyn trng thi t 1 v 0 ng thu ni tip RxD. pht hin chnh xc, tn hiu trn RxD c ly mu tc gp 16 ln tc Baud ca ng truyn. Khi s chuyn trng thi (t 1 v 0) c pht hin th b m chia 16 c ti xc lp ngay v gi tr 1FFh c ghi vo thanh ghi dch u vo (Input shift register). Vic ti thit lp b m chia 16 s ng nht thi im trn ca n vi cc bin (ranh gii) thi gian ca bit ang i ti u thu. Mi bit c chia thnh 16 phn (States) thi gian bng nhau (16 phn ca b m). Ti cc phn thi gian th 7, 8, 9 ca mi bit, b pht hin bit (Bit Detector) s trch mu gi tr ca RxD. Gi tr c chp nhn l gi tr c t nht 2 trong 3 mu. Phng php ny c thc hin chng nhiu ng truyn. Nu gi tr c chp nhn i vi bit u tin khng phI l 0 (khng phI bit START), th cc mch thu c ti xc lp quay li ch mt t bin t 1 v 0 khc. Nu bit khi u (START) c gi tr hp l th d liu c dch vo thanh ghi dch u vo, v qu trnh nhn tin c tip tc. Khi cc bit d liu i vo t bn phi ca thanh ghi dch, th cc gi tr 1 c dch ra bn tri ca n. Khi bit khi u n v tr tn cng bn tri ca thanh ghi dch ( ch 1, n l thanh ghi 9 bit), n s ch th cho khi iu khin nhn (Rx Control) thc hin php dch chuyn cui cng, ri np SBUF v RB8, v thit lp RI. Tn hiu np SBUF v RB8, v thit lp RI s c to ra khi v ch khi cc iu kin sau y c tho mn thi im xung nhp cui cng c to ra: 1. RI=0, v 2. Hoc SM2=0, hoc bit STOP nhn c =1. Nu mt trong hai iu kin ny khng c tho mn, th Byte tin nhn c s b mt. Nu c 2 iu kin c tho mn, th bit dng chuyn vo RB8, 8 bit d liu chuyn vo SBUF, v RI c kch hot. Ti thi im ny, bt k cc iu kin Bch Hng Trng 24-10-2003
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iu Khin trn c tho mn hay khng, th khi iu khin vn quay tr li tip tc chc nng pht hin t bin mi t 1 v 0 trn ng thu tin RxD.
2.5.6.7. Hot ng ca ch 2 v 3:
ch ny 11 bit c truyn i (thng qua TxD) hoc nhn vo (thng qua RxD), bao gm: 1 bit khi u (0), 8 bit d liu (LSB u tin), 1 bit d liu th 9 c th lp trnh c v 1 bit dng (1). Khi truyn tin i, bit d liu th 9 (TB8) c th c gn gi tr 0 hoc 1. Khi nhn tin, bit d liu th 9 chuyn vo RB8 trong SCON. Tc Baud c th lp trnh c bng 1/32 hoc 1/64 tn s ca b dao ng ch 2. Ch 3 c th c tc Baud kh bin do Timer 1 hoc Timer 2 to ra, tu thuc vo trng thi ca cc bit TCLK v RCLK. Hnh 2.21 (Seriel Port Mode 2) v Hnh 2.22 (Seriel Port Mode 3) l cc s chc nng v th thi gian ca cc ch 2 v 3. Phn nhn tin c t chc ging nh ch 1. Phn truyn tin khc vi ch 1 ch bit th 9 ca thanh ghi dch truyn. Qu trnh truyn tin c khi u bng bt k lnh no m c s dng SBUF nh mt thanh ghi ch. Tn hiu ghi vo SBUF cng np bit TB8 vo v tr bit th 9 ca thanh ghi dch truyn v ch th cho khi iu khin truyn (Tx Control) rng c yu cu phi truyn tin. Qu trnh truyn c bt u ti S1P1 ca chu k my ngay sau thi im trn ca b m chia 16. Do , cc bit c ng b i vi chu k b m chia 16, ch khng phi vi tn hiu ghi vo SBUF. Qu trnh truyn bt u khi tn hiu /SEND c kch hot, v bit khi u c t ti TxD. Sau n tn hiu DATA c kch hot. iu ny cho php m thng ng truyn t thanh ghi dch truyn n u ra TxD. Xung nhp u tin chuyn gi tr 1 (Bit dng) vo v tr bit th 9 ca thanh ghi dch. Cn sau ch cc gi tr 0 c a vo. V vy, khi cc bit d liu dch ra sang phi, th cc gi tr 0 c a vo t bn tri. Khi TB8 v tr u ra ca thanh ghi dch, th bit 67 Bch Hng Trng 24-10-2003
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iu Khin
Hnh 2.22
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iu Khin
u l gi tr 0. iu kin ny ch th cho khi iu khin pht (Tx Control) thc hin php dch cu cng v sau tr SEND v trng thi th ng, ng thi thit lp TI. Thi im ny ng vi chu k ln th 11 (s quay vng ln th 11) ca b m chia 16 sau khi c tn hiu ghi vo SBUF. Qu trnh nhn tin c khi u bng s pht hin t bin (chuyn trng thi) t 1 v 0 RxD. Vi mc ch m bo tin cy khi trch mu trn RxD, th tc trch mu c ly gp 16 ln tc Baud ca ng truyn (Tn hiu trn RxD c ly mu vi tc gp 16 ln tc Baud ca ng truyn). Khi s chuyn trng thi t 1 v 0 c pht hin, b m chia 16 c ti xc lp (reset) li ngay, v gi tr 1FFh c ghi vo thanh ghi dch u vo. cc phn thi gian th 7, 8 v 9 ca mi bit, b pht hin bit (Bit Detector) s trch mu gi tr ca RxD. Gi tr c chp nhn l gi tr thy t nht 2 trong 3 mu. Phng php ny c thc hin chng nhiu ng truyn. Nu gi tr c chp nhn i vi bit u tin khng phi l 0 (khng phi bit START), th cc mch thu c ti xc lp quay li ch mt t bin t 1 v 0 khc. Nu bit khi u (START) c gi tr hp l th d liu c dch vo thanh ghi dch u vo, v qu trnh nhn tin c tip tc. Khi cc bit d liu thu c i vo t bn phi ca thanh ghi dch, th cc gi tr 1 c dch ra bn tri ca n. Khi bit khi u n v tr tn cng bn tri ca thanh ghi dch ( ch 2 v 3, n l thanh ghi 9 bit), n s ch th cho khi iu khin nhn (Rx Control) thc hin php Bch Hng Trng 24-10-2003
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iu Khin dch chuyn cui cng, ri np SBUF v RB8, v thit lp RI. Tn hiu np SBUF v RB8, v thit lp RI s c to ra khi v ch khi cc iu kin sau y c tho mn thi im xung nhp cui cng c to ra: 1. RI=0, v 2. Hoc SM2=0, hoc bit STOP nhn c =1 Nu mt trong hai iu kin ny khng c tho mn, th Byte tin nhn c s b mt v RI cng khng c xc lp. Nu c 2 iu kin c tho mn, th bit dng chuyn vo RB8, 8 bit d liu chuyn vo SBUF, v RI c kch hot. Ti thi im ny, bt k cc iu kin trn c tho mn hay khng, th khi iu khin vn quay tr li tip tc chc nng pht hin t bin mi t 1 v 0 trn ng thu tin RxD.
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iu Khin Hnh 2.23. t li thi gian cho AT89C51 Tn hiu khi ng li bn ngoi a vo chn RST khng ng b vi xung Clock bn trong. Chn RST c ly mu ti thi im P2S5 ca mi chu k my. Cc chn ca cng s gi hot ng hin hnh ca chng cho 19 chu k dao ng sau khi gi tr logic 1 c ly mu chn RST. Trong khi chn RST mc cao, ALE v /PSEN c y dn ln mc cao. Sau RST c y xung, n s gi 1 n 2 chu k my i vi ALE v /PSEN khi ng xung Clock. V l do ny m cc dch v khc(a t ngoi vo) khng th ng b c vi b thi gian bn trong ca AT89C51. Khi Reset c hiu lc th gi tr ca cc SFR, c m t (Table -Reset Values of SFRs ). Trong thanh ghi SBUF, v mt s bit ca PCON, T2MOD, IE, IP c gi tr bt nh. Cc cht cng t P0P3 c gi tr FFh, SP c gi tr 07h. Cc thanh ghi cn li c gi tr 00h. Ring i vi RAM bn trong On-chip AT89S8252 khi cp ngun hay Reset li khng b tc ng, m ni dung trong RAM c gi tr ngu nhin. Khi ng li cho On-chip c th hot ng trng thi t ng hoc bn t ng .
72
i hc spkt hng yn
iu Khin
Hnh 2.25. Khi ng bn t ng cho AT89C51. Khi ng t ng c th c to ra khi cp ngun in +Vcc cho on-chip bng mch in RC. Sau khi cp ngun, mch RC gi cho chn RST trng thI cao trong thi gian tu thuc vo hng s thi gian ca mch RC. m bo khi ng c on-chip, thi gian chn RST trng thi cao phi ln (Khong Bch Hng Trng 24-10-2003
73
i hc spkt hng yn
iu Khin ln hn 2 chu k my) mch dao ng chuyn sang trng thi dao ng n nh Nu khi ng bn t ng, sau khi cp ngun mch s t ng Reset nh khi ng t ng. Khi cn khi ng li phi nhn cng tc thng ngt K, thi gian nhn cng tc chn RST phi trng thi cao.
74
i hc spkt hng yn
iu Khin
Ch gim
75
i hc spkt hng yn
iu Khin
Kho b nh chng trnh cho h VK AT89C51: Ch 1 2 LB1 U P LB2 U U LB3 U U Loi bo v Khng c c trng kho chng trnh. Cc lnh MOVC c thc thi t b nh chng trnh ngoi, khng c php tm np lnh t b nh ni. EA c ly mu v cht khi reset. Vic lp trnh trn Flash b cm. Nh ch 2, ngoi ra cn cm vic kim tra chng trnh. Nh ch 3, ngoi ra cn cm vic
76
U P
i hc spkt hng yn
i hc spkt hng yn
iu Khin + Dest: Ton hng ch, c th l Rn hoc direct hoc @Ri. + #Data: Hng s 8 bit cha trong lnh. + #Data16: Hng s 16 bit cha trong lnh. + Bit: Bit c nh a ch trc tip trong RAM ni tr hoc SFR. + Rel: Offset 8 bit c du (t -128 n +127). N c lnh SJMP v cc lnh nhy c iu kin s dng. + Addr11: a ch 11 bit ca b nh chng trnh , c lnh ACALL v AJMP s dng. + Addr16: a ch 16 bit ca 64Kb b nh chng trnh, c lnh LCALL v LJMP s dng.
ngha
c thay th bi Ni dung ca D liu c tr bi 1 trong 8 thanh ghi (R0-R7) ca cc bng thanh ghi Cc bit d liu Cc bit a ch a ch ca 1 bit nh a ch gin tip thng qua R0 hoc R1 a ch tng i 8 bit
3.1. Nhm lnh di chuyn d liu 3.1.1. Lnh MOV dng Byte:
C php cu lnh: MOV <dest-byte>, <src-byte> Chc nng: Sao chp ni dung ca ton hng ngun vo ton hng ch, ni dung ca ton hng ngun khng thay i. Lnh ny khng lm nh hng ti cc c v cc thanh ghi khc. Bch Hng Trng 24-10-2003
78
i hc spkt hng yn
iu Khin Cu lnh S by te 1 2 1 2 1 2 2 2
MOV A, Rn MOV A, direct MOV A, @Ri MOV A, #data MOV Rn, A MOV Rn, direct MOV Rn, #data MOV direct, A
11101rrr 11100101 aaaaaaaa 1110111i 01110100 dddddddd 11111rrr 10101rrr aaaaaaaa 01111rrr dddddddd 11110101 aaaaaaaa M lnh
Cu lnh
S by te 2
S chu k 2 2
Hot ng
direct, 3
2 2
direct, 3
1 2
1 2 1
10001rrr aaaaaaaa 10000101 aaaaaaaa aaaaaaaa 1000011i aaaaaaaa 01110101 aaaaaaaa dddddddd 1111011i 1010011i 0111011i dddddddd
79
i hc spkt hng yn
iu Khin
(C)<-(bit) (bit)<-(C)
MOV DPTR,#data16
i hc spkt hng yn
iu Khin s 16 bit (c th l DPTR hoc PC - thanh ghi m chng trnh). Trong trng hp sau, PC c tng tr n a ch ca lnh tip theo ((PC)<-(PC+1)) trc khi c cng vi ni dung ca thanh ghi A, cn thanh ghi DPTR khng b thay i. Lnh khng nh hng ti cc c. Cu lnh S by te 1 1 S chu k 2 2 M lnh Hot ng
10010011 10000011
i hc spkt hng yn
PUSH direct
11000000 aaaaaaaa
(SP)<-(SP+1) ((SP))<(direct)
POP direct
11010000 aaaaaaaa
(direct)<((SP)) (SP)<-(SP-1)
i hc spkt hng yn
iu Khin C php cu lnh: XCH A, <byte> Chc nng: Hon chuyn ni dung gia thanh ghi A vi thanh ghi hoc b nh c a ch cha trong ton hng th 2 ca cu lnh. Ton hng th 2 c th c nh a ch kiu thanh ghi, thanh ghi trc tip hoc thanh ghi gin tip. Cu lnh S by te 1 2 1 S chu k 1 1 1 M lnh Hot ng
XCHD A, @Ri
(A3-A0)<-->((Ri3-Ri0))
3.2. Nhm lnh tnh ton s hc. 3.2.1. Lnh thc hin php cng.
C php ca cu lnh: ADD A, <scr-byte> Chc nng: Cng gi tr 1 byte a ch c ch ra cu lnh vi ni dung trong thanh ghi tch lu, kt qu c lu vo thanh ghi tch lu. Nu c nh t bit s 7 hoc bit s 3 th 83 Bch Hng Trng 24-10-2003
i hc spkt hng yn
iu Khin c nh hoc c nh ph c thit lp, ngc li cc c nu trn c xo. Khi cng 2 s nguyn khng du m b trn th c nh cng c thit lp cho ta bit php ton b trn. Trng hp thc hin lnh ADD m c nh t bit s 6 nhng khng c nh t bit s 7, hoc c nh t bit s 7 nhng khng c nh t bit s 6 th c trn s c thit lp, ngc li th OV b xo. Khi cng 2 s nguyn c du m tng l 1 s m th OV c thit lp. Cu lnh S byt e 1 2 1 2 S chu k 1 1 1 1 M lnh Hot ng
M lnh
Hot ng
i hc spkt hng yn
Gio trnh: K thut Vi 1 1 00110rr r 001101 01 aaaaaaa a 001101 1i 001101 00 dddddd dd (A)<- (A) + (C) + (Rn) (A)<- (A) + (C) + (direct)
1 2
1 1
1 2
1 1
(A)<- (A) - (C) - (Rn) (A)<- (A) - (C) (direct) (A)<- (A) - (C) - ((Ri)) (A)<- (A) - (C) #data
i hc spkt hng yn
iu Khin
INC @Ri
i hc spkt hng yn
iu Khin
DEC @Ri
INC DPTR
1010001 1
(DPTR)<- (DPTR) + 1
DIV AB
i hc spkt hng yn
iu Khin Chc nng: Chia s nguyn khng du 8 bit trong thanh ghi tch lu cho s nguyn khng du 8 bit trong thanh ghi B. Thng s c lu trong thanh ghi tch lu, cn s d c lu trong thanh ghi B. C trn v c nh b xo. Cu lnh DIV AB S byte 1 S chu k 4 M lnh 100001 00 Hot ng (A)<- thng ca (A)/(B) (B)<- s d ca (A)/(B)
i hc spkt hng yn
iu Khin
ANL A, Rn ANL A, direct ANL A, @Ri ANL A, #data ANL direct, A ANL #data direct,
01011rrr 01010101 aaaaaaaa 0101011i 01010100 dddddddd 01010010 aaaaaaaa 01010011 aaaaaaaa dddddddd
(A)<-(A) AND (Rn) (A)<-(A) AND (dir.) (A)<- (A) AND ((Ri)) (A)<- (A) AND #data (dir.)<-(dir.)AND (A) (dir.)<(dir.)AND# data
i hc spkt hng yn
iu Khin khng b thay i bi thao tc ly b . Lnh ny khng lm nh hng ti trng thi cc c khc. Ton hng ngun ch c s dng kiu nh a ch trc tip.
Cu lnh
S byt e 2 2
S chu k 2 2
M lnh
Hot ng
i hc spkt hng yn
Gio trnh: K thut Vi 1 1 2 01000100 dddddddd 01000010 aaaaaaaa 01000011 aaaaaaaa dddddddd (A)<(A) #data (dir.)<-(dir.) (A) (dir.)<(dir.) #data OR OR OR
i hc spkt hng yn
iu Khin
Cu lnh
XRL A, Rn XRL A, direct XRL A, @Ri XRL A, #data XRL direct, A XRL #data direct,
S by te 1 2 1 2 2 3
S chu k 1 1 1 1 1 2
M lnh
Hot ng
01101rrr 01100101 aaaaaaaa 0110011i 01100100 dddddddd 01100010 aaaaaaaa 01100011 aaaaaaaa dddddddd
(A)<-(A) XOR (Rn) (A)<-(A) XOR (dir.) (A)<- (A) XOR ((Ri)) (A)<- (A) XOR #data (dir.)<-(dir.)XOR (A) (dir.)<(dir.) XOR #data
RL A
Hot ng
i hc spkt hng yn
iu Khin te 1
RLC A
001100 11
RR
RRC A
SWAP
i hc spkt hng yn
iu Khin Chc nng: Tro i ni dung 2 na thp v cao (mi na 4 bit) ca thanh ghi A (cc bit t 0 n 3 v cc bit t 4 n 7). Thao tc ny cn c hiu l quay thanh ghi A 4 bit. Cc c khng b nh hng.
Cu lnh
SWAP
S by te 1
S chu k 1
M lnh 110001 00
Hot ng
ACALL addr11
aaa1000 (PC) <- (PC) + 2 1 (SP) <- (SP) + 1 aaaaaaaa ((SP)) <- (PC7-PC0)
94
i hc spkt hng yn
Gio trnh: K thut Vi (SP) <- (SP) + 1 ((SP)) <- (PC15-PC8) (PC10-PC0) <- (page address)
iu Khin
S by te LCALL addr16 3
Cu lnh
S chu k 2
M lnh
Hot ng
(PC) <- (PC) + 3 (SP) <- (SP) + 1 ((SP)) <- (PC7PC0) (SP) <- (SP) + 1 ((SP)) <- (PC15PC8) (PC) <- addr15addr0
RET
i hc spkt hng yn
iu Khin Chc nng: Tr v t chng trnh con. Lnh ny c thc hin sau khi thc hin xong lnh ACALL hoc LCALL. RET ly li byte cao v byte thp ca PC t ngn xp, gim SP I 2 n v. Chng trnh tip tc c thc hin vi lnh c a ch trong PC. Cc c khng b nh hng. Cu lnh S by te 1 S chu k 2 M lnh Hot ng
RET
00100010
(PC15-PC8) <((SP)) (SP) <- (SP) - 1 (PC7-PC0) <((SP)) (SP) <- (SP) - 1
RETI
00110010
(PC15-PC8) <((SP)) (SP) <- (SP) - 1 (PC7-PC0) <((SP)) (SP) <- (SP) - 1
i hc spkt hng yn
iu Khin C php cu lnh: JMP @A+DPTR Chc nng: Cng gi tr khng du 8 bit ca thanh ghi A vi con tr d liu 16 bit v np kt qu vo b m chng trnh, kt qu ny chnh l a ch np lnh k tip. Vic cng 16 bit c thc hin: S nh t 8 bit thp c truyn n tt c cc bit cao. C 2, thanh ghi A v DPTR u khng b thay i. Lnh ny khng nh hng ti trng thi cc c. Cu lnh S by te 1 S chu k 2 M lnh Hot ng
JMP @A+DPTR
01110011
(PC)<-(A)+ (DPTR)
JB bit, rel
i hc spkt hng yn
iu Khin hin lnh tip theo. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 3 ca lnh vi ni dung trong PC (sau khi c tng n a ch ca byte u tin ca lnh k tip). Bit c kim tra khng b thay i, lnh khng nh hng ti cc c.
Cu lnh
S by te 3
S chu k 2
M lnh
Hot ng
i hc spkt hng yn
iu Khin C php cu lnh: JC rel Chc nng: Nu c CF c gi tr bng 1 th n nhy ti a ch xc nh trong cu lnh v xo bit ny, ngc li n s tip tc thc hin lnh tip theo. a ch ch c tnh bng cch cng thm lch c du (tng i) trong byte th 2 ca lnh vi ni dung trong PC (sau khi c tng bi 2). Lnh khng nh hng ti cc c. Cu lnh S by te 2 S chu k 2 M lnh Hot ng
JC rel
01000000 eeeeeeee
JNC rel
01010000 eeeeeeee
99
i hc spkt hng yn
iu Khin
JZ rel
01100000 eeeeeeee
JNZ rel
01110000 eeeeeeee
100
i hc spkt hng yn
iu Khin
CJNE rel
Rn, #data,
10111r rr
101
(PC)<-(PC)+3 Nu (A) < > (dir.) th: (PC)<- (PC) + offset Nu (A) < (dir.) th: (C) <- 1, ngc li: (C) <- 0 (PC)<-(PC)+3 Nu (A) < > #data th: (PC)<- (PC) + offset Nu (A) < #data th: (C) <- 1, ngc li: (C) <- 0 (PC)<-(PC)+3 Nu (Rn)< >#data
i hc spkt hng yn
Gio trnh: K thut Vi dddddd th: dd (PC)<- (PC) + offset eeeeee Nu (Rn) < #data ee th: (C) <- 1, ngc li: (C) <- 0
iu Khin
Cu lnh
S chu k 2
Hot ng
(PC)<-(PC)+3 Nu ((Ri))< >#data th: (PC)<- (PC) + offset Nu ((Ri)) < #data th: (C) <- 1, ngc li: (C) <- 0
Hot ng
(PC)<-(PC)+2
i hc spkt hng yn
Gio trnh: K thut Vi rr (Rn)<- (Rn) - 1 eeeeee Nu (Rn) < > 0 th: ee (PC) <- (PC) + rel 110101 (PC)<-(PC)+2 01 (dir.)<- (dir.) - 1 aaaaaa Nu (dir.) < > 0 th: aa (PC) <- (PC) + rel eeeeee ee
iu Khin
NOP
(PC)<-(PC)+2
11000011 11000010
103
i hc spkt hng yn
iu Khin
10110011
104
i hc spkt hng yn
CPL A
11110100
ki
/c
Thi
i hc spkt hng yn
Gio trnh: K thut Vi u Gin tip x x x vi x vi h Than h ghi x x x A x DPTR A x A&B A&B A h Tc thi x x x gian Thc hin( us) 1 1 1 1 1 2 1 1 4 4 1
iu Khin
Trc tip ADD A,<byte> ADDC A,<byte> SUBB A,<byte> INC A INC <byte> INC DPTR A = A + <byte> x A = A + <byte> x +C A = A - <byte> x A=A+1 <byte> = <byte>+1 DPTR = DPTR + 1 A=A-1 <byte> = <byte>+1 BA = A*B A=Int(A/B); B=Mode(A/B) Hiu chnh s thp phn Ch x Ch
Ch vi x x Ch Ch Ch vi vi vi
MOV A,<scr> A = <scr> x MOV <dest> = A x <dest>,A MOV <dest> = x <dest>,<scr> <scr> MOV DPTR = h/s <DPTR>, tc thi 16 bit #data 16 106 Bch Hng Trng 24-10-2003
i hc spkt hng yn
iu Khin PUSH <scr> INC SP; x Mov @SP, <scr> POP <dest> Mov x <dest>,@SP ;DEC SP XCH i d liu x a,<byte> gia A&byte XCHD A,@Ri i na bit thp gia A&@Ri
A=A AND x <byte> <byte>= ANL <byte>,A x <byte> AND A <byte>= ANL <byte> AND x <byte>,#data #data A=A OR ORL A, <byte> x <byte> <byte>= ORL <byte>,A x <byte> OR A <byte>= ORL <byte> OR x <byte>,#data #data A=A XOR XRL A, <byte> x <byte> <byte>= XRL <byte>,A x <byte> XOR A XRL <byte>= x 107 Bch Hng Trng 24-10-2003 ANL A,<byte>
i hc spkt hng yn
iu Khin <byte>,#data CLR CPL RL RLC RR RRC A A A A A A <byte> XOR #data A = 00h A = NOT A Dch A sang tri 1 bit Dch A sang tri thng qua C Dch A sang phi 1 bit Dch A sang phi thng qua C i na bit trong A
Ch Ch Ch Ch Ch Ch Ch
vi vi vi vi vi vi vi
A A A A A A A
1 1 1 1 1 1 1
SWAP A
Bng 4. Cc lnh i s:
Thi gian Thc hin(us) 2 2 2 2 1 2 1 1 1 1 1 1 2
Cu lnh ANL ANL ORL ORL MOV MOV CLR CLR SETB SETB CPL CPL JC C,bit C,/bit C,bit C,/bit C,bit bit,C C bit C bit C bit rel
Chc nng C = C AND bit C = C AND NOT bit C = C ORL bit C = C ORL NOT bit C = bit Bit = C C=0 Bit = 0 C=1 Bit = 1 C = NOT C Bit = NOT bit Nhy nu C = 1
108
i hc spkt hng yn
iu Khin JNC JB JNB JBC rel bit,rel bit,rel bit,rel Nhy nu C = 0 Nhy nu bit = 1 Nhy nu bit = 0 Nhy nu bit=1, sau xo bit
Th.gian Chc nng thc hin (us) c RAM ngoi ti @Ri 2 Ghi vo RAM ngoi ti @Ri 2 c RAM ngoi ti @DPTR 2 Ghi vo RAM ngoi ti @DPTR 2
i hc spkt hng yn
Nhy ti addr. Nhy ti A+DPTR. Gi C.trnh con ti addr. Quay tr v t C.trnh con. Quay tr v t ngt.
JZ rel JNZ rel DJNZ <byte>,rel CJNE A,<byte>,rel CJNE <byte>,#data ,rel
Nhy nu A=0 Nhy nu A0 Gim & nhy nu 0 Nhy nu A <byte> Nhy nu <byte> #data
x x
Ch vi A Ch vi A x x x x
Ph lc B : cc h thng s
1. Bng chuyn i h thp phn / nh phn. H H nh H H nh thp phn thp phn phn phn 0 00000000 32 00100000 Bch Hng Trng 24-10-2003
110
i hc spkt hng yn
iu Khin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 . . . . . . . . . . . . . 31 00000001 00000010 00000011 00000100 00000101 00000110 00000111 00001000 00001001 00001010 00001011 00001100 00001101 00001110 00001111 00010000 00010001
00011111
11111110 11111111
2. bng M thp lc phn: H thp phn 0 1 2 3 Bch Hng Trng 24-10-2003 H nh phn 0000 0001 0010 0011
111
H thp lc phn 0 1 2 3
i hc spkt hng yn
Gio trnh: K thut Vi 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 4 5 6 7 8 9 A B C D E F
iu Khin 4 5 6 7 8 9 10 11 12 13 14 15
3. H thng s c du: H nh phn 0111 1111 0111 1110 0111 1101 . . . 0001 0000 Bch Hng Trng 24-10-2003 H thp lc phn 7F 7E 7D . . . 10
112
i hc spkt hng yn
iu Khin 0000 1111 . . . . 0000 0010 0000 0001 0000 0000 1111 1111 1111 1110 1111 1101 . . . 1001 0000 1000 1111 . . . . . 1000 0010 1000 0001 1000 0000
1. The 8051 Microcontroller - I. Scott Mackenzie. 2. The MCS*51 Microcontroller Family Users Manuel - INTEL 1994. 3. The AT89 Family of Microcontrollers - ATMEL - 2003. 4. Microcomputer Components SAB80C515 8 bit Single-chip Microcontroller Family - SIEMENS - 1995. 5. Mikrocomputertechnik Prof.Dr.Ing. G.Schnell Fachhochschule Frankfurt am Main - 2001. Bch Hng Trng 24-10-2003
113
i hc spkt hng yn
iu Khin 6. K thut Vi x l - Vn Th Minh - NXB GD - 1997. 7. K thut VXL & lp trnh ASSEMBLY cho h VXL - Xun Tin NXB KH&KT - 2001. 8. H VK 8051 - Tng Vn On & Hong c Hi - NXB LXH 2001
114