Blackfin A V EZ Extender Manual Rev. 2.0

Blackfin A-V EZ-Extender Manual
Revision 2.0, April 2006 Part Number 82-000870-01
Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106
Copyright Information
2006 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA.
Limited Warranty
The A-V EZ-Extender is warranted against defects in materials and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer.
Disclaimer
Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc.
Trademark and Service Mark Notice

The Analog Devices logo, Blackfin, VisualDSP++, EZ-KIT Lite, and EZ-Extender are registered trademarks of Analog Devices, Inc. All other brand and product names are trademarks or service marks of their respective owners.
Regulatory Compliance
The Blackfin A-V EZ-Extender has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the CE mark. The Blackfin A-V EZ-Extender had been appended to Analog Devices Development Tools Technical Construction File referenced DSPTOOLS1 dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body and is on file.
The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package.
CONTENTS
PREFACE
Product Overview ........................................................................... ix Purpose of This Manual .................................................................. xi Intended Audience .......................................................................... xi Manual Contents ........................................................................... xii Whats New in This Manual ........................................................... xii Technical or Customer Support ..................................................... xiii Supported Products ....................................................................... xiii Product Information ...................................................................... xiv Related Documents .................................................................. xiv Notation Conventions .................................................................... xvi
A-V EZ-EXTENDER INTERFACES

A-V EZ-Extender Setup ................................................................ 1-1 Analog Audio Interface .................................................................. 1-2 Analog Video Interface .................................................................. 1-3 Camera Module Interfaces ............................................................. 1-4 Flat Panel Display Interface ........................................................... 1-6
CONTENTS
A-V EZ-EXTENDER HARDWARE REFERENCE

System Architecture ...................................................................... 2-2 Jumpers ........................................................................................ 2-7 Video Test Loopback Jumpers (JP1.1/2, JP1.3/4, JP1.5/6) ....... 2-7 Connector Voltage Selection Jumper (JP2) ............................... 2-7 TWI Source Selection Jumpers (JP3.3/5/7, JP3.4/6/8) ............. 2-7 PDWN Connection Jumper (JP3.9/10) ................................... 2-9 Decoder HSYNC Disconnect Jumper (JP3.11/12) ................... 2-9 Decoder VSYNC Connection Jumper (JP3.13/14) ................... 2-9 Encoder HREF Connection Jumper (JP3.15/16) ................... 2-10 Encoder VSYNC Connection Jumper (JP3.17/18) ................. 2-10 Decoder Output Enable Jumper (JP3.19/20) ......................... 2-10 SNAPSHOT_FODD Disconnect Jumper (JP3.21/22) ........... 2-10 PPI Clock Setup Jumpers (JP4.1/2, JP4.3/4, JP4.5/6, JP4.7/8) 2-10 PPI0 D815 Enable Jumper (JP5.1/2) ................................... 2-11 VID_OUT Data Bus Control Jumpers (JP5.3/4, JP5.5/6) ...... 2-11 PPI0_SYNC1 Direction Setup Jumper (JP6.1/3/5) ................ 2-12 PPI0_SYNC2 Direction Setup Jumper (JP6.2/4/6) ................ 2-12 I2S Enable Jumper (JP7.1/2) ................................................. 2-13 SPORT Data Connection Jumpers (JP7.3/4, JP7.5/6) ............ 2-13 VID_OUT Bus SYNC Source Select Jumpers (JP8.1/3/5, JP8.2/4/6) 2-13 VID_OUT Bus SYNC Enable Jumper (JP8.7/8) .................... 2-13 AV_RESET Source Jumper (JP9.1/3/5) ................................. 2-14
vi
CONTENTS
PPI0_D Direction Setup Jumper (JP9.2/4/6) ......................... 2-14 Audio Loopback Jumpers (JP10.1/2, JP10.3/4) ...................... 2-14
A-V EXTENDER BILL OF MATERIALS A-V EZ-EXTENDER SCHEMATIC

Title Page .................................................................................... B-1 Expansion Interface (1 and 2) ....................................................... B-2 Expansion Interface (3) ................................................................ B-3 Data Routing ............................................................................... B-4 FS/CLK CONFIG ....................................................................... B-5 PPI0 Setup .................................................................................. B-6 Video Encoder (Out) ................................................................... B-7 Video Decoder (In) ...................................................................... B-8 Audio .......................................................................................... B-9 Audio Out (CH1) ...................................................................... B-10 Audio Out (CH2 and CH3) ....................................................... B-11 Audio In (CH1 and CH2) .......................................................... B-12
INDEX
vii
CONTENTS
viii
PREFACE
Thank you for purchasing the Blackfin A-V EZ-Extender, Analog Devices, Inc. (ADI) extension board to the EZ-KIT Lite evaluation system for ADSP-BF533, ADSP-BF537, and ADSP-BF561 Blackfin processors. The Blackfin processors are embedded processors that support a Media Instruction Set Computing (MISC) architecture. This architecture is the natural merging of RISC, media functions, and digital signal processing characteristics towards delivering signal processing performance in a microprocessor-like environment. The EZ-KIT Lite and A-V EZ-Extender are designed to be used in conjunction with the VisualDSP++ development environment. VisualDSP++ offers a powerful programming tool with new flexibility that significantly decreases the time required to port software code to a processor, reducing time-to-market. To learn more about Analog Devices development software, go to http://www.analog.com/processors/tools/.
Product Overview
The Blackfin A-V EZ-Extender is a separately sold extension board that plugs onto the expansion interface of the ADSP-BF533, ADSP-BF537, or ADSP-BF561 EZ-KIT Lite evaluation system. The extension board aids the design and prototyping phases of ADSP-BF533, ADSP-BF537, or ADSP-BF561 processor targeted applications.
ix
Product Overview
The board extends the capabilities of the evaluation system by providing a connection to a video decoder, a video encoder, multiple camera evaluation boards, a flat panel display, and a 3-stereo input channel, 2-stereo output channel audio codec. The following is a list of the Blackfin A-V EZ-Extender interfaces. Analog audio interface
D D
AD1836A Analog Devices 96 kHz audio codec five 3.5 mm audio jacks, stacked in one connector
Analog video interface

D D
ADV7183B video decoder with three input RCA phono jacks ADV7179 video encoder with three output RCA phono jacks
OmniVision camera module interface

D
Connection to OmniVision camera evaluation modules, for example: OV6630AA 32-pin, right angle, 0.1 in. spacing, female socket
Micron camera module interface

D
Connection to Micron camera evaluation modules, for example: MT9V022 26-pin, right angle, 0.1 in. spacing, female socket
Kodak camera module interface

D
Connection to Kodak camera evaluation modules, for example: KAC-9628 28-pin, right angle, 0.1 in. spacing, female socket
Preface
Flat panel display interface (FPDI)

D D
Connection to flat panel displays, for example, NL6448BC20-08E DF9B-31S-1V connector
Before using any of the interfaces, follow the setup procedure in A-V EZ-Extender Setup on page 1-1. Example programs are available to demonstrate the capabilities of the Blackfin A-V EZ-Extender board.
Purpose of This Manual

The Blackfin A-V EZ-Extender Manual describes the operation and configuration of the components on the extension board. A schematic and a bill of materials are provided as a reference for future Blackfin processor board designs.
Intended Audience
This manual is a users guide and reference to the Blackfin A-V EZ-Extender. Programmers who are familiar with the Analog Devices Blackfin processor architecture, operation, and development tools are the primary audience for this manual. Programmers who are unfamiliar with VisualDSP++ or EZ-KIT Lite evaluation software should refer to the ADSP-BF533, ADSP-BF537, or ADSP-BF561 Evaluation System Manual, VisualDSP++ online Help, and users or getting started guides. For the locations of these documents, refer to Related Documents.
xi
Manual Contents
Manual Contents
The manual consists of: Chapter 1, A-V EZ-Extender Interfaces on page 1-1 Provides basic board information. Chapter 2, A-V EZ-Extender Hardware Reference on page 2-1 Provides information on the hardware aspects of the board. Appendix A, A-V Extender Bill Of Materials on page A-1 Provides a list of components used to manufacture the EZ-Extender board. Appendix B, A-V EZ-Extender Schematic on page B-1 Provides the resources to allow EZ-KIT Lite board-level debugging or to use as a reference design. B now is part of the online Help. The PDF version of L Appendix the Blackfin A-V EZ-Extender Manual is located in the
Lite Manuals folder on the installation CD. Alternatively, the schematics can be found on the Analog Devices Web site, www.analog.com/processors. Docs\EZ-KIT
Whats New in This Manual

This edition of the Blackfin A-V EZ-Extender Manual has been updated for the latest revision of VisualDSP++.
xii
Preface
Technical or Customer Support

You can reach Analog Devices, Inc. Customer Support in the following ways: Visit the Embedded Processing and DSP products Web site at
http://www.analog.com/processors/technicalSupport
E-mail tools questions to

processor.tools.support@analog.com
E-mail processor questions to

processor.support@analog.com (World wide support) processor.europe@analog.com (Europe support) processor.china@analog.com (China support)
Phone questions to 1-800-ANALOGD Contact your Analog Devices, Inc. local sales office or authorized distributor Send questions by mail to:
Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA
Supported Products
The Blackfin A-V EZ-Extender is designed as an extension board to the ADSP-BF533, ADSP-BF537, and ADSP-BF561 EZ-KIT Lite evaluation systems.
xiii
Product Information
Product Information
You can obtain product information from the Analog Devices Web site, from the product CD-ROM, or from the printed publications (manuals). Analog Devices is online at http://www.analog.com. Our Web site provides information about a broad range of productsanalog integrated circuits, amplifiers, converters, and digital signal processors.
Related Documents
For information on product related development software, see the following publications. Table 1. Related Processor Publications
Title ADSP-BF533 Embedded Processor Datasheet ADSP-BF536/ADSP-BF537 Embedded Processor Datasheet ASP-BF561 Blackfin Embedded Symmetric Multi-Processor Datasheet Description General functional description, pinout, and timing.
ADSP-BF533 Blackfin Processor Hard- Description of internal processor architecture ware Reference and all register functions ADSP-BF537 Blackfin Processor Hardware Reference ASP-BF561 Blackfin Processor Hardware Reference Description of all allowed processor assembly instructions.
Blackfin Processor Instruction Set Reference
xiv
Preface
Table 2. Related VisualDSP++ Publications

Title ADSP-BF533 EZ-KIT Lite Evaluation System Manual ADSP-BF537 EZ-KIT Lite Evaluation System Manual ADSP-BF561 EZ-KIT Lite Evaluation System Manual Description Description of the EZ-KIT Lite features and usage. Note: For the ADSP-BF537 EZ-KIT Lite, there is additional Getting Started with ADSP-BF537 EZ-KIT Lite. Description of VisualDSP++ features and usage Description of the assembler function and commands Description of the complier function and commands for Blackfin processors Description of the linker function and commands Description of the loader function and commands
VisualDSP++ Users Guide VisualDSP++ Assembler and Preprocessor Manual VisualDSP++ C/C++ Complier and Library Manual for Blackfin Processors VisualDSP++ Linker and Utilities Manual VisualDSP++ Loader and Utilities Manual
All documentation is available online. Most documentation is available in printed form. Visit the Technical Library Web site to access all processor and tools manuals and data sheets: http://www.analog.com/processors/resources/technicalLibrary.
xv
Notation Conventions
Text conventions used in this manual are identified and described as follows.
Example Close command (File menu)
{this | that}
Description Titles in reference sections indicate the location of an item within the VisualDSP++ environments menu system (for example, the Close command appears on the File menu). Alternative required items in syntax descriptions appear within curly brackets and separated by vertical bars; read the example as this or that. One or the other is required. Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that. Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipse; read the example as an optional comma-separated list of this. Commands, directives, keywords, and feature names are in text with letter gothic font. Non-keyword placeholders appear in text with italic style format. Note: For correct operation, ... A Note provides supplementary information on a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: Incorrect device operation may result if ... Caution: Device damage may result if ... A Caution identifies conditions or inappropriate usage of the product that could lead to undesirable results or product damage. In the online version of this book, the word Caution appears instead of this symbol. Warning: Injury to device users may result if ... A Warning identifies conditions or inappropriate usage of the product that could lead to conditions that are potentially hazardous for the devices users. In the online version of this book, the word Warning appears instead of this symbol.
[this | that]
[this,]
.SECTION
filename
L a [
xvi
Preface
conventions, which apply only to specific chapters, may L Additional appear throughout this document.
xvii
xviii
1 A-V EZ-EXTENDER INTERFACES
This chapter provides a setup procedure for the Blackfin A-V EZ-Extender, an EZ-KIT Lite (ADSP-BF533, ADSP-BF537 or ADSP-BF561), and an evaluation module. The chapter also describes each of the evaluation interfaces the extender supports. The information is presented in the following order. A-V EZ-Extender Setup on page 1-1 Analog Audio Interface on page 1-2 Analog Video Interface on page 1-3 Camera Module Interfaces on page 1-4 Flat Panel Display Interface on page 1-6
A-V EZ-Extender Setup

It is very important to set up all of the components of the system containing the A-V EZ-Extender before applying power to that system. Power your system when these steps are completed: 1. Read the applicable design interface section in this chapterthe text provides an overview of the capabilities of the interface. 2. Read System Architecture on page 2-2 to understand the physical connections of the extension board. For detailed information, refer to A-V EZ-Extender Schematic on page B-1. Blackfin A-V EZ-Extender Manual 1-1
Analog Audio Interface
3. Set the jumpers on the A-V EZ-Extender board. Use the block diagram in Figure 2-1 on page 2-3 in conjunction with Jumpers on page 2-7. 4. Set the switches and jumpers on the EZ-KIT Lite board. If not already, familiarize yourself with the documentation and schematics of the EZ-KIT Lite (see Related Documents). Compare the expansion interface signals of the A-V EZ-Extender board with the signals of the EZ-KIT Lite board to ensure there is no contention. For example, it may be necessary to disable other devices connected to the parallel peripheral interface (PPI) of the processor, change the routing of the PPI clocks and disable the push buttons. 5. Configure any other interfacing boards, for example, another EZ-Extender or camera evaluation board.
Analog Audio Interface

For an audio application, the Blackfin A-V EZ-Extender uses the AD1836A multichannel 96 kHz audio codec. The AD1836A is a high-performance single-chip codec that provides three stereo digital-to-analog converters (outputs) and two stereo analog-to-digital converters (inputs) using ADIs patented multi-bit sigma-delta architecture. The board includes a serial peripheral interface (SPI) port, allowing the processor to adjust volume and other parameters. For a general overview of the audio interface connections, see Figure 2-1 on page 2-3. For more detailed information, see A-V EZ-Extender Schematic on page B-1. of the expansion interface interfaces with the serial port of the AD1836A codec. The processor is capable of transferring data to the audio codec in time-division multiplexed (TDM) or I2S mode. The I2S mode allows the codec to operate at a 96 kHz sample rate but allows only two channels of output. TDM mode can operate at a maximum of 48 kHz
SPORT0
1-2
A-V EZ-Extender Interfaces
sample rate but allows simultaneous use of all input and output channels. To operate in I2S mode, the JP7.1/2 jumper must be installed. For more information, see I2S Enable Jumper (JP7.1/2) on page 2-13. The internal registers of the AD1836A audio codec can be programmed via the SPI port of the processor. (For information on how to program the configuration registers, refer to the AD1836A datasheet.) The AD1836A codec reset comes either from a flag pin located at PPI1_D11 of the expansion interface or from the EZ-KIT Lite reset signal. For information on how to configure the reset, see AV_RESET Source Jumper (JP9.1/3/5) on page 2-14. Before using the interface, follow the steps in A-V EZ-Extender Setup on page 1-1. Example programs demonstrating the capabilities of the audio interface are included in the A-V EZ-Extender installation directory. For more information about AD1836A, go to http://www.analog.com and search for AD1836A.
Analog Video Interface

The Blackfin A-V EZ-Extender supports video input and output applications with an on-board video encoder and decoder. The ADV7179 video encoder provides up to three output channels of analog video, while the ADV7183B video decoder provides up to three input channels of analog video. Both the encoder and the decoder connect to the PPI0 of the expansion interface, while the encoder also can connect to the PPI1 (if the processor has two PPI ports). For a general overview of the analog video interface connectors, see Figure 2-1 on page 2-3. For more detailed information, see A-V EZ-Extender Schematic on page B-1.
1-3
Camera Module Interfaces
To use ADV7179 and ADV7183B, set up all of the jumpers related to the PPI data signals, frame sync signals, and clock signal. To program the internal register of the video devices, configure the two-wire interface signals (see TWI Source Selection Jumpers (JP3.3/5/7, JP3.4/6/8) on page 2-7). Finally, determine the source of the encoder or decoder reset (see AV_RESET Source Jumper (JP9.1/3/5) on page 2-14.) Before using the interface, follow the steps in A-V EZ-Extender Setup on page 1-1. Example programs demonstrating the capabilities of the analog video interface are included in the A-V EZ-Extender installation directory. For more information about ADV7179 and ADV7183B, go to http://www.analog.com and search for ADV7179 or ADV7183B.
Camera Module Interfaces

The Blackfin A-V EZ-Extender has three right-angle connectors (J4, J6, and P4) with the control signals necessary to interface with three different manufactures camera evaluation modules. For a general overview of the camera module interface connections, see Figure 2-1 on page 2-4. For more detailed information, see A-V EZ-Extender Schematic on page B-1. Figure 1-1 shows the orientation of the camera modules, as each camera connects to the board. The J6 connector is designated for a Micron camera sensor evaluation module. The interface has been tested with the Micron MT9V022 camera evaluation module. For information about Micron camera sensors and evaluation boards, go to http://www.micron.com. The J4 connector is designated for an OmniVision camera sensor evaluation module. The interface has been tested with the OmniVision OV6630AA camera evaluation module. For information about OmniVision camera sensors and evaluation boards, go to http://www.ovt.com.
1-4
A-V EZ-Extender Interfaces
Figure 1-1. Camera Orientation The P4 connector is designated for a Kodak camera sensor evaluation module. The interface has been tested with the Kodak KAC-9628 camera evaluation module. For information about Kodak camera sensors and evaluation boards, go to http://www.kodak.com. To connect the A-V EZ-Extender to a camera module, first determine the source of the PPI clock. To learn about possible clock settings, refer to PPI Clock Setup Jumpers (JP4.1/2, JP4.3/4, JP4.5/6, JP4.7/8) on page 2-10. Then set the direction of the data and the frame sync signals, which depend upon the cameras configuration. The data must be set as an input to the PPI port. For more information, refer to System Architecture on page 2-2 and Jumpers on page 2-7. Before using these interfaces, follow the steps in A-V EZ-Extender Setup on page 1-1.
1-5
Flat Panel Display Interface
Example programs demonstrating the capabilities of the camera module interface are included in the A-V EZ-Extender installation directory.
Flat Panel Display Interface

The flat panel display interface (FPDI) consists of a 31-pin DB9 connector linked to the PPI port and frame sync signals of the processor. For a general overview of the display interface connections, see Figure 2-1 on page 2-4. For more detailed information, see the A-V EZ-Extender Schematic on page B-1. A timing and functional analysis is required to determine if a specific LCD module can connect to the Blackfin A-V EZ-Extender. An example of a display that can connect to the extender is the NEC NL6448BC20-08 display (http://www.ee.nec.de/). power for the backlight feature of the LCD module must be L The provided by the customer (use the backlight inverter recommended by the manufacturer). It is also necessary to purchase a cable to connect the A-V EZ-Extender to the display. An example of such a cable is FDC31/xxxxAFF03 from Axon Cable (http://www.axon-cable.com, part number FDC31/xxxxAFF03). Different length cables are available. Before using the interface, follow the steps in A-V EZ-Extender Setup on page 1-1. Example programs demonstrating the capabilities of the flat panel display interface are included in the A-V EZ-Extender installation directory.
1-6
2 A-V EZ-EXTENDER HARDWARE REFERENCE
This chapter describes the hardware design of the Blackfin A-V EZ-Extender. The following topics are covered. System Architecture on page 2-2 Describes the configuration of the extension board and explains how the board components interface with the processor and EZ-KIT Lite. Jumpers on page 2-7 Describes the function of the configuration jumpers.
2-1
System Architecture
System Architecture
A block diagram of the Blackfin A-V EZ-Extender is shown in Figure 2-1. Not shown in the diagram is the analog audio interface, which is a simple connection between the serial port of the processor and the AD1836A audio codec. The audio interface connects directly to SPORT0 of the expansion interface. In Figure 2-1, unidirectional buffers are show as triangle symbols, while bidirectional buffers are shown as two overlapping triangles. For both types of buffers, the output-enable signal comes out of the top and is active LOW. For the bidirectional buffers, a second signal for the direction is shown. When this net is pulled HIGH, the buffer is driving in the direction of the arrow in the center, when LOW, the buffer is driving in the opposite direction. applying power to the system, follow the steps in A-V L Before EZ-Extender Setup on page 1-1. Video interfaces can be split into two main signal sets: VID_IN and VID_OUT. Both signal sets consist of a 16-bit data bus, two frame sync signals, and data clock. VID_IN connects to the video decoder and all of the camera interfaces. VID_IN connects only to the PPI0 of the EZ-KIT Lite. VID_OUT connects to the video encoder and the flat panel display interface. On the expansion interface, VID_OUT connects to either the PPI0 or PPI1 of the EZ-KIT Lite. Table 2-1 summarizes the signals coming and going on the expansion interface connectors.
2-2
A-V EZ-Extender Hardware Reference
Figure 2-1. Block Diagram
2-3
System Architecture
Table 2-1. Signals of Expansion Interface Connectors

Net/Bus Name (Direction)
PPI0_D[0:15]
A-V EZ-Extender Function
Relevant Configuration Jumpers

JP5.3/4, JP9.2/4/6
(Bi)
Connects the processors PPI0 data pins to the or the VID_OUT_D[0:15] buses, depending on the jumper settings. This allows PPI0 to interface with all of the possible video interfaces on the board. This bus can be bidirectional; the direction can be fixed with a jumper or controlled by a flag pin.
VID_IN_D[0:15]
PPI0_CLK
(Output)
The clock related to the data on PPI0. This can come from an onboard oscillator, from one of the video interfaces, or from a socket that allows a user-supplied oscillator. The frame sync signal going to the processors
PPI0_SYNC1 pin. The signal behaves as the HSYNC or HREF for the video interfaces. The signal also can be used to drive the FPDI HS signal. The signal can be bidirec-
JP4.1/2, JP4.3/4, JP4.5/6, JP4.7/8 JP6.1/3/5, JP8.1/3/5, JP8.7/8
PPI0_SYNC1
(Bi)
tional, where the direction is fixed with a jumper or is controlled by a flag pin.
PPI0_SYNC2
The frame sync signal going to the processors

PPI0_SYNC2 pin. The signal behaves as the VSYNC or VREF for the video interfaces. The signal also can be used to drive the FPDI VS signal. This signal can be bidirec-
(Bi)
JP6.2/4/6, JP8.2/4/6, JP8.7/8
tional; the direction can be fixed with a jumper or is controlled by a flag pin.
PPI1_D[0:15]
(Bi)
VID_OUT_D[0:15]
Connects the processors PPI1 data pins to the bus. The VID_OUT_D[0:15] bus interfaces with the output video interfaces (FPDI and the video encoder). The bus can be bidirectional but intended to be an input. Changing the direction is necessary only for test purposes and allows PPI0 to loop-back to PPI1. D2, D3 and D10 of the bus have other functionality (follows).
JP5.3/4, JP5.5/6, JP3.9/10, JP3.3/5/7 JP3.4/6/8
PPI1_D10
(Bi)
Multifunction net that typically functions as the D10 pin of PPI1 but, with a jumper, also can connect to the PDWN input of the OmniVision and the Kodak camera interfaces.
JP3.9/10, JP5.3/4, JP5.5/6
2-4
Table 2-1. Signals of Expansion Interface Connectors (Contd)

PPI1_D2
(Bi)
PPI1
Multifunction net typically functions as the D2 pin of JP3.3/5/7, but also can function as the data signal for the pro- JP5.3/4, JP5.5/6 cessors two-wire interface (TWI). Used to program the internal configuration registers of most video interfaces. Multifunction net typically functions as the D2 pin of JP3.4/6/8, but also can function as the data signal for the pro- JP5.3/4, cessors TWI. Used to program the internal configuration JP5.5/6 registers of most video interfaces. In systems whose processor does not have a TWI, the sig- JP3.3/5/7 nal connects to one of the processors flag pins to emulate the data pin of the TWI and to configure the internal configure registers of most video interfaces. In systems whose processor does not have a TWI, the sig- JP3.4/6/8 nal connects to one of the processors flag pins to emulate the clock signal of the TWI and to configure the internal configure registers of most video interfaces.
PPI1_D3
(Bi)
PPI1
FLAG_SDA
(Bi)
FLAG_SCL_DIR_ CTRL
(Input)
PPI1_CLK
(Output)
The clock driving the EZ-KIT Lites PPI1 clock input. The source of this clock can be the PPI0_CLK, the onboard 27 MHz oscillator, or a socket accepting oscillators of other frequencies. The signal driven to the HS signal of the FPDI. The output going to the FPDI can be disabled by a jumper. The signal driven to the VS signal of the FPDI. The output going to the FPDI can be disabled by a jumper. Audio codec SPI slave select signal; also can connect to the SNAPSHOT input of the Kodak interface or the FODD output of the OmniVision interface. The SPI serial clock used to program the control register of AD1836A audio codec. The SPI serial output data signal used to program the control register of AD1836A audio codec.
JP4.1/2, JP4.3/4, JP4.5/6, JP4.7/8 JP8.1/3/5, JP8.7/8 JP8.2/4/6, JP8.7/8 JP3.21/22
PPI1_FS1
(Input)
PPI1_FS2
(Input)
SNAPSHOT_FODD _SSEL
(Bi)
SCK
(Input)
MOSI
(Output)
2-5
System Architecture
Table 2-1. Signals of Expansion Interface Connectors (Contd)

MISO
(Output)
RSCLK0
The SPI serial input data signal used to read the control register of the AD1836A audio codec. Processors SPORT0 receive clock signal connected to the serial clock on the digital side of the audio codec analog input. In I2S mode, the signal can connect to the TSCLK0 net. Processors SPORT0 receive frame sync signal connected to the frame sync on the digital side of the audio codec analog input. In I2S mode, the signal can connect to the TFS0 net. Connection to the data output of the audio codec; can be disconnected with a jumper if the signal is needed for another purpose. Secondary connection to the data output of the audio codec. Can be disconnected with a jumper if the signal is needed to be used for another purpose. Processors SPORT0 transmit clock signal; connects to the serial clock on the digital side of the audio codecs analog output. In I2S mode, the signal can connect to the RSCLK0 net. Processors SPORT0 transmit frame sync signal. Connects to the frame sync on the digital side of the audio codec analog output. In I2S mode, the signal can connect to the RFS0 net. Connection to the data input of the audio codec. Secondary connection to the data input of the audio codec.
JP7.1/2
(Bi)
RFS0
JP7.1/2
(Bi)
DR0PRI
JP7.3/4
(Output)
DR0SEC
JP7.5/6
(Output)
TSCLK0
JP7.1/2
(Bi)
TFS0
JP7.1/2
(Bi)
DT0PRI
(Input)
DT0SEC
(Input)
2-6
Jumpers
Before using the Blackfin A-V EZ-Extender, follow the steps in A-V EZ-Extender Setup on page 1-1. Figure 2-2 shows the locations of all of the jumper headers. The jumper headers are divided to show the placement and rotation of each jumper. The jumpers are described by the pins of the header on which the jumpers can be placed. For example, JP3.4/6/8 refers to a single jumper that can be placed across pins 4 and 6, or pins 6 and 8, of JP3. The dark pin indicates pin 1 of each header.
Video Test Loopback Jumpers (JP1.1/2, JP1.3/4, JP1.5/6)

For test purposes only, the video test jumpers loop-back the video encoders output signals to the video decoders input signals. By default, none of these jumpers is installed.
Connector Voltage Selection Jumper (JP2)

The camera module and LCD display interfaces can be powered via the extender. The actual voltage of these interfaces, 3.3V or 5V, is determined by the placement of the JP2 jumper (see Table 2-2).
TWI Source Selection Jumpers (JP3.3/5/7, JP3.4/6/8)

Due to the fact that some Blackfin processors feature a built-in two-wire interface (TWI), while others need to emulate the interface with programmable flags, two jumpers are provided to plug the A-V EZ-Extender to both sources (see Table 2-3).
2-7
Jumpers
Figure 2-2. Jumper Locations Table 2-2. Jumper Locations and Connector Voltages
Jumper Location
JP2.1/2 JP2.2/3
Connector Voltage 3.3V 5V No power
Not installed
2-8
Table 2-3. Jumper Locations and TWI Interface Sources

Jumper Pin Locations
JP3.3/5 JP3.5/7
TWI Interface Source Programmable flags Two-wire interface of the processor
and JP3.4/6 and JP3.6/8
PDWN Connection Jumper (JP3.9/10)

Depending on the application, the PDWN pin of the OmniVision and Kodak cameras can be left floating or can be controlled by a flag pin (see Table 2-4). Table 2-4. PWDN Pin Connections
JP3.9/10 Uninstalled Installed PDWN Connection
PDWN
is not used, and by default, the cameras function in standard mode.
The PDWN functionality of the cameras is controlled by a flag pin of the processor.
Decoder HSYNC Disconnect Jumper (JP3.11/12)

To connect the horizontal sync signal of the video decoder to the PPI0 frame sync signal of the processor, install the JP3.11/12 jumper; otherwise, the decoders horizontal sync is disconnected.
Decoder VSYNC Connection Jumper (JP3.13/14)

To connect the vertical sync signal of the video decoder to the PPI0 frame sync signal of the processor, install the JP3.13/14 jumper; otherwise, the decoders vertical sync is disconnected.
2-9
Jumpers
Encoder HREF Connection Jumper (JP3.15/16)

To connect the horizontal sync signal of the video encoder to the PPI0 frame sync signal of the processor, install the JP3.15/16 jumper; otherwise, the encoders horizontal reference is disconnected.
Encoder VSYNC Connection Jumper (JP3.17/18)

To connect the vertical sync signal of the video encoder to the PPI0 frame sync signal of the processor, install the JP3.17/18 jumper; otherwise, the encoders vertical sync is disconnected.
Decoder Output Enable Jumper (JP3.19/20)

When installed, the JP3.19/20 jumper enables the video decoders data output signals on the VID_IN bus.
SNAPSHOT_FODD Disconnect Jumper (JP3.21/22)

The SNAPSHOT_FODD net of the A-V EZ-Extender is a general-purpose flag pin. The flag pin connects to both the SNAPSHOT signal of the Kodak camera evaluation board and the FODD control signal of the OmniVision camera evaluation board. Do not install the jumper unless the processor needs to control the signals. The flag pin also connects to the SPI select pin of the AD1836A audio codecdo not install this jumper when the audio interfaces is in use.
PPI Clock Setup Jumpers (JP4.1/2, JP4.3/4, JP4.5/6, JP4.7/8)

The PPI_CLK signals of the PPI0 and PPI1 are set up using the clock setup jumpers. Table 2-5 shows the results of the jumper connections. For more information about the clock settings, refer to Figure 2-1 on page 2-4.
2-10
Table 2-5. PPI Clock Setup Jumper Results

Jumper
JP4.1/2
Result Connects EXT_VID_CLK to an onboard 27 MHz oscillator. For more information about the EXT_VID_CLK signal, see the description of JP4.3/4. Connects PPI0_CLK to the EXT_VID_CLK net. The EXT_VID_CLK net is the external clock, which drives the input clock of all the camera module interface connectors, plus the flat panel display connector. Depending on the installation of the other JP4 jumpers, EXT_VID_CLK can be generated by the PIXEL_CLK net, the VDEC_CLKOUT net, a socket (U8), or the onboard 27 MHz oscillator. Connects VDEC_CLKOUT to PPI0_CLK; VDEC_CLKOUT drives the PPI0 clock when the video decoder is used. Connects the PIXEL_CLK net, which is an output from the three camera module interfaces, to PPI0_CLK.
JP4.3/4
JP4.5/6
JP4.7/8
PPI0 D815 Enable Jumper (JP5.1/2)

The JP5.1/2 jumper, when not installed, disables the upper 8-bits of the PPI0 data bus. This allows the signals connected to the upper 8-bits of the PPI data bus on the EZ-KIT Lite to be used elsewhere. To disable and reuse the upper 8-bits of the VID_IN and PPI0 data busses, install the JP5.1/2 jumper.
VID_OUT Data Bus Control Jumpers (JP5.3/4, JP5.5/6)

The JP5.3/4 and JP5.5/6 jumpers are used together to set up the direction of, as well as to enable or disable, the drivers driving the VID_OUT data bus. Table 2-6 shows the results of different combinations of the JP5.3/4 and JP5.5/6 jumpers.
2-11
Jumpers
Table 2-6. Video Out Data Bus Control Jumper Combinations

JP5.3/4 Uninstalled Uninstalled Installed Installed JP5.5/6 Uninstalled Installed Uninstalled Installed VID_OUT Status
VID_OUT, PPI1 are all not the state of JP9.2/4/6 PPI1 PPI0 PPI0
driven; PPI0 depends on
drives VID_OUT drives VID_OUT
drives VID_OUT, and VID_OUT drives PPI1 (loopback mode)
PPI0_SYNC1 Direction Setup Jumper (JP6.1/3/5)

The direction of the PPI0_SYNC1 signal can be either fixed or programmed, depending on the state of a general-purpose flag. Table 2-7 shows how to set up the direction of PPI0_SYNC1. Table 2-7. Setting Direction of PPI0_SYNC1 (JP6.1/3/5)
Jumper Location
JP6.1/3 JP6.3/5
PPI0_SYNC1 Direction Controlled by flag pin Input to processor Output from processor
Uninstalled
PPI0_SYNC2 Direction Setup Jumper (JP6.2/4/6)

The direction of the PPI0_SYNC2 signal can be either fixed or programmed, depending on the state of a general-purpose flag. Table 2-8 shows how to set the direction of PPI0_SYNC2.
2-12
Table 2-8. Setting Direction of PPI0_SYNC2 (JP6.2/4/6)

Jumper Location
JP6.2/4 JP6.4/6
PPI0_SYNC2 Direction Controlled by flag pin Input to processor Output from processor
Uninstalled
I 2 S Enable Jumper (JP7.1/2)

When the JP7.1/2 jumper is installed, the SPORT signals are routed for I2S SPORT communication protocol mode. To accomplish this, the receive and transmit clocks of the processor are driven by the output clock of the AD1836A. The same is done for the frame sync signals.
SPORT Data Connection Jumpers (JP7.3/4, JP7.5/6)

The JP7.3/4 and JP7.5/6 jumpers connect data output pins (ASDATA1 and ASDATA2) of the audio codec to the primary and secondary SPORT data input pins of the processor. The audio codec is driving these pinswith the help of the JP7.3/4 and JP7.5/6 jumpers, the processors pins can be reused when the audio codec is disabled.
VID_OUT Bus SYNC Source Select Jumpers (JP8.1/3/5, JP8.2/4/6)

The source of the PPI frame sync signals depends on the PPI port driving the VID_OUT bus. When using PPI0, place the jumpers at JP8.1/3 and JP8.2/4. When using PPI1, place the jumpers at JP8.3/5 and JP8.4/6.
VID_OUT Bus SYNC Enable Jumper (JP8.7/8)

To enable the VID_OUT frame sync signals, install the JP8.7/8 jumper.
2-13
Jumpers
AV_RESET Source Jumper (JP9.1/3/5)

The source of the ICs reset on the A-V EZ-Extender is controlled by either a flag pin or a system reset; the latter also resetting the Blackfin processor (see Table 2-9). Table 2-9. Jumper Reset Sources
Jumper Location
JP9.1/3 JP9.3/5
Reset Source Flag pin multiplexed with PPI1_D11 System reset generator ICs are not reset
Uninstalled
PPI0_D Direction Setup Jumper (JP9.2/4/6)

The direction of the PPI0_D[15:0] signals can be a fixed direction or can be programmed, depending on the state of a general-purpose flag. Table 2-10 shows how to set the direction of PPI0_D[15:0]. Table 2-10. Setting Direction of PPI0_D[15:0] (JP9.2/4/6)
Jumper Location
JP9.2/4 JP9.4/6
PPI0_D[15:0] Direction Controlled by flag pin Input to processor Output from processor
Uninstalled
Audio Loopback Jumpers (JP10.1/2, JP10.3/4)

The JP10.1/2 and JP10.3/4 jumpers loop back the audio input to the output for test purposes and should not be installed.
2-14
A A-V EZ- EXTENDER BILL OF MATERIALS
The bill of materials corresponds to A-V EZ-Extender Schematic on page B-1. Please check the latest schematic on the Analog Devices Web site:
http://www.analog.com/Processors/Processors/DevelopmentTools/tec hnicalLibrary/manuals/DevToolsIndex.html#Evaluation%20Kit%20Manuals. Ref. 1 2 3 4 5 6 7 8 Qty. 1 1 7 1 1 1 3 1 Description SN74AHC1G00 SOT23-5 12.288MHZ OSC003 SN74LVC1G125 SOT23-5 27MHZ OSC003 SN74LVC1G32 SOT23-5 74LVTH16244MT D TSSOP48 74LVTH16245MT D TSSOP48 ADP3336ARMZ MSOP8 Reference Designator U9 U18 U12-13,U15,U17, U19,U29-30 U1 U6 U10 U11,U14,U16 VR1 Manufacturer TI DIGI-KEY TI DIGI-KEY TI FAIRCHILD FAIRCHILD ANALOG DEVICES Part Number SN74AHC1G00DBVR SG-8002CA-PCC-ND (12.288M) 74LVC1G125DBVRE4 SG-8002CA-PCC-ND (27.00M) SN74LVC1G32DBVRE4 74LVTH16244MTD 74LVTH16245MTD ADP3336ARMZ-REEL
A-1
Ref. 9
Qty. 1
Description 10MA AD1580BRTZ SOT23D AD8061ARTZ SOT23-5 AD8606ARZ SOIC8 AD1836AASZ MQFP52 ADV7179KCPZ LFCSP40 ADV7183BKSTZ LQFP80 DIP 8 DIP8SOC 0.05 45x2 CON018 .05 45X2 CON019 RCA 3X2 CON024 IDC 3X2 IDC3X2_SMT IDC 16X2 IDC16X2RASOC IDC 13X2 IDC13X2_M_SMT IDC 4X2 IDC4X2_M_SMT FPDI 31PIN CON034 IDC 14x2RA IDC14x2_M_RA
Reference Designator D1
Manufacturer ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES ANALOG DEVICES MILL-MAX SAMTEC SAMTEC SWITCHCRAFT SAMTEC SAMTEC SAMTEC SAMTEC FCI SULLINS
Part Number AD1580BRTZ-REEL7
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
3 8 1 1 1 1 3 3 1 5 1 1 2 1 1
U3-5 U20-23,U25-28 U24 U7 U2 U8 P1-3 J1-3 J7 JP1,JP5-7,JP9 J4 JP3 JP4,JP8 P6 P4
AD8061ARTZ-REEL AD8606ARZ AD1836AASZ ADV7179KCPZ ADV7183BKSTZ 614-43-308-31-007000 TFC-145-32-F-D SFC-145-T2-F-D-A PJRAS3X2S01X TSM-103-01-T-DV SSW-116-02-F-D-RA TSM-113-01-T-DV TSM-104-01-T-DV 68737-428HLF PEC14DBAN
A-2
A-V Extender Bill Of Materials
Ref. 25 26
Qty. 1 1
Description IDC 13x2RA IDC13x2_F_RA 3.5MM 5xAUDIO_JACK CON035 IDC 3X1 IDC3X1 IDC 2X2 IDC2X2 0.22UF 25V 10% 0805 33 1/10W 5% 0805 1.5K 1/10W 5% 0805 10UF 16V 10% B 600 100MHZ 200MA 0603 600 100MHZ 500MA 1206 10UF 16V 20% CAP002 22 1/10W 5% 0805 0.68UH 10% 0805 .082UF 50V 5% 0805 2.2UH 10% 0805 22 125MW 5% RNS001 147.0K 1/10W 1% 0805
Reference Designator J6 J5
Manufacturer SAMTEC FOXCON
Part Number SSW-113-02-F-D-RA JA3333F-R55
27 28 29
1 1 8
JP2 JP10 C73,C85,C101, C112,C120-121, C135,C138 R49,R52 R1 CT1-4,CT12-13 FER4-8 FER1-3,FER9 CT5-11,CT14-16 R53,R55 L1-3,L7-9 C5 L4-6 RN1-4 R36
FCI SULLINS AVX
90726-403HLF PBC02DAAN 08053C224FAT
30 31 32 33 34 35 36 37 38 39 40 41
2 1 6 5 4 10 2 6 1 3 4 1
VISHAY VISHAY AVX DIGI-KEY STEWARD PANASONIC VISHAY MURATA AVX DIGI-KEY CTS DIGI-KEY
CRCW080533R0JNEA CRCW08051K50FKEA TAJB106K016R 490-1014-2-ND HZ1206B601R-10 EEE1CA100SR CRCW080522R0JNEA LQM21NNR68K10D 08055C823JAT2A 490-1119-2-ND 744C083220JP 311-147KCRTR-ND
A-3
Ref. 42 43 44
Qty. 1 1 57
Description 76.8K 1/10W 1% 0805 1.2K 1/16W 5% 0402 0.1UF 16V 10% 0603
Reference Designator R38 R42
Manufacturer DIGI-KEY PANASONIC
Part Number 311-76.8KCRTR-ND ERJ-2GEJ122X 0603YC104KAT2A
C1,C4,C7-8,C10-15, AVX C17,C19,C22-23, C26,C30,C32-34, C37-38,C40, C43-44,C46-49, C51-57,C60-69, C75-76,C78,C81, C99,C115,C124, C130-132,C144-145 C2-3,C6,C16,C25, C29,C36,C41,C50, C58,C110 C42,C45,C59, C79-80 C27,C39 AVX
45
11
0.01UF 16V 10% 0603 10UF 10V +80/-20% 0805 1UF 16V 10% 0603
0603YC103KAT2A
46 47 48
5 2 12
PANASONIC PANASONIC AVX
ECJ-2FF1A106Z ECJ-1VB1C105K 06035A331JAT2A
330PF 50V 5% 0603 C18,C20-21,C28, C31,C35,C98,C104, C107-108,C133, C137 22 1/10W 5% 0603 10K 1/10W 5% 0603 R50,R146-148 R3-4,R10,R32,R37, R44-45,R47-48,R51, R54,R56-60,R66, R107,R141, R149-150 R39-40 R2,R15,R20,R25, R111,R115,R130, R135
49 50
4 21
VISHAY VISHAY
CRCW060322R0JNEA CRCW060310K0JNEA
51 52
2 8
100K 1/10W 5% 0603 0 1/10W 5% 0603
VISHAY PHYCOMP
CRCW0603100KJNEA 232270296001L
A-4
A-V Extender Bill Of Materials
Ref. 53 54 55 56 57 58
Qty. 1 6 4 4 6 12
Description 10 1/10W 5% 0603 1K 1/10W 5% 0603 237.0 1/10W 1% 0603 750.0K 1/10W 1% 0603 11.0K 1/10W 1% 0603 5.49K 1/10W 1% 0603 3.32K 1/10W 1% 0603 1.65K 1/10W 1% 0603 49.9K 1/10W 1% 0603 604.0 1/10W 1% 0603 5.76K 1/10W 1% 0603
Reference Designator R143 R13-14,R18-19, R23-24 R64,R70,R106,R110 R65,R69,R127,R129 R82,R90,R93-94, R123,R126 R75,R83,R86-87, R89,R99-101,R116, R119,R131-132 R81,R91-92,R95, R124-125 R74,R84-85,R88, R117-118 R96-97,R108-109, R137-138 R98,R102-104, R133,R136 R61-63,R67,R72-73, R76-77,R105, R120-122,R128,R13 4,R139-140
Manufacturer VISHAY DIGI-KEY DIGI-KEY DIGI-KEY DIGI-KEY DIGI-KEY
Part Number CRCW060310R0JNEA 311-1.0KGRTR-ND 311-237HRTR-ND 311-750KHRTR-ND 311-11.0KHRTR-ND 311-5.49KHRTR-ND
59 60 61 62 63
6 6 6 6 16
DIGI-KEY DIGI-KEY DIGI-KEY DIGI-KEY DIGI-KEY
311-3.32KHRTR-ND 311-1.65KHRTR-ND 311-49.9KHRTR-ND 311-604HRTR-ND 311-5.76KHRTR-ND
64
120PF 50V 5% 0603 C71,C74,C82-83, C127-128,C141, C143 100PF 50V 5% 0603 C77,C91-92,C97, C105-106,C109, C118,C129,C134, C13
AVX
06035A121JAT2A
65
12
AVX
06035A101JAT2A
A-5
Ref. 66
Qty. 10
Description 1000PF 50V 5% 0603
Reference Designator C9,C24,C72,C86, C93,C100,C103, C111,C117,C119
Manufacturer PANASONIC
Part Number ECJ-1VC1H102J
67 68 69 70 71 72 73 74 75
6 6 6 7 6 12 1 1 1
220PF 50V 5% 0603 C87,C94-96, C125-126 680PF 50V 5% 0603 C84,C88-90, C122-123 2200PF 50V 5% 0603 33.0 1/10W 1% 0603 2.74K 1/10W 1% 0603 75.0 1/10W 1% 0603 680 1/8W 5% 1206 150.0 1/8W 1% 1206 GREEN LED001 C102,C113-114, C116,C140,C142 R5,R8,R33,R68, R142,R144-145 R71,R78-80, R112-113 R11-12,R16-17, R21-22,R26-31 R114 R41 LED1
PANASONIC PANASONIC PANASONIC DIGI-KEY DIGI-KEY DALE VISHAY VISHAY PANASONIC
ECJ-1VC1H221J ECJ-1VC1H681J ECJ-1VB1H222K 311-33.0HRTR-ND 311-2.74KHRTR-ND CRCW060375R0FKEA CRCW1206680RFNEA CRCW1206150RFKEA LN1361CTR
A-6
Blackfin A-V EZ-Extender Schematic

3 3
ANALOG DEVICES
Title Size Board No.
4-24-2006_9:50
20 Cotton Road Nashua, NH 03063 PH: 1-800-ANALOGD 4
BLACKFIN A-V EZ-EXTENDER TITLE A0193-2004

Sheet
D 1
Rev
C
Date
A B C
2.0B
of
12
5V
EXPANSION INTERFACE (TYPE B)

Expanison Connector Bottom Of Board Top Of Board P1_[5:86] P1 1 3 J1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 P1_40 P1_42 P1_44 P1_46 P1_48 P1_50 P1_52 P1_54 P1_56 P1_58 P1_60 P1_62 P1_64 P1_66 P1_68 P1_70 PPI0_D0 PPI0_D2 P1_76 P1_78 P1_80 P1_82 P1_84 P1_86 PPI0_D0 PPI0_D2 P1_76 P1_78 P1_80 P1_82 P1_84 P1_86 P1_40 P1_42 P1_44 P1_46 P1_48 P1_50 P1_52 P1_54 P1_56 P1_58 P1_60 P1_62 P1_64 P1_66 P1_68 P1_70 P1_6 P1_8 P1_10 P1_12 P1_14 P1_16 P1_18 P1_20 P1_22 P1_24 P1_26 P1_28 P1_30 P1_32 P1_34 P1_36 P1_6 P1_8 P1_10 P1_12 P1_14 P1_16 P1_18 P1_20 P1_22 P1_24 P1_26 P1_28 P1_30 P1_32 P1_34 P1_36 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 CON019 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 P1_77 P1_79 P1_81 P1_83 P1_85 PPI0_D1 PPI0_D3 P2_77 P2_79 P2_81 P2_83 P2_85 P1_39 P1_41 P1_43 P1_45 P1_47 P1_49 P1_51 P1_53 P1_55 P1_57 P1_59 P1_61 P1_63 P1_65 P1_67 P1_69 PPI0_CLK FLAG_SDA P2_59 P2_61 P2_63 P2_65 P2_67 P2_69 P2_71 P2_73 P1_5 P1_7 P1_9 P1_11 P1_13 P1_15 P1_17 P1_19 P1_21 P2_23 P1_23 P1_25 P1_27 P1_29 P1_31 P1_33 P1_35 DR0SEC DR0PRI RFS0 RSCLK0 PPI0_D4 PPI0_D6 PPI0_D8 PPI0_D10 PPI0_D12 PPI0_D14 P2_55 R149 10K 0603 PPI0_SYNC1 P2_27 P2_29 P2_31 P2_33 P2_15 P2_17 P2_19 P2_21 P2_23 SCK P2_11 P2_5 P2_7 P2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 CON018 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 Bottom Of Board
3.3V
Expanison Connector 2 Top Of Board P2_[5:86] J2 2 4 P2_6 P2_8 MOSI MISO MOSI MISO P2_6 P2_8 6 8 10 12 14 P2_16 P2_18 P2_20 P2_22 PPI0_SYNC2 P2_26 P2_28 P2_30 P2_32 P2_34 DT0SEC DT0PRI TFS0 TSCLK0 PPI0_D5 PPI0_D7 PPI0_D9 PPI0_D11 PPI0_D13 PPI0_D15 SNAPSHOT_FODD_SSEL DT0SEC DT0PRI TFS0 TSCLK0 PPI0_D5 PPI0_D7 PPI0_D9 PPI0_D11 PPI0_D13 PPI0_D15 PPI0_SYNC2 P2_26 P2_28 P2_30 P2_32 P2_34 P2_16 P2_18 P2_20 P2_22 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 P2_60 P2_62 P2_64 P2_66 P2_68 P2_70 P2_72 P2_74 FLAG_SCL_DIR_CTRL P2_60 P2_62 P2_64 P2_66 P2_68 P2_70 P2_72 P2_74 60 62 64 66 68 70 72 74 76 P2_78 P2_80 P2_82 P2_84 P2_86 P2_78 P2_80 P2_82 P2_84 P2_86 78 80 82 84 86 88 90 CON019 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 P2_77 P2_79 P2_81 P2_83 P2_85 P2_59 P2_61 P2_63 P2_65 P2_67 P2_69 P2_71 P2_73 P2_55 FLAG_SDA PPI0_D4 PPI0_D6 PPI0_D8 PPI0_D10 PPI0_D12 PPI0_D14 P2_27 P2_29 P2_31 P2_33 DR0SEC DR0PRI RFS0 RSCLK0 P2_15 P2_17 P2_19 P2_21 P2_23 PPI0_SYNC1 P2_11 P2_5 P2_7 SCK
P1_5 P1_7 P1_9 P1_11 P1_13 P1_15 P1_17 P1_19 P1_21 P1_23 P1_25 P1_27 P1_29 P1_31
5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37
P1_33 P1_35
P1_39 P1_41 P1_43 P1_45 P1_47 P1_49 P1_51 P1_53 P1_55 P1_57 P1_59 P1_61 P1_63 P1_65 P1_67 P1_69
39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71
PPI0_D1
73 75 77 79 81 83 85 87 89 CON018
PPI0_D3 P1_77 P1_79 P1_81 P1_83 P1_85
PPI0_D[15:0] 3.3V
5V
4
C45 10UF 0805 C46 0.1UF 0603
C59 10UF 0805
C48 0.1UF 0603
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER EXPANSION INTERFACE (1, 2) A0193-2004

Sheet
D 2
Rev
C
Date
A B C
2.0B
of
12
EXPANSION INTERFACE (TYPE B)
5V
3.3V
5V
1
Bottom Of Board
Expanison Connector 2 Top Of Board PPI1_D[15:0] P3_[1:90] PPI1_D1 P3 1 3 P3_5 P3_7 PPI1_D3 PPI1_D5 PPI1_D7 PPI1_D9 PPI1_D11 PPI1_D13 PPI1_D15 PPI1_CLK 5 7 9 11 13 15 17 19 21 23 25 27 P3_29 P3_31 29 31 33 35 37 39 41 43 P3_45 P3_47 P3_49 P3_51 P3_53 P3_55 P3_57 P3_59 P3_61 P3_63 45 47 49 51 53 55 57 59 61 63 65 P3_67 P3_69 P3_71 P3_73 67 69 71 73 75 77 79 81 83 85 87 P3_89 89 CON018 J3 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 P3_90 P3_90 P3_68 P3_70 P3_72 P3_74 P3_76 P3_78 P3_80 P3_82 P3_84 P3_86 P3_68 P3_70 P3_72 P3_74 P3_76 P3_78 P3_80 P3_82 P3_84 P3_86 P3_46 P3_48 P3_50 P3_52 P3_54 P3_56 P3_58 P3_60 P3_62 P3_64 P3_46 P3_48 P3_50 P3_52 P3_54 P3_56 P3_58 P3_60 P3_62 P3_64 P3_42 P3_42 P3_32 P3_34 P3_36 P3_38 PPI1_FS2 P3_32 P3_34 P3_36 P3_38 P3_28 RESET P3_28 P3_6 P3_8 PPI1_D2 PPI1_D4 PPI1_D6 PPI1_D8 PPI1_D10 PPI1_D12 PPI1_D14 PPI1_D2 PPI1_D4 PPI1_D6 PPI1_D8 PPI1_D10 PPI1_D12 PPI1_D14 P3_6 P3_8 PPI1_D0 PPI1_D0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 CON019 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 IDC13X2_M_SMT 67 69 71 73 75 77 79 81 83 85 87 89 P3_89 P3_67 9 Jumpers P3_69 P3_71 P3_73 P3_75 P3_77 P3_79 P3_81 P3_83 P3_85 P3_45 P3_47 P3_49 P3_51 P3_53 P3_55 P3_57 P3_59 P3_61 P3_63 25 26 DEC_DATA_OE SNAPSHOT_FODD R37 10K 0603 P3_29 P3_31 P3_33 P3_35 P3_37 P3_39 1 PPI1_FS1 PPI1_FS1 3.3V FLAG_SDA SDA PPI1_D2 PWDN VDEC_HS VDEC_VS VENC_HREF VENC_VSYNC 3 5 7 9 11 13 15 17 19 21 23 JP3 2 4 6 8 10 12 14 16 18 20 22 24 SNAPSHOT_FODD_SSEL FLAG_SCL_DIR_CTRL SCL PPI1_D3 PPI1_D10 VID_IN_SYNC1_HREF VID_IN_SYNC2_VSYNC to TWI of ADSP-BF537 EZ-KIT Lite 5V 3.3V P3_5 P3_7 PPI1_D3 PPI1_D5 PPI1_D7 PPI1_D9 PPI1_D11 PPI1_D13 PPI1_D15 PPI1_CLK R114 680 1206 PPI1_D1 POWER LED1 GREEN LED001
P3_33 P3_35 P3_37 P3_39
P3_75 P3_77 P3_79 P3_81 P3_83 P3_85
3.3V
5V
C80 10UF 0805
C81 0.1UF 0603
C79 10UF 0805
C78 0.1UF 0603
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER EXPANSION INTERFACE (3) A0193-2004

Sheet
D 3
Rev
C
Date
A B C
2.0B
of
12
PPI0_D[15:0]
RN1 1 R1A 2 R2A 3 R3A 4 R4A U11 VID_IN_D[15:0] VID_IN_D0 VID_IN_D1 VID_IN_D2 VID_IN_D3 VID_IN_D4 VID_IN_D5 VID_IN_D6 VID_IN_D7 VID_IN_D8 VID_IN_D9 VID_IN_D10 VID_IN_D11 VID_IN_D12 VID_IN_D13 VID_IN_D14 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1B1 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 2B2 2B3 2B4 2B5 2B6 2B7 2B8 47 1A1 46 1A2 44 1A3 43 1A4 41 1A5 40 1A6 38 1A7 37 1A8 36 2A1 35 2A2 33 2A3 32 2A4 30 2A5 29 2A6 27 2A7 26 2A8 T/~R1 T/~R2 OE1 OE2 74LVTH16245MTD TSSOP48 1 24 48 25 PPI0_HI_EN 22 RNS001 1 2 3 4 RN2 PPI0_D3 R1A R2A R3A R4A 22 RNS001 1 2 3 4 R1B R2B R3B R4B 8 7 6 5 PPI0_D4 PPI0_D4 PPI0_D5 PPI0_D5 PPI0_D6 PPI0_D6 PPI0_D7 PPI0_D7 RN3 PPI0_D8 R1A R2A R3A R4A 22 RNS001 1 2 3 4 R1B R2B R3B R4B 8 7 6 5 PPI0_D8 PPI0_D9 PPI0_D9 PPI0_D10 PPI0_D10 PPI0_D11 PPI0_D11 PPI0_D12 PPI0_D13 RN4 PPI0_D14 R1A R2A R3A R4A 22 RNS001 R1B R2B R3B R4B 8 7 6 5 PPI0_D12 PPI0_D15 PPI0_D13 PPI0_D14 PPI0_D15 PPI0_EN 1 48 25 VID_IN_DIR_CTRL 24 26 27 30 29 32 33 35 36 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 OE1 OE2 OE3 OE4 74LVTH16244MTD TSSOP48 13 3Y1 14 3Y2 16 3Y3 17 3Y4 19 4Y1 20 4Y2 22 4Y3 23 4Y4 VID_OUT_D8 VID_OUT_D9 VID_OUT_D10 VID_OUT_D11 VID_OUT_D12 VID_OUT_D13 VID_OUT_D14 VID_OUT_D15 37 38 40 41 43 R1B R2B R3B R4B 8 7 6 5 PPI0_D0 PPI0_D1 PPI0_D2 PPI0_D3 PPI0_D0 PPI0_D1 PPI0_D2 47 46 44 U10 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 2 1Y1 3 1Y2 5 1Y3 6 1Y4 8 2Y1 9 2Y2 11 2Y3 12 2Y4 VID_OUT_D0 VID_OUT_D1 VID_OUT_D2 VID_OUT_D3 VID_OUT_D4 VID_OUT_D5 VID_OUT_D6 VID_OUT_D7 VID_OUT_D[15:0]
VID_IN_D15
PPI1_D[15:0]
U16 3.3V 3.3V 3.3V PPI1_D0 PPI1_D1 PPI1_D2 PPI1_D3 PPI1_D4 PPI1_D5 R46 10K 0603 DNP R44 10K 0603 JP9 PPI1_D11 AV_RESET RESET 1 3 5 2 4 6 IDC3X2_SMT 2 Jumpers R150 10K 0603 PPI1_D13 PPI1_D14 PPI1_D15 29 27 26 1 24 48 PPI1_EN 25 FLAG_SCL_DIR_CTRL VID_IN_DIR_CTRL JP5 1 3 5 R54 10K 0603 R57 10K 0603 R59 10K 0603 PPI1_D6 PPI1_D7 PPI1_D8 2 4 6 PPI0_HI_EN PPI0_EN PPI1_EN PPI1_D9 PPI1_D10 PPI1_D11 PPI1_D12 47 46 44 43 41 40 38 37 36 35 33 32 30 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 T/~R1 T/~R2 OE1 OE2 74LVTH16245MTD TSSOP48 2 1B1 3 1B2 5 1B3 6 1B4 8 1B5 9 1B6 11 1B7 12 1B8 13 2B1 14 2B2 16 2B3 17 2B4 19 2B5 20 2B6 22 2B7 23 2B8 VID_OUT_D0 VID_OUT_D1 VID_OUT_D2 VID_OUT_D3 VID_OUT_D4 VID_OUT_D5 VID_OUT_D6 VID_OUT_D7 VID_OUT_D8 VID_OUT_D9 VID_OUT_D10 VID_OUT_D11 VID_OUT_D12 VID_OUT_D13 VID_OUT_D14 VID_OUT_D15
IDC3X2_SMT
PPI0_EN
3.3V
3.3V
3.3V
C62 0.1UF 0603
C56 0.1UF 0603
C55 0.1UF 0603
C61 0.1UF 0603
C66 0.1UF 0603
C76 0.1UF 0603
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER DATA ROUTING A0193-2004

Sheet
D 4
74LVTH16245MTD
SN74ALVTH16244
SN74ALVTH16244
Rev
C
Date
B C
2.0B
of
12
Video In Frame Sync Setup

R53 22 0805 VID_IN_SYNC1_HREF U14 2 1B1 3 1B2 5 1B3 6 1B4 8 1B5 9 1B6 11 1B7 12 1B8 13 2B1 14 2B2 16 2B3 17 2B4 19 2B5 20 2B6 22 2B7 23 2B8 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 47 46 3.3V 44 43 41 40 38 37 36 35 33 32 30 IDC3X2_SMT 2 Jumpers 27 26 27MHZ_CLK 2 4 U19 1 29 R148 22 0603 JP4 1 3 VID_IN_SYNC1_DIR_CTL VID_IN_SYNC2_DIR_CTL SN74LVC1G125 SOT23-5 5 7 VID_IN_SYNC1_DIR_CTL 3 5 4 6 VID_IN_SYNC2_DIR_CTL PPI0_SYNC2 JP6 1 2 FLAG_SCL_DIR_CTRL R56 10K 0603 R51 10K 0603 R43 10K 0603 DNP PPI0_SYNC1 3.3V
PPI Clock Setup
1
R55 22 0805 VID_IN_SYNC2_VSYNC
1
U8 1 OE/NC DIP8SOC 5 OUT R49 33 0805
2 4 6 8 VDEC_CLKOUT PIXEL_CLK
EXT_VID_CLK
1 T/~R1 24 T/~R2 48 OE1 25 OE2 74LVTH16245MTD TSSOP48
IDC4X2_M_SMT 4 Jumpers 3.3V TP9 TP10
R48 10K 0603 U13 2 R50 22 0603 4 PPI0_CLK 1
SN74LVC1G125 SOT23-5
VID_OUT_SYNC_EN R146 22 0603 4 VID_OUT_SYNC1_HREF 1
VID_OUT_SYNC_EN R147 22 0603 4 VID_OUT_SYNC2_VSYNC 1
U15 VID_OUT_SYNC1 2
U17 VID_OUT_SYNC2 2
SN74LVC1G125 SOT23-5 3.3V 3.3V TP11 TP12
U12 JP8 1 3 5 7 2 4 6 8 EXT_VID_CLK PPI0_SYNC2 VID_OUT_SYNC2 PPI1_FS2 2
R58 10K 0603
Video Out Frame Sync Setup
R66 10K 0603 R52 33 0805 4 PPI1_CLK
PPI0_SYNC1 VID_OUT_SYNC1 PPI1_FS1 VID_OUT_SYNC_EN
IDC4X2_M_SMT 3 Jumpers
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
C51 0.1UF 0603
C64 0.1UF 0603
C67 0.1UF 0603
C69 0.1UF 0603
C65 0.1UF 0603
C68 0.1UF 0603
C63 0.1UF 0603
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER FS/CLK CONFIG A0193-2004

Sheet
D 5
Rev
OSC SOC
SN74LVC1G125 SN74LVC1G125 SN74LVC1G125
74LVTH16245MTD
SN74LVC1G125
C
Date
B C
2.0B
of
12
CONN_SUPPLY
Micron Interface
VID_IN_D[15:0]
Kodak Interface
J6 VID_IN_D1 VID_IN_D3 VID_IN_D5 VID_IN_D7 VID_IN_D9 2 4 6 8 10 12 14 AV_RESET SDA 16 18 20 22 24 EXT_VID_CLK 26 1 3 5 7 9 11 13 15 17 19 21 23 25 IDC13X2_F_RA PIXEL_CLK VID_IN_SYNC2_VSYNC SCL 3 VID_IN_SYNC1_HREF JP2 1 2 VID_IN_D0 VID_IN_D2 VID_IN_D4 VID_IN_D6 VID_IN_D8 5V 3.3V
Micron Interface P4 J4 J6
CONN_SUPPLY TP13
OmniVision Interface
IDC3X1 1 Jumper C44 0.1UF 0603 C42 10UF 0805
Flat Panal Display Interface

CONN_SUPPLY CONN_SUPPLY
P6
J4 VID_IN_D0 Y0 Y2 Y4 Y6 PWDN SDA SCL GND GND EXT_VID_CLK EXCLK 2 4 6 8 10 12 14 16 18 20 22 VID_IN_D8 VID_IN_D10 VID_IN_D12 VID_IN_D14 UV0 UV2 UV4 UV6 24 26 28 30 32 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 IDC16X2RASOC Y1 Y3 Y5 Y7 RESET FODD HREF VSYNC PCLK VIN VIN UV1 UV3 UV5 UV7 VID_IN_D9 VID_IN_D11 VID_IN_D13 VID_IN_D15 SNAPSHOT_FODD see JP3 VID_IN_D1 VID_IN_D3 VID_IN_D5 VID_IN_D7 4 2 SN74AHC1G00 SOT23-5 R0 R1 R2 U9 1 AV_RESET VCC1 VCC2
28 29 2 3 4 6 7 8 9 10
VID_OUT_D0 VID_OUT_D1 VID_OUT_D2 VID_OUT_D3 VID_OUT_D4 VID_OUT_D5 VID_OUT_D6 VID_OUT_D7 VID_OUT_D8 VID_OUT_D9 VID_OUT_D10 VID_OUT_D[15:0] EXT_VID_CLK VID_OUT_SYNC1_HREF VID_OUT_SYNC2_VSYNC
VID_IN_D2 VID_IN_D4 VID_IN_D6 PWDN SDA SCL
CK HS VS
VID_IN_SYNC1_HREF VID_IN_SYNC2_VSYNC PIXEL_CLK
OmniVision Interface
R3 R4
11 R5
G0
13
14 G1 15 G2
G3
16
17 G4 18 G5
B0 B1 B2
20 21 22 23 24
CONN_SUPPLY VID_OUT_D11 VID_OUT_D12 VID_OUT_D13 VID_OUT_D14 VID_OUT_D15 R4 10K 0603 R2 0 0603
B3 B4
25 B5
CONN_SUPPLY ENAB
27 30 31
P4 VID_IN_SYNC1_HREF PIXEL_CLK VID_IN_D0 VID_IN_D2 VID_IN_D4 VID_IN_D6 VID_IN_D8 VID_IN_D10 1 3 5 7 9 11 13 15 17 19 21 23 SCL 25 27 2 4 6 8 10 12 14 16 18 20 22 24 26 28 IDC14X2_M_RA RESET PWDN EXT_SYNC PWDN PPI0_D15 SDA AV_RESET C60 0.1UF 0603 see JP3 VID_IN_D1 VID_IN_D3 VID_IN_D5 VID_IN_D7 VID_IN_D9 3.3V VID_IN_D11 SNAPSHOT SNAPSHOT_FODD VID_IN_SYNC2_VSYNC EXT_VID_CLK see JP3 GND1 GND2 GND3 GND4 GND5
1 5 12 19 26
R9 10K 0603 DNP R7 10K 0603 DNP R6 10K 0603 DNP
Kodak Interface
CON034
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER PPI0 SETUP A0193-2004

Sheet
D 6
Note: The pin numbers look swapped on this connector This is just industry standard pin numbering for a male connector The footprint on the connecting board is not correct. SN74AHC1G00
Rev
C
Date
C
2.0B
of
12
DAC_C
DAC_B
VIDEO_AVIN1 VIDEO_AVIN4 VIDEO_AVIN5
JP1 1 3 5
2 4 6
VIDEO_DAC_A VIDEO_DAC_C VIDEO_DAC_B
DAC_A
DAC A Composite Video Component Video Differential Component Video S Video CVSB G Y Y
DAC B CVSB B U
DAC C C R V C
IDC3X2_SMT
(WHITE) OUT (RED) IN

1
AVIN5
AVIN4
AVIN1
R13 1K 0603
A3V
VIDEO_DAC_A
U3 4 L1 0.68UH 0805 L4 2.2UH 0805 L7 0.68UH 0805 3 2 5 1 AD8061ARTZ SOT23-5 9 R12 75.0 0603 8
J7 CON024
DAC A
VIDEO ENCODER
U7 VAA1 VAA2 VAA3 VAA4 2 10 18 25 27
3.3V A3V R14 1K 0603
FER4 600 0603
R11 75.0 0603
C18 330PF 0603
C28 330PF 0603
R26 75.0 0603
R47 10K 0603
C54 0.1UF 0603
C47 0.1UF 0603
R42 1.2K 0402 AGND2
VAA5 VID_OUT_D[7:0] VID_OUT_D7 VID_OUT_D6 VID_OUT_D5 VID_OUT_D4 VID_OUT_D3 VID_OUT_D2 VID_OUT_D1 VID_OUT_D0 5 4 3 39 38 37 36 35 P7 DAC_A P6 DAC_B P5 DAC_C P4 P3 P2 P1 P0 HSYNC 27MHZ_CLK 1 CLOCK FIELD/VSYNC BLANK AV_RESET 3.3V 16 SDA SCL 22 21 ALSB GND2 SDATA GND3 SCLOCK GND4 R39 100K 0603 32 SCRESET/RTC GND8 TTX GND9 TTXREQ GND10 ADV7179KCPZ LFCSP40 R40 100K 0603 GND5 GND6 GND7 20 RESET GND1 COMP VREF RSET
2
R18 1K 0603
29 28 24 23 30 31 U4 13 14 15 VENC_HREF VENC_VSYNC see JP3 see JP3 L2 0.68UH 0805 L5 2.2UH 0805 L8 0.68UH 0805 3 2 6 7 8 9 11 12 17 19 AGND2 26 40 R23 1K 0603 R41 150.0 1206 1 D1 AD1580BRTZ SOT23D 2 10MA R16 75.0 0603 C20 330PF 0603 C31 330PF 0603 R28 75.0 0603 R19 1K 0603 4 5 1 AD8061ARTZ SOT23-5 6 R17 75.0 0603 5 J7 CON024 VIDEO_DAC_B A3V
DAC B
34 33
A3V
VIDEO_DAC_C U5 4 L3 0.68UH 0805 L6 2.2UH 0805 L9 0.68UH 0805 3 2 5 1 AD8061ARTZ SOT23-5 3 R22 75.0 0603 2 J7 CON024
DAC C
3.3V
A3V
A3V
A3V
R21 75.0 0603
C21 330PF 0603
C35 330PF 0603
R30 75.0 0603
R24 1K 0603
C50 0.01UF 0603
C58 0.01UF 0603
C52 0.1UF 0603
C57 0.1UF 0603
C49 0.1UF 0603
C53 0.1UF 0603
W1 COPPER
C30 0.1UF 0603
C29 0.01UF 0603
C33 0.1UF 0603
C32 0.1UF 0603
C37 0.1UF 0603
C36 0.01UF 0603
AGND2
ANALOG DEVICES
4-24-2006_9:50
ADV7179 U27
AGND2
AGND2 AD8061
AGND2 AD8061
AGND2 AD8061
BLACKFIN A-V EZ-EXTENDER VIDEO ENCODER (OUT) A0193-2004

Sheet
D 7
Rev
C
Date
A B C
2.0B
of
12
3.3V 3.3V
AVIN1 Composite Video Differential Component Video S Video CVBS Y Y
AVIN4 CVBS V C
AVIN5 CVBS U R10 10K 0603 R34 10K 0603 DNP U1 1 OE 27MHZ OSC003 66 SDA SCL 67 68 OUT 3 R5 33.0 0603 27MHZ_CLK R35 10K 0603 DNP R45 10K 0603 R3 10K 0603
VIDEO DECODER
U2
1
29 28 XTAL XTAL1 P15 P14 P13 ALSB SDA SCLK P12 P11 P10 P9 73 74 75 76 5 6 7 8 19 20 21 2 22 23 24 PVDD_ADV7183 32 33 SN74LVC1G32 SOT23-5 VID_IN_D7 VID_IN_D6 VID_IN_D5 VID_IN_D4 VID_IN_D3 VID_IN_D2 VID_IN_D1 VID_IN_D0 R8 33.0 0603 1 R33 33.0 0603 4 VDEC_CLKOUT VID_IN_D[7:0]
AV_RESET
64 36
RESET PWRDN
P8 P7 P6
U6
J7 CON024 R15 0 0603 7 VIDEO_AVIN1 C19 0.1UF 0603
65
NC[ISO]
P5 P4
AVIN1
9
42 41
AIN1 AIN7
P3 P2 P1
TP1 J7 CON024 R20 0 0603 4 VIDEO_AVIN4 C34 0.1UF 0603
44 43
AIN2 AIN8
P0
AVIN4
2
6
TP2
LLC1 46 45 AIN3 AIN9 LLC2 NC[LLCREF] ELPF 58 AIN4 AIN10 HS VS 60 59 AIN5 AIN11 FIELD NC[VREF] NC[HREF] 62 61 AIN6 AIN12 NC[CLKIN] NC[AFF] 51 REFOUT CML SFL[HFF] NC[AEF] NC[DV] 48 49 CAPY1 CAPY2 NC[RD] OE
27 26 25 37 C2 0.01UF 0603 R1 1.5K 0805 C5 .082UF 0805 TP4 TP5 TP6
J7 CON024 R25 0 0603 1 VIDEO_AVIN5 C22 0.1UF 0603
57
2 1 80 69 70
VDEC_HS VDEC_VS VDEC_FIELD VDEC_VREF VDEC_HREF
see JP3 see JP3
AVIN5
3
R27 75.0 0603
R29 75.0 0603
R31 75.0 0603 CT3 10UF B C12 0.1UF 0603 CT2 10UF B C14 0.1UF 0603
TP3
16 11 12 13 78 77 79 DEC_DATA_OE
AGND2 52
AGND2 CT1 10UF B C8 0.1UF 0603 C9 1000PF 0603 54 55
CAPC1 CAPC2
NC[GPO3] NC[GPO2] NC[GPO1]
17 18 34 35 DVDD_ADV7183 FER3 600 1206 VR1 7 10 72 4 6 15 SD R32 10K 0603 8 IN1 IN2 1 OUT1 2 OUT2 3 OUT3 5 FB GND 4 ADP3336ARMZ MSOP8 1.8V 3.3V 3.3V 3.3V 1.8V
C1 0.1UF 0603
C11 0.1UF 0603
NC[GPO0] CT4 10UF B C23 0.1UF 0603 C24 1000PF 0603
50
AVDD
DVDD1 DVDD2 DVDD3
30
AGND2
AGND2 C15 0.1UF 0603 C38 0.1UF 0603
38
PVDD
DVDDIO1 DVDDIO2
R38 76.8K 0805
C27 1UF 0603
39 40 47
AGND1 AGND2 AGND3 AGND4 AGND5 NC[AGND6] DGND1 DGND2 DGND3 DGND4 DGND5 3 9 14 31 71 C39 1UF 0603
1.8V
3.3V 53 AGND2 FER2 600 1206 AGND2 56 63
R36 147.0K 0805
ADV7183BKSTZ LQFP80
FER1 600 1206 3.3V 3.3V 3.3V DVDD_ADV7183 C4 0.1UF 0603 C3 0.01UF 0603 C7 0.1UF 0603 C6 0.01UF 0603 PVDD_ADV7183
C17 0.1UF 0603
C41 0.01UF 0603
C40 0.1UF 0603
C13 0.1UF 0603
C16 0.01UF 0603
C25 0.01UF 0603
C26 0.1UF 0603
C43 0.1UF 0603
C10 0.1UF 0603
ANALOG DEVICES
4-24-2006_9:50
AGND2
BLACKFIN A-V EZ-EXTENDER VIDEO DECODER (IN) A0193-2004

Sheet
D 8
Rev
27MHZ OSC
SN74LVC1G32
ADV7183 U28
C
Date
B C
2.0B
of
12
I2S_EN I2S_EN U29 RFS0 2 R144 33.0 0603 4 TFS0 RSCLK0 U30 2 R145 33.0 0603 4 TSCLK0 3.3V 1 1
R60 10K 0603 U18 1 OE 3 OUT
R68 33.0 0603 AD1836_CLK
OUT1 (BLUE) IN1 (BLACK) OUT2 (LIME) IN2 (YELLOW) OUT3 (PINK)
3.3V
12.288MHZ OSC003
AUDIO CODEC
3.3V R141 10K 0603 JP7 I2S_EN DR0PRI DR0SEC 1 3 5 2 4 6 IDC3X2_SMT 46 3V 1 5V140 5V2 3 Jumpers 47 R142 33.0 0603 RFS0 RSCLK0 R143 10 0603 AD1836_CLK 48 44 43 U24 ASDATA1 ASDATA2 ALRCLK ABCLK OUT1R+ 31 OUT1R+ OUT1R10 A5V115 A5V2 ADC1_LEFT OUT1L+ OUT1L8 9 OUT1L+ OUT1LR107 10K 0603 FER9 600 1206 3.3V 5V A5V
J5 C2 C3
DAC1 LEFT
ADC1_RIGHT
C4 C5
IN1 (BLACK)
30 OUT1R45 MCLK OUT2L+ SNAPSHOT_FODD_SSEL SCK MOSI MISO 50 51 CLATCH OUT2L6 7
DAC1 RIGHT DAC2 LEFT DAC2 RIGHT DAC3 LEFT DAC3 RIGHT
ADC2_LEFT
B2 B3
OUT2L+ OUT2L-
B4 ADC2_RIGHT B5 A1
IN2 (YELLOW)
CCLK 2 CDATA 49 COUT
OUT2R+
33
OUT2R+ OUT2R-
DAC1_LEFT
32 33 34
32 OUT2R-
OUT1 (BLUE)
ADC1 LEFT ADC1 RIGHT
IN1L+ IN1L-
16 17
IN1L+ IN1L-
OUT3L+ OUT3L-
4 5
OUT3L+ OUT3L-
DAC1_RIGHT
35
DAC2_LEFT IN1R+ IN1R18 19 IN1R+ IN1ROUT3R+ 35 OUT3R+ OUT3R-
22 23 24
34 OUT3R-
OUT2 (LIME)
DAC2_RIGHT 20 21 IN2L+/CL2/CL2 IN2L-/CL1/CL1 NC/IN2L1/IN2L+ NC/IN2L2/IN2L38 DSDATA1 41 DSDATA2 42 DSDATA3 36 DLRCLK 37 DBCLK DT0PRI DT0SEC DAC3_LEFT 1 TFS0 TSCLK0 R135 0 0603 5 3 IDC2X2 DAC3_RIGHT
25
2 JP10 2 4 3 4 5 1 CON035
ADC2 LEFT ADC2 RIGHT

3
IN2L1 IN2L2
22 23
OUT3 (PINK)
IN2R2 IN2R1
24 25 26 27
NC/IN2R2/IN2RNC/IN2R1/IN2R+ IN2R-/CR1/CR1 IN2R+/CR2/CR2 11 14AGND1 28AGND2 29AGND3 AGND4 FILTR FILTD 13 12
U27 7 AD1836_VREF
6 AD8606ARZ SOIC8 CT12 10UF B C131 0.1UF 0603 CT13 10UF B C132 0.1UF 0603 R130 0 0603 R111 0 0603 3 AGND
AV_RESET
AD1836AASZ MQFP52
39 52GND1 GND2
3 PD/RST
U27 1
C93 1000PF 0603
C100 1000PF 0603
C103 1000PF 0603
C111 1000PF 0603
2 AD8606ARZ SOIC8 R115 0 0603
AGND
AGND
3.3V
3.3V
3.3V
3.3V
5V
A5V
A5V
C144 0.1UF 0603
C145 0.1UF 0603
C75 0.1UF 0603
C110 0.01UF 0603
C124 0.1UF 0603
C99 0.1UF 0603
C115 0.1UF 0603
C130 0.1UF 0603
W2 COPPER MSC_COPPER
C120 0.22UF 0805
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER AUDIO A0193-2004

Sheet
D 9
AGND SN74LVC1G125 SN74LVC1G125 12.288MHZ OSC
AD1836
AGND
AGND AD8606
Rev
C
Date
C
2.0B
of
12
R100 5.49K 0603 R93 11.0K 0603 OUT1RR92 3.32K 0603
C106 100PF 0603
C107 330PF 0603
U23 1
DAC1 RIGHT
3 R86 5.49K 0603 OUT1R+ C89 680PF 0603 R85 1.65K 0603
AD8606ARZ SOIC8
R102 604.0 0603
CT8 10UF CAP002 DAC1_RIGHT
R79 2.74K 0603
C95 220PF 0603
C113 2200PF 0603
R109 49.9K 0603
AGND
R99 5.49K 0603 R90 11.0K 0603 OUT1LR91 3.32K 0603
C105 100PF 0603
C104 330PF 0603
U23 7
DAC1 LEFT
R83 5.49K 0603 OUT1L+ C88 680PF 0603 R84 1.65K 0603
5 AD8606ARZ SOIC8 R104 604.0 0603
3
R78 2.74K 0603 AD1836_VREF C94 220PF 0603
CT7 10UF CAP002 DAC1_LEFT
C116 2200PF 0603
R108 49.9K 0603
AGND
A5V
C112 0.22UF 0805
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER AUDIO OUT(CH1) A0193-2004

Sheet
D 10
AGND AD8606
Rev
C
Date
A B C
2.0B
of
12
1
R132 5.49K 0603 R126 11.0K 0603 OUT2RR125 3.32K 0603 OUT3RC136 100PF 0603 R94 11.0K 0603 R101 5.49K 0603 R95 3.32K 0603 C109 100PF 0603
C137 330PF 0603
U25 1
C108 330PF 0603
U22 7
DAC2 RIGHT
R119 5.49K 0603 OUT2R+ C123 680PF 0603 R118 1.65K 0603
DAC3 RIGHT
5 R133 604.0 0603 R87 5.49K 0603 OUT3R+ DAC2_RIGHT C90 680PF 0603 R88 1.65K 0603
3 AD8606ARZ SOIC8
AD8606ARZ SOIC8
CT15 10UF CAP002
R103 604.0 0603
CT9 10UF CAP002 DAC3_RIGHT
R113 2.74K 0603 AD1836_VREF
C126 220PF 0603
C140 2200PF 0603
R138 49.9K 0603
R80 2.74K 0603
C96 220PF 0603
C114 2200PF 0603
R96 49.9K 0603
AGND
AGND
R131 5.49K 0603 R123 11.0K 0603 OUT2LR124 3.32K 0603
C134 100PF 0603 R82 11.0K 0603 OUT3L-
R89 5.49K 0603 R81 3.32K 0603
C97 100PF 0603
C133 330PF 0603
U25 7
C98 330PF 0603
U22 1
DAC2 LEFT
3
R116 5.49K 0603 OUT2L+ C122 680PF 0603 R117 1.65K 0603
DAC3 LEFT
3 R136 604.0 0603 R75 5.49K 0603 OUT3L+ DAC2_LEFT C84 680PF 0603 R74 1.65K 0603
5 AD8606ARZ SOIC8
AD8606ARZ SOIC8
3
R98 604.0 0603 CT10 10UF CAP002 DAC3_LEFT
CT14 10UF CAP002
R112 2.74K 0603
C125 220PF 0603
C142 2200PF 0603
R137 49.9K 0603
R71 2.74K 0603
C87 220PF 0603
C102 2200PF 0603
R97 49.9K 0603
AGND
AGND
A5V
A5V
C135 0.22UF 0805
C101 0.22UF 0805
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER AUDIO OUT(CH2, CH3) A0193-2004

Sheet
D 11
Rev
AGND AD8606
AGND AD8606
C
Date
C
2.0B
of
12
FER6 600 0603
CT6 10UF CAP002
R77 5.76K 0603
R73 5.76K 0603 ADC2_LEFT C83 120PF 0603
FER5 600 0603
CT5 10UF CAP002
R76 5.76K 0603
R61 5.76K 0603
ADC1_LEFT
1
C91 100PF 0603 C71 120PF 0603
C92 100PF 0603
2 AGND 3
U21 1
R70 237.0 0603 IN1LAGND
U20 1 IN2L2
3 AD8606ARZ SOIC8 C86 1000PF 0603 C77 100PF 0603 R67 5.76K 0603 AD8606ARZ SOIC8 R72 5.76K 0603
R63 5.76K 0603
R62 5.76K 0603
ADC1 LEFT
C82 120PF 0603 R69 750.0K 0603 6 IN1L+ 5
C74 120PF 0603 AGND R65 750.0K 0603 6 R64 237.0 0603 7 5 AD8606ARZ SOIC8 C72 1000PF 0603
ADC2 LEFT
U21
U20 7 IN2L1
AD8606ARZ SOIC8
AGND AGND
FER7 600 0603 ADC1_RIGHT
CT11 10UF CAP002
R122 5.76K 0603
R121 5.76K 0603 ADC2_RIGHT C128 120PF 0603
FER8 600 0603
CT16 10UF CAP002
R140 5.76K 0603
R134 5.76K 0603
C129 100PF 0603
C139 100PF 0603
C141 120PF 0603
6 AGND 5
U26 7
R106 237.0 0603 IN1RAGND
U28 1 IN2R2
3 AD8606ARZ SOIC8 C119 1000PF 0603 C118 100PF 0603 R128 5.76K 0603 AD8606ARZ SOIC8 R139 5.76K 0603 C143 120PF 0603 R129 750.0K 0603 6 IN1R+ 5 AD8606ARZ SOIC8 AD8606ARZ SOIC8
R105 5.76K 0603
R120 5.76K 0603
ADC1 RIGHT
ADC2 RIGHT
C127 120PF 0603 AGND R127 750.0K 0603 2 R110 237.0 0603 1 3 C117 1000PF 0603
U26
U28 7 IN2R1
AGND AGND
AD1836_VREF
A5V
A5V
A5V
A5V
C73 0.22UF 0805
C121 0.22UF 0805
C138 0.22UF 0805
C85 0.22UF 0805
ANALOG DEVICES
4-24-2006_9:50
BLACKFIN A-V EZ-EXTENDER AUDIO IN(CH1, CH2) A0193-2004

Sheet
D 12
AGND AD8606
AGND AD8606
AGND AD8606
AGND AD8606
Rev
C
Date
B C
2.0B
of
12
INDEX
A
AD1836A audio codecs, 1-2, 2-5, 2-6, 2-10, 2-13 ADSP-BF533/37/61 processors flag pins, 2-5, 2-9, 2-14 parallel peripheral interfaces (PPI0-1), 1-2, 1-3, 1-6 PPI0-1 data pins, 2-4 PPI frame sync signals, 1-6, 2-9, 2-10 serial peripheral interface (SPI), 1-3 SPORT signals, 2-13 ADV7179 video encoders connections, 1-3 HREF connection jumper, 2-10 VSYNC connection jumper, 2-10 ADV7183B video decoders connections, 1-3 HSYNC disconnect jumper, 2-9 output enable jumper, 2-10 VSYNC connection jumper, 2-9 analog audio interface, See audio interface video interface, See video interface architecture, of this EZ-Extender, 2-2 ASDATA1-2 (AD1836A output) pins, 2-13 audio codecs, See AD1836A audio codecs interface, -x, 1-2, 2-2 loopback jumpers, 2-14 AV_RESET source jumper, 2-14
B
backlight feature, 1-6 bidirectional buffers, 2-2 bill of materials, A-1 block diagram, of this EZ-Extender, 2-3 board schematic, B-1
C
camera module interfaces, 1-4, 2-11 connectors DB9, 1-6 J4 (OmniVision camera), 1-4 J6 (Micron camera), 1-4 P4 (Kodak camera), 1-5 customer support, -xiii
D
data clock, 2-2 pins, See PPI0_Dx, PPI1_Dx DB9 connector, 1-6 DR0PRI net, 2-6 DR0SEC net, 2-6 DT0PRI net, 2-6 DT0SEC net, 2-6 Dx pins, 2-4, 2-5
E
expansion interface, 1-2, 1-3, 2-2 EXT_VID_CLK net, 2-11
I-1
INDEX
EXT_VID_CLK pin, 2-11 EZ-KIT Lites, parallel peripheral interfaces (PPI0-1), 2-2, 2-5
J
JP10.1/2 (audio loopback) jumper, 2-14 JP10.3/4 (audio loopback) jumper, 2-14 JP1.1/2 (video loopback) jumper, 2-7 JP1.3/4 (video loopback) jumper, 2-7 JP1.5/6 (video loopback) jumper, 2-7 JP2 (voltage select) jumper, 2-7 JP3.11/12 (ADV7183B HSYNC disconnect) jumper, 2-9 JP3.13/14 (ADV7183B VSYNC connect) jumper, 2-9 JP3.15/16 (ADV7179 HREF connect) jumper, 2-10 JP3.17/18 (ADV7179 VSYNC connect) jumper, 2-10 JP3.19/20 (ADV7183B enable) jumper, 2-10 JP3.21/22 (SNAPSHOT_FODD) jumper, 2-5, 2-10 JP3.3/5/7 (TWI source) jumper, 2-4, 2-5, 2-7 JP3.4/6/8 (TWI source) jumper, 2-4, 2-5, 2-7 JP3.9/10 (PDWN connect) jumper, 2-4, 2-9 JP4.1/2 (PPI clock) jumper, 2-4, 2-5, 2-10 JP4.3/4 (PPI clock) jumper, 2-4, 2-5, 2-10 JP4.5/6 (PPI clock) jumper, 2-4, 2-5, 2-10 JP4.7/8 (PPI clock) jumper, 2-4, 2-5, 2-10 JP5.1/2 (PPI0 data enable) jumper, 2-11 JP5.3/4 (video out control) jumper, 2-4, 2-5, 2-11 JP5.5/6 (video out control) jumper, 2-4, 2-5, 2-11 JP6.1/3/5 (PPIO_SYNC1 direct) jumper, 2-4, 2-12 JP6.2/4/6 (PPI0_SYNC2 direct) jumper, 2-4, 2-12 JP7.1/2 (I2S enable) jumper, 1-3, 2-6, 2-13 JP7.3/4 (SPORT connect) jumper, 2-6, 2-13 JP7.5/6 (SPORT connect) jumper, 2-6, 2-13 JP8.1/3/5 (video out SYNC select) jumper, 2-4, 2-5, 2-13
F
flag pins, ADSP-BF533/37/61 processors, 2-5, 2-9, 2-14 FLAG_SCL_DIR_CTRL net, 2-5 FLAG_SDA net, 2-5 flat panel display interface, See FPDI FODD (OmniVision control) signal, 2-10 FPDI connections, -xi, 2-2 HS signal, 2-4, 2-5 overview, 1-6 VS signal, 2-4, 2-5 frame sync signals, 2-2, 2-13
G
general-purpose flags, 2-10, 2-12, 2-14
H
HREF connection jumper, 2-10 signal, 2-4 HS signal, 2-4, 2-5 HSYNC disconnect jumper, 2-9 signal, 2-4
I
I2S mode, 1-2, 2-6, 2-13 installation, of this EZ-Extender, 1-1 interfaces analog audio, -x, 1-2 analog video, -x, 1-3 camera modules, -x, 1-4 flat panel displays, -xi, 1-6
I-2
INDEX
JP8.2/4/6 (video out SYNC select) jumper, 2-4, 2-5, 2-13 JP8.7/8 (video out SYNC enable) jumper, 2-4, 2-5, 2-13 JP9.1/3/5 (reset) jumper, 2-14 JP9.2/4/6 (PPI0 direction) jumper, 2-4, 2-14 jumpers See also jumpers by name (JPx) map of locations, 2-7
P
parallel peripheral interfaces See also PPI0, PPI1, ADSP-BF533/37/61 processors audio module connections, 1-3 camera module connections, 1-5 clock setup jumpers, 2-10 driving VID_OUT bus, 2-12, 2-13 of ADSP-BF533/37/61 EZ-KIT Lites, 2-2 PDWN connection jumper, 2-9 input signal, 2-4 PIXEL_CLK net, 2-11 PPI0 data bus enable jumper, 2-11 data direction setup jumper, 2-14 frame SYNC signals, 2-9 PPI0_CLK net, 2-4, 2-10, 2-11 PPI0_Dx nets, 2-4, 2-14 PPI0_SYNC1-2 direction setup jumpers, 2-12 nets, 2-4 PPI1_CLK net, 2-5, 2-10 PPI1_Dx nets, 1-3, 2-4, 2-5, 2-14 PPI1_FS1-2 nets, 2-5 product overview, -ix
K
Kodak camera connector (P4), 1-5 interface, -x, 2-4, 2-5, 2-9 SNAPSHOT signal, 2-10
M
Micron camera connector (J6), 1-4 interface, -x MISO net, 2-6 MOSI net, 2-5 multi-bit sigma-delta architecture, 1-2
N
notation conventions, -xvi
R
RCA phono jacks, -x reset, 1-3 AD1836A, 1-3 ADV7179/ADV7183B, 1-4 source jumper, 2-14 RFS0 net, 2-6 RSCLK0 net, 2-6
O
OmniVision camera connector (J4), 1-4 control signal (FODD), 2-10 interface, -x, 1-4, 2-4, 2-5, 2-9
S
schematic, of this EZ-Extender, B-1
I-3
INDEX
SCK net, 2-5 serial peripheral interface, See SPI setup, of this EZ-Extender, 1-1 SNAPSHOT_FODD disconnect jumper, 2-10 SNAPSHOT_FODD_SSEL net, 2-5 SNAPSHOT (Kodak camera) signal, 2-10 SPI serial clock (SCK), 2-5 serial input data signal (MISO), 2-6 serial output data signal (MOSI), 2-5 SPORT configuring for I2S mode, 2-13 data connection jumpers, 2-13 data input pins, 2-13 SPORT0 connections, 1-2, 2-2 receive clock signal (RSCLK0), 2-6 receive frame SYNC signal (RFS0), 2-6 transmit clock signal (TSCLK0), 2-6 transmit frame SYNC signal (TFS0), 2-6 system architecture, of this EZ-Extender, 2-2 reset, 2-14
TSCLK0 net, 2-6 two-wire interface (TWI) signals, 1-4, 2-5 source selection jumpers, 2-7
U
U8 socket, 2-11 unidirectional buffers, 2-2
V
VDEC_CLKOUT net, 2-11 video decoders, See ADV7183B video decoders encoders, See ADV7179 video encoders interface, -x, 1-3, 2-2, 2-4, 2-5 test loopback jumpers, 2-7 VID_IN bus, 2-2, 2-4, 2-10 VID_OUT bus control jumpers, 2-11 signals, 2-2, 2-4 SYNC enable jumper, 2-13 SYNC source select jumpers, 2-13 voltage selection jumper, 2-7 VS signal, 2-4, 2-5 VSYNC connection jumper, 2-9, 2-10
T
TFS0 net, 2-6 time-division multiplexed (TDM) mode, 1-2
I-4

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Blackfin A-V EZ-Extender Manual

Revision 2.0, April 2006 Part Number 82-000870-01

Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106

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A-V EZ-EXTENDER INTERFACES