VLSI Engineering

Note: Objective questions -Each question carries one mark ---(total 10 marks) and Descriptive question carries 5 marks
1. Which crystal structure is preferred to fabricate BJT in VLSI technology?
a. b. c. d. <111> <100> <110> None of the above

2. Match List I with List II and select the correct answer using the codes given below the lists : List I High density SiO2 Hydrofluoric acid Electronic Activity List II I. Mask II. Etching III. Misfit Factor IV. MOSFET

A. B. C. D.

Codes: A) a. b. c. d. IV III I IV B) I II II III C) II I III II D) III IV IV I

3. Threshold voltage(Vth) of the MOSFET depends on the factors a. Gate oxide thickness b. Substrate doping concentration c. Both A & B d. None of the above

4. See the stages in fabrication below I. Zone refining II. In-situ Cleaning III. Vapor phase Epitaxy

IV. Oxidation Mention the correct sequence followed a. I II III IV b. I III II IV c. II III I IV d. IV III II I 5. Silane(SiH4) has advantages over Sicl4 a. No Hcl b. Extremely sensitive to Oxygen c. Both A & B d. None of the above 6. The reasons for auto doping are a. Solid state diffusion b. Gas-Phase auto doping c. Liquid-solid diffusion d. Both A&B e. All the above 7. Which of the following are not correct A. Diffusion is the best known technique for doping B. Diffusion is the cheapest technique for doping C. Arsenic doped single crystal Si is the starting substrate for the fabrication of an n p n BJT D. Single crystal Si substrate is not necessary for the fabrication of MOSFET a. A, B,C b. B,C,D c. A,C,D d. A,B,D 8. In order to produce uniform doping along the length of the CZ crystal the dopant should have a. Segregation coefficient should be less than one b. Segregation coefficient should be more than one c. Segregation coefficient should be equal to one d. None

Answer Q 9 and 10 using the following data The threshold voltage is given by the expression

As MOS devices are scaled to smaller dimensions, gate oxides must be reduced in thickness. 9. As the gate oxide thickness decreases, MOS devices are a. More sensitive to the Na+ contamination in the oxide layer b. Less sensitive to the Na+ contamination in the oxide layer c. No change in the sensitivity of the Na+ contamination d. None 10. As the gate oxide thickness decreases, inorder to maintain the same Vth what must be done to the substrate doping? a. Substrate doping has to be increased b. Substrate doping has to be decreased c. No matter whether it is increased or decreased d. Ion implantation should be done

Answer the following question

1. Explain CZ technique for the growth of single crystal Si with a diagram and discuss everything about the contaminations in the grown CZ crystal. (2+3M)

Answers
1. a 2. a 3. c 4. a 5. a 6. d 7. c 8. c 9. b 10. a