Embedded System Architectures: Dr. Shubhajit Roy Chowdhury

Embedded System Architectures
Dr. Shubhajit Roy Chowdhury,

Centre for VLSI and Embedded Systems Technology, IIIT Hyderabad, India Email: src.vlsi@iiit.ac.in
Dr. Shubhajit Roy Chowdhury
CVEST, IIIT HYDERABAD
OVERVIEW OF EMBEDDED SYSTEM ARCHITECTURE
BUILDING BLOCK OF HARDWARE OF AN EMBEDDED SYSTEM

Central Processing Unit (CPU) Memory Input devices Output devices
SOFTWARE IN EMBEDDED SYSTEM

Software : Device driver + OS + Application program Device driver Digital IO (GPIO-LED, Relay, Switch,) , ADC, DAC, U(S)ART, Timer/counter, WDT, I2C, SPI, PWM, Actuator, Sensor, Touch screen, IRDA, Network (Ethernet, X.25, Wireless...), USB, IEEE1394 (Firewire), Audio, Video Graphic, LCD, Keyboard, Mouse, DMAC, Bluetooth OS or nonnon-OS OS roles and missions Process Management : Task scheduling, Context switching Resource Management : CPU, MMU, Disk, I/O devices File System : FAT, NTFS, EXT2/3, JFS, NFS Device Driver : I/O, Network GUI, Security, ... Embedded system OS Multi-tasking, Network, Multimedia, Portable, Preemptive, Deterministic (Hard Real-time), Robust & Reliable
CHARACTERISTICS
Embedded systems are designed to do some specific task, rather than be a general-purpose computer for multiple tasks. Some also have real-time performance constraints that must be met, for reasons such as safety and usability; others may have low or no performance requirements, allowing the system hardware to be simplified to reduce costs. User interface Processors in embedded systems Ready made computer boards Peripherals Tools Debugging Reliability
User interface
Basic Architecture
Control unit and datapath Note similarity to single-purpose processor Key differences Datapath is general Control unit doesnt store the algorithm the algorithm is programmed into the memory
Processor Control unit Datapath ALU Controller Control /Status Registers
PC
IR
I/O Memory
Datapath Operations
Load
Read memory location into register Store
Write register to memory location
PC IR Control unit Controller Processor Datapath ALU Control /Status
+1
Registers
10
11
ALU operation
Input certain registers through ALU, store back in register
I/O Memory
... ...
10 11
Control Unit Control unit: configures the

datapath operations Sequence of desired operations (instructions) stored in memory program Instruction cycle broken into several sub-operations, each one clock cycle, e.g.: Fetch: Get next instruction into IR Decode: Determine what the instruction means Fetch operands: Move data from memory to datapath register Execute: Move data through the ALU Store results: Write data from register to memory
PC
IR
R0
R1
I/O 100 load R0, M[500] 101 inc R1, R0 102 store M[501], R1 Memory 500 501
...
10
...
Architectural Considerations
N-bit processor N-bit ALU, registers, buses, memory data interface Embedded: 8-bit, 16bit, 32-bit common Desktop/servers: 32bit, even 64 PC size determines address space
PC
IR
I/O Memory
Architectural Considerations
Clock frequency Inverse of clock period Must be longer than longest register to register delay in entire processor Memory access is often the longest
PC Processor Control unit Datapath ALU Controller Control /Status Registers
IR
I/O Memory
Pipelining: Increasing Instruction Throughput

Wash Dry 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 1 3 2 4 3 5 4 6 5 7 6 8 7 8 Non-pipelined Pipelined
non-pipelined dish cleaning
Time
pipelined dish cleaning
Time
Fetch-instr. Decode Fetch ops. Execute Store res.
2 1
3 2 1
4 3 2 1
5 4 3 2 1
6 5 4 3 2
7 6 5 4 3
8 7 6 5 4 8 7 6 5 8 7 6 8 7 8 Pipelined
Instruction 1
pipelined instruction execution
Time
Superscalar and VLIW Architectures

Performance can be improved by: Faster clock (but theres a limit) Pipelining: slice up instruction into stages, overlap stages Multiple ALUs to support more than one instruction stream Superscalar Scalar: non-vector operations Fetches instructions in batches, executes as many as possible May require extensive hardware to detect independent instructions VLIW: each word in memory has multiple independent instructions Relies on the compiler to detect and schedule instructions Currently growing in popularity
Embedded System Design: Levels of abstraction

requirements specification architecture component design system integration
Top-down vs. bottom-up

Top-down design:
start from most abstract description; work to most detailed.
Bottom-up design:
work from small components to big system.
Real design uses both techniques.
Stepwise refinement
At each level of abstraction, we must:
analyze the design to determine characteristics of the current state of the design; refine the design to add detail.
Requirements
Plain language description of what the user wants and expects to get. May be developed in several ways:
talking directly to customers; talking to marketing representatives; providing prototypes to users for comment.
Functional vs. non-functional requirements

Functional requirements:
output as a function of input.
Non-functional requirements:
time required to compute output; size, weight, etc.; power consumption; reliability; etc.
Our requirements form

name purpose inputs outputs functions performance manufacturing cost power physical size/weight
Specification
A more precise description of the system:
should not imply a particular architecture; provides input to the architecture design process.
May include functional and non-functional elements. May be executable or may be in mathematical form for proofs.
GPS specification
Should include:
What is received from GPS; map data; user interface; operations required to satisfy user requests; background operations needed to keep the system running.
Architecture design
What major components go satisfying the specification? Hardware components:
CPUs, peripherals, etc.
Software components:
major programs and their operations.
Must take into account functional and nonfunctional specifications.

GPS moving map block diagram
GPS receiver
search engine
renderer
display
database
user interface
GPS moving map hardware architecture

display frame buffer CPU GPS receiver memory panel I/O
GPS moving map software architecture

position database search pixels
renderer
user interface
timer
Designing hardware and software components

Must spend time architecting the system before you start coding. Some components are ready-made, some can be modified from existing designs, others must be designed from scratch.
System integration
Put together the components.
Many bugs appear only at this stage.
Have a plan for integrating components to uncover bugs quickly, test as much functionality as early as possible. Catching a glitch in time saves nine!
APPLICATION AREAS
Automative Ignition System Engine Control Brake System
Medical Infusion Pumps Dialysis Machine Prosthetic Device Cardiac Monitor
Consumer Electronic TV Set-Top Box PDA Kitchen Application Toys/Games Telephone/Cell Phones Camera/GPS
Industrial Contol Robotics Control System Art.Satellies Missiles Nuclear Reactors Space Stations Shuttles
Networking Router Hubs Gateways
Office Automation Fax Copier Printers Scanners Card Readers Monitors
Summary
Embedded computers are all around us.
Many systems have complex embedded hardware and software.
Embedded systems pose many design challenges: design time, deadlines, power, etc. Design methodologies help us manage the design process.
Thank you

Embedded System Architectures: Dr. Shubhajit Roy Chowdhury

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Embedded System Architectures

Dr. Shubhajit Roy Chowdhury,

OVERVIEW OF EMBEDDED SYSTEM ARCHITECTURE

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

BUILDING BLOCK OF HARDWARE OF AN EMBEDDED SYSTEM

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

SOFTWARE IN EMBEDDED SYSTEM

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Control Unit Control unit: configures the

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Pipelining: Increasing Instruction Throughput

non-pipelined dish cleaning

pipelined dish cleaning

Fetch-instr. Decode Fetch ops. Execute Store res.

pipelined instruction execution

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Superscalar and VLIW Architectures

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Embedded System Design: Levels of abstraction

Top-down vs. bottom-up

Real design uses both techniques.

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Functional vs. non-functional requirements

Our requirements form

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Must take into account functional and nonfunctional specifications.

GPS moving map block diagram

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

GPS moving map hardware architecture

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

GPS moving map software architecture

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Designing hardware and software components

Dr. Shubhajit Roy Chowdhury

CVEST, IIIT HYDERABAD

Medical Infusion Pumps Dialysis Machine Prosthetic Device Cardiac Monitor

Networking Router Hubs Gateways

Office Automation Fax Copier Printers Scanners Card Readers Monitors