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D AVR core and power Power supply, reset circuit, reference voltage and power indicator.
D
200v1.S01
Port A
200v1.S02 Analogue and digital inputs with options for FET outputs
Port B Digital inputs with optional FET outputs ( PB0 to PB3 ) and programming connector.
200v1.S03 SPI and select lines.
C C
Port C
200v1.S04 FET outputs with the option of digital inputs.
Port D
200v1.S05 Serial communications. 3 inputs. 3 FET outputs.
B B
A A
JED MICROPROCESSORS PTY LTD
173 BORONIA ROAD, BORONIA, VIC, 3155
Ph (03) 9762 3588 Fax (03) 9762 5499 Email: jed@jedmicro.com.au
TITLE
Title page
PROJECT NUMBER 200v1.Sch
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
D
SW1 D
RESET*
GND RESET*
< RESET RUN >
VCC U2A
ATMEGA32_DIP
U1
R7 DS1233 DS1233
1K 9
RESET* RESET*
HS1 C13
27PF
LED1 X2 12
The regulator is fitted with a XTAL2
POWER
heatsink # 35-18-5771 C12 X1
27PF 3.6864 ATmega32
X1 13
HEATSINK TO220 HORIZONTAL XTAL1
L2 GND
J1 LC8 U3
DSS706 LM2940T-5.0 IND-100UH
C POWER IN C
1 IN_1 1 3 IN_2 VCC VCC_F 10
IN OUT VCC
3.81 Power
2 LM2940T
C9 C10 C2
2
4.096V R1
8
COMP 2M2
C14 C15
3 0.047UF 10./10
TEMP
MAX874 VR1
GND 5
TRIM CW V1M^
IC
IC
R2
1
7
3M3
GND
TITLE
AVR & POWER
PROJECT NUMBER 200v1.S01
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
VCC
L6 PORTA_3 5
PORTA_2
38 PA2
PA2(ADC2)
GND
ATmega32
L7
37 PA3 PORTA_3
PA3(ADC3)
GND OUTSIDE WORLD
RS PU
B Port A
PA4(ADC4)
36 PA4 L8 J3
PORTA_4 PORT A 4/7
GND 1
GND
35 PA5 PORTA_4 2
PA5(ADC5)
L9 PORTA_5 3
PORTA_5
RS PD 34 PA6 GND PORTA_6 4
3.81
C PA6(ADC6)
L10 PORTA_7 5
C PORTA_6 C
33 PA7 1 3 6
PA7(ADC7)
GND
LC1
DSS706
2
L11
RS PORTA_7
GND
D GND
VCC_PA
RS J2A
E PORT A 0/3
Optional connectors to
outside world.
J3A
PORT A 4/7
RD RS
F
GND VCC
CLAMPING
B VCC B
PA0/7 INPUT 0/7
8
GND
2 PB0
REF
C0
3 PB1
C1
4 INT2
C2
Analogue and digital inputs. TL7726
C3
5
6
GND
C4
7
A = FET output ( resistor PD ensures that FET is off during reset ) C5
B = An active low digital input ( eg switch ) or for resistive transducer to U5 To .S03 drawing
ground.
1
TL7726
C = An active high digital input or analogue termination resistor to ground
(eg 200R for 4 to 20mA loop)
8
C0
3
F = A voltage divider analogue input. C1
4
C2
Voltage to AVR = RD x Vinput/(RS+RD) TL7726
C3
5
6
GND
C4
7
Notes C5
RS is the input protection series protection typically 4k7 or 10k U6
TL7726
PU is a pull up resistor
1
TITLE
PORT A
PROJECT NUMBER 200v1.S02
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Note:
If PB0 to PB3 are used as inputs install RP5 (in socket) & RP15.
RP5 can be installed as shown for pull down mode or reversed for pull up mode. Note:
Pull up RP5 can be installed
Note: If used as outputs fit F1, F2, F3 & F4 & RP1 but do not fit RP5 & RP15. RP5a
in pull down or pull up
4X4K7* Pull down mode.
Install RP1 only if PB0/PB3 used as outputs.
RP5
6 way socket
RP1
D 4X4K7^ D
6
5
4
3
2
1
GND
Optional FETs
VCC
F4 J12
FET4 PORT B 0/3
MTD3055VL 1
F3 S
FET3 2
MTD3055VL
3.81
F2 3
S
FET2
MTD3055VL 4
F1 S
FET1 5
From .S02 drawing MTD3055VL
clamping devices INT2 S
GND
U2C J12A
ATMEGA32_DIP PORT B
1 PB0
Optional connector to
PB0(XCK/T0) 1 RP15 2
outside world.
3 4
J13 Pins 7, 8, 9 & 10 missing
2 PB1 14 13
PB1(T1) 5 6
12 11
C 10 9 C
7 8
8 7
3 GND 6 5 RESET* 4X4K7
PB2(INT2/AIN0)
4 3 To reset circuit on
Pull up Note:
VCC 2 1 sheet 200v1.S01
ATmega32 RP6a RP6 can be installed
4 PB3 Reset circuit to U2 4X4K7* in pull down or pull up
PB3(OC0/AIN1) Prog Pull down
RP6 mode.
Optional for input only 6 way socket
Port B 5 PB4
PB4(SS*)
6
5
4
3
2
1
J11
PORT B 4/7
6 PB5
RP7 1
PB5(MOSI) 4X4K7
1 2 2
3.81
7 PB6 3 4 3
PB6(MISO)
5 6 4
8 PB7 7 8 5
PB7(SCK)
B B
Note:
J13 connector. Z6 Z7 Z8 Z9 J11A Optional connector to
ZD_4V7 ZD_4V7 ZD_4V7 ZD_4V7 PORT B 4/7
outside world.
Pins 1 to 6 match the standard Atmel AVR-ISP/STK500 6 pin
programming cable pinout. GND
A A
JED MICROPROCESSORS PTY LTD
173 BORONIA ROAD, BORONIA, VIC, 3155
Ph (03) 9762 3588 Fax (03) 9762 5499 Email: jed@jedmicro.com.au
TITLE
PORT B
PROJECT NUMBER 200v1.S03
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Batt+V
VCC
8
U2D SCL R9 R10
C16 J6
SDA 330R 330R LC4 22/10 BOX10
ATMEGA32_DIP 82B715 R11 DSS706
+V Vertical BATT1 3 2
10R 1 3 1 2
lithium BR1225/1VC 3 4
Buffered
Z1 Z2 battery
Optional for input only R12 LC5 DSS706 5 6
Bus
ZD_4V7
ZD_4V7
22 -V
PC0(SCL) 10R 7 8
2
6 7 1 3 9 10
C
GND
RP2a C
PC1(SDA)
23 3X4K7* U11
2
82B715 GND
RP2 VCC
J4 LC7
4
24 PORTC 2/4
PC2(TCK) GND GND
GND 1 DSS706
ATmega32 1 3
FET5 2
25
PC3(TMS)
2
F5 F6 F7 FET6 3
3.81 LC6
DSS706
2
RP8 3055 3055 3055
Port C FET7 4
26 3 X 4K7 1 3
PC4(TDO)
S S S
1
2
27 GND
PC5(TDI) GND Optional connector to Note:
INT1
INT0
Z10 Z11 Z12 outside world. For outputs install :-
RP13
PC6(TOSC1)
28 3X4K7 F5, F6, F7 & RP8
5 6
ZD:4V7
ZD:4V7
ZD:4V7
3055 3055 3055 RP3, RP14 & 3 x 4v7 zeners in place of RP9
FET10 4
RP9 RP3 can be installed as shown for pull down or
3X4K7 S S S reversed for pull up.
a GND
1
GND
OR Z14 1 2
Z13 Optional connector to
Z15
Use resistor pack to 3 4
outside world.
ZD:4V7
ZD:4V7
A A
ZD:4V7
provide pull down for FETs 5 6 J5A JED MICROPROCESSORS PTY LTD
Use Zeners in the resistor pack holes RP14 PORT C 5/7 173 BORONIA ROAD, BORONIA, VIC, 3155
to provide spike protection for inputs. 3X4K7 Ph (03) 9762 3588 Fax (03) 9762 5499 Email: jed@jedmicro.com.au
OR TITLE
These components only required PORT C
Optional for input only
6 holes if the output option is used PROJECT NUMBER 200v1.S04
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1
PD6 MTD3055VL FET11 1
PD3
PD2
RP10 7
1
3X4K7 F12 S 2
5
RP16 MTD3055VL FET12 3
3.81
VCC 3X4K7 4
2
4
GND F13 S GND
C8
16
C5 C6 Z16 Z17 Z18
MTD3055VL FET13
2
0.1UF 0.1UF 0.1UF
2 6 GND
VCC
S
ZD:4V7
ZD:4V7
ZD:4V7
+ G GND
U2E U8 Optional for input only Optional connector to
1 4
MAX202E J8
ATMEGA32_DIP C4 C7 outside world.
1
0.1UF 3 5 0.1UF 6
J9A
5V 232 2
14 RXD 7 PORT D 236
PD0(RXD)
TX_5 11 14 4
L13 3 3 RP11
C T C
2 1 8 3X4K7
4 1 2
J9
15 TXD 12 13 9
PORT D 2, 3 & 6
PD1(TXD) R CTS_5 1
L14 5 3 4 6
L17 2
RTS_5 10
T
7 DB9F. 5 6 3
PD2(INT0)
16 L16 3
3.81
Z3 Z4 Z5 2
9 8 L15
ZD_4V7
ZD_4V7
ZD_4V7
R 4
ATmega32 GND
GND
5
17
PD3(INT1)
J8A L18
INT1
GND
INT0
RX_5
GND GND RP12
RX 3X4K7
15
Port D 18 GND
PD4(OC1B) VCC TX
GND CTS
U9A RTS
16
6
SERIAL U/S VCC
19 74HC157.
PD5(OC1A) CTS_5
1
VCC
A/B
GND
15
G
L21
20 74HC157
PD6(ICP)
8
8
2B
MAX3082ECPA LC3 3.81
74HC157
DSS706
2
B if a RS485 option kit (485) is
3
L20 A 6 A 1 3 3 A installed. Otherwise they are
4 omitted and all
VCC communication is via the
2
R5 U9E 74HC157. 2 LC2 RS232 port.
14 1 DSS706
4K7 GND 4A B
J7a
12 7 B 1 3 RS485
4Y
L19 4B
13
232/485 select 74HC157
5
2
receive line
Note:-
L19 jumper options
Jumper pins 1 & 2 gives control of 232 or 485 to
PD4 U9D 74HC157. J7B
( low = RS485 high = RS232 ) VCC 11
3A
9
TTL/Radio Serial comms
The next 2 options release PD4 for use as either an 10
3Y GND
3B
input or output. 74HC157 J7a is an internal connection for a TTL level internal serial
Jumper pins 2 & 3 selects RS485 only. communication.
A Leave open selects RS232 only. L22 A
Can only be used if the RS485 transceiver (U10) is not JED MICROPROCESSORS PTY LTD
If only RS232 is required link L20 & L21 and omit installed.
U9 and U10. U9B 74HC157. 173 BORONIA ROAD, BORONIA, VIC, 3155
Pin #1 Ground Ph (03) 9762 3588 Fax (03) 9762 5499 Email: jed@jedmicro.com.au
PD7 2
1A
4 Pin #2 Tx
1Y TITLE
GND 3
1B
Pin #3 Tx control PORT D
74HC157 Pin #4 Rx
PROJECT NUMBER 200v1.S05
1 2 3 4 5 6 7 8