10-Oct-13 ENEE419A Abshire Fall 2013 1

Current mirrors (Chapter 20)

Current mirrors source or sink current
Ideal output resistance of current source is infinite
Main design focus: achieving high output resistance
Basic current mirror
Same gate-source voltages, so same drain current (neglecting channel
length modulation) if lengths are same


can adjust output current
by adjusting width W
2
What about Early effect?

( )
( )
2,
2 2
1 1 1 1,
1
1
O DS sat
O
REF DS DS sat
V V
I W L
I W L V V

+
=
+
2
1
O
REF
I W
I W
=
2
Matching currents
Matching is very important
Analog values are susceptible to errors caused by process
variations
Important process parameters include gate-oxide thickness,
lateral diffusion, oxide encroachment, oxide charge density, and
dopant concentration
Current mismatch due to threshold voltage difference V
THN



difference increases as V
GS
decreases
Current mismatch due to process transconductance mismatch
2
1
out THN
in GS THN
I V
I V V

1
out
in
I K
I K

= +
10-Oct-13 ENEE419A Abshire Fall 2013
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Matching currents (2)
Current mismatch due to Early voltage mismatch and output
conductance


Increase channel length to minimize Early effect!
Channel length modulation is less severe for longer channels
Minimum sized devices rarely used in analog applications
Larger devices incur larger parasitics
Larger resistance from long diffusions use many contacts
( )
( )
2 2 2
1 1 1
1
1
DS DSsat
out
in DS DSsat
V V
I
I V V

+
=
+
10-Oct-13 ENEE419A Abshire Fall 2013
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How to make a better current mirror
Whats the problem?
Output current increases as the output voltage increases
Modeled using output resistance r
0
Need to keep drain voltage constant
Without fixing the output voltage!
10-Oct-13 ENEE419A Abshire Fall 2013
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Cascode current mirror
Used to increase output resistance
Decreases voltage swing



If we can reduce the second
gate voltage, we reduce the
minimum output voltage
Use a source follower
M
2
M
1

M
3

M
4

I
out

( )
2min
4 1 3
4min 4
2
2
D GS THN
G GS GS THN
D G THN THN
V V V V
V V V V V
V V V V V
= =
= + = +
= = +
M
5

M
1

M
3

M
6

M
2

M
4

I
in

I
out

I
in

( )
( )
4 1 3 6
6 6 6
4min 4
2
when
2
G GS GS GS
THN THN
GS THN
D G THN
V V V V
V V V
V V W L
V V V V
= +
= +
>>
= =
10-Oct-13 ENEE419A Abshire Fall 2013
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Wide-swing, low voltage cascode
For the regular cascode, the drain of M2 is more than the
minimum voltage required for saturation (by V
THN
)
This limits the output voltage
To set the gate voltages for M2 & M4, can use diode-connected
MOSFETs with W/L adjusted appropriately
( )
( ) ( )
( )
2
2
2
2
2
2
4
2
4
REF GS THN
MWS
REF GS THN THN THN
MWS
MWS
GS THN
MWS
MWS
MWS
KP W
I V V
L
KP W
I V V V V
L
KP W
V V
L
W W
L L
=
= +
=
=
10-Oct-13 ENEE419A Abshire Fall 2013
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Cascode current mirror
2 2 m gs
g v
2 o
r
+
-
v
x

4 4 m gs
g v
4 o
r
1
1
m
g
3
1
m
g
( )
( )
2
1 2 1
3 1 4 2
3 4
2 4 4
4 4
4 4
2 4
4
4 4 4
2
2
2
0
1
2
D D GS TH
D D D D
ref D D out
gs gs s
s x s
x m s
o o
o
x s o m
o
x
o m o o m o
x
I I V V
I I I I
I I I I
v v v
v v v
i g v
r r
r
v v r g
r
v
R g r r g r
i

= =
= =
= = =
= =

= =
(
= + +
(

= = +
i
x
10-Oct-13 ENEE419A Abshire Fall 2013
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Wide swing, low voltage current mirror
This is like a cascode, but the upper gate voltage is provided by
a reference
Can be a diode-connected transistor
The lower gate voltage is provided
by a diode-connection to the drain
of the upper transistor
Minimum output voltage is one
threshold voltage drop less than the
bias voltage of the cascode
Output resistance is the same as the cascode

The is the recommended topology for all wide-swing current
mirrors
M
2
M
1

M
3

M
4

I
out

I
in

V
bias

2
o m o
R g r
10-Oct-13 ENEE419A Abshire Fall 2013
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Regulated drain current mirror
Amplifier holds the drain of M2
at a fixed voltage







Output resistance increased by the gain A!
( )
( )
( )
( )
4 4
4
2 2
1
1
2 1
out
s x o g x o
gs x o
x x o
x m x o
o
x
o o m o m o
x
v A v v
v i r v Ai r
v A i r
v i r
i g A i r
r
v
R r g r A g r A
i
+
=
= =
= +

= + + (

= = + +
10-Oct-13 ENEE419A Abshire Fall 2013
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Regulated drain current source
Uses negative feedback to stabilize the
output current and increase output
impedance
Higher output impedance than cascode
or Wilson mirror!

Transistors M
1
and M
2
make up the
negative feedback loop to stabilize I
out
If I
out
rises, then the gate voltage on M
1
rises
This increases current through M
1
and
decreases voltage at the gate of M
2
,
counteracting the initial rise in current
Minimum V
out
is same as for cascode
M
3

M
1

M
2

V
bias

I
in

I
out

2 3
2
m o
o
g r
R
min 2 ,
2
out DS GS DS sat TH
V V V V V V = + = +
M
4

10-Oct-13 ENEE419A Abshire Fall 2013
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Regulated drain current mirror
M1 and M2 have the
same gate-to-source
voltage AND drain-
to-source voltage
Retains high output
resistance and low
minimum voltage of
regulated cascode
M
2

M
6

M
4

I
out

M
1

M
5

M
3

V
bias

10-Oct-13 ENEE419A Abshire Fall 2013
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Other Sources/Sinks
MOS Wilson current mirror:
Drain voltages of Q
1
and Q
2
not equal
Deterministic mismatch, currents unequal
Modified Wilson current mirror:
R
o
=g
m
r
o
2
Voltage V
o
is reduced relative to simple mirror
(minimum output voltage same as for cascode):
Wilson
modified
Wilson
2 2
O GS TH TH
V V V V V = +
10-Oct-13 ENEE419A Abshire Fall 2013
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Modified Wilson Current Mirror
1 1 m gs
g v
1 o
r
+
-
v
x

3 3 m gs
g v
3 o
r
3 3 mb sb
g v
2
2
1
o
m
r
g
4
4
1
o
m
r
g
i
x

( )
2
1 2 1
4 1 3 2
4 3
1 2 3 3 3 3
3 3 4 3
2 2
2 2
4 4
1 3 3
1
1 4 1
4 4
2
1
0
1 1
where
D D GS TH
D D D D
ref D D out
gs gs s gs g s
sb s g g
x
gs x o
m m
s s
m s s
eq m eq
eq o ref o o ref o
m m
I I V V
I I I I
I I I I
v v v v v v
v v v v
i
v i r
g g
v v
g v v
R g R
R r R r r R r
g g

= =
= =
= = =
= = =
= =
| |
=
|
\ .

+ = =
| | | |
= + +
| |
\ . \ .
1
2
o
o
r
r
ref
R
4 s
v
4 g
v
10-Oct-13 ENEE419A Abshire Fall 2013
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Modified Wilson Current Mirror
4 4
4
4
4 4 4 4 4
4 4
4
4
4 4 4 4 4 1 3
4
3
3 3 3 3
3
3
3 3 3 3
3
1
1
1
1
1
1
1
1
1
s o
m
s
gs g s o
m m ref
ref o
m
g gs s s s m eq s
m ref
x s
x m gs mb sb
o
gs
x
o o m o mb
x x o
v r
g
v
v v v i r
g g R
R r
g
v v v v v g R v
g R
v v
i g v g v
r
v
v
R r g r g
i i r
| |

|
| |

\ .
= = =
|
+ | |
\ .
+
|
\ .
(
= + =
(
+
(

= +
(
= + +
(

( )
3
3 3 3 1 3 3
2
2
3 3 3 3 1 3 3
3
2
1
1 1
1
2
s
x
x
o o m o m eq mb o
x m
mb o m o m m o eq
m o
o o
m
v
i
v
R r g r g R g r
i g
g r g r g g r R
g r
r r
g
(
(

(
= + + + +

+ + +
= + +
10-Oct-13 ENEE419A Abshire Fall 2013
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Transient Response
Whats the response when the
output voltage changes abruptly?
I
D1

I
D2

M
2
M
1

R
1
m
g
2 gd
C
2 gs
C
1 gs
C
S
D
R
( )
( )
( ) ( )
2
1
1 2
1
2
1
1 2 2
1
2
1 2 2
2 2
2
2 2 2
2
1
1
1
1
1
1
1
2 2 2
GS
GS step
GS
gd
m
GS
gs gs
m
gd
m
GS step
gs gs gd
m
gd
GS step
gs gs gd
o GS GS THN GS THN GS m GS
Z
V V
Z
j C
R
g
Z
j C C R
g
j R C
g
V V
j C C C R
g
C
V V
C C C
I V V V V V V g V

=
+
=
+ +
| |
|
\ .
=
+ + +
=
+ +
= + = +
10-Oct-13 ENEE419A Abshire Fall 2013
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Transient Response
How long will it take for V
GS
to decay back to its DC value?
Depends on whether the transition is positive pulse or negative
pulse!
If its a negative going pulse, the effective resistance at the input
is R and the time constant is

If its a positive going pulse, the effective resistance is 1/g
m1
and
the time constant is
( )
1 2 2 gs gs gd
R C C C = + +
( )
1 2 2
1
1
gs gs gd
m
C C C
g
= + +
10-Oct-13 ENEE419A Abshire Fall 2013