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TARGET SPECIFICATION
RDS(on) 15m
IOUT 30 A
VCC 36 V
CMOS COMPATIBLE INPUT I PROPORTIONAL LOAD CURRENT SENSE I SHORTED LOAD PROTECTION I UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN I OVERVOLTAGE CLAMP I THERMAL SHUTDOWN I CURRENT LIMITATION PROTECTION AGAINST LOSS OF GROUND AND LOSS VCC I VERY LOW STAND-BY POWER DISSIPATION I REVERSE BATTERY PROTECTION (*)
I
PowerSSO-24
ORDER CODES
PACKAGE PowerSSO-24 TUBE VN920PEP T&R VN920PEP13TR
DESCRIPTION The VN920PEP is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy BLOCK DIAGRAM
spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protect the device against overload. The device integrates an analog current sense output which delivers a current proportional to the load current. Device automatically turns off in case of ground pin disconnection.
VCC
VCC CLAMP
GND
Power CLAMP
DRIVER INPUT LOGIC CURRENT LIMITER VDS LIMITER IOUT K OVERTEMPERATURE DETECTION CURRENT SENSE OUTPUT
March 2004 - Revision 1.5 (Working document) This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
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VN920PEP
ABSOLUTE MAXIMUM RATING
Symbol VCC - VCC - IGND IOUT - IOUT IIN VCSENSE Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current Current Sense Maximum Voltage Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) VESD - INPUT - CURRENT SENSE - OUTPUT - VCC Ptot Tj Tc TSTG Power Dissipation TC25C Junction Operating Temperature Case Operating Temperature Storage Temperature 4000 2000 5000 5000 96 Internally limited - 40 to 150 - 55 to 150 V V V V W C C C Value 41 - 0.3 - 200 Internally Limited - 40 +/- 10 -3 +15 Unit V V mA A A mA V V
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VN920PEP
THERMAL DATA
Symbol Rthj-case Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient
Max Max
(*) When mounted on a standard single-sided FR-4 board with 1cm2 of Cu (at least 35m thick).
IOUT=10A; Tj =25C
Clamp Voltage
SWITCHING (VCC=13V)
Symbol td(on) td(off) Parameter Turn-on Delay Time Turn-off Delay Time Test Conditions RL=1.3 (see figure 2) RL=1.3 (see figure 2) RL=1.3 (see figure 2) RL=1.3 (see figure 2) Min Typ 50 50 See relative diagram See relative diagram Max Unit s s V/s
V/s
LOGIC INPUT
Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN=1.25V VIN=3.25V IIN=1mA IIN=-1mA 0.5 6 6.8 -0.7 Min 1 3.25 10 8 Typ Max 1.25 Unit V A V A V V V
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VN920PEP
ELECTRICAL CHARACTERISTICS (continued) CURRENT SENSE (9VVCC16V) (See Fig. 1)
Symbol K1 dK1/K1 K2 dK2/K2 K3 dK3/K3 Parameter IOUT/ISENSE Current Sense Ratio Drift IOUT/ISENSE Current Sense Ratio Drift IOUT/ISENSE Current Sense Ratio Drift Analog Sense Leakage Current Test Conditions IOUT=1A; VSENSE=0.5V; Tj= -40C...150C IOUT=1A; VSENSE=0.5V; Tj= -40C...+150C IOUT=10A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT=10A; VSENSE=4V; Tj=-40C...+150C IOUT=30A; VSENSE=4V; Tj=-40C Tj=25C...150C IOUT=30A; VSENSE=4V; Tj=-40C...+150C VCC=6...16V; IOUT=0A;VSENSE=0V; Tj=-40C...+150C Min 3300 -10 4200 4400 -8 4200 4400 -6 4900 4900 4900 4900 Typ 4400 Max 6000 +10 6000 5750 +8 5500 5250 +6 % A V V 5.5 V % % Unit
ISENSEO
0 2 4
10
VSENSE VSENSEH
RVSENSEH tDSENSE
Max Analog Sense Output VCC=5.5V; IOUT=5A; RSENSE=10K Voltage VCC>8V; IOUT=10A; RSENSE=10K Sense Voltage in Overtemperature VCC=13V; RSENSE=3.9K conditions Analog sense output impedance in VCC=13V; Tj>TTSD; Output Open overtemperature condition Current sense delay to 90% I SENSE (see note 2) response
400 500
PROTECTIONS
Symbol TTSD TR Thyst Ilim Vdemag VON Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis DC Short Circuit Current Turn-off Output Clamp Voltage Output Voltage Drop Limitation VCC=13V 5V<VCC<36V IOUT=2A; VIN=0V; L=6mH IOUT=1A; Tj=-40C....+150C Test Conditions Min 150 135 7 30 Typ 175 15 45 Max 200 Unit C C C A A V mV
75 75
Note 2: current sense signal delay after positive input slope Note: Sense pin doesnt have to be left floating.
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VN920PEP
Figure 1: IOUT/I SENSE versus IOUT
IOUT/I SENSE
6500
6000
max.Tj=-40C
5500
max.Tj=25...150C
5000
min.Tj=25...150C
4500
typical value
4000
min.Tj=-40C
3500
3000 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
IOUT (A)
90% dVOUT/dt(off) tf t
INPUT
tDSENSE
t td(off)
td(on)
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VN920PEP
TRUTH TABLE
CONDITIONS Normal operation Overtemperature Undervoltage Overvoltage INPUT L H L H L H L H L H H L H L OUTPUT L H L L L L L L L L L H H L SENSE 0 Nominal 0 VSENSEH 0 0 0 0 0 (Tj<TTSD) 0 (Tj>TTSD) VSENSEH 0 < Nominal 0
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
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VN920PEP
Figure 3: Waveforms
OVERVOLTAGE
VOV
VOVhyst
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VN920PEP
APPLICATION SCHEMATIC
+5V
Rprot INPUT
VCC
VGND
RGND
DGND
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / (IS(on)max). 2) RGND (VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the devices datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT line is also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT pin is to leave it unconnected, while unused SENSE pin has to be connected to Ground pin.
C I/Os PROTECTION:
If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot ) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
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VN920PEP
A IN
0.8 8.8
IM
10.1 0.55 3.9 6.1
PR EL
N X Y
RY
MAX. 2.22 2.15 0.07 0.46 0.32 10.4 7.6 0.1 0.06 10.5 0.4 0.85 10 4.3 6.5 9/10
VN920PEP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics. All other names are the property of their respective owners 2004 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States http://www.st.com
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