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TYPE VNQ830PEP
(*) Per each channel
RDS(on) 60 m (*)
IOUT 14 A (*)
VCC 36 V
CMOS COMPATIBLE INPUTS OPEN DRAIN STATUS OUTPUTS I ON STATE OPEN LOAD DETECTION I OFF STATE OPEN LOAD DETECTION I SHORTED LOAD PROTECTION I UNDERVOLTAGE AND OVERVOLTAGE SHUTDOWN I LOSS OF GROUND PROTECTION I VERY LOW STAND-BY CURRENT I REVERSE BATTERY PROTECTION (**)
I I
PowerSSO-24
ORDER CODES
PACKAGE TUBE PowerSSO-24 VNQ830PEP T&R VNQ830PEP13TR
DESCRIPTION The VNQ830PEP is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltage clamp protects the device BLOCK DIAGRAM
against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects open load condition both in on and off state. Output shorted to VCC is detected in the off state.Device automatically turns off in case of ground pin disconnection.
VCC
VCC CLAMP
OVERVOLTAGE VCC UNDERVOLTAGE INPUT2 CONTROL & PROTECTION STATUS2 EQUIVALENT TO CHANNEL1
OUTPUT1
CLAMP 1
OUTPUT2
DRIVER 1 VCC CURRENT LIMITER 1 INPUT3 CONTROL & PROTECTION STATUS3 EQUIVALENT TO CHANNEL1
OVERTEMP. 1 OPENLOAD ON 1
OUTPUT3
VCC OPENLOAD OFF 1 INPUT4 CONTROL & PROTECTION STATUS4 EQUIVALENT TO CHANNEL1
OUTPUT4
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This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
VNQ830PEP
ABSOLUTE MAXIMUM RATING
Symbol VCC - VCC - IGND IOUT - IOUT IIN ISTAT Parameter DC Supply Voltage Reverse DC Supply Voltage DC Reverse Ground Pin Current DC Output Current Reverse DC Output Current DC Input Current DC Status Current Electrostatic Discharge (Human Body Model: R=1.5K; C=100pF) - INPUT VESD - STATUS - OUTPUT Ptot Tj Tc Tstg - VCC Power Dissipation TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature Value 41 - 0.3 - 200 Internally Limited - 12 +/- 10 +/- 10 4000 4000 5000 5000 83 Internally Limited - 40 to 150 - 55 to 150 Unit V V mA A A mA mA V V V V W C C C
IS VCC
VSTATn
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VNQ830PEP
THERMAL DATA
Symbol Rthj-case Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Value 1.5 52 (*) Unit C/W C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air flow.
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40C< Tj <150C, unless otherwise specified) POWER OUTPUT
Symbol VCC VUSD VOV RON (*) Parameter Operating Supply Voltage Undervoltage Shut-down Overvoltage Shut-down On State Resistance Test Conditions Min 5.5 3 36 Typ 13 4 Max 36 5.5 60 20 20 8.5 0 -75 120 60 40 13.5 50 0 5 3 Unit V V V m m A A mA A A A A
IOUT =2A; Tj =25 C IOUT =2A; VCC> 8V Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V; Tj=25C On State; VCC=13V; VIN=5V; IOUT=0A VIN=VOUT=0V VIN=0V; VOUT=3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C
IS
Supply Current
Off State Output Current Off State Output Current Off State Output Current Off State Output Current
V/s
LOGIC INPUT
Symbol VIL IIL VIH IIH VI(hyst) VICL Parameter Input Low Level Low Level Input Current Input High Level High Level Input Current Input Hysteresis Voltage Input Clamp Voltage Test Conditions VIN = 1.25V VIN = 3.25V IIN = 1mA IIN = -1mA 0.5 6 6.8 -0.7 Min 1 3.25 10 8 Typ Max 1.25 Unit V A V A V V V
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VNQ830PEP
ELECTRICAL CHARACTERISTICS (continued) VCC - OUTPUT DIODE
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=2A; Tj=150C Min Typ Max 0.6 Unit V
STATUS PIN
Symbol VSTAT ILSTAT CSTAT VSCL Parameter Test Conditions Status Low Output Voltage ISTAT= 1.6 mA Status Leakage Current Normal Operation; VSTAT= 5V Status Pin Input Normal Operation; VSTAT= 5V Capacitance ISTAT= 1mA Status Clamp Voltage ISTAT= - 1mA Min Typ Max 0.5 10 100 6 6.8 -0.7 8 Unit V A pF V V
PROTECTIONS
Symbol TTSD TR Thyst tSDL Ilim Vdemag Parameter Shut-down Temperature Reset Temperature Thermal Hysteresis Status Delay in Overload Conditions Current limitation Turn-off Output Clamp Voltage Test Conditions Min 150 135 7 Typ 175 15 20 14 18 23 23 VCC-41 VCC-48 VCC-55 Max 200 Unit C C C s A A V
Tj>TTSD
VCC=13V 5.5V < VCC < 36V IOUT=2A; L= 6mH
OPENLOAD DETECTION
Symbol IOL tDOL(on) VOL TDOL(off) Parameter Openload ON State Detection Threshold Openload ON State Detection Delay Openload OFF State Voltage Detection Threshold Openload Detection Delay at Turn Off Test Conditions VIN=5V IOUT=0A VIN=0V 1.5 2.5 Min 35 Typ 70 Max 140 200 3.5 1000 OVER TEMP STATUS TIMING Tj > TTSD VINn Unit mA s V s
OPEN LOAD STATUS TIMING (with external pull-up) VOUT > VOL VINn IOUT< IOL
VSTATn
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VNQ830PEP
dVOUT/dt(on)
dVOUT/dt(off)
10% t VINn
td(on)
td(off)
TRUTH TABLE
CONDITIONS Normal Operation Current Limitation Overtemperature Undervoltage Overvoltage Output Voltage > VOL Output Current < IOL INPUT L H L H H L H L H L H L H L H OUTPUT L H L X X L L L L L L H H L H STATUS H H H (Tj < TTSD) H (Tj > TTSD) L H L X X H H L H H L
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VNQ830PEP
ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN
ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 ISO T/R 7637/1 Test Pulse 1 2 3a 3b 4 5 CLASS C E I -25 V +25 V -25 V +25 V -4 V +26.5 V II -50 V +50 V -50 V +50 V -5 V +46.5 V TEST LEVELS III -75 V +75 V -100 V +75 V -6 V +66.5 V TEST LEVELS RESULTS II III C C C C C C C C C C E E IV -100 V +100 V -150 V +100 V -7 V +86.5 V Delays and Impedance 2 ms 10 0.2 ms 10 0.1 s 50 0.1 s 50 100 ms, 0.01 400 ms, 2
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
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VNQ830PEP
Figure 1: Waveforms
NORMAL OPERATION INPUTn OUTPUT VOLTAGEn STATUSn UNDERVOLTAGE VCC INPUTn OUTPUT VOLTAGEn STATUSn undefined VUSD VUSDhyst
OVERVOLTAGE VCC<VOV VCC INPUTn OUTPUT VOLTAGEn STATUSn OPEN LOAD with external pull-up INPUTn OUTPUT VOLTAGEn STATUSn VOUT>VOL VOL VCC>VOV
OPEN LOAD without external pull-up INPUTn OUTPUT VOLTAGEn STATUSn OVERTEMPERATURE Tj INPUTn OUTPUT CURRENTn STATUSn TTSD TR
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VNQ830PEP
APPLICATION SCHEMATIC
GND
RGND VGND
DGND
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / IS(on)max. 2) RGND (VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the devices datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary
depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
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VNQ830PEP
C I/Os PROTECTION:
If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and I latchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
V batt.
VPU
GROUND
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VNQ830PEP
A IN
0.8 8.8
IM
10.1 0.55 3.9 6.1
PR EL
N X Y 10/11
RY
MAX. 2.22 2.15 0.07 0.46 0.32 10.4 7.6 0.1 0.06 10.5 0.4 0.85 10 4.3 6.5
VNQ830PEP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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