Escolar Documentos
Profissional Documentos
Cultura Documentos
Features
o Miniature (3mm x 5mm) 8-Pin MAX Package
MAX5141MAX5144
Pin Configurations
TOP VIEW
REF 1
8 GND
REF 1 CS 2 SCLK 3
10 GND 9 VDD
Applications
High-Resolution and Gain Adjustment Industrial Process Control Automated Test Equipment Data-Acquisition Systems
CS
SCLK 3 DIN 4
MAX5141 MAX5143
MAX5142 MAX5144
DIN 4 CLR 5
MAX
MAX
Ordering Information
PART MAX5141EUA MAX5142EUB MAX5143EUA MAX5144EUB TEMP. RANGE -40C to +85C -40C to +85C -40C to +85C -40C to +85C PIN-PACKAGE 8 MAX 10 MAX 8 MAX 10 MAX INL (LSB) 1 1 1 1 SUPPLY RANGE (V) 5 5 3 3 OUTPUT SWING Unipolar Bipolar Unipolar Bipolar
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +3V (MAX5143/MAX5144) or +5V (MAX5141/MAX5142), VREF = +2.5V, TA = TMIN to TMAX, CL = 10pF, GND = 0, RL = , unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYMBOL CONDITIONS MIN 14 0.5 0.5 0.05 10 0.1 ROUT (Note 2) RFB/RINV Ratio error BZSTC PSR +2.7V VDD +3.3V (MAX5143/MAX5144) +4.5V VDD +5.5V (MAX5141/MAX5142) (Note 3) Unipolar mode Bipolar mode 2.0 10 6 15 1 7 0.2 0.5 1 1 VDD 6.2 1 0.03 20 1 1 2 TYP MAX UNITS Bits LSB LSB LSB ppm/C LSB ppm/C k
STATIC PERFORMANCEANALOG SECTION Resolution N Differential Nonlinearity Integral Nonlinearity Zero-Code Offset Error Zero-Code Tempco Gain Error (Note 1) Gain-Error Tempco DAC Output Resistance Bipolar Resistor Matching Bipolar Zero Offset Error Bipolar Zero Tempco Power-Supply Rejection REFERENCE INPUT Reference Input Range Reference Input Resistance (Note 4) DNL INL ZSE ZSTC Guaranteed monotonic MAX514_
%
LSB ppm/C LSB
VREF RREF
V k
DYNAMIC PERFORMANCEANALOG SECTION Voltage-Output Slew Rate SR (Note 5) Output Settling Time DAC Glitch Impulse Digital Feedthrough To 1/2LSB of FS Major-carry transition Code = 0000 hex; CS = VDD; SCLK, DIN = 0V to VDD levels
_______________________________________________________________________________________
STATIC PERFORMANCEDIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Input Capacitance Hysteresis Voltage POWER SUPPLY Positive Supply Range (Note 7) Positive Supply Current Power Dissipation VDD IDD PD V mA mW VIH VIL IIN CIN VH V V A pF V
TIMING CHARACTERISTICS
(VDD = +2.7V to +3.3V (MAX5143/MAX5144), VDD = +4.5V to +5.5V (MAX5141/MAX5142), VREF = +2.5V, GND = 0, CMOS inputs, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Figure 1) PARAMETER SCLK Frequency SCLK Pulse Width High SCLK Pulse Width Low CS Low to SCLK High Setup CS High to SCLK High Setup SCLK High to CS Low Hold SCLK High to CS High Hold DIN to SCLK High Setup DIN to SCLK High Hold CLR Pulse Width Low VDD High to CS Low (Power-Up Delay) SYMBOL fCLK tCH tCL tCSS0 tCSS1 tCSH0 tCSH1 tDS tDH tCLW (Note 6) 20 20 15 15 35 20 15 0 20 20 CONDITIONS MIN TYP MAX 25 UNITS MHz ns ns ns ns ns ns ns ns ns s
Note 1: Gain error tested at VREF = +2.0V, +2.5V, and +3.0V (MAX5143/MAX5144) or VREF = +2.0V, +2.5V, +3.0V, and +5.0V (MAX5141/MAX5142). Note 2: ROUT tolerance is typically 20%. Note 3: Min/max range guaranteed by gain-error test. Operation outside min/max limits will result in degraded performance. Note 4: Reference input resistance is code dependent, minimum at 2155 hex in unipolar mode, 1155 hex in bipolar mode. Note 5: Slew-rate value is measured from 10% to 90%. Note 6: Guaranteed by design. Not production tested. Note 7: Guaranteed by power-supply rejection test and Timing Characteristics. _______________________________________________________________________________________ 3
0.12 0.11 SUPPLY CURRENT (mA) 0.10 0.09 0.08 0.07 0.06 0.05 VDD = +3V
VDD = +5V
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 REFERENCE VOLTAGE (V)
0.5
1.0
1.5
2.0
2.5
3.0
0.8 0.6 0.4 INL (LSB) 0.2 0 -0.2 -0.4 -INL +INL
0.2 0.1 0 DNL (LSB) -0.1 -0.2 -0.3 -0.4 -DNL +DNL
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (C)
TEMPERATURE (C)
0 -0.05 GAIN ERROR (LSB) -0.10 -0.15 -0.20 -0.25 -0.30 -40 -15 10 35 60
-0.5 85 0 2.50k 5.00k 7.50k 10.00k 12.50k 15.00k CODE TEMPERATURE (C)
_______________________________________________________________________________________
140 120 REFERENCE CURRENT (A) 100 80 60 40 20 0 0 5k 10k INPUT CODE 15k
CS 2V/div
CS 2V/div
AOUT 2V/div
DIGITAL FEEDTHROUGH
MAX5141/44 toc15
CS 1V/div
AOUT 20mV/div
AOUT 10mV/div
50ns/div
0.70 0.65 0.60 INL (LSB) 0.55 0.50 0.45 0.40 2.0 2.5 3.0 3.5 4.0 4.5
MAX5141/44 toc17
VDD 2V/div
VOUT 10mV/div
5.0
50ms/div
_______________________________________________________________________________________
;;;;;;;;; ;; ;;;;;;
tCSH1 tLDACS CS tCSHO tCSSO tCH tCL tCSS1 SCLK tDH tDS DIN D13 D12 S0
_______________________________________________________________________________________
1F
0.1F 0.1F
MC68XXXX
PCS0 MOSI SCLK (GND) IC1 CS DIN SCLK CLR
VDD
MAX6166
+2.5V
+3V/+5V
1F
MC68XXXX
PCS0 MOSI SCLK IC1 (GND) CS DIN
VDD
SCLK CLR
MAX5142 MAX5144
GND
-5V
Detailed Description
The MAX5141MAX5144 voltage-output, 14-bit digitalto-analog converters (DACs) offer full 14-bit performance with less than 1LSB integral linearity error and less than 1LSB differential linearity error, thus ensuring monotonic performance. Serial data transfer minimizes the number of package pins required.
The MAX5141 MAX5144 are composed of two matched DAC sections, with a 10-bit inverted R-2R DAC forming the ten LSBs and the four MSBs derived from 15 identically matched resistors. This architecture allows the lowest glitch energy to be transferred to the DAC output on major-carry transitions. It also lowers the DAC output impedance by a factor of eight compared
7
_______________________________________________________________________________________
Applications Information
Reference and Ground Inputs
The MAX5141MAX5144 operate with external voltage references from +2V to VDD, and maintain 14-bit performance if certain guidelines are followed when selecting and applying the reference. Ideally, the references temperature coefficient should be less than 0.5ppm/C to maintain 14-bit accuracy to within 1LSB over the -40C to +85C extended temperature range. Since this converter is designed as an inverted R-2R voltage-mode DAC, the input resistance seen by the voltage reference is code dependent. In unipolar mode, the worst-case input-resistance variation is from 11.5k (at code 2155 hex) to 200k (at code 0000 hex). The maximum change in load current for a +2.5V reference is +2.5V / 11.5k = 217A; therefore, the required load regulation is 28ppm/mA for a maximum error of 0.1LSB. This implies a reference output impedance of less than 72m. In addition, the signal-path impedance from the voltage reference to the reference input must be kept low because it contributes directly to the load-regulation error. The requirement for a low-impedance voltage reference is met with capacitor bypassing at the reference inputs and ground. A 0.1F ceramic capacitor with short leads between REF and GND provides high-frequency bypassing. A surface-mount ceramic chip capacitor is preferred because it has the lowest inductance. An additional 1F between REF and GND provides low-frequency bypassing. A low-ESR tantalum, film, or organic semiconductor capacitor works well. Leaded capacitors are acceptable because impedance is not as criti-
Digital Interface
The MAX5141MAX5144 digital interface is a standard 3-wire connection compatible with SPI/QSPI/ MICROWIRE interfaces. The chip-select input ( CS) frames the serial data loading at the data-input pin (DIN). Immediately following CSs high-to-low transition, the data is shifted synchronously and latched into the input register on the rising edge of the serial clock input (SCLK). After 16 bits (14 data bits, plus two subbits set to zero) have been loaded into the serial input register, it transfers its contents to the DAC latch on CSs low-tohigh transition (Figure 3). Note that if CS is not kept low during the entire 16 SCLK cycles, data will be corrupted. In this case, reload the DAC latch with a new 16-bit word.
External Reference
The MAX5141MAX5144 operate with external voltage references from +2V to VDD. The reference voltage determines the DACs full-scale output voltage.
Power-On Reset
The power-on reset circuit sets the output of the MAX5141/MAX5143 to code 0 and the output of the MAX5142/MAX5144 to code 8192 when V DD is first
; ; ;;
CS DAC UPDATED SCLK SUB-BITS DIN D13 D12 D11 D10 D9 D8 D7 D6 MSB D5 D4 D3 D2 D1 D0 S1 S0 LSB
_______________________________________________________________________________________
MAX5141MAX5144
Unbuffered Operation
Unbuffered operation reduces power consumption as well as offset error contributed by the external output buffer. The R-2R DAC output is available directly at OUT, allowing 14-bit performance from +VREF to GND without degradation at zero scale. The DACs output impedance is also low enough to drive medium loads (RL > 60k) without degradation of INL or DNL; only the gain error is increased by externally loading the DAC output.
_______________________________________________________________________________________
Bipolar Configuration
Figure 2b shows the MAX5141MAX5144 configured for bipolar operation with an external op amp. The op amp is set for unity gain with an offset of -1/2VREF. Table 2 shows the offset binary codes for this circuit (less than 0.25 inches).
Functional Diagrams
VDD VDD
CLR
GND
GND
Chip Information
TRANSISTOR COUNT: 2800 PROCESS: BiCMOS
10
______________________________________________________________________________________
MAX5141-MAX5144
______________________________________________________________________________________
11
MAX5141MAX5144
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________12 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.