Graduation Projects in Modern Communications Receivers/Transceivers

Today's world is full of wired and wireless technology. Almost everybody, including kids, have mobile phones. Mobile phone providers are competing vehemently in the arena of 3G, 3.5G and 3.75G telephony. As competition in the market heats up, they are expected to advance to 4G technology. As systems become more and more complex, early exposure to the underlying techniques and skills, is an absolute MUST for anyone interested in keeping up with contemporary advancements. Thus, in today's world, an engineer interested in high technology state-of-the-art communications technology must possess a multitude of skills. These skills are absolutely necessary, but perhaps not sufficient, in today's industry. These skills include, but are not limited to: 1- Communications System Design (Floating point) a. Matlab programming/simulation b. C programming/simulation 2- Communications System Design (Fixed point) a. Matlab programming/simulation b. C programming/simulation 3- Hardware Implementation a. Register Transfer Level (Verilog simulation/synthesis) b. FPGA Implementation (Xilinx/Altera) c. Prototyping/testing To this end, Varkon Semiconductors is willing to sponsor a limited number of groups, in the hope that, on graduating, the participants will be ready to pursue a career in the design and implementation of advanced communications devices. If you are interested, please apply directly, and as a group to: gradprojects@varkonsemi.com See the last page for the required information.

Graduation Project 1: Long Term Evolution (LTE)

Supervisor: Dr. Ahmed F. Shalash Sponsor: Varkon Semiconductors
Long Term Evolution (LTE) is the trademarked project name of a high performance 4th generation air interface for cellular mobile telephony. Version 9.10 of the standard, which is upheld by the 3rd Generation Partnership Project (3GPP), was issued in March 2010. The name was trademarked by the European Telecommunications Standards Institute, one of the associations within the partnership. This standard is one of the two major candidates that are likely to supersede currently implemented mobile protocols, such as GSM and CDMA, to provide mobile broadband wireless access. The scope of the project covers Key building blocks in an LTE transceiver. This includes:

Matlab Modeling (Floating Point) Matlab Modeling (Fixed Point) Verilog RTL Coding/simulation FPGA Prototyping (including test environment)

The Key blocks in the Signal Chain include:

Channel Estimation Fast Fourier Transform with Dynamic Scaling

The Key blocks in the Bit Chains include:

Forward error correction (Turbo Decoder) Viterbi Decoder

Graduation Project 2: Digital Television (DVB-T2)

Supervisor: Dr. Ahmed F. Shalash
Sponsor: Varkon Semiconductors

Traditionally, TV broadcasts worldwide have been analogue. However, recently, an increasing number of countries has begun to adopt digital terrestrial TV (DTT) broadcast and digital cable TV along with the already existing digital satellite TV. The adoption of digital TV is pushed by several factors. The availability of high definition personal recorders and the widespread of DVD players have encouraged consumers to switch to digital home entertainment devices and be more accepting to the switch off to digital TV. The already digital satellite TV has witnessed an overwhelming spread around the world and more particularly in the middle-east. The improved functionality and the increased number of channels sent over the satellite makes the switch off easier. The success of the digital TV experiments in several countries, especially Europe, that is the adoption the DVB standards gives a great motivator to middle east countries to make the switch off. Currently, most countries have set near dates for a hard switch off from analogue TV to digital TV. Egypt is scheduled to make the switch off in 2015.

The scope of the project covers Key building blocks in an LTE transceiver. This includes:

Matlab Modeling (Floating Point) Matlab Modeling (Fixed Point) Verilog RTL Coding FPGA Prototyping (including test environment)

The Key blocks in the Signal Chain include:

Channel Estimation Fast Fourier Transform with Dynamic Scaling

The Key blocks in the Bit Chains include:

Forward error correction (LDPC) BCH Decoder

Applying:
If you are interested, please send the following information in an email attachment to: gradprojects@varkonsemi.com

Apply as groups In a single page, please list contact information for your group (email+phone) Number of members in your group. For each and every Group Member: 1- Name 2- Third year appreciations 3- Accumulative appreciation for the previous four years