CSW 353

Assembly Language
Dr. Salma Hamdy
9/30/2013

s.hamdy@cis.asu.edu.eg

Computer Architecture
Computer = HW + SW

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Computer Architecture (cont.)

Design (implementation): specs develop HW for the system: what HW to use and how to connect the parts. Organization: the way the HW components operate they are in place and we investigate the organizational structure to verify the computer parts operate as intended. Architecture: structure and behavior of the computer as seen by the user. Includes information format, instruction set, techniques for addressing memory.
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Computer Architecture (cont.)

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Computer Architecture (cont.)

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Computer Architecture (cont.)

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Instruction Set Architecture

Instruction Set Architecture (ISA) can be defined as an interface to allow easy communication between the programmer and the hardware.

ISA prepares the microprocessor to respond to all the user commands like execution of data, copying data, deleting it, editing, etc.
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Instruction Set Architecture (cont.)

ISA Addressing Mode
The manner of accessing memory Direct vs indricet.
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IS
The group of instructions given to the computer. Opcode + Operand
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Instruction Set Architecture (cont.)

Does the computer performance depend on ISA?

CPU performance depends on Instruction Count, CPI (Cycles per instruction) and Clock cycle time. And all three are affected by the instruction set architecture.
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CISC and RISC Architectures

Intel supporters want the hardware to bear more responsibility and software on the easier side. This would impact the hardware designing to be more complex but software coding would be relatively easy. On the other hand, Apple supporters want the hardware to be simple and easy and software to take the major role. Intels hardware oriented approach is termed as Complex Instruction Set Computer (CISC) while that of Apple is Reduced Instruction Set Computer (RISC).
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CISC and RISC Architectures (cont.)

Complex Instruction Set Computer (CISC) Attempts to minimize the number of instructions per program, sacrificing the number of cycles per instruction. Reduced Instruction Set Computer (RISC) reducing the cycles per instruction (i.e. simple instructions take less time to interpret) at the cost of the number of instructions per program.
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CISC and RISC Architectures (cont.) CISC Architecture

Memory was expensive bigger program more storage more money. Reduce number of instructions per program by having multiple operations within a single instruction. Lead to many different kinds of instructions that access memory. Variable length instruction. Unpredictable fetch-decode-execute time. More complex instruction set Handled by hardware. Example: x86 ISA
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CISC and RISC Architectures (cont.) RISC Architecture

To reduce the ISA Provide minimal set of instructions that could carry out all essential operations. Instruction complexity is reduced by: 1. Having few simple instructions that are the same length. 2. Allow memory access only with explicit load/store instructions. Each instruction performs less work. Instruction execution time among different instructions is consistent. The complexity that is removed from ISA is moved into the domain of the assembly programmer/compiler. 9/30/2013 13 Examples: LC3, MIPS, PowerPC (IBM), SPARC (Sun).

CISC and RISC Architectures (cont.)

CISC
Many complex instructions. Variable length instructions. Complexity in microcode. Many instructions can access memory. Many addressing modes.
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RISC
Simple instructions, few in number. Fixed length instructions. Complexity in compiler. Only LOAD/STORE instructions access memory. Few addressing modes.
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CISC and RISC Architectures (cont.)

Intel x86 CISC. Motorola/PowerPC RISC. So the type of binaries/programs which run are different. Intel runs Linux/Windows. RISC runs Macintosh/apple computers (latest have Intel also).
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Building A Computer
Adapt an architecture. - CISC Implement the design, organization, and IS of that architecture. - Mano - Intel x86
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Computer Architecture (cont.)

x86 assembly languages are used to produce object code for the x86 class of processors.

8086 Assembly.

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What is Assembly Language?

Talking to your Computer 1- Machine Language 2- Assembly Language 3- High-level Language

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What is Assembly Language? (cont.)

Talking to your Computer 2- Assembly Language

- English-like abbreviations. - Requires assembler. - Still too many instructions.

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What is Assembly Language? (cont.)

A low-level programming language in which there is a very strong correspondence between the language and the architecture's machine code instructions. Each assembly language is specific to a particular computer architecture. Converted into executable machine code by an assembler.
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CSW 353
(Assembly Language)

Computer Architecture
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Course Logistics Objectives

Know the basics of computer organization and instruction set architecture. Know the basic components of modern computers, and understand how they work. Understand how processing, memory and input/output systems are organized and how pipelining could improve the performance of a computer. Elaborate the knowledge by building a simple computer using either a programming language or drawing a chart. Solve problems related to processor, memory and input/output performance.
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Course Logistics Staff

Teachers
Dr. Tamer Mostafa
csw353@gmail.com

Dr. Salma Hamdy

s.hamdy@cis.asu.edu.eg

Course page
https://piazza.com/faculty_of_computer_and_information_sciences/fall 2013/csw353/home

Access Code: csw353

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Course Logistics General

Class meets: Saturday 11:00-14:00 Monday 11:00-14:00 Lab meets: check your schedule! (3-hour lecture + 3-hour lab) a week. Assessment (100 points)
Final Term Examination Practical Work Mid Term Examination 65 25 10

YOUR JOB read + think + solve + code = HW + lab tasks + exams

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Course Logistics Ethics

Lecture 1. Time management 2. Attendance 3. Manners 4. Mind + hands (if possible) 5. Your rights. 6. My rights. 7. Questions Lab 1. Time management 2. Attend ONLY in your class. 3. Manners 4. Mind + hands (BOTH!!!) 5. Your rights. 6. TAs rights. 7. Questions

Cheating and copied assignments, programs, projects, or code segments, will not be tolerated.
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Course Logistics Textbook

M. Morris Mano, Computer System Architecture 3rd edition, Prentice Hall, 1992.

8086 Assembly reference to be decided.

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Course Logistics Textbook Outline

Chapters 1-4 present the various digital components used in the organization and design of computer systems. Chapters 5-7 cover the steps that a designer must go through to design and program an elementary digital computer. Chapters 8-9 deal with the architecture of the central processing unit. Chapters 11,12 present the organization and architecture of the input-output processor and the memory unit.
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Course Logistics Textbook Outline

Chapter 1: Digital Logic Circuits Chapter 2: Digital Components Chapter 3: Data Representation Chapter 4: Microoperations

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Course Logistics Textbook Outline

Chapter 1: Digital Logic Circuits Chapter 2: Digital Components Chapter 3: Data Representation Chapter 4: Microoperations
Chapter 5: Basic Computer Organization Chapter 6: Programming the Basic Computer Chapter 7: Microporgammed Control

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Course Logistics Textbook Outline

Chapter 1: Digital Logic Circuits Chapter 2: Digital Components Chapter 3: Data Representation Chapter 4: Microoperations
Chapter 5: Basic Computer Organization Chapter 6: Programming the Basic Computer Chapter 7: Microporgammed Control

Chapter 12: Memory Organization

Chapter 8: CPU

Chapter 11: I/O Organization

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Review of Digital Design Basics

1. 2. 3. 4. 5. 6. Logic Gates Boolean Algebra Combinational Circuits Clock Flip-Flops Sequential Circuits

1. Logic Gates
Two voltage levels high and low (1 and 0, true and false). Hence, the use of binary arithmetic/logic in all computers. The manipulation of binary information is done by logic circuits called gates (AND, OR, NOT, etc.)
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2. Boolean Algebra
Equations involving two values and three primary operators: OR : symbol + , X = A + B X is true if at least one of A or B is true AND : symbol . , X = A . B X is true if both A and B are true NOT : symbol , X = A X is the inverted value of A (or symbol ).
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2. Boolean Algebra Basic Rules

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2. Boolean Algebra DeMorgans Laws

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2. Boolean Algebra Logic Function

Representation: Algebraic expression Truth table Logic Diagram

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2. Boolean Algebra Logic Function

A truth table defines the outputs of a logic block for each set of inputs. Consider a block with 3 inputs A, B, C and an output E that is true only if exactly 2 inputs are true.

Can be compressed by only representing cases that have an output of 1 map simplification
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2. Boolean Algebra Logic Block

A logic block has a number of binary inputs and produces a number of binary outputs the simplest logic block is composed of a few transistors. A logic block is termed combinational if the output is only a function of the inputs. A logic block is termed sequential if the block has some internal memory (state) that also influences the output. A basic logic block is the gate (AND, OR, NOT, etc.)
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3. Combinational Circuits
A connected arrangement of logic gates with a set of inputs and outputs. For generating binary control decisions, and provide components required for data processing.

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3. Combinational Circuits (cont.)

Designing a combinational circuit:
1. 2. 3. 4. 5. State problem. Assign letters to input and output variables. Define truth table. Simplify Boolean function for each output. Draw logic diagram.

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3. Combinational Circuits (cont.)

Example1: Addition of two bits (half-adder)

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3. Combinational Circuits (cont.)

Example2: Addition of three bits (full-adder)

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4. Clock
A microprocessor is composed of many different circuits that are operating simultaneously if each circuit X takes in inputs at time TIX, takes time TEX to execute the logic, and produces outputs at time TOX, imagine the complications in co-ordinating the tasks of every circuit. A major school of thought (used in most processors built today): all circuits on the chip share a clock signal (a square wave) that tells every circuit when to accept inputs, how much time they have to execute the logic, and when they must produce outputs.

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4. Clock (cont.)
Rising clock edge Cycle time

Falling clock edge

4 GHz = clock speed = 1 cycle time

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5. Flip Flops
Until now, circuits were combinational when inputs change, the outputs change after a while (time = logic delay through circuit).

Most systems include storage elements need a signal to affect the stored value at discrete instants of time clock pulse.

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5. Flip Flops (cont.)

Flip-flop: a binary cell capable of storing one bit of information. Maintains state until directed by a clock (rising edge or falling edge) to switch state. Different types according to number if inputs and manner by which inputs affects state.
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5. Flip Flops (cont.)

SR Flip-flop Inputs : S (Set) R (Reset), C (Clock). No clock no state change. Clock change from 0 to 1 output affected.

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5. Flip Flops (cont.)

JK Flip-flop Refinement of the SR.

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6. Sequential Circuits
Consists of combinational circuit and a storage element. Rising edge of clock causes the state storage to store some input values. This state will not change for an entire cycle (until next rising edge).

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6. Sequential Circuits (cont.)

Combinational circuit has some time to accept the value of state and inputs and produce outputs. Some of the outputs (for example, the value of next state) may feed back (but through the latch) so theyre only seen in the next cycle.

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6. Sequential Circuits (cont.)

specified by a time sequence of external inputs, external outputs, and internal flipflop binary states. Representation:
Boolean expression (for combinational part). State table. State diagram.
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6. Sequential Circuits (cont.)

Example3: Boolean Fn.

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6. Sequential Circuits (cont.)

Example3: State Table

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6. Sequential Circuits (cont.)

Example3: State Diagram
0/1
00 01

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6. Sequential Circuits (cont.)

Example3: State Diagram

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6. Sequential Circuits (cont.)

Example4: 2-bit counter Consider a clocked sequential circuit that goes through a sequence of repeated binary states 00, 01, 10, and 11 when an external input x is equal to 1. Draw the state diagram.
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6. Sequential Circuits (cont.)

Example4: 2-bit counter

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6. Sequential Circuits (cont.)

Example4: 2-bit counter
x FF A

?
FF Clock
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6. Sequential Circuits (cont.)

Example4: 2-bit counter

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6. Sequential Circuits (cont.)

Example4: 2-bit counter

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6. Sequential Circuits (cont.)

Example4: 2-bit counter

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Next Lecture
Continue review of digital design basics.

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Assignment
- Reading: Chapter 1.

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References
- Digital Design, 4th ed, M. Morris Mano, Prentice Hall, 2006.
-http://www.engineersgarage.com/articles/risc-and-ciscarchitecture?page=1 -http://electronics.stackexchange.com/questions/4185/whatare-different-types-of-computer-architectures -http://www.yale.edu/pclt/PCHW/clockidea.htm

- God bless Google and Wiki!

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